2 * Copyright 2011 Red Hat Inc.
5 * Permission is hereby granted, free of charge, to any person obtaining a
6 * copy of this software and associated documentation files (the
7 * "Software"), to deal in the Software without restriction, including
8 * without limitation the rights to use, copy, modify, merge, publish,
9 * distribute, sub license, and/or sell copies of the Software, and to
10 * permit persons to whom the Software is furnished to do so, subject to
11 * the following conditions:
13 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
14 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
15 * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
16 * THE COPYRIGHT HOLDERS, AUTHORS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM,
17 * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
18 * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
19 * USE OR OTHER DEALINGS IN THE SOFTWARE.
21 * The above copyright notice and this permission notice (including the
22 * next paragraph) shall be included in all copies or substantial portions
28 * Jerome Glisse <glisse@freedesktop.org>
32 * We store the last allocated bo in "hole", we always try to allocate
33 * after the last allocated bo. Principle is that in a linear GPU ring
34 * progression was is after last is the oldest bo we allocated and thus
35 * the first one that should no longer be in use by the GPU.
37 * If it's not the case we skip over the bo after last to the closest
38 * done bo if such one exist. If none exist and we are not asked to
39 * block we report failure to allocate.
41 * If we are asked to block we wait on all the oldest fence of all
42 * rings. We just wait for any of those fence to complete.
47 static void radeon_sa_bo_remove_locked(struct radeon_sa_bo
*sa_bo
);
48 static void radeon_sa_bo_try_free(struct radeon_sa_manager
*sa_manager
);
50 int radeon_sa_bo_manager_init(struct radeon_device
*rdev
,
51 struct radeon_sa_manager
*sa_manager
,
52 unsigned size
, u32 align
, u32 domain
)
56 init_waitqueue_head(&sa_manager
->wq
);
57 sa_manager
->bo
= NULL
;
58 sa_manager
->size
= size
;
59 sa_manager
->domain
= domain
;
60 sa_manager
->align
= align
;
61 sa_manager
->hole
= &sa_manager
->olist
;
62 INIT_LIST_HEAD(&sa_manager
->olist
);
63 for (i
= 0; i
< RADEON_NUM_RINGS
; ++i
) {
64 INIT_LIST_HEAD(&sa_manager
->flist
[i
]);
67 r
= radeon_bo_create(rdev
, size
, align
, true,
68 domain
, NULL
, &sa_manager
->bo
);
70 dev_err(rdev
->dev
, "(%d) failed to allocate bo for manager\n", r
);
77 void radeon_sa_bo_manager_fini(struct radeon_device
*rdev
,
78 struct radeon_sa_manager
*sa_manager
)
80 struct radeon_sa_bo
*sa_bo
, *tmp
;
82 if (!list_empty(&sa_manager
->olist
)) {
83 sa_manager
->hole
= &sa_manager
->olist
,
84 radeon_sa_bo_try_free(sa_manager
);
85 if (!list_empty(&sa_manager
->olist
)) {
86 dev_err(rdev
->dev
, "sa_manager is not empty, clearing anyway\n");
89 list_for_each_entry_safe(sa_bo
, tmp
, &sa_manager
->olist
, olist
) {
90 radeon_sa_bo_remove_locked(sa_bo
);
92 radeon_bo_unref(&sa_manager
->bo
);
96 int radeon_sa_bo_manager_start(struct radeon_device
*rdev
,
97 struct radeon_sa_manager
*sa_manager
)
101 if (sa_manager
->bo
== NULL
) {
102 dev_err(rdev
->dev
, "no bo for sa manager\n");
107 r
= radeon_bo_reserve(sa_manager
->bo
, false);
109 dev_err(rdev
->dev
, "(%d) failed to reserve manager bo\n", r
);
112 r
= radeon_bo_pin(sa_manager
->bo
, sa_manager
->domain
, &sa_manager
->gpu_addr
);
114 radeon_bo_unreserve(sa_manager
->bo
);
115 dev_err(rdev
->dev
, "(%d) failed to pin manager bo\n", r
);
118 r
= radeon_bo_kmap(sa_manager
->bo
, &sa_manager
->cpu_ptr
);
119 radeon_bo_unreserve(sa_manager
->bo
);
123 int radeon_sa_bo_manager_suspend(struct radeon_device
*rdev
,
124 struct radeon_sa_manager
*sa_manager
)
128 if (sa_manager
->bo
== NULL
) {
129 dev_err(rdev
->dev
, "no bo for sa manager\n");
133 r
= radeon_bo_reserve(sa_manager
->bo
, false);
135 radeon_bo_kunmap(sa_manager
->bo
);
136 radeon_bo_unpin(sa_manager
->bo
);
137 radeon_bo_unreserve(sa_manager
->bo
);
142 static void radeon_sa_bo_remove_locked(struct radeon_sa_bo
*sa_bo
)
144 struct radeon_sa_manager
*sa_manager
= sa_bo
->manager
;
145 if (sa_manager
->hole
== &sa_bo
->olist
) {
146 sa_manager
->hole
= sa_bo
->olist
.prev
;
148 list_del_init(&sa_bo
->olist
);
149 list_del_init(&sa_bo
->flist
);
150 radeon_fence_unref(&sa_bo
->fence
);
154 static void radeon_sa_bo_try_free(struct radeon_sa_manager
*sa_manager
)
156 struct radeon_sa_bo
*sa_bo
, *tmp
;
158 if (sa_manager
->hole
->next
== &sa_manager
->olist
)
161 sa_bo
= list_entry(sa_manager
->hole
->next
, struct radeon_sa_bo
, olist
);
162 list_for_each_entry_safe_from(sa_bo
, tmp
, &sa_manager
->olist
, olist
) {
163 if (sa_bo
->fence
== NULL
|| !radeon_fence_signaled(sa_bo
->fence
)) {
166 radeon_sa_bo_remove_locked(sa_bo
);
170 static inline unsigned radeon_sa_bo_hole_soffset(struct radeon_sa_manager
*sa_manager
)
172 struct list_head
*hole
= sa_manager
->hole
;
174 if (hole
!= &sa_manager
->olist
) {
175 return list_entry(hole
, struct radeon_sa_bo
, olist
)->eoffset
;
180 static inline unsigned radeon_sa_bo_hole_eoffset(struct radeon_sa_manager
*sa_manager
)
182 struct list_head
*hole
= sa_manager
->hole
;
184 if (hole
->next
!= &sa_manager
->olist
) {
185 return list_entry(hole
->next
, struct radeon_sa_bo
, olist
)->soffset
;
187 return sa_manager
->size
;
190 static bool radeon_sa_bo_try_alloc(struct radeon_sa_manager
*sa_manager
,
191 struct radeon_sa_bo
*sa_bo
,
192 unsigned size
, unsigned align
)
194 unsigned soffset
, eoffset
, wasted
;
196 soffset
= radeon_sa_bo_hole_soffset(sa_manager
);
197 eoffset
= radeon_sa_bo_hole_eoffset(sa_manager
);
198 wasted
= (align
- (soffset
% align
)) % align
;
200 if ((eoffset
- soffset
) >= (size
+ wasted
)) {
203 sa_bo
->manager
= sa_manager
;
204 sa_bo
->soffset
= soffset
;
205 sa_bo
->eoffset
= soffset
+ size
;
206 list_add(&sa_bo
->olist
, sa_manager
->hole
);
207 INIT_LIST_HEAD(&sa_bo
->flist
);
208 sa_manager
->hole
= &sa_bo
->olist
;
215 * radeon_sa_event - Check if we can stop waiting
217 * @sa_manager: pointer to the sa_manager
218 * @size: number of bytes we want to allocate
219 * @align: alignment we need to match
221 * Check if either there is a fence we can wait for or
222 * enough free memory to satisfy the allocation directly
224 static bool radeon_sa_event(struct radeon_sa_manager
*sa_manager
,
225 unsigned size
, unsigned align
)
227 unsigned soffset
, eoffset
, wasted
;
230 for (i
= 0; i
< RADEON_NUM_RINGS
; ++i
) {
231 if (!list_empty(&sa_manager
->flist
[i
])) {
236 soffset
= radeon_sa_bo_hole_soffset(sa_manager
);
237 eoffset
= radeon_sa_bo_hole_eoffset(sa_manager
);
238 wasted
= (align
- (soffset
% align
)) % align
;
240 if ((eoffset
- soffset
) >= (size
+ wasted
)) {
247 static bool radeon_sa_bo_next_hole(struct radeon_sa_manager
*sa_manager
,
248 struct radeon_fence
**fences
,
251 struct radeon_sa_bo
*best_bo
= NULL
;
252 unsigned i
, soffset
, best
, tmp
;
254 /* if hole points to the end of the buffer */
255 if (sa_manager
->hole
->next
== &sa_manager
->olist
) {
256 /* try again with its beginning */
257 sa_manager
->hole
= &sa_manager
->olist
;
261 soffset
= radeon_sa_bo_hole_soffset(sa_manager
);
262 /* to handle wrap around we add sa_manager->size */
263 best
= sa_manager
->size
* 2;
264 /* go over all fence list and try to find the closest sa_bo
265 * of the current last
267 for (i
= 0; i
< RADEON_NUM_RINGS
; ++i
) {
268 struct radeon_sa_bo
*sa_bo
;
270 if (list_empty(&sa_manager
->flist
[i
])) {
274 sa_bo
= list_first_entry(&sa_manager
->flist
[i
],
275 struct radeon_sa_bo
, flist
);
277 if (!radeon_fence_signaled(sa_bo
->fence
)) {
278 fences
[i
] = sa_bo
->fence
;
282 /* limit the number of tries each ring gets */
287 tmp
= sa_bo
->soffset
;
289 /* wrap around, pretend it's after */
290 tmp
+= sa_manager
->size
;
294 /* this sa bo is the closest one */
301 ++tries
[best_bo
->fence
->ring
];
302 sa_manager
->hole
= best_bo
->olist
.prev
;
304 /* we knew that this one is signaled,
305 so it's save to remote it */
306 radeon_sa_bo_remove_locked(best_bo
);
312 int radeon_sa_bo_new(struct radeon_device
*rdev
,
313 struct radeon_sa_manager
*sa_manager
,
314 struct radeon_sa_bo
**sa_bo
,
315 unsigned size
, unsigned align
, bool block
)
317 struct radeon_fence
*fences
[RADEON_NUM_RINGS
];
318 unsigned tries
[RADEON_NUM_RINGS
];
321 BUG_ON(align
> sa_manager
->align
);
322 BUG_ON(size
> sa_manager
->size
);
324 *sa_bo
= kmalloc(sizeof(struct radeon_sa_bo
), GFP_KERNEL
);
325 if ((*sa_bo
) == NULL
) {
328 (*sa_bo
)->manager
= sa_manager
;
329 (*sa_bo
)->fence
= NULL
;
330 INIT_LIST_HEAD(&(*sa_bo
)->olist
);
331 INIT_LIST_HEAD(&(*sa_bo
)->flist
);
333 spin_lock(&sa_manager
->wq
.lock
);
335 for (i
= 0; i
< RADEON_NUM_RINGS
; ++i
) {
341 radeon_sa_bo_try_free(sa_manager
);
343 if (radeon_sa_bo_try_alloc(sa_manager
, *sa_bo
,
345 spin_unlock(&sa_manager
->wq
.lock
);
349 /* see if we can skip over some allocations */
350 } while (radeon_sa_bo_next_hole(sa_manager
, fences
, tries
));
352 spin_unlock(&sa_manager
->wq
.lock
);
353 r
= radeon_fence_wait_any(rdev
, fences
, false);
354 spin_lock(&sa_manager
->wq
.lock
);
355 /* if we have nothing to wait for block */
356 if (r
== -ENOENT
&& block
) {
357 r
= wait_event_interruptible_locked(
359 radeon_sa_event(sa_manager
, size
, align
)
362 } else if (r
== -ENOENT
) {
368 spin_unlock(&sa_manager
->wq
.lock
);
374 void radeon_sa_bo_free(struct radeon_device
*rdev
, struct radeon_sa_bo
**sa_bo
,
375 struct radeon_fence
*fence
)
377 struct radeon_sa_manager
*sa_manager
;
379 if (sa_bo
== NULL
|| *sa_bo
== NULL
) {
383 sa_manager
= (*sa_bo
)->manager
;
384 spin_lock(&sa_manager
->wq
.lock
);
385 if (fence
&& !radeon_fence_signaled(fence
)) {
386 (*sa_bo
)->fence
= radeon_fence_ref(fence
);
387 list_add_tail(&(*sa_bo
)->flist
,
388 &sa_manager
->flist
[fence
->ring
]);
390 radeon_sa_bo_remove_locked(*sa_bo
);
392 wake_up_all_locked(&sa_manager
->wq
);
393 spin_unlock(&sa_manager
->wq
.lock
);
397 #if defined(CONFIG_DEBUG_FS)
398 void radeon_sa_bo_dump_debug_info(struct radeon_sa_manager
*sa_manager
,
401 struct radeon_sa_bo
*i
;
403 spin_lock(&sa_manager
->wq
.lock
);
404 list_for_each_entry(i
, &sa_manager
->olist
, olist
) {
405 uint64_t soffset
= i
->soffset
+ sa_manager
->gpu_addr
;
406 uint64_t eoffset
= i
->eoffset
+ sa_manager
->gpu_addr
;
407 if (&i
->olist
== sa_manager
->hole
) {
412 seq_printf(m
, "[0x%010llx 0x%010llx] size %8lld",
413 soffset
, eoffset
, eoffset
- soffset
);
415 seq_printf(m
, " protected by 0x%016llx on ring %d",
416 i
->fence
->seq
, i
->fence
->ring
);
420 spin_unlock(&sa_manager
->wq
.lock
);