PM / sleep: Asynchronous threads for suspend_noirq
[linux/fpc-iii.git] / drivers / gpu / drm / tegra / mipi-phy.c
blobe2c4aedaee7887b876db279e3c83888ea98f153a
1 /*
2 * Copyright (C) 2013 NVIDIA Corporation
4 * Permission to use, copy, modify, distribute, and sell this software and its
5 * documentation for any purpose is hereby granted without fee, provided that
6 * the above copyright notice appear in all copies and that both that copyright
7 * notice and this permission notice appear in supporting documentation, and
8 * that the name of the copyright holders not be used in advertising or
9 * publicity pertaining to distribution of the software without specific,
10 * written prior permission. The copyright holders make no representations
11 * about the suitability of this software for any purpose. It is provided "as
12 * is" without express or implied warranty.
14 * THE COPYRIGHT HOLDERS DISCLAIM ALL WARRANTIES WITH REGARD TO THIS SOFTWARE,
15 * INCLUDING ALL IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS, IN NO
16 * EVENT SHALL THE COPYRIGHT HOLDERS BE LIABLE FOR ANY SPECIAL, INDIRECT OR
17 * CONSEQUENTIAL DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE,
18 * DATA OR PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER
19 * TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR PERFORMANCE
20 * OF THIS SOFTWARE.
23 #include <linux/errno.h>
24 #include <linux/kernel.h>
26 #include "mipi-phy.h"
29 * Default D-PHY timings based on MIPI D-PHY specification. Derived from
30 * the valid ranges specified in Section 5.9 of the D-PHY specification
31 * with minor adjustments.
33 int mipi_dphy_timing_get_default(struct mipi_dphy_timing *timing,
34 unsigned long period)
36 timing->clkmiss = 0;
37 timing->clkpost = 70 + 52 * period;
38 timing->clkpre = 8;
39 timing->clkprepare = 65;
40 timing->clksettle = 95;
41 timing->clktermen = 0;
42 timing->clktrail = 80;
43 timing->clkzero = 260;
44 timing->dtermen = 0;
45 timing->eot = 0;
46 timing->hsexit = 120;
47 timing->hsprepare = 65 + 5 * period;
48 timing->hszero = 145 + 5 * period;
49 timing->hssettle = 85 + 6 * period;
50 timing->hsskip = 40;
51 timing->hstrail = max(8 * period, 60 + 4 * period);
52 timing->init = 100000;
53 timing->lpx = 60;
54 timing->taget = 5 * timing->lpx;
55 timing->tago = 4 * timing->lpx;
56 timing->tasure = 2 * timing->lpx;
57 timing->wakeup = 1000000;
59 return 0;
63 * Validate D-PHY timing according to MIPI Alliance Specification for D-PHY,
64 * Section 5.9 "Global Operation Timing Parameters".
66 int mipi_dphy_timing_validate(struct mipi_dphy_timing *timing,
67 unsigned long period)
69 if (timing->clkmiss > 60)
70 return -EINVAL;
72 if (timing->clkpost < (60 + 52 * period))
73 return -EINVAL;
75 if (timing->clkpre < 8)
76 return -EINVAL;
78 if (timing->clkprepare < 38 || timing->clkprepare > 95)
79 return -EINVAL;
81 if (timing->clksettle < 95 || timing->clksettle > 300)
82 return -EINVAL;
84 if (timing->clktermen > 38)
85 return -EINVAL;
87 if (timing->clktrail < 60)
88 return -EINVAL;
90 if (timing->clkprepare + timing->clkzero < 300)
91 return -EINVAL;
93 if (timing->dtermen > 35 + 4 * period)
94 return -EINVAL;
96 if (timing->eot > 105 + 12 * period)
97 return -EINVAL;
99 if (timing->hsexit < 100)
100 return -EINVAL;
102 if (timing->hsprepare < 40 + 4 * period ||
103 timing->hsprepare > 85 + 6 * period)
104 return -EINVAL;
106 if (timing->hsprepare + timing->hszero < 145 + 10 * period)
107 return -EINVAL;
109 if ((timing->hssettle < 85 + 6 * period) ||
110 (timing->hssettle > 145 + 10 * period))
111 return -EINVAL;
113 if (timing->hsskip < 40 || timing->hsskip > 55 + 4 * period)
114 return -EINVAL;
116 if (timing->hstrail < max(8 * period, 60 + 4 * period))
117 return -EINVAL;
119 if (timing->init < 100000)
120 return -EINVAL;
122 if (timing->lpx < 50)
123 return -EINVAL;
125 if (timing->taget != 5 * timing->lpx)
126 return -EINVAL;
128 if (timing->tago != 4 * timing->lpx)
129 return -EINVAL;
131 if (timing->tasure < timing->lpx || timing->tasure > 2 * timing->lpx)
132 return -EINVAL;
134 if (timing->wakeup < 1000000)
135 return -EINVAL;
137 return 0;