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PM / sleep: Asynchronous threads for suspend_noirq
[linux/fpc-iii.git] / drivers / input / touchscreen / atmel_tsadcc.c
bloba7c9d6967d1e331b1917dad9dfe4b0ac83b447c5
1 /*
2 * Atmel Touch Screen Driver
3 *
4 * Copyright (c) 2008 ATMEL
5 * Copyright (c) 2008 Dan Liang
6 * Copyright (c) 2008 TimeSys Corporation
7 * Copyright (c) 2008 Justin Waters
8 *
9 * Based on touchscreen code from Atmel Corporation.
10 *
11 * This program is free software; you can redistribute it and/or modify
12 * it under the terms of the GNU General Public License version 2 as
13 * published by the Free Software Foundation.
14 */
15 #include <linux/err.h>
16 #include <linux/kernel.h>
17 #include <linux/module.h>
18 #include <linux/input.h>
19 #include <linux/slab.h>
20 #include <linux/interrupt.h>
21 #include <linux/clk.h>
22 #include <linux/platform_device.h>
23 #include <linux/io.h>
24 #include <linux/platform_data/atmel.h>
25 #include <mach/cpu.h>
26
27 /* Register definitions based on AT91SAM9RL64 preliminary draft datasheet */
28
29 #define ATMEL_TSADCC_CR 0x00 /* Control register */
30 #define ATMEL_TSADCC_SWRST (1 << 0) /* Software Reset*/
31 #define ATMEL_TSADCC_START (1 << 1) /* Start conversion */
32
33 #define ATMEL_TSADCC_MR 0x04 /* Mode register */
34 #define ATMEL_TSADCC_TSAMOD (3 << 0) /* ADC mode */
35 #define ATMEL_TSADCC_TSAMOD_ADC_ONLY_MODE (0x0) /* ADC Mode */
36 #define ATMEL_TSADCC_TSAMOD_TS_ONLY_MODE (0x1) /* Touch Screen Only Mode */
37 #define ATMEL_TSADCC_LOWRES (1 << 4) /* Resolution selection */
38 #define ATMEL_TSADCC_SLEEP (1 << 5) /* Sleep mode */
39 #define ATMEL_TSADCC_PENDET (1 << 6) /* Pen Detect selection */
40 #define ATMEL_TSADCC_PRES (1 << 7) /* Pressure Measurement Selection */
41 #define ATMEL_TSADCC_PRESCAL (0x3f << 8) /* Prescalar Rate Selection */
42 #define ATMEL_TSADCC_EPRESCAL (0xff << 8) /* Prescalar Rate Selection (Extended) */
43 #define ATMEL_TSADCC_STARTUP (0x7f << 16) /* Start Up time */
44 #define ATMEL_TSADCC_SHTIM (0xf << 24) /* Sample & Hold time */
45 #define ATMEL_TSADCC_PENDBC (0xf << 28) /* Pen Detect debouncing time */
46
47 #define ATMEL_TSADCC_TRGR 0x08 /* Trigger register */
48 #define ATMEL_TSADCC_TRGMOD (7 << 0) /* Trigger mode */
49 #define ATMEL_TSADCC_TRGMOD_NONE (0 << 0)
50 #define ATMEL_TSADCC_TRGMOD_EXT_RISING (1 << 0)
51 #define ATMEL_TSADCC_TRGMOD_EXT_FALLING (2 << 0)
52 #define ATMEL_TSADCC_TRGMOD_EXT_ANY (3 << 0)
53 #define ATMEL_TSADCC_TRGMOD_PENDET (4 << 0)
54 #define ATMEL_TSADCC_TRGMOD_PERIOD (5 << 0)
55 #define ATMEL_TSADCC_TRGMOD_CONTINUOUS (6 << 0)
56 #define ATMEL_TSADCC_TRGPER (0xffff << 16) /* Trigger period */
57
58 #define ATMEL_TSADCC_TSR 0x0C /* Touch Screen register */
59 #define ATMEL_TSADCC_TSFREQ (0xf << 0) /* TS Frequency in Interleaved mode */
60 #define ATMEL_TSADCC_TSSHTIM (0xf << 24) /* Sample & Hold time */
61
62 #define ATMEL_TSADCC_CHER 0x10 /* Channel Enable register */
63 #define ATMEL_TSADCC_CHDR 0x14 /* Channel Disable register */
64 #define ATMEL_TSADCC_CHSR 0x18 /* Channel Status register */
65 #define ATMEL_TSADCC_CH(n) (1 << (n)) /* Channel number */
66
67 #define ATMEL_TSADCC_SR 0x1C /* Status register */
68 #define ATMEL_TSADCC_EOC(n) (1 << ((n)+0)) /* End of conversion for channel N */
69 #define ATMEL_TSADCC_OVRE(n) (1 << ((n)+8)) /* Overrun error for channel N */
70 #define ATMEL_TSADCC_DRDY (1 << 16) /* Data Ready */
71 #define ATMEL_TSADCC_GOVRE (1 << 17) /* General Overrun Error */
72 #define ATMEL_TSADCC_ENDRX (1 << 18) /* End of RX Buffer */
73 #define ATMEL_TSADCC_RXBUFF (1 << 19) /* TX Buffer full */
74 #define ATMEL_TSADCC_PENCNT (1 << 20) /* Pen contact */
75 #define ATMEL_TSADCC_NOCNT (1 << 21) /* No contact */
76
77 #define ATMEL_TSADCC_LCDR 0x20 /* Last Converted Data register */
78 #define ATMEL_TSADCC_DATA (0x3ff << 0) /* Channel data */
79
80 #define ATMEL_TSADCC_IER 0x24 /* Interrupt Enable register */
81 #define ATMEL_TSADCC_IDR 0x28 /* Interrupt Disable register */
82 #define ATMEL_TSADCC_IMR 0x2C /* Interrupt Mask register */
83 #define ATMEL_TSADCC_CDR0 0x30 /* Channel Data 0 */
84 #define ATMEL_TSADCC_CDR1 0x34 /* Channel Data 1 */
85 #define ATMEL_TSADCC_CDR2 0x38 /* Channel Data 2 */
86 #define ATMEL_TSADCC_CDR3 0x3C /* Channel Data 3 */
87 #define ATMEL_TSADCC_CDR4 0x40 /* Channel Data 4 */
88 #define ATMEL_TSADCC_CDR5 0x44 /* Channel Data 5 */
89
90 #define ATMEL_TSADCC_XPOS 0x50
91 #define ATMEL_TSADCC_Z1DAT 0x54
92 #define ATMEL_TSADCC_Z2DAT 0x58
93
94 #define PRESCALER_VAL(x) ((x) >> 8)
95
96 #define ADC_DEFAULT_CLOCK 100000
97
98 struct atmel_tsadcc {
99 struct input_dev *input;
100 char phys[32];
101 struct clk *clk;
102 int irq;
103 unsigned int prev_absx;
104 unsigned int prev_absy;
105 unsigned char bufferedmeasure;
106 };
107
108 static void __iomem *tsc_base;
109
110 #define atmel_tsadcc_read(reg) __raw_readl(tsc_base + (reg))
111 #define atmel_tsadcc_write(reg, val) __raw_writel((val), tsc_base + (reg))
112
113 static irqreturn_t atmel_tsadcc_interrupt(int irq, void *dev)
114 {
115 struct atmel_tsadcc *ts_dev = (struct atmel_tsadcc *)dev;
116 struct input_dev *input_dev = ts_dev->input;
117
118 unsigned int status;
119 unsigned int reg;
120
121 status = atmel_tsadcc_read(ATMEL_TSADCC_SR);
122 status &= atmel_tsadcc_read(ATMEL_TSADCC_IMR);
123
124 if (status & ATMEL_TSADCC_NOCNT) {
125 /* Contact lost */
126 reg = atmel_tsadcc_read(ATMEL_TSADCC_MR) | ATMEL_TSADCC_PENDBC;
127
128 atmel_tsadcc_write(ATMEL_TSADCC_MR, reg);
129 atmel_tsadcc_write(ATMEL_TSADCC_TRGR, ATMEL_TSADCC_TRGMOD_NONE);
130 atmel_tsadcc_write(ATMEL_TSADCC_IDR,
131 ATMEL_TSADCC_EOC(3) | ATMEL_TSADCC_NOCNT);
132 atmel_tsadcc_write(ATMEL_TSADCC_IER, ATMEL_TSADCC_PENCNT);
133
134 input_report_key(input_dev, BTN_TOUCH, 0);
135 ts_dev->bufferedmeasure = 0;
136 input_sync(input_dev);
137
138 } else if (status & ATMEL_TSADCC_PENCNT) {
139 /* Pen detected */
140 reg = atmel_tsadcc_read(ATMEL_TSADCC_MR);
141 reg &= ~ATMEL_TSADCC_PENDBC;
142
143 atmel_tsadcc_write(ATMEL_TSADCC_IDR, ATMEL_TSADCC_PENCNT);
144 atmel_tsadcc_write(ATMEL_TSADCC_MR, reg);
145 atmel_tsadcc_write(ATMEL_TSADCC_IER,
146 ATMEL_TSADCC_EOC(3) | ATMEL_TSADCC_NOCNT);
147 atmel_tsadcc_write(ATMEL_TSADCC_TRGR,
148 ATMEL_TSADCC_TRGMOD_PERIOD | (0x0FFF << 16));
149
150 } else if (status & ATMEL_TSADCC_EOC(3)) {
151 /* Conversion finished */
152
153 if (ts_dev->bufferedmeasure) {
154 /* Last measurement is always discarded, since it can
155 * be erroneous.
156 * Always report previous measurement */
157 input_report_abs(input_dev, ABS_X, ts_dev->prev_absx);
158 input_report_abs(input_dev, ABS_Y, ts_dev->prev_absy);
159 input_report_key(input_dev, BTN_TOUCH, 1);
160 input_sync(input_dev);
161 } else
162 ts_dev->bufferedmeasure = 1;
163
164 /* Now make new measurement */
165 ts_dev->prev_absx = atmel_tsadcc_read(ATMEL_TSADCC_CDR3) << 10;
166 ts_dev->prev_absx /= atmel_tsadcc_read(ATMEL_TSADCC_CDR2);
167
168 ts_dev->prev_absy = atmel_tsadcc_read(ATMEL_TSADCC_CDR1) << 10;
169 ts_dev->prev_absy /= atmel_tsadcc_read(ATMEL_TSADCC_CDR0);
170 }
171
172 return IRQ_HANDLED;
173 }
174
175 /*
176 * The functions for inserting/removing us as a module.
177 */
178
179 static int atmel_tsadcc_probe(struct platform_device *pdev)
180 {
181 struct atmel_tsadcc *ts_dev;
182 struct input_dev *input_dev;
183 struct resource *res;
184 struct at91_tsadcc_data *pdata = dev_get_platdata(&pdev->dev);
185 int err;
186 unsigned int prsc;
187 unsigned int reg;
188
189 if (!pdata)
190 return -EINVAL;
191
192 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
193 if (!res) {
194 dev_err(&pdev->dev, "no mmio resource defined.\n");
195 return -ENXIO;
196 }
197
198 /* Allocate memory for device */
199 ts_dev = kzalloc(sizeof(struct atmel_tsadcc), GFP_KERNEL);
200 if (!ts_dev) {
201 dev_err(&pdev->dev, "failed to allocate memory.\n");
202 return -ENOMEM;
203 }
204 platform_set_drvdata(pdev, ts_dev);
205
206 input_dev = input_allocate_device();
207 if (!input_dev) {
208 dev_err(&pdev->dev, "failed to allocate input device.\n");
209 err = -EBUSY;
210 goto err_free_mem;
211 }
212
213 ts_dev->irq = platform_get_irq(pdev, 0);
214 if (ts_dev->irq < 0) {
215 dev_err(&pdev->dev, "no irq ID is designated.\n");
216 err = -ENODEV;
217 goto err_free_dev;
218 }
219
220 if (!request_mem_region(res->start, resource_size(res),
221 "atmel tsadcc regs")) {
222 dev_err(&pdev->dev, "resources is unavailable.\n");
223 err = -EBUSY;
224 goto err_free_dev;
225 }
226
227 tsc_base = ioremap(res->start, resource_size(res));
228 if (!tsc_base) {
229 dev_err(&pdev->dev, "failed to map registers.\n");
230 err = -ENOMEM;
231 goto err_release_mem;
232 }
233
234 err = request_irq(ts_dev->irq, atmel_tsadcc_interrupt, 0,
235 pdev->dev.driver->name, ts_dev);
236 if (err) {
237 dev_err(&pdev->dev, "failed to allocate irq.\n");
238 goto err_unmap_regs;
239 }
240
241 ts_dev->clk = clk_get(&pdev->dev, "tsc_clk");
242 if (IS_ERR(ts_dev->clk)) {
243 dev_err(&pdev->dev, "failed to get ts_clk\n");
244 err = PTR_ERR(ts_dev->clk);
245 goto err_free_irq;
246 }
247
248 ts_dev->input = input_dev;
249 ts_dev->bufferedmeasure = 0;
250
251 snprintf(ts_dev->phys, sizeof(ts_dev->phys),
252 "%s/input0", dev_name(&pdev->dev));
253
254 input_dev->name = "atmel touch screen controller";
255 input_dev->phys = ts_dev->phys;
256 input_dev->dev.parent = &pdev->dev;
257
258 __set_bit(EV_ABS, input_dev->evbit);
259 input_set_abs_params(input_dev, ABS_X, 0, 0x3FF, 0, 0);
260 input_set_abs_params(input_dev, ABS_Y, 0, 0x3FF, 0, 0);
261
262 input_set_capability(input_dev, EV_KEY, BTN_TOUCH);
263
264 /* clk_enable() always returns 0, no need to check it */
265 clk_enable(ts_dev->clk);
266
267 prsc = clk_get_rate(ts_dev->clk);
268 dev_info(&pdev->dev, "Master clock is set at: %d Hz\n", prsc);
269
270 if (!pdata->adc_clock)
271 pdata->adc_clock = ADC_DEFAULT_CLOCK;
272
273 prsc = (prsc / (2 * pdata->adc_clock)) - 1;
274
275 /* saturate if this value is too high */
276 if (cpu_is_at91sam9rl()) {
277 if (prsc > PRESCALER_VAL(ATMEL_TSADCC_PRESCAL))
278 prsc = PRESCALER_VAL(ATMEL_TSADCC_PRESCAL);
279 } else {
280 if (prsc > PRESCALER_VAL(ATMEL_TSADCC_EPRESCAL))
281 prsc = PRESCALER_VAL(ATMEL_TSADCC_EPRESCAL);
282 }
283
284 dev_info(&pdev->dev, "Prescaler is set at: %d\n", prsc);
285
286 reg = ATMEL_TSADCC_TSAMOD_TS_ONLY_MODE |
287 ((0x00 << 5) & ATMEL_TSADCC_SLEEP) | /* Normal Mode */
288 ((0x01 << 6) & ATMEL_TSADCC_PENDET) | /* Enable Pen Detect */
289 (prsc << 8) |
290 ((0x26 << 16) & ATMEL_TSADCC_STARTUP) |
291 ((pdata->pendet_debounce << 28) & ATMEL_TSADCC_PENDBC);
292
293 atmel_tsadcc_write(ATMEL_TSADCC_CR, ATMEL_TSADCC_SWRST);
294 atmel_tsadcc_write(ATMEL_TSADCC_MR, reg);
295 atmel_tsadcc_write(ATMEL_TSADCC_TRGR, ATMEL_TSADCC_TRGMOD_NONE);
296 atmel_tsadcc_write(ATMEL_TSADCC_TSR,
297 (pdata->ts_sample_hold_time << 24) & ATMEL_TSADCC_TSSHTIM);
298
299 atmel_tsadcc_read(ATMEL_TSADCC_SR);
300 atmel_tsadcc_write(ATMEL_TSADCC_IER, ATMEL_TSADCC_PENCNT);
301
302 /* All went ok, so register to the input system */
303 err = input_register_device(input_dev);
304 if (err)
305 goto err_fail;
306
307 return 0;
308
309 err_fail:
310 clk_disable(ts_dev->clk);
311 clk_put(ts_dev->clk);
312 err_free_irq:
313 free_irq(ts_dev->irq, ts_dev);
314 err_unmap_regs:
315 iounmap(tsc_base);
316 err_release_mem:
317 release_mem_region(res->start, resource_size(res));
318 err_free_dev:
319 input_free_device(input_dev);
320 err_free_mem:
321 kfree(ts_dev);
322 return err;
323 }
324
325 static int atmel_tsadcc_remove(struct platform_device *pdev)
326 {
327 struct atmel_tsadcc *ts_dev = platform_get_drvdata(pdev);
328 struct resource *res;
329
330 free_irq(ts_dev->irq, ts_dev);
331
332 input_unregister_device(ts_dev->input);
333
334 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
335 iounmap(tsc_base);
336 release_mem_region(res->start, resource_size(res));
337
338 clk_disable(ts_dev->clk);
339 clk_put(ts_dev->clk);
340
341 kfree(ts_dev);
342
343 return 0;
344 }
345
346 static struct platform_driver atmel_tsadcc_driver = {
347 .probe = atmel_tsadcc_probe,
348 .remove = atmel_tsadcc_remove,
349 .driver = {
350 .name = "atmel_tsadcc",
351 },
352 };
353 module_platform_driver(atmel_tsadcc_driver);
354
355 MODULE_LICENSE("GPL");
356 MODULE_DESCRIPTION("Atmel TouchScreen Driver");
357 MODULE_AUTHOR("Dan Liang <dan.liang@atmel.com>");
358
Linux with added FPC-III support