2 * Copyright (C) 2006, Rusty Russell <rusty@rustcorp.com.au> IBM Corporation.
3 * Copyright (C) 2007, Jes Sorensen <jes@sgi.com> SGI.
5 * This program is free software; you can redistribute it and/or modify
6 * it under the terms of the GNU General Public License as published by
7 * the Free Software Foundation; either version 2 of the License, or
8 * (at your option) any later version.
10 * This program is distributed in the hope that it will be useful, but
11 * WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, GOOD TITLE or
13 * NON INFRINGEMENT. See the GNU General Public License for more
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
21 * This file contains the x86-specific lguest code. It used to be all
22 * mixed in with drivers/lguest/core.c but several foolhardy code slashers
23 * wrestled most of the dependencies out to here in preparation for porting
24 * lguest to other architectures (see what I mean by foolhardy?).
26 * This also contains a couple of non-obvious setup and teardown pieces which
27 * were implemented after days of debugging pain.
29 #include <linux/kernel.h>
30 #include <linux/start_kernel.h>
31 #include <linux/string.h>
32 #include <linux/console.h>
33 #include <linux/screen_info.h>
34 #include <linux/irq.h>
35 #include <linux/interrupt.h>
36 #include <linux/clocksource.h>
37 #include <linux/clockchips.h>
38 #include <linux/cpu.h>
39 #include <linux/lguest.h>
40 #include <linux/lguest_launcher.h>
41 #include <asm/paravirt.h>
42 #include <asm/param.h>
44 #include <asm/pgtable.h>
46 #include <asm/setup.h>
47 #include <asm/lguest.h>
48 #include <asm/uaccess.h>
52 static int cpu_had_pge
;
56 unsigned short segment
;
59 /* Offset from where switcher.S was compiled to where we've copied it */
60 static unsigned long switcher_offset(void)
62 return switcher_addr
- (unsigned long)start_switcher_text
;
65 /* This cpu's struct lguest_pages (after the Switcher text page) */
66 static struct lguest_pages
*lguest_pages(unsigned int cpu
)
68 return &(((struct lguest_pages
*)(switcher_addr
+ PAGE_SIZE
))[cpu
]);
71 static DEFINE_PER_CPU(struct lg_cpu
*, lg_last_cpu
);
74 * We approach the Switcher.
76 * Remember that each CPU has two pages which are visible to the Guest when it
77 * runs on that CPU. This has to contain the state for that Guest: we copy the
78 * state in just before we run the Guest.
80 * Each Guest has "changed" flags which indicate what has changed in the Guest
81 * since it last ran. We saw this set in interrupts_and_traps.c and
84 static void copy_in_guest_info(struct lg_cpu
*cpu
, struct lguest_pages
*pages
)
87 * Copying all this data can be quite expensive. We usually run the
88 * same Guest we ran last time (and that Guest hasn't run anywhere else
89 * meanwhile). If that's not the case, we pretend everything in the
92 if (__this_cpu_read(lg_last_cpu
) != cpu
|| cpu
->last_pages
!= pages
) {
93 __this_cpu_write(lg_last_cpu
, cpu
);
94 cpu
->last_pages
= pages
;
95 cpu
->changed
= CHANGED_ALL
;
99 * These copies are pretty cheap, so we do them unconditionally: */
100 /* Save the current Host top-level page directory.
102 pages
->state
.host_cr3
= __pa(current
->mm
->pgd
);
104 * Set up the Guest's page tables to see this CPU's pages (and no
105 * other CPU's pages).
107 map_switcher_in_guest(cpu
, pages
);
109 * Set up the two "TSS" members which tell the CPU what stack to use
110 * for traps which do directly into the Guest (ie. traps at privilege
113 pages
->state
.guest_tss
.sp1
= cpu
->esp1
;
114 pages
->state
.guest_tss
.ss1
= cpu
->ss1
;
116 /* Copy direct-to-Guest trap entries. */
117 if (cpu
->changed
& CHANGED_IDT
)
118 copy_traps(cpu
, pages
->state
.guest_idt
, default_idt_entries
);
120 /* Copy all GDT entries which the Guest can change. */
121 if (cpu
->changed
& CHANGED_GDT
)
122 copy_gdt(cpu
, pages
->state
.guest_gdt
);
123 /* If only the TLS entries have changed, copy them. */
124 else if (cpu
->changed
& CHANGED_GDT_TLS
)
125 copy_gdt_tls(cpu
, pages
->state
.guest_gdt
);
127 /* Mark the Guest as unchanged for next time. */
131 /* Finally: the code to actually call into the Switcher to run the Guest. */
132 static void run_guest_once(struct lg_cpu
*cpu
, struct lguest_pages
*pages
)
134 /* This is a dummy value we need for GCC's sake. */
135 unsigned int clobber
;
138 * Copy the guest-specific information into this CPU's "struct
141 copy_in_guest_info(cpu
, pages
);
144 * Set the trap number to 256 (impossible value). If we fault while
145 * switching to the Guest (bad segment registers or bug), this will
146 * cause us to abort the Guest.
148 cpu
->regs
->trapnum
= 256;
151 * Now: we push the "eflags" register on the stack, then do an "lcall".
152 * This is how we change from using the kernel code segment to using
153 * the dedicated lguest code segment, as well as jumping into the
156 * The lcall also pushes the old code segment (KERNEL_CS) onto the
157 * stack, then the address of this call. This stack layout happens to
158 * exactly match the stack layout created by an interrupt...
160 asm volatile("pushf; lcall *%4"
162 * This is how we tell GCC that %eax ("a") and %ebx ("b")
163 * are changed by this routine. The "=" means output.
165 : "=a"(clobber
), "=b"(clobber
)
167 * %eax contains the pages pointer. ("0" refers to the
168 * 0-th argument above, ie "a"). %ebx contains the
169 * physical address of the Guest's top-level page
173 "1"(__pa(cpu
->lg
->pgdirs
[cpu
->cpu_pgd
].pgdir
)),
176 * We tell gcc that all these registers could change,
177 * which means we don't have to save and restore them in
180 : "memory", "%edx", "%ecx", "%edi", "%esi");
185 * There are hooks in the scheduler which we can register to tell when we
186 * get kicked off the CPU (preempt_notifier_register()). This would allow us
187 * to lazily disable SYSENTER which would regain some performance, and should
188 * also simplify copy_in_guest_info(). Note that we'd still need to restore
189 * things when we exit to Launcher userspace, but that's fairly easy.
191 * We could also try using these hooks for PGE, but that might be too expensive.
193 * The hooks were designed for KVM, but we can also put them to good use.
197 * This is the i386-specific code to setup and run the Guest. Interrupts
198 * are disabled: we own the CPU.
200 void lguest_arch_run_guest(struct lg_cpu
*cpu
)
203 * Remember the awfully-named TS bit? If the Guest has asked to set it
204 * we set it now, so we can trap and pass that trap to the Guest if it
207 if (cpu
->ts
&& user_has_fpu())
211 * SYSENTER is an optimized way of doing system calls. We can't allow
212 * it because it always jumps to privilege level 0. A normal Guest
213 * won't try it because we don't advertise it in CPUID, but a malicious
214 * Guest (or malicious Guest userspace program) could, so we tell the
215 * CPU to disable it before running the Guest.
217 if (boot_cpu_has(X86_FEATURE_SEP
))
218 wrmsr(MSR_IA32_SYSENTER_CS
, 0, 0);
221 * Now we actually run the Guest. It will return when something
222 * interesting happens, and we can examine its registers to see what it
225 run_guest_once(cpu
, lguest_pages(raw_smp_processor_id()));
228 * Note that the "regs" structure contains two extra entries which are
229 * not really registers: a trap number which says what interrupt or
230 * trap made the switcher code come back, and an error code which some
234 /* Restore SYSENTER if it's supposed to be on. */
235 if (boot_cpu_has(X86_FEATURE_SEP
))
236 wrmsr(MSR_IA32_SYSENTER_CS
, __KERNEL_CS
, 0);
238 /* Clear the host TS bit if it was set above. */
239 if (cpu
->ts
&& user_has_fpu())
243 * If the Guest page faulted, then the cr2 register will tell us the
244 * bad virtual address. We have to grab this now, because once we
245 * re-enable interrupts an interrupt could fault and thus overwrite
246 * cr2, or we could even move off to a different CPU.
248 if (cpu
->regs
->trapnum
== 14)
249 cpu
->arch
.last_pagefault
= read_cr2();
251 * Similarly, if we took a trap because the Guest used the FPU,
252 * we have to restore the FPU it expects to see.
253 * math_state_restore() may sleep and we may even move off to
254 * a different CPU. So all the critical stuff should be done
257 else if (cpu
->regs
->trapnum
== 7 && !user_has_fpu())
258 math_state_restore();
262 * Now we've examined the hypercall code; our Guest can make requests.
263 * Our Guest is usually so well behaved; it never tries to do things it isn't
264 * allowed to, and uses hypercalls instead. Unfortunately, Linux's paravirtual
265 * infrastructure isn't quite complete, because it doesn't contain replacements
266 * for the Intel I/O instructions. As a result, the Guest sometimes fumbles
267 * across one during the boot process as it probes for various things which are
268 * usually attached to a PC.
270 * When the Guest uses one of these instructions, we get a trap (General
271 * Protection Fault) and come here. We see if it's one of those troublesome
272 * instructions and skip over it. We return true if we did.
274 static int emulate_insn(struct lg_cpu
*cpu
)
277 unsigned int insnlen
= 0, in
= 0, small_operand
= 0;
279 * The eip contains the *virtual* address of the Guest's instruction:
280 * walk the Guest's page tables to find the "physical" address.
282 unsigned long physaddr
= guest_pa(cpu
, cpu
->regs
->eip
);
285 * This must be the Guest kernel trying to do something, not userspace!
286 * The bottom two bits of the CS segment register are the privilege
289 if ((cpu
->regs
->cs
& 3) != GUEST_PL
)
292 /* Decoding x86 instructions is icky. */
293 insn
= lgread(cpu
, physaddr
, u8
);
296 * Around 2.6.33, the kernel started using an emulation for the
297 * cmpxchg8b instruction in early boot on many configurations. This
298 * code isn't paravirtualized, and it tries to disable interrupts.
299 * Ignore it, which will Mostly Work.
302 /* "cli", or Clear Interrupt Enable instruction. Skip it. */
308 * 0x66 is an "operand prefix". It means a 16, not 32 bit in/out.
312 /* The instruction is 1 byte so far, read the next byte. */
314 insn
= lgread(cpu
, physaddr
+ insnlen
, u8
);
318 * We can ignore the lower bit for the moment and decode the 4 opcodes
319 * we need to emulate.
321 switch (insn
& 0xFE) {
322 case 0xE4: /* in <next byte>,%al */
326 case 0xEC: /* in (%dx),%al */
330 case 0xE6: /* out %al,<next byte> */
333 case 0xEE: /* out %al,(%dx) */
337 /* OK, we don't know what this is, can't emulate. */
342 * If it was an "IN" instruction, they expect the result to be read
343 * into %eax, so we change %eax. We always return all-ones, which
344 * traditionally means "there's nothing there".
347 /* Lower bit tells means it's a 32/16 bit access */
350 cpu
->regs
->eax
|= 0xFFFF;
352 cpu
->regs
->eax
= 0xFFFFFFFF;
354 cpu
->regs
->eax
|= 0xFF;
356 /* Finally, we've "done" the instruction, so move past it. */
357 cpu
->regs
->eip
+= insnlen
;
362 /*H:050 Once we've re-enabled interrupts, we look at why the Guest exited. */
363 void lguest_arch_handle_trap(struct lg_cpu
*cpu
)
365 switch (cpu
->regs
->trapnum
) {
366 case 13: /* We've intercepted a General Protection Fault. */
368 * Check if this was one of those annoying IN or OUT
369 * instructions which we need to emulate. If so, we just go
370 * back into the Guest after we've done it.
372 if (cpu
->regs
->errcode
== 0) {
373 if (emulate_insn(cpu
))
377 case 14: /* We've intercepted a Page Fault. */
379 * The Guest accessed a virtual address that wasn't mapped.
380 * This happens a lot: we don't actually set up most of the page
381 * tables for the Guest at all when we start: as it runs it asks
382 * for more and more, and we set them up as required. In this
383 * case, we don't even tell the Guest that the fault happened.
385 * The errcode tells whether this was a read or a write, and
386 * whether kernel or userspace code.
388 if (demand_page(cpu
, cpu
->arch
.last_pagefault
,
393 * OK, it's really not there (or not OK): the Guest needs to
394 * know. We write out the cr2 value so it knows where the
397 * Note that if the Guest were really messed up, this could
398 * happen before it's done the LHCALL_LGUEST_INIT hypercall, so
399 * lg->lguest_data could be NULL
401 if (cpu
->lg
->lguest_data
&&
402 put_user(cpu
->arch
.last_pagefault
,
403 &cpu
->lg
->lguest_data
->cr2
))
404 kill_guest(cpu
, "Writing cr2");
406 case 7: /* We've intercepted a Device Not Available fault. */
408 * If the Guest doesn't want to know, we already restored the
409 * Floating Point Unit, so we just continue without telling it.
416 * These values mean a real interrupt occurred, in which case
417 * the Host handler has already been run. We just do a
418 * friendly check if another process should now be run, then
419 * return to run the Guest again.
423 case LGUEST_TRAP_ENTRY
:
425 * Our 'struct hcall_args' maps directly over our regs: we set
426 * up the pointer now to indicate a hypercall is pending.
428 cpu
->hcall
= (struct hcall_args
*)cpu
->regs
;
432 /* We didn't handle the trap, so it needs to go to the Guest. */
433 if (!deliver_trap(cpu
, cpu
->regs
->trapnum
))
435 * If the Guest doesn't have a handler (either it hasn't
436 * registered any yet, or it's one of the faults we don't let
437 * it handle), it dies with this cryptic error message.
439 kill_guest(cpu
, "unhandled trap %li at %#lx (%#lx)",
440 cpu
->regs
->trapnum
, cpu
->regs
->eip
,
441 cpu
->regs
->trapnum
== 14 ? cpu
->arch
.last_pagefault
442 : cpu
->regs
->errcode
);
446 * Now we can look at each of the routines this calls, in increasing order of
447 * complexity: do_hypercalls(), emulate_insn(), maybe_do_interrupt(),
448 * deliver_trap() and demand_page(). After all those, we'll be ready to
449 * examine the Switcher, and our philosophical understanding of the Host/Guest
450 * duality will be complete.
452 static void adjust_pge(void *on
)
455 write_cr4(read_cr4() | X86_CR4_PGE
);
457 write_cr4(read_cr4() & ~X86_CR4_PGE
);
461 * Now the Switcher is mapped and every thing else is ready, we need to do
462 * some more i386-specific initialization.
464 void __init
lguest_arch_host_init(void)
469 * Most of the x86/switcher_32.S doesn't care that it's been moved; on
470 * Intel, jumps are relative, and it doesn't access any references to
471 * external code or data.
473 * The only exception is the interrupt handlers in switcher.S: their
474 * addresses are placed in a table (default_idt_entries), so we need to
475 * update the table with the new addresses. switcher_offset() is a
476 * convenience function which returns the distance between the
477 * compiled-in switcher code and the high-mapped copy we just made.
479 for (i
= 0; i
< IDT_ENTRIES
; i
++)
480 default_idt_entries
[i
] += switcher_offset();
483 * Set up the Switcher's per-cpu areas.
485 * Each CPU gets two pages of its own within the high-mapped region
486 * (aka. "struct lguest_pages"). Much of this can be initialized now,
487 * but some depends on what Guest we are running (which is set up in
488 * copy_in_guest_info()).
490 for_each_possible_cpu(i
) {
491 /* lguest_pages() returns this CPU's two pages. */
492 struct lguest_pages
*pages
= lguest_pages(i
);
493 /* This is a convenience pointer to make the code neater. */
494 struct lguest_ro_state
*state
= &pages
->state
;
497 * The Global Descriptor Table: the Host has a different one
498 * for each CPU. We keep a descriptor for the GDT which says
499 * where it is and how big it is (the size is actually the last
500 * byte, not the size, hence the "-1").
502 state
->host_gdt_desc
.size
= GDT_SIZE
-1;
503 state
->host_gdt_desc
.address
= (long)get_cpu_gdt_table(i
);
506 * All CPUs on the Host use the same Interrupt Descriptor
507 * Table, so we just use store_idt(), which gets this CPU's IDT
510 store_idt(&state
->host_idt_desc
);
513 * The descriptors for the Guest's GDT and IDT can be filled
514 * out now, too. We copy the GDT & IDT into ->guest_gdt and
515 * ->guest_idt before actually running the Guest.
517 state
->guest_idt_desc
.size
= sizeof(state
->guest_idt
)-1;
518 state
->guest_idt_desc
.address
= (long)&state
->guest_idt
;
519 state
->guest_gdt_desc
.size
= sizeof(state
->guest_gdt
)-1;
520 state
->guest_gdt_desc
.address
= (long)&state
->guest_gdt
;
523 * We know where we want the stack to be when the Guest enters
524 * the Switcher: in pages->regs. The stack grows upwards, so
525 * we start it at the end of that structure.
527 state
->guest_tss
.sp0
= (long)(&pages
->regs
+ 1);
529 * And this is the GDT entry to use for the stack: we keep a
530 * couple of special LGUEST entries.
532 state
->guest_tss
.ss0
= LGUEST_DS
;
535 * x86 can have a finegrained bitmap which indicates what I/O
536 * ports the process can use. We set it to the end of our
537 * structure, meaning "none".
539 state
->guest_tss
.io_bitmap_base
= sizeof(state
->guest_tss
);
542 * Some GDT entries are the same across all Guests, so we can
545 setup_default_gdt_entries(state
);
546 /* Most IDT entries are the same for all Guests, too.*/
547 setup_default_idt_entries(state
, default_idt_entries
);
550 * The Host needs to be able to use the LGUEST segments on this
551 * CPU, too, so put them in the Host GDT.
553 get_cpu_gdt_table(i
)[GDT_ENTRY_LGUEST_CS
] = FULL_EXEC_SEGMENT
;
554 get_cpu_gdt_table(i
)[GDT_ENTRY_LGUEST_DS
] = FULL_SEGMENT
;
558 * In the Switcher, we want the %cs segment register to use the
559 * LGUEST_CS GDT entry: we've put that in the Host and Guest GDTs, so
560 * it will be undisturbed when we switch. To change %cs and jump we
561 * need this structure to feed to Intel's "lcall" instruction.
563 lguest_entry
.offset
= (long)switch_to_guest
+ switcher_offset();
564 lguest_entry
.segment
= LGUEST_CS
;
567 * Finally, we need to turn off "Page Global Enable". PGE is an
568 * optimization where page table entries are specially marked to show
569 * they never change. The Host kernel marks all the kernel pages this
570 * way because it's always present, even when userspace is running.
572 * Lguest breaks this: unbeknownst to the rest of the Host kernel, we
573 * switch to the Guest kernel. If you don't disable this on all CPUs,
574 * you'll get really weird bugs that you'll chase for two days.
576 * I used to turn PGE off every time we switched to the Guest and back
577 * on when we return, but that slowed the Switcher down noticibly.
581 * We don't need the complexity of CPUs coming and going while we're
585 if (cpu_has_pge
) { /* We have a broader idea of "global". */
586 /* Remember that this was originally set (for cleanup). */
589 * adjust_pge is a helper function which sets or unsets the PGE
590 * bit on its CPU, depending on the argument (0 == unset).
592 on_each_cpu(adjust_pge
, (void *)0, 1);
593 /* Turn off the feature in the global feature set. */
594 clear_cpu_cap(&boot_cpu_data
, X86_FEATURE_PGE
);
600 void __exit
lguest_arch_host_fini(void)
602 /* If we had PGE before we started, turn it back on now. */
605 set_cpu_cap(&boot_cpu_data
, X86_FEATURE_PGE
);
606 /* adjust_pge's argument "1" means set PGE. */
607 on_each_cpu(adjust_pge
, (void *)1, 1);
613 /*H:122 The i386-specific hypercalls simply farm out to the right functions. */
614 int lguest_arch_do_hcall(struct lg_cpu
*cpu
, struct hcall_args
*args
)
616 switch (args
->arg0
) {
617 case LHCALL_LOAD_GDT_ENTRY
:
618 load_guest_gdt_entry(cpu
, args
->arg1
, args
->arg2
, args
->arg3
);
620 case LHCALL_LOAD_IDT_ENTRY
:
621 load_guest_idt_entry(cpu
, args
->arg1
, args
->arg2
, args
->arg3
);
623 case LHCALL_LOAD_TLS
:
624 guest_load_tls(cpu
, args
->arg1
);
627 /* Bad Guest. Bad! */
633 /*H:126 i386-specific hypercall initialization: */
634 int lguest_arch_init_hypercalls(struct lg_cpu
*cpu
)
639 * The pointer to the Guest's "struct lguest_data" is the only argument.
640 * We check that address now.
642 if (!lguest_address_ok(cpu
->lg
, cpu
->hcall
->arg1
,
643 sizeof(*cpu
->lg
->lguest_data
)))
647 * Having checked it, we simply set lg->lguest_data to point straight
648 * into the Launcher's memory at the right place and then use
649 * copy_to_user/from_user from now on, instead of lgread/write. I put
650 * this in to show that I'm not immune to writing stupid
653 cpu
->lg
->lguest_data
= cpu
->lg
->mem_base
+ cpu
->hcall
->arg1
;
656 * We insist that the Time Stamp Counter exist and doesn't change with
657 * cpu frequency. Some devious chip manufacturers decided that TSC
658 * changes could be handled in software. I decided that time going
659 * backwards might be good for benchmarks, but it's bad for users.
661 * We also insist that the TSC be stable: the kernel detects unreliable
662 * TSCs for its own purposes, and we use that here.
664 if (boot_cpu_has(X86_FEATURE_CONSTANT_TSC
) && !check_tsc_unstable())
668 if (put_user(tsc_speed
, &cpu
->lg
->lguest_data
->tsc_khz
))
671 /* The interrupt code might not like the system call vector. */
672 if (!check_syscall_vector(cpu
->lg
))
673 kill_guest(cpu
, "bad syscall vector");
680 * Most of the Guest's registers are left alone: we used get_zeroed_page() to
681 * allocate the structure, so they will be 0.
683 void lguest_arch_setup_regs(struct lg_cpu
*cpu
, unsigned long start
)
685 struct lguest_regs
*regs
= cpu
->regs
;
688 * There are four "segment" registers which the Guest needs to boot:
689 * The "code segment" register (cs) refers to the kernel code segment
690 * __KERNEL_CS, and the "data", "extra" and "stack" segment registers
691 * refer to the kernel data segment __KERNEL_DS.
693 * The privilege level is packed into the lower bits. The Guest runs
694 * at privilege level 1 (GUEST_PL).
696 regs
->ds
= regs
->es
= regs
->ss
= __KERNEL_DS
|GUEST_PL
;
697 regs
->cs
= __KERNEL_CS
|GUEST_PL
;
700 * The "eflags" register contains miscellaneous flags. Bit 1 (0x002)
701 * is supposed to always be "1". Bit 9 (0x200) controls whether
702 * interrupts are enabled. We always leave interrupts enabled while
705 regs
->eflags
= X86_EFLAGS_IF
| X86_EFLAGS_FIXED
;
708 * The "Extended Instruction Pointer" register says where the Guest is
714 * %esi points to our boot information, at physical address 0, so don't
718 /* There are a couple of GDT entries the Guest expects at boot. */
719 setup_guest_gdt(cpu
);