PM / sleep: Asynchronous threads for suspend_noirq
[linux/fpc-iii.git] / drivers / media / i2c / s5c73m3 / s5c73m3.h
blob9dfa516f694471660f9de431c948ae279ed07bb9
1 /*
2 * Samsung LSI S5C73M3 8M pixel camera driver
4 * Copyright (C) 2012, Samsung Electronics, Co., Ltd.
5 * Sylwester Nawrocki <s.nawrocki@samsung.com>
6 * Andrzej Hajda <a.hajda@samsung.com>
8 * This program is free software; you can redistribute it and/or
9 * modify it under the terms of the GNU General Public License
10 * version 2 as published by the Free Software Foundation.
12 * This program is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 * GNU General Public License for more details.
17 #ifndef S5C73M3_H_
18 #define S5C73M3_H_
20 #include <linux/kernel.h>
21 #include <linux/regulator/consumer.h>
22 #include <media/v4l2-common.h>
23 #include <media/v4l2-ctrls.h>
24 #include <media/v4l2-subdev.h>
25 #include <media/s5c73m3.h>
27 #define DRIVER_NAME "S5C73M3"
29 #define S5C73M3_ISP_FMT V4L2_MBUS_FMT_VYUY8_2X8
30 #define S5C73M3_JPEG_FMT V4L2_MBUS_FMT_S5C_UYVY_JPEG_1X8
32 /* Subdevs pad index definitions */
33 enum s5c73m3_pads {
34 S5C73M3_ISP_PAD,
35 S5C73M3_JPEG_PAD,
36 S5C73M3_NUM_PADS
39 enum s5c73m3_oif_pads {
40 OIF_ISP_PAD,
41 OIF_JPEG_PAD,
42 OIF_SOURCE_PAD,
43 OIF_NUM_PADS
46 #define S5C73M3_SENSOR_FW_LEN 6
47 #define S5C73M3_SENSOR_TYPE_LEN 12
49 #define S5C73M3_REG(_addrh, _addrl) (((_addrh) << 16) | _addrl)
51 #define AHB_MSB_ADDR_PTR 0xfcfc
52 #define REG_CMDWR_ADDRH 0x0050
53 #define REG_CMDWR_ADDRL 0x0054
54 #define REG_CMDRD_ADDRH 0x0058
55 #define REG_CMDRD_ADDRL 0x005c
56 #define REG_CMDBUF_ADDR 0x0f14
58 #define REG_I2C_SEQ_STATUS S5C73M3_REG(0x0009, 0x59A6)
59 #define SEQ_END_PLL (1<<0x0)
60 #define SEQ_END_SENSOR (1<<0x1)
61 #define SEQ_END_GPIO (1<<0x2)
62 #define SEQ_END_FROM (1<<0x3)
63 #define SEQ_END_STABLE_AE_AWB (1<<0x4)
64 #define SEQ_END_READY_I2C_CMD (1<<0x5)
66 #define REG_I2C_STATUS S5C73M3_REG(0x0009, 0x599E)
67 #define I2C_STATUS_CIS_I2C (1<<0x0)
68 #define I2C_STATUS_AF_INIT (1<<0x1)
69 #define I2C_STATUS_CAL_DATA (1<<0x2)
70 #define I2C_STATUS_FRAME_COUNT (1<<0x3)
71 #define I2C_STATUS_FROM_INIT (1<<0x4)
72 #define I2C_STATUS_I2C_CIS_STREAM_OFF (1<<0x5)
73 #define I2C_STATUS_I2C_N_CMD_OVER (1<<0x6)
74 #define I2C_STATUS_I2C_N_CMD_MISMATCH (1<<0x7)
75 #define I2C_STATUS_CHECK_BIN_CRC (1<<0x8)
76 #define I2C_STATUS_EXCEPTION (1<<0x9)
77 #define I2C_STATUS_INIF_INIT_STATE (0x8)
79 #define REG_STATUS S5C73M3_REG(0x0009, 0x5080)
80 #define REG_STATUS_BOOT_SUB_MAIN_ENTER 0xff01
81 #define REG_STATUS_BOOT_SRAM_TIMING_OK 0xff02
82 #define REG_STATUS_BOOT_INTERRUPTS_EN 0xff03
83 #define REG_STATUS_BOOT_R_PLL_DONE 0xff04
84 #define REG_STATUS_BOOT_R_PLL_LOCKTIME_DONE 0xff05
85 #define REG_STATUS_BOOT_DELAY_COUNT_DONE 0xff06
86 #define REG_STATUS_BOOT_I_PLL_DONE 0xff07
87 #define REG_STATUS_BOOT_I_PLL_LOCKTIME_DONE 0xff08
88 #define REG_STATUS_BOOT_PLL_INIT_OK 0xff09
89 #define REG_STATUS_BOOT_SENSOR_INIT_OK 0xff0a
90 #define REG_STATUS_BOOT_GPIO_SETTING_OK 0xff0b
91 #define REG_STATUS_BOOT_READ_CAL_DATA_OK 0xff0c
92 #define REG_STATUS_BOOT_STABLE_AE_AWB_OK 0xff0d
93 #define REG_STATUS_ISP_COMMAND_COMPLETED 0xffff
94 #define REG_STATUS_EXCEPTION_OCCURED 0xdead
96 #define COMM_RESULT_OFFSET S5C73M3_REG(0x0009, 0x5000)
98 #define COMM_IMG_OUTPUT 0x0902
99 #define COMM_IMG_OUTPUT_HDR 0x0008
100 #define COMM_IMG_OUTPUT_YUV 0x0009
101 #define COMM_IMG_OUTPUT_INTERLEAVED 0x000d
103 #define COMM_STILL_PRE_FLASH 0x0a00
104 #define COMM_STILL_PRE_FLASH_FIRE 0x0000
105 #define COMM_STILL_PRE_FLASH_NON_FIRED 0x0000
106 #define COMM_STILL_PRE_FLASH_FIRED 0x0001
108 #define COMM_STILL_MAIN_FLASH 0x0a02
109 #define COMM_STILL_MAIN_FLASH_CANCEL 0x0001
110 #define COMM_STILL_MAIN_FLASH_FIRE 0x0002
112 #define COMM_ZOOM_STEP 0x0b00
114 #define COMM_IMAGE_EFFECT 0x0b0a
115 #define COMM_IMAGE_EFFECT_NONE 0x0001
116 #define COMM_IMAGE_EFFECT_NEGATIVE 0x0002
117 #define COMM_IMAGE_EFFECT_AQUA 0x0003
118 #define COMM_IMAGE_EFFECT_SEPIA 0x0004
119 #define COMM_IMAGE_EFFECT_MONO 0x0005
121 #define COMM_IMAGE_QUALITY 0x0b0c
122 #define COMM_IMAGE_QUALITY_SUPERFINE 0x0000
123 #define COMM_IMAGE_QUALITY_FINE 0x0001
124 #define COMM_IMAGE_QUALITY_NORMAL 0x0002
126 #define COMM_FLASH_MODE 0x0b0e
127 #define COMM_FLASH_MODE_OFF 0x0000
128 #define COMM_FLASH_MODE_ON 0x0001
129 #define COMM_FLASH_MODE_AUTO 0x0002
131 #define COMM_FLASH_STATUS 0x0b80
132 #define COMM_FLASH_STATUS_OFF 0x0001
133 #define COMM_FLASH_STATUS_ON 0x0002
134 #define COMM_FLASH_STATUS_AUTO 0x0003
136 #define COMM_FLASH_TORCH 0x0b12
137 #define COMM_FLASH_TORCH_OFF 0x0000
138 #define COMM_FLASH_TORCH_ON 0x0001
140 #define COMM_AE_NEEDS_FLASH 0x0cba
141 #define COMM_AE_NEEDS_FLASH_OFF 0x0000
142 #define COMM_AE_NEEDS_FLASH_ON 0x0001
144 #define COMM_CHG_MODE 0x0b10
145 #define COMM_CHG_MODE_NEW 0x8000
146 #define COMM_CHG_MODE_SUBSAMPLING_HALF 0x2000
147 #define COMM_CHG_MODE_SUBSAMPLING_QUARTER 0x4000
149 #define COMM_CHG_MODE_YUV_320_240 0x0001
150 #define COMM_CHG_MODE_YUV_640_480 0x0002
151 #define COMM_CHG_MODE_YUV_880_720 0x0003
152 #define COMM_CHG_MODE_YUV_960_720 0x0004
153 #define COMM_CHG_MODE_YUV_1184_666 0x0005
154 #define COMM_CHG_MODE_YUV_1280_720 0x0006
155 #define COMM_CHG_MODE_YUV_1536_864 0x0007
156 #define COMM_CHG_MODE_YUV_1600_1200 0x0008
157 #define COMM_CHG_MODE_YUV_1632_1224 0x0009
158 #define COMM_CHG_MODE_YUV_1920_1080 0x000a
159 #define COMM_CHG_MODE_YUV_1920_1440 0x000b
160 #define COMM_CHG_MODE_YUV_2304_1296 0x000c
161 #define COMM_CHG_MODE_YUV_3264_2448 0x000d
162 #define COMM_CHG_MODE_YUV_352_288 0x000e
163 #define COMM_CHG_MODE_YUV_1008_672 0x000f
165 #define COMM_CHG_MODE_JPEG_640_480 0x0010
166 #define COMM_CHG_MODE_JPEG_800_450 0x0020
167 #define COMM_CHG_MODE_JPEG_800_600 0x0030
168 #define COMM_CHG_MODE_JPEG_1280_720 0x0040
169 #define COMM_CHG_MODE_JPEG_1280_960 0x0050
170 #define COMM_CHG_MODE_JPEG_1600_900 0x0060
171 #define COMM_CHG_MODE_JPEG_1600_1200 0x0070
172 #define COMM_CHG_MODE_JPEG_2048_1152 0x0080
173 #define COMM_CHG_MODE_JPEG_2048_1536 0x0090
174 #define COMM_CHG_MODE_JPEG_2560_1440 0x00a0
175 #define COMM_CHG_MODE_JPEG_2560_1920 0x00b0
176 #define COMM_CHG_MODE_JPEG_3264_2176 0x00c0
177 #define COMM_CHG_MODE_JPEG_1024_768 0x00d0
178 #define COMM_CHG_MODE_JPEG_3264_1836 0x00e0
179 #define COMM_CHG_MODE_JPEG_3264_2448 0x00f0
181 #define COMM_AF_CON 0x0e00
182 #define COMM_AF_CON_STOP 0x0000
183 #define COMM_AF_CON_SCAN 0x0001 /* Full Search */
184 #define COMM_AF_CON_START 0x0002 /* Fast Search */
186 #define COMM_AF_CAL 0x0e06
187 #define COMM_AF_TOUCH_AF 0x0e0a
189 #define REG_AF_STATUS S5C73M3_REG(0x0009, 0x5e80)
190 #define REG_CAF_STATUS_FIND_SEARCH_DIR 0x0001
191 #define REG_CAF_STATUS_FOCUSING 0x0002
192 #define REG_CAF_STATUS_FOCUSED 0x0003
193 #define REG_CAF_STATUS_UNFOCUSED 0x0004
194 #define REG_AF_STATUS_INVALID 0x0010
195 #define REG_AF_STATUS_FOCUSING 0x0020
196 #define REG_AF_STATUS_FOCUSED 0x0030
197 #define REG_AF_STATUS_UNFOCUSED 0x0040
199 #define REG_AF_TOUCH_POSITION S5C73M3_REG(0x0009, 0x5e8e)
200 #define COMM_AF_FACE_ZOOM 0x0e10
202 #define COMM_AF_MODE 0x0e02
203 #define COMM_AF_MODE_NORMAL 0x0000
204 #define COMM_AF_MODE_MACRO 0x0001
205 #define COMM_AF_MODE_MOVIE_CAF_START 0x0002
206 #define COMM_AF_MODE_MOVIE_CAF_STOP 0x0003
207 #define COMM_AF_MODE_PREVIEW_CAF_START 0x0004
208 #define COMM_AF_MODE_PREVIEW_CAF_STOP 0x0005
210 #define COMM_AF_SOFTLANDING 0x0e16
211 #define COMM_AF_SOFTLANDING_ON 0x0000
212 #define COMM_AF_SOFTLANDING_RES_COMPLETE 0x0001
214 #define COMM_FACE_DET 0x0e0c
215 #define COMM_FACE_DET_OFF 0x0000
216 #define COMM_FACE_DET_ON 0x0001
218 #define COMM_FACE_DET_OSD 0x0e0e
219 #define COMM_FACE_DET_OSD_OFF 0x0000
220 #define COMM_FACE_DET_OSD_ON 0x0001
222 #define COMM_AE_CON 0x0c00
223 #define COMM_AE_STOP 0x0000 /* lock */
224 #define COMM_AE_START 0x0001 /* unlock */
226 #define COMM_ISO 0x0c02
227 #define COMM_ISO_AUTO 0x0000
228 #define COMM_ISO_100 0x0001
229 #define COMM_ISO_200 0x0002
230 #define COMM_ISO_400 0x0003
231 #define COMM_ISO_800 0x0004
232 #define COMM_ISO_SPORTS 0x0005
233 #define COMM_ISO_NIGHT 0x0006
234 #define COMM_ISO_INDOOR 0x0007
236 /* 0x00000 (-2.0 EV)...0x0008 (2.0 EV), 0.5EV step */
237 #define COMM_EV 0x0c04
239 #define COMM_METERING 0x0c06
240 #define COMM_METERING_CENTER 0x0000
241 #define COMM_METERING_SPOT 0x0001
242 #define COMM_METERING_AVERAGE 0x0002
243 #define COMM_METERING_SMART 0x0003
245 #define COMM_WDR 0x0c08
246 #define COMM_WDR_OFF 0x0000
247 #define COMM_WDR_ON 0x0001
249 #define COMM_FLICKER_MODE 0x0c12
250 #define COMM_FLICKER_NONE 0x0000
251 #define COMM_FLICKER_MANUAL_50HZ 0x0001
252 #define COMM_FLICKER_MANUAL_60HZ 0x0002
253 #define COMM_FLICKER_AUTO 0x0003
254 #define COMM_FLICKER_AUTO_50HZ 0x0004
255 #define COMM_FLICKER_AUTO_60HZ 0x0005
257 #define COMM_FRAME_RATE 0x0c1e
258 #define COMM_FRAME_RATE_AUTO_SET 0x0000
259 #define COMM_FRAME_RATE_FIXED_30FPS 0x0002
260 #define COMM_FRAME_RATE_FIXED_20FPS 0x0003
261 #define COMM_FRAME_RATE_FIXED_15FPS 0x0004
262 #define COMM_FRAME_RATE_FIXED_60FPS 0x0007
263 #define COMM_FRAME_RATE_FIXED_120FPS 0x0008
264 #define COMM_FRAME_RATE_FIXED_7FPS 0x0009
265 #define COMM_FRAME_RATE_FIXED_10FPS 0x000a
266 #define COMM_FRAME_RATE_FIXED_90FPS 0x000b
267 #define COMM_FRAME_RATE_ANTI_SHAKE 0x0013
269 /* 0x0000...0x0004 -> sharpness: 0, 1, 2, -1, -2 */
270 #define COMM_SHARPNESS 0x0c14
272 /* 0x0000...0x0004 -> saturation: 0, 1, 2, -1, -2 */
273 #define COMM_SATURATION 0x0c16
275 /* 0x0000...0x0004 -> contrast: 0, 1, 2, -1, -2 */
276 #define COMM_CONTRAST 0x0c18
278 #define COMM_SCENE_MODE 0x0c1a
279 #define COMM_SCENE_MODE_NONE 0x0000
280 #define COMM_SCENE_MODE_PORTRAIT 0x0001
281 #define COMM_SCENE_MODE_LANDSCAPE 0x0002
282 #define COMM_SCENE_MODE_SPORTS 0x0003
283 #define COMM_SCENE_MODE_INDOOR 0x0004
284 #define COMM_SCENE_MODE_BEACH 0x0005
285 #define COMM_SCENE_MODE_SUNSET 0x0006
286 #define COMM_SCENE_MODE_DAWN 0x0007
287 #define COMM_SCENE_MODE_FALL 0x0008
288 #define COMM_SCENE_MODE_NIGHT 0x0009
289 #define COMM_SCENE_MODE_AGAINST_LIGHT 0x000a
290 #define COMM_SCENE_MODE_FIRE 0x000b
291 #define COMM_SCENE_MODE_TEXT 0x000c
292 #define COMM_SCENE_MODE_CANDLE 0x000d
294 #define COMM_AE_AUTO_BRACKET 0x0b14
295 #define COMM_AE_AUTO_BRAKET_EV05 0x0080
296 #define COMM_AE_AUTO_BRAKET_EV10 0x0100
297 #define COMM_AE_AUTO_BRAKET_EV15 0x0180
298 #define COMM_AE_AUTO_BRAKET_EV20 0x0200
300 #define COMM_SENSOR_STREAMING 0x090a
301 #define COMM_SENSOR_STREAMING_OFF 0x0000
302 #define COMM_SENSOR_STREAMING_ON 0x0001
304 #define COMM_AWB_MODE 0x0d02
305 #define COMM_AWB_MODE_INCANDESCENT 0x0000
306 #define COMM_AWB_MODE_FLUORESCENT1 0x0001
307 #define COMM_AWB_MODE_FLUORESCENT2 0x0002
308 #define COMM_AWB_MODE_DAYLIGHT 0x0003
309 #define COMM_AWB_MODE_CLOUDY 0x0004
310 #define COMM_AWB_MODE_AUTO 0x0005
312 #define COMM_AWB_CON 0x0d00
313 #define COMM_AWB_STOP 0x0000 /* lock */
314 #define COMM_AWB_START 0x0001 /* unlock */
316 #define COMM_FW_UPDATE 0x0906
317 #define COMM_FW_UPDATE_NOT_READY 0x0000
318 #define COMM_FW_UPDATE_SUCCESS 0x0005
319 #define COMM_FW_UPDATE_FAIL 0x0007
320 #define COMM_FW_UPDATE_BUSY 0xffff
323 #define S5C73M3_MAX_SUPPLIES 6
325 struct s5c73m3_ctrls {
326 struct v4l2_ctrl_handler handler;
327 struct {
328 /* exposure/exposure bias cluster */
329 struct v4l2_ctrl *auto_exposure;
330 struct v4l2_ctrl *exposure_bias;
331 struct v4l2_ctrl *exposure_metering;
333 struct {
334 /* iso/auto iso cluster */
335 struct v4l2_ctrl *auto_iso;
336 struct v4l2_ctrl *iso;
338 struct v4l2_ctrl *auto_wb;
339 struct {
340 /* continuous auto focus/auto focus cluster */
341 struct v4l2_ctrl *focus_auto;
342 struct v4l2_ctrl *af_start;
343 struct v4l2_ctrl *af_stop;
344 struct v4l2_ctrl *af_status;
345 struct v4l2_ctrl *af_distance;
348 struct v4l2_ctrl *aaa_lock;
349 struct v4l2_ctrl *colorfx;
350 struct v4l2_ctrl *contrast;
351 struct v4l2_ctrl *saturation;
352 struct v4l2_ctrl *sharpness;
353 struct v4l2_ctrl *zoom;
354 struct v4l2_ctrl *wdr;
355 struct v4l2_ctrl *stabilization;
356 struct v4l2_ctrl *jpeg_quality;
357 struct v4l2_ctrl *scene_mode;
360 enum s5c73m3_gpio_id {
361 STBY,
362 RST,
363 GPIO_NUM,
366 enum s5c73m3_resolution_types {
367 RES_ISP,
368 RES_JPEG,
371 struct s5c73m3_interval {
372 u16 fps_reg;
373 struct v4l2_fract interval;
374 /* Maximum rectangle for the interval */
375 struct v4l2_frmsize_discrete size;
378 struct s5c73m3 {
379 struct v4l2_subdev sensor_sd;
380 struct media_pad sensor_pads[S5C73M3_NUM_PADS];
382 struct v4l2_subdev oif_sd;
383 struct media_pad oif_pads[OIF_NUM_PADS];
385 struct spi_driver spidrv;
386 struct spi_device *spi_dev;
387 struct i2c_client *i2c_client;
388 u32 i2c_write_address;
389 u32 i2c_read_address;
391 struct regulator_bulk_data supplies[S5C73M3_MAX_SUPPLIES];
392 struct s5c73m3_gpio gpio[GPIO_NUM];
394 /* External master clock frequency */
395 u32 mclk_frequency;
396 /* Video bus type - MIPI-CSI2/parallel */
397 enum v4l2_mbus_type bus_type;
399 const struct s5c73m3_frame_size *sensor_pix_size[2];
400 const struct s5c73m3_frame_size *oif_pix_size[2];
401 enum v4l2_mbus_pixelcode mbus_code;
403 const struct s5c73m3_interval *fiv;
405 struct v4l2_mbus_frame_desc frame_desc;
406 /* protects the struct members below */
407 struct mutex lock;
409 struct s5c73m3_ctrls ctrls;
411 u8 streaming:1;
412 u8 apply_fmt:1;
413 u8 apply_fiv:1;
414 u8 isp_ready:1;
416 short power;
418 char sensor_fw[S5C73M3_SENSOR_FW_LEN + 2];
419 char sensor_type[S5C73M3_SENSOR_TYPE_LEN + 2];
420 char fw_file_version[2];
421 unsigned int fw_size;
424 struct s5c73m3_frame_size {
425 u32 width;
426 u32 height;
427 u8 reg_val;
430 extern int s5c73m3_dbg;
432 int s5c73m3_register_spi_driver(struct s5c73m3 *state);
433 void s5c73m3_unregister_spi_driver(struct s5c73m3 *state);
434 int s5c73m3_spi_write(struct s5c73m3 *state, const void *addr,
435 const unsigned int len, const unsigned int tx_size);
436 int s5c73m3_spi_read(struct s5c73m3 *state, void *addr,
437 const unsigned int len, const unsigned int tx_size);
439 int s5c73m3_read(struct s5c73m3 *state, u32 addr, u16 *data);
440 int s5c73m3_write(struct s5c73m3 *state, u32 addr, u16 data);
441 int s5c73m3_isp_command(struct s5c73m3 *state, u16 command, u16 data);
442 int s5c73m3_init_controls(struct s5c73m3 *state);
444 static inline struct v4l2_subdev *ctrl_to_sensor_sd(struct v4l2_ctrl *ctrl)
446 return &container_of(ctrl->handler, struct s5c73m3,
447 ctrls.handler)->sensor_sd;
450 static inline struct s5c73m3 *sensor_sd_to_s5c73m3(struct v4l2_subdev *sd)
452 return container_of(sd, struct s5c73m3, sensor_sd);
455 static inline struct s5c73m3 *oif_sd_to_s5c73m3(struct v4l2_subdev *sd)
457 return container_of(sd, struct s5c73m3, oif_sd);
459 #endif /* S5C73M3_H_ */