drivers/media/i2c/soc_camera/mt9m111.c

   1 /*
   2  * Driver for MT9M111/MT9M112/MT9M131 CMOS Image Sensor from Micron/Aptina
   3  *
   4  * Copyright (C) 2008, Robert Jarzmik <robert.jarzmik@free.fr>
   5  *
   6  * This program is free software; you can redistribute it and/or modify
   7  * it under the terms of the GNU General Public License version 2 as
   8  * published by the Free Software Foundation.
   9  */
  10 #include <linux/videodev2.h>
  11 #include <linux/slab.h>
  12 #include <linux/i2c.h>
  13 #include <linux/log2.h>
  14 #include <linux/gpio.h>
  15 #include <linux/delay.h>
  16 #include <linux/v4l2-mediabus.h>
  17 #include <linux/module.h>
  18
  19 #include <media/soc_camera.h>
  20 #include <media/v4l2-clk.h>
  21 #include <media/v4l2-common.h>
  22 #include <media/v4l2-ctrls.h>
  23
  24 /*
  25  * MT9M111, MT9M112 and MT9M131:
  26  * i2c address is 0x48 or 0x5d (depending on SADDR pin)
  27  * The platform has to define struct i2c_board_info objects and link to them
  28  * from struct soc_camera_host_desc
  29  */
  30
  31 /*
  32  * Sensor core register addresses (0x000..0x0ff)
  33  */
  34 #define MT9M111_CHIP_VERSION            0x000
  35 #define MT9M111_ROW_START               0x001
  36 #define MT9M111_COLUMN_START            0x002
  37 #define MT9M111_WINDOW_HEIGHT           0x003
  38 #define MT9M111_WINDOW_WIDTH            0x004
  39 #define MT9M111_HORIZONTAL_BLANKING_B   0x005
  40 #define MT9M111_VERTICAL_BLANKING_B     0x006
  41 #define MT9M111_HORIZONTAL_BLANKING_A   0x007
  42 #define MT9M111_VERTICAL_BLANKING_A     0x008
  43 #define MT9M111_SHUTTER_WIDTH           0x009
  44 #define MT9M111_ROW_SPEED               0x00a
  45 #define MT9M111_EXTRA_DELAY             0x00b
  46 #define MT9M111_SHUTTER_DELAY           0x00c
  47 #define MT9M111_RESET                   0x00d
  48 #define MT9M111_READ_MODE_B             0x020
  49 #define MT9M111_READ_MODE_A             0x021
  50 #define MT9M111_FLASH_CONTROL           0x023
  51 #define MT9M111_GREEN1_GAIN             0x02b
  52 #define MT9M111_BLUE_GAIN               0x02c
  53 #define MT9M111_RED_GAIN                0x02d
  54 #define MT9M111_GREEN2_GAIN             0x02e
  55 #define MT9M111_GLOBAL_GAIN             0x02f
  56 #define MT9M111_CONTEXT_CONTROL         0x0c8
  57 #define MT9M111_PAGE_MAP                0x0f0
  58 #define MT9M111_BYTE_WISE_ADDR          0x0f1
  59
  60 #define MT9M111_RESET_SYNC_CHANGES      (1 << 15)
  61 #define MT9M111_RESET_RESTART_BAD_FRAME (1 << 9)
  62 #define MT9M111_RESET_SHOW_BAD_FRAMES   (1 << 8)
  63 #define MT9M111_RESET_RESET_SOC         (1 << 5)
  64 #define MT9M111_RESET_OUTPUT_DISABLE    (1 << 4)
  65 #define MT9M111_RESET_CHIP_ENABLE       (1 << 3)
  66 #define MT9M111_RESET_ANALOG_STANDBY    (1 << 2)
  67 #define MT9M111_RESET_RESTART_FRAME     (1 << 1)
  68 #define MT9M111_RESET_RESET_MODE        (1 << 0)
  69
  70 #define MT9M111_RM_FULL_POWER_RD        (0 << 10)
  71 #define MT9M111_RM_LOW_POWER_RD         (1 << 10)
  72 #define MT9M111_RM_COL_SKIP_4X          (1 << 5)
  73 #define MT9M111_RM_ROW_SKIP_4X          (1 << 4)
  74 #define MT9M111_RM_COL_SKIP_2X          (1 << 3)
  75 #define MT9M111_RM_ROW_SKIP_2X          (1 << 2)
  76 #define MT9M111_RMB_MIRROR_COLS         (1 << 1)
  77 #define MT9M111_RMB_MIRROR_ROWS         (1 << 0)
  78 #define MT9M111_CTXT_CTRL_RESTART       (1 << 15)
  79 #define MT9M111_CTXT_CTRL_DEFECTCOR_B   (1 << 12)
  80 #define MT9M111_CTXT_CTRL_RESIZE_B      (1 << 10)
  81 #define MT9M111_CTXT_CTRL_CTRL2_B       (1 << 9)
  82 #define MT9M111_CTXT_CTRL_GAMMA_B       (1 << 8)
  83 #define MT9M111_CTXT_CTRL_XENON_EN      (1 << 7)
  84 #define MT9M111_CTXT_CTRL_READ_MODE_B   (1 << 3)
  85 #define MT9M111_CTXT_CTRL_LED_FLASH_EN  (1 << 2)
  86 #define MT9M111_CTXT_CTRL_VBLANK_SEL_B  (1 << 1)
  87 #define MT9M111_CTXT_CTRL_HBLANK_SEL_B  (1 << 0)
  88
  89 /*
  90  * Colorpipe register addresses (0x100..0x1ff)
  91  */
  92 #define MT9M111_OPER_MODE_CTRL          0x106
  93 #define MT9M111_OUTPUT_FORMAT_CTRL      0x108
  94 #define MT9M111_REDUCER_XZOOM_B         0x1a0
  95 #define MT9M111_REDUCER_XSIZE_B         0x1a1
  96 #define MT9M111_REDUCER_YZOOM_B         0x1a3
  97 #define MT9M111_REDUCER_YSIZE_B         0x1a4
  98 #define MT9M111_REDUCER_XZOOM_A         0x1a6
  99 #define MT9M111_REDUCER_XSIZE_A         0x1a7
 100 #define MT9M111_REDUCER_YZOOM_A         0x1a9
 101 #define MT9M111_REDUCER_YSIZE_A         0x1aa
 102
 103 #define MT9M111_OUTPUT_FORMAT_CTRL2_A   0x13a
 104 #define MT9M111_OUTPUT_FORMAT_CTRL2_B   0x19b
 105
 106 #define MT9M111_OPMODE_AUTOEXPO_EN      (1 << 14)
 107 #define MT9M111_OPMODE_AUTOWHITEBAL_EN  (1 << 1)
 108 #define MT9M111_OUTFMT_FLIP_BAYER_COL   (1 << 9)
 109 #define MT9M111_OUTFMT_FLIP_BAYER_ROW   (1 << 8)
 110 #define MT9M111_OUTFMT_PROCESSED_BAYER  (1 << 14)
 111 #define MT9M111_OUTFMT_BYPASS_IFP       (1 << 10)
 112 #define MT9M111_OUTFMT_INV_PIX_CLOCK    (1 << 9)
 113 #define MT9M111_OUTFMT_RGB              (1 << 8)
 114 #define MT9M111_OUTFMT_RGB565           (0 << 6)
 115 #define MT9M111_OUTFMT_RGB555           (1 << 6)
 116 #define MT9M111_OUTFMT_RGB444x          (2 << 6)
 117 #define MT9M111_OUTFMT_RGBx444          (3 << 6)
 118 #define MT9M111_OUTFMT_TST_RAMP_OFF     (0 << 4)
 119 #define MT9M111_OUTFMT_TST_RAMP_COL     (1 << 4)
 120 #define MT9M111_OUTFMT_TST_RAMP_ROW     (2 << 4)
 121 #define MT9M111_OUTFMT_TST_RAMP_FRAME   (3 << 4)
 122 #define MT9M111_OUTFMT_SHIFT_3_UP       (1 << 3)
 123 #define MT9M111_OUTFMT_AVG_CHROMA       (1 << 2)
 124 #define MT9M111_OUTFMT_SWAP_YCbCr_C_Y_RGB_EVEN  (1 << 1)
 125 #define MT9M111_OUTFMT_SWAP_YCbCr_Cb_Cr_RGB_R_B (1 << 0)
 126
 127 /*
 128  * Camera control register addresses (0x200..0x2ff not implemented)
 129  */
 130
 131 #define reg_read(reg) mt9m111_reg_read(client, MT9M111_##reg)
 132 #define reg_write(reg, val) mt9m111_reg_write(client, MT9M111_##reg, (val))
 133 #define reg_set(reg, val) mt9m111_reg_set(client, MT9M111_##reg, (val))
 134 #define reg_clear(reg, val) mt9m111_reg_clear(client, MT9M111_##reg, (val))
 135 #define reg_mask(reg, val, mask) mt9m111_reg_mask(client, MT9M111_##reg, \
 136                 (val), (mask))
 137
 138 #define MT9M111_MIN_DARK_ROWS   8
 139 #define MT9M111_MIN_DARK_COLS   26
 140 #define MT9M111_MAX_HEIGHT      1024
 141 #define MT9M111_MAX_WIDTH       1280
 142
 143 struct mt9m111_context {
 144         u16 read_mode;
 145         u16 blanking_h;
 146         u16 blanking_v;
 147         u16 reducer_xzoom;
 148         u16 reducer_yzoom;
 149         u16 reducer_xsize;
 150         u16 reducer_ysize;
 151         u16 output_fmt_ctrl2;
 152         u16 control;
 153 };
 154
 155 static struct mt9m111_context context_a = {
 156         .read_mode              = MT9M111_READ_MODE_A,
 157         .blanking_h             = MT9M111_HORIZONTAL_BLANKING_A,
 158         .blanking_v             = MT9M111_VERTICAL_BLANKING_A,
 159         .reducer_xzoom          = MT9M111_REDUCER_XZOOM_A,
 160         .reducer_yzoom          = MT9M111_REDUCER_YZOOM_A,
 161         .reducer_xsize          = MT9M111_REDUCER_XSIZE_A,
 162         .reducer_ysize          = MT9M111_REDUCER_YSIZE_A,
 163         .output_fmt_ctrl2       = MT9M111_OUTPUT_FORMAT_CTRL2_A,
 164         .control                = MT9M111_CTXT_CTRL_RESTART,
 165 };
 166
 167 static struct mt9m111_context context_b = {
 168         .read_mode              = MT9M111_READ_MODE_B,
 169         .blanking_h             = MT9M111_HORIZONTAL_BLANKING_B,
 170         .blanking_v             = MT9M111_VERTICAL_BLANKING_B,
 171         .reducer_xzoom          = MT9M111_REDUCER_XZOOM_B,
 172         .reducer_yzoom          = MT9M111_REDUCER_YZOOM_B,
 173         .reducer_xsize          = MT9M111_REDUCER_XSIZE_B,
 174         .reducer_ysize          = MT9M111_REDUCER_YSIZE_B,
 175         .output_fmt_ctrl2       = MT9M111_OUTPUT_FORMAT_CTRL2_B,
 176         .control                = MT9M111_CTXT_CTRL_RESTART |
 177                 MT9M111_CTXT_CTRL_DEFECTCOR_B | MT9M111_CTXT_CTRL_RESIZE_B |
 178                 MT9M111_CTXT_CTRL_CTRL2_B | MT9M111_CTXT_CTRL_GAMMA_B |
 179                 MT9M111_CTXT_CTRL_READ_MODE_B | MT9M111_CTXT_CTRL_VBLANK_SEL_B |
 180                 MT9M111_CTXT_CTRL_HBLANK_SEL_B,
 181 };
 182
 183 /* MT9M111 has only one fixed colorspace per pixelcode */
 184 struct mt9m111_datafmt {
 185         enum v4l2_mbus_pixelcode        code;
 186         enum v4l2_colorspace            colorspace;
 187 };
 188
 189 static const struct mt9m111_datafmt mt9m111_colour_fmts[] = {
 190         {V4L2_MBUS_FMT_YUYV8_2X8, V4L2_COLORSPACE_JPEG},
 191         {V4L2_MBUS_FMT_YVYU8_2X8, V4L2_COLORSPACE_JPEG},
 192         {V4L2_MBUS_FMT_UYVY8_2X8, V4L2_COLORSPACE_JPEG},
 193         {V4L2_MBUS_FMT_VYUY8_2X8, V4L2_COLORSPACE_JPEG},
 194         {V4L2_MBUS_FMT_RGB555_2X8_PADHI_LE, V4L2_COLORSPACE_SRGB},
 195         {V4L2_MBUS_FMT_RGB555_2X8_PADHI_BE, V4L2_COLORSPACE_SRGB},
 196         {V4L2_MBUS_FMT_RGB565_2X8_LE, V4L2_COLORSPACE_SRGB},
 197         {V4L2_MBUS_FMT_RGB565_2X8_BE, V4L2_COLORSPACE_SRGB},
 198         {V4L2_MBUS_FMT_BGR565_2X8_LE, V4L2_COLORSPACE_SRGB},
 199         {V4L2_MBUS_FMT_BGR565_2X8_BE, V4L2_COLORSPACE_SRGB},
 200         {V4L2_MBUS_FMT_SBGGR8_1X8, V4L2_COLORSPACE_SRGB},
 201         {V4L2_MBUS_FMT_SBGGR10_2X8_PADHI_LE, V4L2_COLORSPACE_SRGB},
 202 };
 203
 204 struct mt9m111 {
 205         struct v4l2_subdev subdev;
 206         struct v4l2_ctrl_handler hdl;
 207         struct v4l2_ctrl *gain;
 208         struct mt9m111_context *ctx;
 209         struct v4l2_rect rect;  /* cropping rectangle */
 210         struct v4l2_clk *clk;
 211         unsigned int width;     /* output */
 212         unsigned int height;    /* sizes */
 213         struct mutex power_lock; /* lock to protect power_count */
 214         int power_count;
 215         const struct mt9m111_datafmt *fmt;
 216         int lastpage;   /* PageMap cache value */
 217 };
 218
 219 /* Find a data format by a pixel code */
 220 static const struct mt9m111_datafmt *mt9m111_find_datafmt(struct mt9m111 *mt9m111,
 221                                                 enum v4l2_mbus_pixelcode code)
 222 {
 223         int i;
 224         for (i = 0; i < ARRAY_SIZE(mt9m111_colour_fmts); i++)
 225                 if (mt9m111_colour_fmts[i].code == code)
 226                         return mt9m111_colour_fmts + i;
 227
 228         return mt9m111->fmt;
 229 }
 230
 231 static struct mt9m111 *to_mt9m111(const struct i2c_client *client)
 232 {
 233         return container_of(i2c_get_clientdata(client), struct mt9m111, subdev);
 234 }
 235
 236 static int reg_page_map_set(struct i2c_client *client, const u16 reg)
 237 {
 238         int ret;
 239         u16 page;
 240         struct mt9m111 *mt9m111 = to_mt9m111(client);
 241
 242         page = (reg >> 8);
 243         if (page == mt9m111->lastpage)
 244                 return 0;
 245         if (page > 2)
 246                 return -EINVAL;
 247
 248         ret = i2c_smbus_write_word_swapped(client, MT9M111_PAGE_MAP, page);
 249         if (!ret)
 250                 mt9m111->lastpage = page;
 251         return ret;
 252 }
 253
 254 static int mt9m111_reg_read(struct i2c_client *client, const u16 reg)
 255 {
 256         int ret;
 257
 258         ret = reg_page_map_set(client, reg);
 259         if (!ret)
 260                 ret = i2c_smbus_read_word_swapped(client, reg & 0xff);
 261
 262         dev_dbg(&client->dev, "read  reg.%03x -> %04x\n", reg, ret);
 263         return ret;
 264 }
 265
 266 static int mt9m111_reg_write(struct i2c_client *client, const u16 reg,
 267                              const u16 data)
 268 {
 269         int ret;
 270
 271         ret = reg_page_map_set(client, reg);
 272         if (!ret)
 273                 ret = i2c_smbus_write_word_swapped(client, reg & 0xff, data);
 274         dev_dbg(&client->dev, "write reg.%03x = %04x -> %d\n", reg, data, ret);
 275         return ret;
 276 }
 277
 278 static int mt9m111_reg_set(struct i2c_client *client, const u16 reg,
 279                            const u16 data)
 280 {
 281         int ret;
 282
 283         ret = mt9m111_reg_read(client, reg);
 284         if (ret >= 0)
 285                 ret = mt9m111_reg_write(client, reg, ret | data);
 286         return ret;
 287 }
 288
 289 static int mt9m111_reg_clear(struct i2c_client *client, const u16 reg,
 290                              const u16 data)
 291 {
 292         int ret;
 293
 294         ret = mt9m111_reg_read(client, reg);
 295         if (ret >= 0)
 296                 ret = mt9m111_reg_write(client, reg, ret & ~data);
 297         return ret;
 298 }
 299
 300 static int mt9m111_reg_mask(struct i2c_client *client, const u16 reg,
 301                             const u16 data, const u16 mask)
 302 {
 303         int ret;
 304
 305         ret = mt9m111_reg_read(client, reg);
 306         if (ret >= 0)
 307                 ret = mt9m111_reg_write(client, reg, (ret & ~mask) | data);
 308         return ret;
 309 }
 310
 311 static int mt9m111_set_context(struct mt9m111 *mt9m111,
 312                                struct mt9m111_context *ctx)
 313 {
 314         struct i2c_client *client = v4l2_get_subdevdata(&mt9m111->subdev);
 315         return reg_write(CONTEXT_CONTROL, ctx->control);
 316 }
 317
 318 static int mt9m111_setup_rect_ctx(struct mt9m111 *mt9m111,
 319                         struct mt9m111_context *ctx, struct v4l2_rect *rect,
 320                         unsigned int width, unsigned int height)
 321 {
 322         struct i2c_client *client = v4l2_get_subdevdata(&mt9m111->subdev);
 323         int ret = mt9m111_reg_write(client, ctx->reducer_xzoom, rect->width);
 324         if (!ret)
 325                 ret = mt9m111_reg_write(client, ctx->reducer_yzoom, rect->height);
 326         if (!ret)
 327                 ret = mt9m111_reg_write(client, ctx->reducer_xsize, width);
 328         if (!ret)
 329                 ret = mt9m111_reg_write(client, ctx->reducer_ysize, height);
 330         return ret;
 331 }
 332
 333 static int mt9m111_setup_geometry(struct mt9m111 *mt9m111, struct v4l2_rect *rect,
 334                         int width, int height, enum v4l2_mbus_pixelcode code)
 335 {
 336         struct i2c_client *client = v4l2_get_subdevdata(&mt9m111->subdev);
 337         int ret;
 338
 339         ret = reg_write(COLUMN_START, rect->left);
 340         if (!ret)
 341                 ret = reg_write(ROW_START, rect->top);
 342
 343         if (!ret)
 344                 ret = reg_write(WINDOW_WIDTH, rect->width);
 345         if (!ret)
 346                 ret = reg_write(WINDOW_HEIGHT, rect->height);
 347
 348         if (code != V4L2_MBUS_FMT_SBGGR10_2X8_PADHI_LE) {
 349                 /* IFP in use, down-scaling possible */
 350                 if (!ret)
 351                         ret = mt9m111_setup_rect_ctx(mt9m111, &context_b,
 352                                                      rect, width, height);
 353                 if (!ret)
 354                         ret = mt9m111_setup_rect_ctx(mt9m111, &context_a,
 355                                                      rect, width, height);
 356         }
 357
 358         dev_dbg(&client->dev, "%s(%x): %ux%u@%u:%u -> %ux%u = %d\n",
 359                 __func__, code, rect->width, rect->height, rect->left, rect->top,
 360                 width, height, ret);
 361
 362         return ret;
 363 }
 364
 365 static int mt9m111_enable(struct mt9m111 *mt9m111)
 366 {
 367         struct i2c_client *client = v4l2_get_subdevdata(&mt9m111->subdev);
 368         return reg_write(RESET, MT9M111_RESET_CHIP_ENABLE);
 369 }
 370
 371 static int mt9m111_reset(struct mt9m111 *mt9m111)
 372 {
 373         struct i2c_client *client = v4l2_get_subdevdata(&mt9m111->subdev);
 374         int ret;
 375
 376         ret = reg_set(RESET, MT9M111_RESET_RESET_MODE);
 377         if (!ret)
 378                 ret = reg_set(RESET, MT9M111_RESET_RESET_SOC);
 379         if (!ret)
 380                 ret = reg_clear(RESET, MT9M111_RESET_RESET_MODE
 381                                 | MT9M111_RESET_RESET_SOC);
 382
 383         return ret;
 384 }
 385
 386 static int mt9m111_s_crop(struct v4l2_subdev *sd, const struct v4l2_crop *a)
 387 {
 388         struct v4l2_rect rect = a->c;
 389         struct mt9m111 *mt9m111 = container_of(sd, struct mt9m111, subdev);
 390         int width, height;
 391         int ret;
 392
 393         if (a->type != V4L2_BUF_TYPE_VIDEO_CAPTURE)
 394                 return -EINVAL;
 395
 396         if (mt9m111->fmt->code == V4L2_MBUS_FMT_SBGGR8_1X8 ||
 397             mt9m111->fmt->code == V4L2_MBUS_FMT_SBGGR10_2X8_PADHI_LE) {
 398                 /* Bayer format - even size lengths */
 399                 rect.width      = ALIGN(rect.width, 2);
 400                 rect.height     = ALIGN(rect.height, 2);
 401                 /* Let the user play with the starting pixel */
 402         }
 403
 404         /* FIXME: the datasheet doesn't specify minimum sizes */
 405         soc_camera_limit_side(&rect.left, &rect.width,
 406                      MT9M111_MIN_DARK_COLS, 2, MT9M111_MAX_WIDTH);
 407
 408         soc_camera_limit_side(&rect.top, &rect.height,
 409                      MT9M111_MIN_DARK_ROWS, 2, MT9M111_MAX_HEIGHT);
 410
 411         width = min(mt9m111->width, rect.width);
 412         height = min(mt9m111->height, rect.height);
 413
 414         ret = mt9m111_setup_geometry(mt9m111, &rect, width, height, mt9m111->fmt->code);
 415         if (!ret) {
 416                 mt9m111->rect = rect;
 417                 mt9m111->width = width;
 418                 mt9m111->height = height;
 419         }
 420
 421         return ret;
 422 }
 423
 424 static int mt9m111_g_crop(struct v4l2_subdev *sd, struct v4l2_crop *a)
 425 {
 426         struct mt9m111 *mt9m111 = container_of(sd, struct mt9m111, subdev);
 427
 428         a->c    = mt9m111->rect;
 429         a->type = V4L2_BUF_TYPE_VIDEO_CAPTURE;
 430
 431         return 0;
 432 }
 433
 434 static int mt9m111_cropcap(struct v4l2_subdev *sd, struct v4l2_cropcap *a)
 435 {
 436         if (a->type != V4L2_BUF_TYPE_VIDEO_CAPTURE)
 437                 return -EINVAL;
 438
 439         a->bounds.left                  = MT9M111_MIN_DARK_COLS;
 440         a->bounds.top                   = MT9M111_MIN_DARK_ROWS;
 441         a->bounds.width                 = MT9M111_MAX_WIDTH;
 442         a->bounds.height                = MT9M111_MAX_HEIGHT;
 443         a->defrect                      = a->bounds;
 444         a->pixelaspect.numerator        = 1;
 445         a->pixelaspect.denominator      = 1;
 446
 447         return 0;
 448 }
 449
 450 static int mt9m111_g_fmt(struct v4l2_subdev *sd,
 451                          struct v4l2_mbus_framefmt *mf)
 452 {
 453         struct mt9m111 *mt9m111 = container_of(sd, struct mt9m111, subdev);
 454
 455         mf->width       = mt9m111->width;
 456         mf->height      = mt9m111->height;
 457         mf->code        = mt9m111->fmt->code;
 458         mf->colorspace  = mt9m111->fmt->colorspace;
 459         mf->field       = V4L2_FIELD_NONE;
 460
 461         return 0;
 462 }
 463
 464 static int mt9m111_set_pixfmt(struct mt9m111 *mt9m111,
 465                               enum v4l2_mbus_pixelcode code)
 466 {
 467         struct i2c_client *client = v4l2_get_subdevdata(&mt9m111->subdev);
 468         u16 data_outfmt2, mask_outfmt2 = MT9M111_OUTFMT_PROCESSED_BAYER |
 469                 MT9M111_OUTFMT_BYPASS_IFP | MT9M111_OUTFMT_RGB |
 470                 MT9M111_OUTFMT_RGB565 | MT9M111_OUTFMT_RGB555 |
 471                 MT9M111_OUTFMT_RGB444x | MT9M111_OUTFMT_RGBx444 |
 472                 MT9M111_OUTFMT_SWAP_YCbCr_C_Y_RGB_EVEN |
 473                 MT9M111_OUTFMT_SWAP_YCbCr_Cb_Cr_RGB_R_B;
 474         int ret;
 475
 476         switch (code) {
 477         case V4L2_MBUS_FMT_SBGGR8_1X8:
 478                 data_outfmt2 = MT9M111_OUTFMT_PROCESSED_BAYER |
 479                         MT9M111_OUTFMT_RGB;
 480                 break;
 481         case V4L2_MBUS_FMT_SBGGR10_2X8_PADHI_LE:
 482                 data_outfmt2 = MT9M111_OUTFMT_BYPASS_IFP | MT9M111_OUTFMT_RGB;
 483                 break;
 484         case V4L2_MBUS_FMT_RGB555_2X8_PADHI_LE:
 485                 data_outfmt2 = MT9M111_OUTFMT_RGB | MT9M111_OUTFMT_RGB555 |
 486                         MT9M111_OUTFMT_SWAP_YCbCr_C_Y_RGB_EVEN;
 487                 break;
 488         case V4L2_MBUS_FMT_RGB555_2X8_PADHI_BE:
 489                 data_outfmt2 = MT9M111_OUTFMT_RGB | MT9M111_OUTFMT_RGB555;
 490                 break;
 491         case V4L2_MBUS_FMT_RGB565_2X8_LE:
 492                 data_outfmt2 = MT9M111_OUTFMT_RGB | MT9M111_OUTFMT_RGB565 |
 493                         MT9M111_OUTFMT_SWAP_YCbCr_C_Y_RGB_EVEN;
 494                 break;
 495         case V4L2_MBUS_FMT_RGB565_2X8_BE:
 496                 data_outfmt2 = MT9M111_OUTFMT_RGB | MT9M111_OUTFMT_RGB565;
 497                 break;
 498         case V4L2_MBUS_FMT_BGR565_2X8_BE:
 499                 data_outfmt2 = MT9M111_OUTFMT_RGB | MT9M111_OUTFMT_RGB565 |
 500                         MT9M111_OUTFMT_SWAP_YCbCr_Cb_Cr_RGB_R_B;
 501                 break;
 502         case V4L2_MBUS_FMT_BGR565_2X8_LE:
 503                 data_outfmt2 = MT9M111_OUTFMT_RGB | MT9M111_OUTFMT_RGB565 |
 504                         MT9M111_OUTFMT_SWAP_YCbCr_C_Y_RGB_EVEN |
 505                         MT9M111_OUTFMT_SWAP_YCbCr_Cb_Cr_RGB_R_B;
 506                 break;
 507         case V4L2_MBUS_FMT_UYVY8_2X8:
 508                 data_outfmt2 = 0;
 509                 break;
 510         case V4L2_MBUS_FMT_VYUY8_2X8:
 511                 data_outfmt2 = MT9M111_OUTFMT_SWAP_YCbCr_Cb_Cr_RGB_R_B;
 512                 break;
 513         case V4L2_MBUS_FMT_YUYV8_2X8:
 514                 data_outfmt2 = MT9M111_OUTFMT_SWAP_YCbCr_C_Y_RGB_EVEN;
 515                 break;
 516         case V4L2_MBUS_FMT_YVYU8_2X8:
 517                 data_outfmt2 = MT9M111_OUTFMT_SWAP_YCbCr_C_Y_RGB_EVEN |
 518                         MT9M111_OUTFMT_SWAP_YCbCr_Cb_Cr_RGB_R_B;
 519                 break;
 520         default:
 521                 dev_err(&client->dev, "Pixel format not handled: %x\n", code);
 522                 return -EINVAL;
 523         }
 524
 525         ret = mt9m111_reg_mask(client, context_a.output_fmt_ctrl2,
 526                                data_outfmt2, mask_outfmt2);
 527         if (!ret)
 528                 ret = mt9m111_reg_mask(client, context_b.output_fmt_ctrl2,
 529                                        data_outfmt2, mask_outfmt2);
 530
 531         return ret;
 532 }
 533
 534 static int mt9m111_try_fmt(struct v4l2_subdev *sd,
 535                            struct v4l2_mbus_framefmt *mf)
 536 {
 537         struct i2c_client *client = v4l2_get_subdevdata(sd);
 538         struct mt9m111 *mt9m111 = container_of(sd, struct mt9m111, subdev);
 539         const struct mt9m111_datafmt *fmt;
 540         struct v4l2_rect *rect = &mt9m111->rect;
 541         bool bayer;
 542
 543         fmt = mt9m111_find_datafmt(mt9m111, mf->code);
 544
 545         bayer = fmt->code == V4L2_MBUS_FMT_SBGGR8_1X8 ||
 546                 fmt->code == V4L2_MBUS_FMT_SBGGR10_2X8_PADHI_LE;
 547
 548         /*
 549          * With Bayer format enforce even side lengths, but let the user play
 550          * with the starting pixel
 551          */
 552         if (bayer) {
 553                 rect->width = ALIGN(rect->width, 2);
 554                 rect->height = ALIGN(rect->height, 2);
 555         }
 556
 557         if (fmt->code == V4L2_MBUS_FMT_SBGGR10_2X8_PADHI_LE) {
 558                 /* IFP bypass mode, no scaling */
 559                 mf->width = rect->width;
 560                 mf->height = rect->height;
 561         } else {
 562                 /* No upscaling */
 563                 if (mf->width > rect->width)
 564                         mf->width = rect->width;
 565                 if (mf->height > rect->height)
 566                         mf->height = rect->height;
 567         }
 568
 569         dev_dbg(&client->dev, "%s(): %ux%u, code=%x\n", __func__,
 570                 mf->width, mf->height, fmt->code);
 571
 572         mf->code = fmt->code;
 573         mf->colorspace = fmt->colorspace;
 574
 575         return 0;
 576 }
 577
 578 static int mt9m111_s_fmt(struct v4l2_subdev *sd,
 579                          struct v4l2_mbus_framefmt *mf)
 580 {
 581         const struct mt9m111_datafmt *fmt;
 582         struct mt9m111 *mt9m111 = container_of(sd, struct mt9m111, subdev);
 583         struct v4l2_rect *rect = &mt9m111->rect;
 584         int ret;
 585
 586         mt9m111_try_fmt(sd, mf);
 587         fmt = mt9m111_find_datafmt(mt9m111, mf->code);
 588         /* try_fmt() guarantees fmt != NULL && fmt->code == mf->code */
 589
 590         ret = mt9m111_setup_geometry(mt9m111, rect, mf->width, mf->height, mf->code);
 591         if (!ret)
 592                 ret = mt9m111_set_pixfmt(mt9m111, mf->code);
 593         if (!ret) {
 594                 mt9m111->width  = mf->width;
 595                 mt9m111->height = mf->height;
 596                 mt9m111->fmt    = fmt;
 597         }
 598
 599         return ret;
 600 }
 601
 602 #ifdef CONFIG_VIDEO_ADV_DEBUG
 603 static int mt9m111_g_register(struct v4l2_subdev *sd,
 604                               struct v4l2_dbg_register *reg)
 605 {
 606         struct i2c_client *client = v4l2_get_subdevdata(sd);
 607         int val;
 608
 609         if (reg->reg > 0x2ff)
 610                 return -EINVAL;
 611
 612         val = mt9m111_reg_read(client, reg->reg);
 613         reg->size = 2;
 614         reg->val = (u64)val;
 615
 616         if (reg->val > 0xffff)
 617                 return -EIO;
 618
 619         return 0;
 620 }
 621
 622 static int mt9m111_s_register(struct v4l2_subdev *sd,
 623                               const struct v4l2_dbg_register *reg)
 624 {
 625         struct i2c_client *client = v4l2_get_subdevdata(sd);
 626
 627         if (reg->reg > 0x2ff)
 628                 return -EINVAL;
 629
 630         if (mt9m111_reg_write(client, reg->reg, reg->val) < 0)
 631                 return -EIO;
 632
 633         return 0;
 634 }
 635 #endif
 636
 637 static int mt9m111_set_flip(struct mt9m111 *mt9m111, int flip, int mask)
 638 {
 639         struct i2c_client *client = v4l2_get_subdevdata(&mt9m111->subdev);
 640         int ret;
 641
 642         if (flip)
 643                 ret = mt9m111_reg_set(client, mt9m111->ctx->read_mode, mask);
 644         else
 645                 ret = mt9m111_reg_clear(client, mt9m111->ctx->read_mode, mask);
 646
 647         return ret;
 648 }
 649
 650 static int mt9m111_get_global_gain(struct mt9m111 *mt9m111)
 651 {
 652         struct i2c_client *client = v4l2_get_subdevdata(&mt9m111->subdev);
 653         int data;
 654
 655         data = reg_read(GLOBAL_GAIN);
 656         if (data >= 0)
 657                 return (data & 0x2f) * (1 << ((data >> 10) & 1)) *
 658                         (1 << ((data >> 9) & 1));
 659         return data;
 660 }
 661
 662 static int mt9m111_set_global_gain(struct mt9m111 *mt9m111, int gain)
 663 {
 664         struct i2c_client *client = v4l2_get_subdevdata(&mt9m111->subdev);
 665         u16 val;
 666
 667         if (gain > 63 * 2 * 2)
 668                 return -EINVAL;
 669
 670         if ((gain >= 64 * 2) && (gain < 63 * 2 * 2))
 671                 val = (1 << 10) | (1 << 9) | (gain / 4);
 672         else if ((gain >= 64) && (gain < 64 * 2))
 673                 val = (1 << 9) | (gain / 2);
 674         else
 675                 val = gain;
 676
 677         return reg_write(GLOBAL_GAIN, val);
 678 }
 679
 680 static int mt9m111_set_autoexposure(struct mt9m111 *mt9m111, int val)
 681 {
 682         struct i2c_client *client = v4l2_get_subdevdata(&mt9m111->subdev);
 683
 684         if (val == V4L2_EXPOSURE_AUTO)
 685                 return reg_set(OPER_MODE_CTRL, MT9M111_OPMODE_AUTOEXPO_EN);
 686         return reg_clear(OPER_MODE_CTRL, MT9M111_OPMODE_AUTOEXPO_EN);
 687 }
 688
 689 static int mt9m111_set_autowhitebalance(struct mt9m111 *mt9m111, int on)
 690 {
 691         struct i2c_client *client = v4l2_get_subdevdata(&mt9m111->subdev);
 692
 693         if (on)
 694                 return reg_set(OPER_MODE_CTRL, MT9M111_OPMODE_AUTOWHITEBAL_EN);
 695         return reg_clear(OPER_MODE_CTRL, MT9M111_OPMODE_AUTOWHITEBAL_EN);
 696 }
 697
 698 static int mt9m111_s_ctrl(struct v4l2_ctrl *ctrl)
 699 {
 700         struct mt9m111 *mt9m111 = container_of(ctrl->handler,
 701                                                struct mt9m111, hdl);
 702
 703         switch (ctrl->id) {
 704         case V4L2_CID_VFLIP:
 705                 return mt9m111_set_flip(mt9m111, ctrl->val,
 706                                         MT9M111_RMB_MIRROR_ROWS);
 707         case V4L2_CID_HFLIP:
 708                 return mt9m111_set_flip(mt9m111, ctrl->val,
 709                                         MT9M111_RMB_MIRROR_COLS);
 710         case V4L2_CID_GAIN:
 711                 return mt9m111_set_global_gain(mt9m111, ctrl->val);
 712         case V4L2_CID_EXPOSURE_AUTO:
 713                 return mt9m111_set_autoexposure(mt9m111, ctrl->val);
 714         case V4L2_CID_AUTO_WHITE_BALANCE:
 715                 return mt9m111_set_autowhitebalance(mt9m111, ctrl->val);
 716         }
 717
 718         return -EINVAL;
 719 }
 720
 721 static int mt9m111_suspend(struct mt9m111 *mt9m111)
 722 {
 723         struct i2c_client *client = v4l2_get_subdevdata(&mt9m111->subdev);
 724         int ret;
 725
 726         v4l2_ctrl_s_ctrl(mt9m111->gain, mt9m111_get_global_gain(mt9m111));
 727
 728         ret = reg_set(RESET, MT9M111_RESET_RESET_MODE);
 729         if (!ret)
 730                 ret = reg_set(RESET, MT9M111_RESET_RESET_SOC |
 731                               MT9M111_RESET_OUTPUT_DISABLE |
 732                               MT9M111_RESET_ANALOG_STANDBY);
 733         if (!ret)
 734                 ret = reg_clear(RESET, MT9M111_RESET_CHIP_ENABLE);
 735
 736         return ret;
 737 }
 738
 739 static void mt9m111_restore_state(struct mt9m111 *mt9m111)
 740 {
 741         mt9m111_set_context(mt9m111, mt9m111->ctx);
 742         mt9m111_set_pixfmt(mt9m111, mt9m111->fmt->code);
 743         mt9m111_setup_geometry(mt9m111, &mt9m111->rect,
 744                         mt9m111->width, mt9m111->height, mt9m111->fmt->code);
 745         v4l2_ctrl_handler_setup(&mt9m111->hdl);
 746 }
 747
 748 static int mt9m111_resume(struct mt9m111 *mt9m111)
 749 {
 750         int ret = mt9m111_enable(mt9m111);
 751         if (!ret)
 752                 ret = mt9m111_reset(mt9m111);
 753         if (!ret)
 754                 mt9m111_restore_state(mt9m111);
 755
 756         return ret;
 757 }
 758
 759 static int mt9m111_init(struct mt9m111 *mt9m111)
 760 {
 761         struct i2c_client *client = v4l2_get_subdevdata(&mt9m111->subdev);
 762         int ret;
 763
 764         ret = mt9m111_enable(mt9m111);
 765         if (!ret)
 766                 ret = mt9m111_reset(mt9m111);
 767         if (!ret)
 768                 ret = mt9m111_set_context(mt9m111, mt9m111->ctx);
 769         if (ret)
 770                 dev_err(&client->dev, "mt9m111 init failed: %d\n", ret);
 771         return ret;
 772 }
 773
 774 static int mt9m111_power_on(struct mt9m111 *mt9m111)
 775 {
 776         struct i2c_client *client = v4l2_get_subdevdata(&mt9m111->subdev);
 777         struct soc_camera_subdev_desc *ssdd = soc_camera_i2c_to_desc(client);
 778         int ret;
 779
 780         ret = soc_camera_power_on(&client->dev, ssdd, mt9m111->clk);
 781         if (ret < 0)
 782                 return ret;
 783
 784         ret = mt9m111_resume(mt9m111);
 785         if (ret < 0) {
 786                 dev_err(&client->dev, "Failed to resume the sensor: %d\n", ret);
 787                 soc_camera_power_off(&client->dev, ssdd, mt9m111->clk);
 788         }
 789
 790         return ret;
 791 }
 792
 793 static void mt9m111_power_off(struct mt9m111 *mt9m111)
 794 {
 795         struct i2c_client *client = v4l2_get_subdevdata(&mt9m111->subdev);
 796         struct soc_camera_subdev_desc *ssdd = soc_camera_i2c_to_desc(client);
 797
 798         mt9m111_suspend(mt9m111);
 799         soc_camera_power_off(&client->dev, ssdd, mt9m111->clk);
 800 }
 801
 802 static int mt9m111_s_power(struct v4l2_subdev *sd, int on)
 803 {
 804         struct mt9m111 *mt9m111 = container_of(sd, struct mt9m111, subdev);
 805         int ret = 0;
 806
 807         mutex_lock(&mt9m111->power_lock);
 808
 809         /*
 810          * If the power count is modified from 0 to != 0 or from != 0 to 0,
 811          * update the power state.
 812          */
 813         if (mt9m111->power_count == !on) {
 814                 if (on)
 815                         ret = mt9m111_power_on(mt9m111);
 816                 else
 817                         mt9m111_power_off(mt9m111);
 818         }
 819
 820         if (!ret) {
 821                 /* Update the power count. */
 822                 mt9m111->power_count += on ? 1 : -1;
 823                 WARN_ON(mt9m111->power_count < 0);
 824         }
 825
 826         mutex_unlock(&mt9m111->power_lock);
 827         return ret;
 828 }
 829
 830 static const struct v4l2_ctrl_ops mt9m111_ctrl_ops = {
 831         .s_ctrl = mt9m111_s_ctrl,
 832 };
 833
 834 static struct v4l2_subdev_core_ops mt9m111_subdev_core_ops = {
 835         .s_power        = mt9m111_s_power,
 836 #ifdef CONFIG_VIDEO_ADV_DEBUG
 837         .g_register     = mt9m111_g_register,
 838         .s_register     = mt9m111_s_register,
 839 #endif
 840 };
 841
 842 static int mt9m111_enum_fmt(struct v4l2_subdev *sd, unsigned int index,
 843                             enum v4l2_mbus_pixelcode *code)
 844 {
 845         if (index >= ARRAY_SIZE(mt9m111_colour_fmts))
 846                 return -EINVAL;
 847
 848         *code = mt9m111_colour_fmts[index].code;
 849         return 0;
 850 }
 851
 852 static int mt9m111_g_mbus_config(struct v4l2_subdev *sd,
 853                                 struct v4l2_mbus_config *cfg)
 854 {
 855         struct i2c_client *client = v4l2_get_subdevdata(sd);
 856         struct soc_camera_subdev_desc *ssdd = soc_camera_i2c_to_desc(client);
 857
 858         cfg->flags = V4L2_MBUS_MASTER | V4L2_MBUS_PCLK_SAMPLE_RISING |
 859                 V4L2_MBUS_HSYNC_ACTIVE_HIGH | V4L2_MBUS_VSYNC_ACTIVE_HIGH |
 860                 V4L2_MBUS_DATA_ACTIVE_HIGH;
 861         cfg->type = V4L2_MBUS_PARALLEL;
 862         cfg->flags = soc_camera_apply_board_flags(ssdd, cfg);
 863
 864         return 0;
 865 }
 866
 867 static struct v4l2_subdev_video_ops mt9m111_subdev_video_ops = {
 868         .s_mbus_fmt     = mt9m111_s_fmt,
 869         .g_mbus_fmt     = mt9m111_g_fmt,
 870         .try_mbus_fmt   = mt9m111_try_fmt,
 871         .s_crop         = mt9m111_s_crop,
 872         .g_crop         = mt9m111_g_crop,
 873         .cropcap        = mt9m111_cropcap,
 874         .enum_mbus_fmt  = mt9m111_enum_fmt,
 875         .g_mbus_config  = mt9m111_g_mbus_config,
 876 };
 877
 878 static struct v4l2_subdev_ops mt9m111_subdev_ops = {
 879         .core   = &mt9m111_subdev_core_ops,
 880         .video  = &mt9m111_subdev_video_ops,
 881 };
 882
 883 /*
 884  * Interface active, can use i2c. If it fails, it can indeed mean, that
 885  * this wasn't our capture interface, so, we wait for the right one
 886  */
 887 static int mt9m111_video_probe(struct i2c_client *client)
 888 {
 889         struct mt9m111 *mt9m111 = to_mt9m111(client);
 890         s32 data;
 891         int ret;
 892
 893         ret = mt9m111_s_power(&mt9m111->subdev, 1);
 894         if (ret < 0)
 895                 return ret;
 896
 897         data = reg_read(CHIP_VERSION);
 898
 899         switch (data) {
 900         case 0x143a: /* MT9M111 or MT9M131 */
 901                 dev_info(&client->dev,
 902                         "Detected a MT9M111/MT9M131 chip ID %x\n", data);
 903                 break;
 904         case 0x148c: /* MT9M112 */
 905                 dev_info(&client->dev, "Detected a MT9M112 chip ID %x\n", data);
 906                 break;
 907         default:
 908                 dev_err(&client->dev,
 909                         "No MT9M111/MT9M112/MT9M131 chip detected register read %x\n",
 910                         data);
 911                 ret = -ENODEV;
 912                 goto done;
 913         }
 914
 915         ret = mt9m111_init(mt9m111);
 916         if (ret)
 917                 goto done;
 918
 919         ret = v4l2_ctrl_handler_setup(&mt9m111->hdl);
 920
 921 done:
 922         mt9m111_s_power(&mt9m111->subdev, 0);
 923         return ret;
 924 }
 925
 926 static int mt9m111_probe(struct i2c_client *client,
 927                          const struct i2c_device_id *did)
 928 {
 929         struct mt9m111 *mt9m111;
 930         struct i2c_adapter *adapter = to_i2c_adapter(client->dev.parent);
 931         struct soc_camera_subdev_desc *ssdd = soc_camera_i2c_to_desc(client);
 932         int ret;
 933
 934         if (!ssdd) {
 935                 dev_err(&client->dev, "mt9m111: driver needs platform data\n");
 936                 return -EINVAL;
 937         }
 938
 939         if (!i2c_check_functionality(adapter, I2C_FUNC_SMBUS_WORD_DATA)) {
 940                 dev_warn(&adapter->dev,
 941                          "I2C-Adapter doesn't support I2C_FUNC_SMBUS_WORD\n");
 942                 return -EIO;
 943         }
 944
 945         mt9m111 = devm_kzalloc(&client->dev, sizeof(struct mt9m111), GFP_KERNEL);
 946         if (!mt9m111)
 947                 return -ENOMEM;
 948
 949         mt9m111->clk = v4l2_clk_get(&client->dev, "mclk");
 950         if (IS_ERR(mt9m111->clk))
 951                 return -EPROBE_DEFER;
 952
 953         /* Default HIGHPOWER context */
 954         mt9m111->ctx = &context_b;
 955
 956         v4l2_i2c_subdev_init(&mt9m111->subdev, client, &mt9m111_subdev_ops);
 957         v4l2_ctrl_handler_init(&mt9m111->hdl, 5);
 958         v4l2_ctrl_new_std(&mt9m111->hdl, &mt9m111_ctrl_ops,
 959                         V4L2_CID_VFLIP, 0, 1, 1, 0);
 960         v4l2_ctrl_new_std(&mt9m111->hdl, &mt9m111_ctrl_ops,
 961                         V4L2_CID_HFLIP, 0, 1, 1, 0);
 962         v4l2_ctrl_new_std(&mt9m111->hdl, &mt9m111_ctrl_ops,
 963                         V4L2_CID_AUTO_WHITE_BALANCE, 0, 1, 1, 1);
 964         mt9m111->gain = v4l2_ctrl_new_std(&mt9m111->hdl, &mt9m111_ctrl_ops,
 965                         V4L2_CID_GAIN, 0, 63 * 2 * 2, 1, 32);
 966         v4l2_ctrl_new_std_menu(&mt9m111->hdl,
 967                         &mt9m111_ctrl_ops, V4L2_CID_EXPOSURE_AUTO, 1, 0,
 968                         V4L2_EXPOSURE_AUTO);
 969         mt9m111->subdev.ctrl_handler = &mt9m111->hdl;
 970         if (mt9m111->hdl.error) {
 971                 ret = mt9m111->hdl.error;
 972                 goto out_clkput;
 973         }
 974
 975         /* Second stage probe - when a capture adapter is there */
 976         mt9m111->rect.left      = MT9M111_MIN_DARK_COLS;
 977         mt9m111->rect.top       = MT9M111_MIN_DARK_ROWS;
 978         mt9m111->rect.width     = MT9M111_MAX_WIDTH;
 979         mt9m111->rect.height    = MT9M111_MAX_HEIGHT;
 980         mt9m111->fmt            = &mt9m111_colour_fmts[0];
 981         mt9m111->lastpage       = -1;
 982         mutex_init(&mt9m111->power_lock);
 983
 984         ret = soc_camera_power_init(&client->dev, ssdd);
 985         if (ret < 0)
 986                 goto out_hdlfree;
 987
 988         ret = mt9m111_video_probe(client);
 989         if (ret < 0)
 990                 goto out_hdlfree;
 991
 992         mt9m111->subdev.dev = &client->dev;
 993         ret = v4l2_async_register_subdev(&mt9m111->subdev);
 994         if (ret < 0)
 995                 goto out_hdlfree;
 996
 997         return 0;
 998
 999 out_hdlfree:
1000         v4l2_ctrl_handler_free(&mt9m111->hdl);
1001 out_clkput:
1002         v4l2_clk_put(mt9m111->clk);
1003
1004         return ret;
1005 }
1006
1007 static int mt9m111_remove(struct i2c_client *client)
1008 {
1009         struct mt9m111 *mt9m111 = to_mt9m111(client);
1010
1011         v4l2_async_unregister_subdev(&mt9m111->subdev);
1012         v4l2_clk_put(mt9m111->clk);
1013         v4l2_device_unregister_subdev(&mt9m111->subdev);
1014         v4l2_ctrl_handler_free(&mt9m111->hdl);
1015
1016         return 0;
1017 }
1018
1019 static const struct i2c_device_id mt9m111_id[] = {
1020         { "mt9m111", 0 },
1021         { }
1022 };
1023 MODULE_DEVICE_TABLE(i2c, mt9m111_id);
1024
1025 static struct i2c_driver mt9m111_i2c_driver = {
1026         .driver = {
1027                 .name = "mt9m111",
1028         },
1029         .probe          = mt9m111_probe,
1030         .remove         = mt9m111_remove,
1031         .id_table       = mt9m111_id,
1032 };
1033
1034 module_i2c_driver(mt9m111_i2c_driver);
1035
1036 MODULE_DESCRIPTION("Micron/Aptina MT9M111/MT9M112/MT9M131 Camera driver");
1037 MODULE_AUTHOR("Robert Jarzmik");
1038 MODULE_LICENSE("GPL");