drivers/media/platform/marvell-ccic/cafe-driver.c

   1 /*
   2  * A driver for the CMOS camera controller in the Marvell 88ALP01 "cafe"
   3  * multifunction chip.  Currently works with the Omnivision OV7670
   4  * sensor.
   5  *
   6  * The data sheet for this device can be found at:
   7  *    http://www.marvell.com/products/pc_connectivity/88alp01/
   8  *
   9  * Copyright 2006-11 One Laptop Per Child Association, Inc.
  10  * Copyright 2006-11 Jonathan Corbet <corbet@lwn.net>
  11  *
  12  * Written by Jonathan Corbet, corbet@lwn.net.
  13  *
  14  * v4l2_device/v4l2_subdev conversion by:
  15  * Copyright (C) 2009 Hans Verkuil <hverkuil@xs4all.nl>
  16  *
  17  * This file may be distributed under the terms of the GNU General
  18  * Public License, version 2.
  19  */
  20 #include <linux/kernel.h>
  21 #include <linux/module.h>
  22 #include <linux/init.h>
  23 #include <linux/pci.h>
  24 #include <linux/i2c.h>
  25 #include <linux/interrupt.h>
  26 #include <linux/spinlock.h>
  27 #include <linux/slab.h>
  28 #include <linux/videodev2.h>
  29 #include <media/v4l2-device.h>
  30 #include <linux/device.h>
  31 #include <linux/wait.h>
  32 #include <linux/delay.h>
  33 #include <linux/io.h>
  34
  35 #include "mcam-core.h"
  36
  37 #define CAFE_VERSION 0x000002
  38
  39
  40 /*
  41  * Parameters.
  42  */
  43 MODULE_AUTHOR("Jonathan Corbet <corbet@lwn.net>");
  44 MODULE_DESCRIPTION("Marvell 88ALP01 CMOS Camera Controller driver");
  45 MODULE_LICENSE("GPL");
  46 MODULE_SUPPORTED_DEVICE("Video");
  47
  48
  49
  50
  51 struct cafe_camera {
  52         int registered;                 /* Fully initialized? */
  53         struct mcam_camera mcam;
  54         struct pci_dev *pdev;
  55         wait_queue_head_t smbus_wait;   /* Waiting on i2c events */
  56 };
  57
  58 /*
  59  * Most of the camera controller registers are defined in mcam-core.h,
  60  * but the Cafe platform has some additional registers of its own;
  61  * they are described here.
  62  */
  63
  64 /*
  65  * "General purpose register" has a couple of GPIOs used for sensor
  66  * power and reset on OLPC XO 1.0 systems.
  67  */
  68 #define REG_GPR         0xb4
  69 #define   GPR_C1EN        0x00000020    /* Pad 1 (power down) enable */
  70 #define   GPR_C0EN        0x00000010    /* Pad 0 (reset) enable */
  71 #define   GPR_C1          0x00000002    /* Control 1 value */
  72 /*
  73  * Control 0 is wired to reset on OLPC machines.  For ov7x sensors,
  74  * it is active low.
  75  */
  76 #define   GPR_C0          0x00000001    /* Control 0 value */
  77
  78 /*
  79  * These registers control the SMBUS module for communicating
  80  * with the sensor.
  81  */
  82 #define REG_TWSIC0      0xb8    /* TWSI (smbus) control 0 */
  83 #define   TWSIC0_EN       0x00000001    /* TWSI enable */
  84 #define   TWSIC0_MODE     0x00000002    /* 1 = 16-bit, 0 = 8-bit */
  85 #define   TWSIC0_SID      0x000003fc    /* Slave ID */
  86 /*
  87  * Subtle trickery: the slave ID field starts with bit 2.  But the
  88  * Linux i2c stack wants to treat the bottommost bit as a separate
  89  * read/write bit, which is why slave ID's are usually presented
  90  * >>1.  For consistency with that behavior, we shift over three
  91  * bits instead of two.
  92  */
  93 #define   TWSIC0_SID_SHIFT 3
  94 #define   TWSIC0_CLKDIV   0x0007fc00    /* Clock divider */
  95 #define   TWSIC0_MASKACK  0x00400000    /* Mask ack from sensor */
  96 #define   TWSIC0_OVMAGIC  0x00800000    /* Make it work on OV sensors */
  97
  98 #define REG_TWSIC1      0xbc    /* TWSI control 1 */
  99 #define   TWSIC1_DATA     0x0000ffff    /* Data to/from camchip */
 100 #define   TWSIC1_ADDR     0x00ff0000    /* Address (register) */
 101 #define   TWSIC1_ADDR_SHIFT 16
 102 #define   TWSIC1_READ     0x01000000    /* Set for read op */
 103 #define   TWSIC1_WSTAT    0x02000000    /* Write status */
 104 #define   TWSIC1_RVALID   0x04000000    /* Read data valid */
 105 #define   TWSIC1_ERROR    0x08000000    /* Something screwed up */
 106
 107 /*
 108  * Here's the weird global control registers
 109  */
 110 #define REG_GL_CSR     0x3004  /* Control/status register */
 111 #define   GCSR_SRS       0x00000001     /* SW Reset set */
 112 #define   GCSR_SRC       0x00000002     /* SW Reset clear */
 113 #define   GCSR_MRS       0x00000004     /* Master reset set */
 114 #define   GCSR_MRC       0x00000008     /* HW Reset clear */
 115 #define   GCSR_CCIC_EN   0x00004000    /* CCIC Clock enable */
 116 #define REG_GL_IMASK   0x300c  /* Interrupt mask register */
 117 #define   GIMSK_CCIC_EN          0x00000004    /* CCIC Interrupt enable */
 118
 119 #define REG_GL_FCR      0x3038  /* GPIO functional control register */
 120 #define   GFCR_GPIO_ON    0x08          /* Camera GPIO enabled */
 121 #define REG_GL_GPIOR    0x315c  /* GPIO register */
 122 #define   GGPIO_OUT             0x80000 /* GPIO output */
 123 #define   GGPIO_VAL             0x00008 /* Output pin value */
 124
 125 #define REG_LEN                (REG_GL_IMASK + 4)
 126
 127
 128 /*
 129  * Debugging and related.
 130  */
 131 #define cam_err(cam, fmt, arg...) \
 132         dev_err(&(cam)->pdev->dev, fmt, ##arg);
 133 #define cam_warn(cam, fmt, arg...) \
 134         dev_warn(&(cam)->pdev->dev, fmt, ##arg);
 135
 136 /* -------------------------------------------------------------------- */
 137 /*
 138  * The I2C/SMBUS interface to the camera itself starts here.  The
 139  * controller handles SMBUS itself, presenting a relatively simple register
 140  * interface; all we have to do is to tell it where to route the data.
 141  */
 142 #define CAFE_SMBUS_TIMEOUT (HZ)  /* generous */
 143
 144 static inline struct cafe_camera *to_cam(struct v4l2_device *dev)
 145 {
 146         struct mcam_camera *m = container_of(dev, struct mcam_camera, v4l2_dev);
 147         return container_of(m, struct cafe_camera, mcam);
 148 }
 149
 150
 151 static int cafe_smbus_write_done(struct mcam_camera *mcam)
 152 {
 153         unsigned long flags;
 154         int c1;
 155
 156         /*
 157          * We must delay after the interrupt, or the controller gets confused
 158          * and never does give us good status.  Fortunately, we don't do this
 159          * often.
 160          */
 161         udelay(20);
 162         spin_lock_irqsave(&mcam->dev_lock, flags);
 163         c1 = mcam_reg_read(mcam, REG_TWSIC1);
 164         spin_unlock_irqrestore(&mcam->dev_lock, flags);
 165         return (c1 & (TWSIC1_WSTAT|TWSIC1_ERROR)) != TWSIC1_WSTAT;
 166 }
 167
 168 static int cafe_smbus_write_data(struct cafe_camera *cam,
 169                 u16 addr, u8 command, u8 value)
 170 {
 171         unsigned int rval;
 172         unsigned long flags;
 173         struct mcam_camera *mcam = &cam->mcam;
 174
 175         spin_lock_irqsave(&mcam->dev_lock, flags);
 176         rval = TWSIC0_EN | ((addr << TWSIC0_SID_SHIFT) & TWSIC0_SID);
 177         rval |= TWSIC0_OVMAGIC;  /* Make OV sensors work */
 178         /*
 179          * Marvell sez set clkdiv to all 1's for now.
 180          */
 181         rval |= TWSIC0_CLKDIV;
 182         mcam_reg_write(mcam, REG_TWSIC0, rval);
 183         (void) mcam_reg_read(mcam, REG_TWSIC1); /* force write */
 184         rval = value | ((command << TWSIC1_ADDR_SHIFT) & TWSIC1_ADDR);
 185         mcam_reg_write(mcam, REG_TWSIC1, rval);
 186         spin_unlock_irqrestore(&mcam->dev_lock, flags);
 187
 188         /* Unfortunately, reading TWSIC1 too soon after sending a command
 189          * causes the device to die.
 190          * Use a busy-wait because we often send a large quantity of small
 191          * commands at-once; using msleep() would cause a lot of context
 192          * switches which take longer than 2ms, resulting in a noticeable
 193          * boot-time and capture-start delays.
 194          */
 195         mdelay(2);
 196
 197         /*
 198          * Another sad fact is that sometimes, commands silently complete but
 199          * cafe_smbus_write_done() never becomes aware of this.
 200          * This happens at random and appears to possible occur with any
 201          * command.
 202          * We don't understand why this is. We work around this issue
 203          * with the timeout in the wait below, assuming that all commands
 204          * complete within the timeout.
 205          */
 206         wait_event_timeout(cam->smbus_wait, cafe_smbus_write_done(mcam),
 207                         CAFE_SMBUS_TIMEOUT);
 208
 209         spin_lock_irqsave(&mcam->dev_lock, flags);
 210         rval = mcam_reg_read(mcam, REG_TWSIC1);
 211         spin_unlock_irqrestore(&mcam->dev_lock, flags);
 212
 213         if (rval & TWSIC1_WSTAT) {
 214                 cam_err(cam, "SMBUS write (%02x/%02x/%02x) timed out\n", addr,
 215                                 command, value);
 216                 return -EIO;
 217         }
 218         if (rval & TWSIC1_ERROR) {
 219                 cam_err(cam, "SMBUS write (%02x/%02x/%02x) error\n", addr,
 220                                 command, value);
 221                 return -EIO;
 222         }
 223         return 0;
 224 }
 225
 226
 227
 228 static int cafe_smbus_read_done(struct mcam_camera *mcam)
 229 {
 230         unsigned long flags;
 231         int c1;
 232
 233         /*
 234          * We must delay after the interrupt, or the controller gets confused
 235          * and never does give us good status.  Fortunately, we don't do this
 236          * often.
 237          */
 238         udelay(20);
 239         spin_lock_irqsave(&mcam->dev_lock, flags);
 240         c1 = mcam_reg_read(mcam, REG_TWSIC1);
 241         spin_unlock_irqrestore(&mcam->dev_lock, flags);
 242         return c1 & (TWSIC1_RVALID|TWSIC1_ERROR);
 243 }
 244
 245
 246
 247 static int cafe_smbus_read_data(struct cafe_camera *cam,
 248                 u16 addr, u8 command, u8 *value)
 249 {
 250         unsigned int rval;
 251         unsigned long flags;
 252         struct mcam_camera *mcam = &cam->mcam;
 253
 254         spin_lock_irqsave(&mcam->dev_lock, flags);
 255         rval = TWSIC0_EN | ((addr << TWSIC0_SID_SHIFT) & TWSIC0_SID);
 256         rval |= TWSIC0_OVMAGIC; /* Make OV sensors work */
 257         /*
 258          * Marvel sez set clkdiv to all 1's for now.
 259          */
 260         rval |= TWSIC0_CLKDIV;
 261         mcam_reg_write(mcam, REG_TWSIC0, rval);
 262         (void) mcam_reg_read(mcam, REG_TWSIC1); /* force write */
 263         rval = TWSIC1_READ | ((command << TWSIC1_ADDR_SHIFT) & TWSIC1_ADDR);
 264         mcam_reg_write(mcam, REG_TWSIC1, rval);
 265         spin_unlock_irqrestore(&mcam->dev_lock, flags);
 266
 267         wait_event_timeout(cam->smbus_wait,
 268                         cafe_smbus_read_done(mcam), CAFE_SMBUS_TIMEOUT);
 269         spin_lock_irqsave(&mcam->dev_lock, flags);
 270         rval = mcam_reg_read(mcam, REG_TWSIC1);
 271         spin_unlock_irqrestore(&mcam->dev_lock, flags);
 272
 273         if (rval & TWSIC1_ERROR) {
 274                 cam_err(cam, "SMBUS read (%02x/%02x) error\n", addr, command);
 275                 return -EIO;
 276         }
 277         if (!(rval & TWSIC1_RVALID)) {
 278                 cam_err(cam, "SMBUS read (%02x/%02x) timed out\n", addr,
 279                                 command);
 280                 return -EIO;
 281         }
 282         *value = rval & 0xff;
 283         return 0;
 284 }
 285
 286 /*
 287  * Perform a transfer over SMBUS.  This thing is called under
 288  * the i2c bus lock, so we shouldn't race with ourselves...
 289  */
 290 static int cafe_smbus_xfer(struct i2c_adapter *adapter, u16 addr,
 291                 unsigned short flags, char rw, u8 command,
 292                 int size, union i2c_smbus_data *data)
 293 {
 294         struct cafe_camera *cam = i2c_get_adapdata(adapter);
 295         int ret = -EINVAL;
 296
 297         /*
 298          * This interface would appear to only do byte data ops.  OK
 299          * it can do word too, but the cam chip has no use for that.
 300          */
 301         if (size != I2C_SMBUS_BYTE_DATA) {
 302                 cam_err(cam, "funky xfer size %d\n", size);
 303                 return -EINVAL;
 304         }
 305
 306         if (rw == I2C_SMBUS_WRITE)
 307                 ret = cafe_smbus_write_data(cam, addr, command, data->byte);
 308         else if (rw == I2C_SMBUS_READ)
 309                 ret = cafe_smbus_read_data(cam, addr, command, &data->byte);
 310         return ret;
 311 }
 312
 313
 314 static void cafe_smbus_enable_irq(struct cafe_camera *cam)
 315 {
 316         unsigned long flags;
 317
 318         spin_lock_irqsave(&cam->mcam.dev_lock, flags);
 319         mcam_reg_set_bit(&cam->mcam, REG_IRQMASK, TWSIIRQS);
 320         spin_unlock_irqrestore(&cam->mcam.dev_lock, flags);
 321 }
 322
 323 static u32 cafe_smbus_func(struct i2c_adapter *adapter)
 324 {
 325         return I2C_FUNC_SMBUS_READ_BYTE_DATA  |
 326                I2C_FUNC_SMBUS_WRITE_BYTE_DATA;
 327 }
 328
 329 static struct i2c_algorithm cafe_smbus_algo = {
 330         .smbus_xfer = cafe_smbus_xfer,
 331         .functionality = cafe_smbus_func
 332 };
 333
 334 static int cafe_smbus_setup(struct cafe_camera *cam)
 335 {
 336         struct i2c_adapter *adap;
 337         int ret;
 338
 339         adap = kzalloc(sizeof(*adap), GFP_KERNEL);
 340         if (adap == NULL)
 341                 return -ENOMEM;
 342         cam->mcam.i2c_adapter = adap;
 343         cafe_smbus_enable_irq(cam);
 344         adap->owner = THIS_MODULE;
 345         adap->algo = &cafe_smbus_algo;
 346         strcpy(adap->name, "cafe_ccic");
 347         adap->dev.parent = &cam->pdev->dev;
 348         i2c_set_adapdata(adap, cam);
 349         ret = i2c_add_adapter(adap);
 350         if (ret)
 351                 printk(KERN_ERR "Unable to register cafe i2c adapter\n");
 352         return ret;
 353 }
 354
 355 static void cafe_smbus_shutdown(struct cafe_camera *cam)
 356 {
 357         i2c_del_adapter(cam->mcam.i2c_adapter);
 358         kfree(cam->mcam.i2c_adapter);
 359 }
 360
 361
 362 /*
 363  * Controller-level stuff
 364  */
 365
 366 static void cafe_ctlr_init(struct mcam_camera *mcam)
 367 {
 368         unsigned long flags;
 369
 370         spin_lock_irqsave(&mcam->dev_lock, flags);
 371         /*
 372          * Added magic to bring up the hardware on the B-Test board
 373          */
 374         mcam_reg_write(mcam, 0x3038, 0x8);
 375         mcam_reg_write(mcam, 0x315c, 0x80008);
 376         /*
 377          * Go through the dance needed to wake the device up.
 378          * Note that these registers are global and shared
 379          * with the NAND and SD devices.  Interaction between the
 380          * three still needs to be examined.
 381          */
 382         mcam_reg_write(mcam, REG_GL_CSR, GCSR_SRS|GCSR_MRS); /* Needed? */
 383         mcam_reg_write(mcam, REG_GL_CSR, GCSR_SRC|GCSR_MRC);
 384         mcam_reg_write(mcam, REG_GL_CSR, GCSR_SRC|GCSR_MRS);
 385         /*
 386          * Here we must wait a bit for the controller to come around.
 387          */
 388         spin_unlock_irqrestore(&mcam->dev_lock, flags);
 389         msleep(5);
 390         spin_lock_irqsave(&mcam->dev_lock, flags);
 391
 392         mcam_reg_write(mcam, REG_GL_CSR, GCSR_CCIC_EN|GCSR_SRC|GCSR_MRC);
 393         mcam_reg_set_bit(mcam, REG_GL_IMASK, GIMSK_CCIC_EN);
 394         /*
 395          * Mask all interrupts.
 396          */
 397         mcam_reg_write(mcam, REG_IRQMASK, 0);
 398         spin_unlock_irqrestore(&mcam->dev_lock, flags);
 399 }
 400
 401
 402 static int cafe_ctlr_power_up(struct mcam_camera *mcam)
 403 {
 404         /*
 405          * Part one of the sensor dance: turn the global
 406          * GPIO signal on.
 407          */
 408         mcam_reg_write(mcam, REG_GL_FCR, GFCR_GPIO_ON);
 409         mcam_reg_write(mcam, REG_GL_GPIOR, GGPIO_OUT|GGPIO_VAL);
 410         /*
 411          * Put the sensor into operational mode (assumes OLPC-style
 412          * wiring).  Control 0 is reset - set to 1 to operate.
 413          * Control 1 is power down, set to 0 to operate.
 414          */
 415         mcam_reg_write(mcam, REG_GPR, GPR_C1EN|GPR_C0EN); /* pwr up, reset */
 416         mcam_reg_write(mcam, REG_GPR, GPR_C1EN|GPR_C0EN|GPR_C0);
 417
 418         return 0;
 419 }
 420
 421 static void cafe_ctlr_power_down(struct mcam_camera *mcam)
 422 {
 423         mcam_reg_write(mcam, REG_GPR, GPR_C1EN|GPR_C0EN|GPR_C1);
 424         mcam_reg_write(mcam, REG_GL_FCR, GFCR_GPIO_ON);
 425         mcam_reg_write(mcam, REG_GL_GPIOR, GGPIO_OUT);
 426 }
 427
 428
 429
 430 /*
 431  * The platform interrupt handler.
 432  */
 433 static irqreturn_t cafe_irq(int irq, void *data)
 434 {
 435         struct cafe_camera *cam = data;
 436         struct mcam_camera *mcam = &cam->mcam;
 437         unsigned int irqs, handled;
 438
 439         spin_lock(&mcam->dev_lock);
 440         irqs = mcam_reg_read(mcam, REG_IRQSTAT);
 441         handled = cam->registered && mccic_irq(mcam, irqs);
 442         if (irqs & TWSIIRQS) {
 443                 mcam_reg_write(mcam, REG_IRQSTAT, TWSIIRQS);
 444                 wake_up(&cam->smbus_wait);
 445                 handled = 1;
 446         }
 447         spin_unlock(&mcam->dev_lock);
 448         return IRQ_RETVAL(handled);
 449 }
 450
 451
 452 /* -------------------------------------------------------------------------- */
 453 /*
 454  * PCI interface stuff.
 455  */
 456
 457 static int cafe_pci_probe(struct pci_dev *pdev,
 458                 const struct pci_device_id *id)
 459 {
 460         int ret;
 461         struct cafe_camera *cam;
 462         struct mcam_camera *mcam;
 463
 464         /*
 465          * Start putting together one of our big camera structures.
 466          */
 467         ret = -ENOMEM;
 468         cam = kzalloc(sizeof(struct cafe_camera), GFP_KERNEL);
 469         if (cam == NULL)
 470                 goto out;
 471         cam->pdev = pdev;
 472         mcam = &cam->mcam;
 473         mcam->chip_id = MCAM_CAFE;
 474         spin_lock_init(&mcam->dev_lock);
 475         init_waitqueue_head(&cam->smbus_wait);
 476         mcam->plat_power_up = cafe_ctlr_power_up;
 477         mcam->plat_power_down = cafe_ctlr_power_down;
 478         mcam->dev = &pdev->dev;
 479         /*
 480          * Set the clock speed for the XO 1; I don't believe this
 481          * driver has ever run anywhere else.
 482          */
 483         mcam->clock_speed = 45;
 484         mcam->use_smbus = 1;
 485         /*
 486          * Vmalloc mode for buffers is traditional with this driver.
 487          * We *might* be able to run DMA_contig, especially on a system
 488          * with CMA in it.
 489          */
 490         mcam->buffer_mode = B_vmalloc;
 491         /*
 492          * Get set up on the PCI bus.
 493          */
 494         ret = pci_enable_device(pdev);
 495         if (ret)
 496                 goto out_free;
 497         pci_set_master(pdev);
 498
 499         ret = -EIO;
 500         mcam->regs = pci_iomap(pdev, 0, 0);
 501         if (!mcam->regs) {
 502                 printk(KERN_ERR "Unable to ioremap cafe-ccic regs\n");
 503                 goto out_disable;
 504         }
 505         mcam->regs_size = pci_resource_len(pdev, 0);
 506         ret = request_irq(pdev->irq, cafe_irq, IRQF_SHARED, "cafe-ccic", cam);
 507         if (ret)
 508                 goto out_iounmap;
 509
 510         /*
 511          * Initialize the controller and leave it powered up.  It will
 512          * stay that way until the sensor driver shows up.
 513          */
 514         cafe_ctlr_init(mcam);
 515         cafe_ctlr_power_up(mcam);
 516         /*
 517          * Set up I2C/SMBUS communications.  We have to drop the mutex here
 518          * because the sensor could attach in this call chain, leading to
 519          * unsightly deadlocks.
 520          */
 521         ret = cafe_smbus_setup(cam);
 522         if (ret)
 523                 goto out_pdown;
 524
 525         ret = mccic_register(mcam);
 526         if (ret == 0) {
 527                 cam->registered = 1;
 528                 return 0;
 529         }
 530
 531         cafe_smbus_shutdown(cam);
 532 out_pdown:
 533         cafe_ctlr_power_down(mcam);
 534         free_irq(pdev->irq, cam);
 535 out_iounmap:
 536         pci_iounmap(pdev, mcam->regs);
 537 out_disable:
 538         pci_disable_device(pdev);
 539 out_free:
 540         kfree(cam);
 541 out:
 542         return ret;
 543 }
 544
 545
 546 /*
 547  * Shut down an initialized device
 548  */
 549 static void cafe_shutdown(struct cafe_camera *cam)
 550 {
 551         mccic_shutdown(&cam->mcam);
 552         cafe_smbus_shutdown(cam);
 553         free_irq(cam->pdev->irq, cam);
 554         pci_iounmap(cam->pdev, cam->mcam.regs);
 555 }
 556
 557
 558 static void cafe_pci_remove(struct pci_dev *pdev)
 559 {
 560         struct v4l2_device *v4l2_dev = dev_get_drvdata(&pdev->dev);
 561         struct cafe_camera *cam = to_cam(v4l2_dev);
 562
 563         if (cam == NULL) {
 564                 printk(KERN_WARNING "pci_remove on unknown pdev %p\n", pdev);
 565                 return;
 566         }
 567         cafe_shutdown(cam);
 568         kfree(cam);
 569 }
 570
 571
 572 #ifdef CONFIG_PM
 573 /*
 574  * Basic power management.
 575  */
 576 static int cafe_pci_suspend(struct pci_dev *pdev, pm_message_t state)
 577 {
 578         struct v4l2_device *v4l2_dev = dev_get_drvdata(&pdev->dev);
 579         struct cafe_camera *cam = to_cam(v4l2_dev);
 580         int ret;
 581
 582         ret = pci_save_state(pdev);
 583         if (ret)
 584                 return ret;
 585         mccic_suspend(&cam->mcam);
 586         pci_disable_device(pdev);
 587         return 0;
 588 }
 589
 590
 591 static int cafe_pci_resume(struct pci_dev *pdev)
 592 {
 593         struct v4l2_device *v4l2_dev = dev_get_drvdata(&pdev->dev);
 594         struct cafe_camera *cam = to_cam(v4l2_dev);
 595         int ret = 0;
 596
 597         pci_restore_state(pdev);
 598         ret = pci_enable_device(pdev);
 599
 600         if (ret) {
 601                 cam_warn(cam, "Unable to re-enable device on resume!\n");
 602                 return ret;
 603         }
 604         cafe_ctlr_init(&cam->mcam);
 605         return mccic_resume(&cam->mcam);
 606 }
 607
 608 #endif  /* CONFIG_PM */
 609
 610 static struct pci_device_id cafe_ids[] = {
 611         { PCI_DEVICE(PCI_VENDOR_ID_MARVELL,
 612                      PCI_DEVICE_ID_MARVELL_88ALP01_CCIC) },
 613         { 0, }
 614 };
 615
 616 MODULE_DEVICE_TABLE(pci, cafe_ids);
 617
 618 static struct pci_driver cafe_pci_driver = {
 619         .name = "cafe1000-ccic",
 620         .id_table = cafe_ids,
 621         .probe = cafe_pci_probe,
 622         .remove = cafe_pci_remove,
 623 #ifdef CONFIG_PM
 624         .suspend = cafe_pci_suspend,
 625         .resume = cafe_pci_resume,
 626 #endif
 627 };
 628
 629
 630
 631
 632 static int __init cafe_init(void)
 633 {
 634         int ret;
 635
 636         printk(KERN_NOTICE "Marvell M88ALP01 'CAFE' Camera Controller version %d\n",
 637                         CAFE_VERSION);
 638         ret = pci_register_driver(&cafe_pci_driver);
 639         if (ret) {
 640                 printk(KERN_ERR "Unable to register cafe_ccic driver\n");
 641                 goto out;
 642         }
 643         ret = 0;
 644
 645 out:
 646         return ret;
 647 }
 648
 649
 650 static void __exit cafe_exit(void)
 651 {
 652         pci_unregister_driver(&cafe_pci_driver);
 653 }
 654
 655 module_init(cafe_init);
 656 module_exit(cafe_exit);