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PM / sleep: Asynchronous threads for suspend_noirq
[linux/fpc-iii.git] / drivers / mfd / ab8500-core.c
blobaaff683cd37d43809bb8da6b1cd5c085f1bf664a
1 /*
2 * Copyright (C) ST-Ericsson SA 2010
3 *
4 * License Terms: GNU General Public License v2
5 * Author: Srinidhi Kasagar <srinidhi.kasagar@stericsson.com>
6 * Author: Rabin Vincent <rabin.vincent@stericsson.com>
7 * Author: Mattias Wallin <mattias.wallin@stericsson.com>
8 */
9
10 #include <linux/kernel.h>
11 #include <linux/slab.h>
12 #include <linux/init.h>
13 #include <linux/irq.h>
14 #include <linux/irqdomain.h>
15 #include <linux/delay.h>
16 #include <linux/interrupt.h>
17 #include <linux/module.h>
18 #include <linux/platform_device.h>
19 #include <linux/mfd/core.h>
20 #include <linux/mfd/abx500.h>
21 #include <linux/mfd/abx500/ab8500.h>
22 #include <linux/mfd/abx500/ab8500-bm.h>
23 #include <linux/mfd/dbx500-prcmu.h>
24 #include <linux/regulator/ab8500.h>
25 #include <linux/of.h>
26 #include <linux/of_device.h>
27
28 /*
29 * Interrupt register offsets
30 * Bank : 0x0E
31 */
32 #define AB8500_IT_SOURCE1_REG 0x00
33 #define AB8500_IT_SOURCE2_REG 0x01
34 #define AB8500_IT_SOURCE3_REG 0x02
35 #define AB8500_IT_SOURCE4_REG 0x03
36 #define AB8500_IT_SOURCE5_REG 0x04
37 #define AB8500_IT_SOURCE6_REG 0x05
38 #define AB8500_IT_SOURCE7_REG 0x06
39 #define AB8500_IT_SOURCE8_REG 0x07
40 #define AB9540_IT_SOURCE13_REG 0x0C
41 #define AB8500_IT_SOURCE19_REG 0x12
42 #define AB8500_IT_SOURCE20_REG 0x13
43 #define AB8500_IT_SOURCE21_REG 0x14
44 #define AB8500_IT_SOURCE22_REG 0x15
45 #define AB8500_IT_SOURCE23_REG 0x16
46 #define AB8500_IT_SOURCE24_REG 0x17
47
48 /*
49 * latch registers
50 */
51 #define AB8500_IT_LATCH1_REG 0x20
52 #define AB8500_IT_LATCH2_REG 0x21
53 #define AB8500_IT_LATCH3_REG 0x22
54 #define AB8500_IT_LATCH4_REG 0x23
55 #define AB8500_IT_LATCH5_REG 0x24
56 #define AB8500_IT_LATCH6_REG 0x25
57 #define AB8500_IT_LATCH7_REG 0x26
58 #define AB8500_IT_LATCH8_REG 0x27
59 #define AB8500_IT_LATCH9_REG 0x28
60 #define AB8500_IT_LATCH10_REG 0x29
61 #define AB8500_IT_LATCH12_REG 0x2B
62 #define AB9540_IT_LATCH13_REG 0x2C
63 #define AB8500_IT_LATCH19_REG 0x32
64 #define AB8500_IT_LATCH20_REG 0x33
65 #define AB8500_IT_LATCH21_REG 0x34
66 #define AB8500_IT_LATCH22_REG 0x35
67 #define AB8500_IT_LATCH23_REG 0x36
68 #define AB8500_IT_LATCH24_REG 0x37
69
70 /*
71 * mask registers
72 */
73
74 #define AB8500_IT_MASK1_REG 0x40
75 #define AB8500_IT_MASK2_REG 0x41
76 #define AB8500_IT_MASK3_REG 0x42
77 #define AB8500_IT_MASK4_REG 0x43
78 #define AB8500_IT_MASK5_REG 0x44
79 #define AB8500_IT_MASK6_REG 0x45
80 #define AB8500_IT_MASK7_REG 0x46
81 #define AB8500_IT_MASK8_REG 0x47
82 #define AB8500_IT_MASK9_REG 0x48
83 #define AB8500_IT_MASK10_REG 0x49
84 #define AB8500_IT_MASK11_REG 0x4A
85 #define AB8500_IT_MASK12_REG 0x4B
86 #define AB8500_IT_MASK13_REG 0x4C
87 #define AB8500_IT_MASK14_REG 0x4D
88 #define AB8500_IT_MASK15_REG 0x4E
89 #define AB8500_IT_MASK16_REG 0x4F
90 #define AB8500_IT_MASK17_REG 0x50
91 #define AB8500_IT_MASK18_REG 0x51
92 #define AB8500_IT_MASK19_REG 0x52
93 #define AB8500_IT_MASK20_REG 0x53
94 #define AB8500_IT_MASK21_REG 0x54
95 #define AB8500_IT_MASK22_REG 0x55
96 #define AB8500_IT_MASK23_REG 0x56
97 #define AB8500_IT_MASK24_REG 0x57
98 #define AB8500_IT_MASK25_REG 0x58
99
100 /*
101 * latch hierarchy registers
102 */
103 #define AB8500_IT_LATCHHIER1_REG 0x60
104 #define AB8500_IT_LATCHHIER2_REG 0x61
105 #define AB8500_IT_LATCHHIER3_REG 0x62
106 #define AB8540_IT_LATCHHIER4_REG 0x63
107
108 #define AB8500_IT_LATCHHIER_NUM 3
109 #define AB8540_IT_LATCHHIER_NUM 4
110
111 #define AB8500_REV_REG 0x80
112 #define AB8500_IC_NAME_REG 0x82
113 #define AB8500_SWITCH_OFF_STATUS 0x00
114
115 #define AB8500_TURN_ON_STATUS 0x00
116 #define AB8505_TURN_ON_STATUS_2 0x04
117
118 #define AB8500_CH_USBCH_STAT1_REG 0x02
119 #define VBUS_DET_DBNC100 0x02
120 #define VBUS_DET_DBNC1 0x01
121
122 static DEFINE_SPINLOCK(on_stat_lock);
123 static u8 turn_on_stat_mask = 0xFF;
124 static u8 turn_on_stat_set;
125 static bool no_bm; /* No battery management */
126 module_param(no_bm, bool, S_IRUGO);
127
128 #define AB9540_MODEM_CTRL2_REG 0x23
129 #define AB9540_MODEM_CTRL2_SWDBBRSTN_BIT BIT(2)
130
131 /*
132 * Map interrupt numbers to the LATCH and MASK register offsets, Interrupt
133 * numbers are indexed into this array with (num / 8). The interupts are
134 * defined in linux/mfd/ab8500.h
135 *
136 * This is one off from the register names, i.e. AB8500_IT_MASK1_REG is at
137 * offset 0.
138 */
139 /* AB8500 support */
140 static const int ab8500_irq_regoffset[AB8500_NUM_IRQ_REGS] = {
141 0, 1, 2, 3, 4, 6, 7, 8, 9, 11, 18, 19, 20, 21,
142 };
143
144 /* AB9540 / AB8505 support */
145 static const int ab9540_irq_regoffset[AB9540_NUM_IRQ_REGS] = {
146 0, 1, 2, 3, 4, 6, 7, 8, 9, 11, 18, 19, 20, 21, 12, 13, 24, 5, 22, 23
147 };
148
149 /* AB8540 support */
150 static const int ab8540_irq_regoffset[AB8540_NUM_IRQ_REGS] = {
151 0, 1, 2, 3, 4, -1, -1, -1, -1, 11, 18, 19, 20, 21, 12, 13, 24, 5, 22, 23,
152 25, 26, 27, 28, 29, 30, 31,
153 };
154
155 static const char ab8500_version_str[][7] = {
156 [AB8500_VERSION_AB8500] = "AB8500",
157 [AB8500_VERSION_AB8505] = "AB8505",
158 [AB8500_VERSION_AB9540] = "AB9540",
159 [AB8500_VERSION_AB8540] = "AB8540",
160 };
161
162 static int ab8500_prcmu_write(struct ab8500 *ab8500, u16 addr, u8 data)
163 {
164 int ret;
165
166 ret = prcmu_abb_write((u8)(addr >> 8), (u8)(addr & 0xFF), &data, 1);
167 if (ret < 0)
168 dev_err(ab8500->dev, "prcmu i2c error %d\n", ret);
169 return ret;
170 }
171
172 static int ab8500_prcmu_write_masked(struct ab8500 *ab8500, u16 addr, u8 mask,
173 u8 data)
174 {
175 int ret;
176
177 ret = prcmu_abb_write_masked((u8)(addr >> 8), (u8)(addr & 0xFF), &data,
178 &mask, 1);
179 if (ret < 0)
180 dev_err(ab8500->dev, "prcmu i2c error %d\n", ret);
181 return ret;
182 }
183
184 static int ab8500_prcmu_read(struct ab8500 *ab8500, u16 addr)
185 {
186 int ret;
187 u8 data;
188
189 ret = prcmu_abb_read((u8)(addr >> 8), (u8)(addr & 0xFF), &data, 1);
190 if (ret < 0) {
191 dev_err(ab8500->dev, "prcmu i2c error %d\n", ret);
192 return ret;
193 }
194 return (int)data;
195 }
196
197 static int ab8500_get_chip_id(struct device *dev)
198 {
199 struct ab8500 *ab8500;
200
201 if (!dev)
202 return -EINVAL;
203 ab8500 = dev_get_drvdata(dev->parent);
204 return ab8500 ? (int)ab8500->chip_id : -EINVAL;
205 }
206
207 static int set_register_interruptible(struct ab8500 *ab8500, u8 bank,
208 u8 reg, u8 data)
209 {
210 int ret;
211 /*
212 * Put the u8 bank and u8 register together into a an u16.
213 * The bank on higher 8 bits and register in lower 8 bits.
214 * */
215 u16 addr = ((u16)bank) << 8 | reg;
216
217 dev_vdbg(ab8500->dev, "wr: addr %#x <= %#x\n", addr, data);
218
219 mutex_lock(&ab8500->lock);
220
221 ret = ab8500->write(ab8500, addr, data);
222 if (ret < 0)
223 dev_err(ab8500->dev, "failed to write reg %#x: %d\n",
224 addr, ret);
225 mutex_unlock(&ab8500->lock);
226
227 return ret;
228 }
229
230 static int ab8500_set_register(struct device *dev, u8 bank,
231 u8 reg, u8 value)
232 {
233 int ret;
234 struct ab8500 *ab8500 = dev_get_drvdata(dev->parent);
235
236 atomic_inc(&ab8500->transfer_ongoing);
237 ret = set_register_interruptible(ab8500, bank, reg, value);
238 atomic_dec(&ab8500->transfer_ongoing);
239 return ret;
240 }
241
242 static int get_register_interruptible(struct ab8500 *ab8500, u8 bank,
243 u8 reg, u8 *value)
244 {
245 int ret;
246 /* put the u8 bank and u8 reg together into a an u16.
247 * bank on higher 8 bits and reg in lower */
248 u16 addr = ((u16)bank) << 8 | reg;
249
250 mutex_lock(&ab8500->lock);
251
252 ret = ab8500->read(ab8500, addr);
253 if (ret < 0)
254 dev_err(ab8500->dev, "failed to read reg %#x: %d\n",
255 addr, ret);
256 else
257 *value = ret;
258
259 mutex_unlock(&ab8500->lock);
260 dev_vdbg(ab8500->dev, "rd: addr %#x => data %#x\n", addr, ret);
261
262 return ret;
263 }
264
265 static int ab8500_get_register(struct device *dev, u8 bank,
266 u8 reg, u8 *value)
267 {
268 int ret;
269 struct ab8500 *ab8500 = dev_get_drvdata(dev->parent);
270
271 atomic_inc(&ab8500->transfer_ongoing);
272 ret = get_register_interruptible(ab8500, bank, reg, value);
273 atomic_dec(&ab8500->transfer_ongoing);
274 return ret;
275 }
276
277 static int mask_and_set_register_interruptible(struct ab8500 *ab8500, u8 bank,
278 u8 reg, u8 bitmask, u8 bitvalues)
279 {
280 int ret;
281 /* put the u8 bank and u8 reg together into a an u16.
282 * bank on higher 8 bits and reg in lower */
283 u16 addr = ((u16)bank) << 8 | reg;
284
285 mutex_lock(&ab8500->lock);
286
287 if (ab8500->write_masked == NULL) {
288 u8 data;
289
290 ret = ab8500->read(ab8500, addr);
291 if (ret < 0) {
292 dev_err(ab8500->dev, "failed to read reg %#x: %d\n",
293 addr, ret);
294 goto out;
295 }
296
297 data = (u8)ret;
298 data = (~bitmask & data) | (bitmask & bitvalues);
299
300 ret = ab8500->write(ab8500, addr, data);
301 if (ret < 0)
302 dev_err(ab8500->dev, "failed to write reg %#x: %d\n",
303 addr, ret);
304
305 dev_vdbg(ab8500->dev, "mask: addr %#x => data %#x\n", addr,
306 data);
307 goto out;
308 }
309 ret = ab8500->write_masked(ab8500, addr, bitmask, bitvalues);
310 if (ret < 0)
311 dev_err(ab8500->dev, "failed to modify reg %#x: %d\n", addr,
312 ret);
313 out:
314 mutex_unlock(&ab8500->lock);
315 return ret;
316 }
317
318 static int ab8500_mask_and_set_register(struct device *dev,
319 u8 bank, u8 reg, u8 bitmask, u8 bitvalues)
320 {
321 int ret;
322 struct ab8500 *ab8500 = dev_get_drvdata(dev->parent);
323
324 atomic_inc(&ab8500->transfer_ongoing);
325 ret= mask_and_set_register_interruptible(ab8500, bank, reg,
326 bitmask, bitvalues);
327 atomic_dec(&ab8500->transfer_ongoing);
328 return ret;
329 }
330
331 static struct abx500_ops ab8500_ops = {
332 .get_chip_id = ab8500_get_chip_id,
333 .get_register = ab8500_get_register,
334 .set_register = ab8500_set_register,
335 .get_register_page = NULL,
336 .set_register_page = NULL,
337 .mask_and_set_register = ab8500_mask_and_set_register,
338 .event_registers_startup_state_get = NULL,
339 .startup_irq_enabled = NULL,
340 .dump_all_banks = ab8500_dump_all_banks,
341 };
342
343 static void ab8500_irq_lock(struct irq_data *data)
344 {
345 struct ab8500 *ab8500 = irq_data_get_irq_chip_data(data);
346
347 mutex_lock(&ab8500->irq_lock);
348 atomic_inc(&ab8500->transfer_ongoing);
349 }
350
351 static void ab8500_irq_sync_unlock(struct irq_data *data)
352 {
353 struct ab8500 *ab8500 = irq_data_get_irq_chip_data(data);
354 int i;
355
356 for (i = 0; i < ab8500->mask_size; i++) {
357 u8 old = ab8500->oldmask[i];
358 u8 new = ab8500->mask[i];
359 int reg;
360
361 if (new == old)
362 continue;
363
364 /*
365 * Interrupt register 12 doesn't exist prior to AB8500 version
366 * 2.0
367 */
368 if (ab8500->irq_reg_offset[i] == 11 &&
369 is_ab8500_1p1_or_earlier(ab8500))
370 continue;
371
372 if (ab8500->irq_reg_offset[i] < 0)
373 continue;
374
375 ab8500->oldmask[i] = new;
376
377 reg = AB8500_IT_MASK1_REG + ab8500->irq_reg_offset[i];
378 set_register_interruptible(ab8500, AB8500_INTERRUPT, reg, new);
379 }
380 atomic_dec(&ab8500->transfer_ongoing);
381 mutex_unlock(&ab8500->irq_lock);
382 }
383
384 static void ab8500_irq_mask(struct irq_data *data)
385 {
386 struct ab8500 *ab8500 = irq_data_get_irq_chip_data(data);
387 int offset = data->hwirq;
388 int index = offset / 8;
389 int mask = 1 << (offset % 8);
390
391 ab8500->mask[index] |= mask;
392
393 /* The AB8500 GPIOs have two interrupts each (rising & falling). */
394 if (offset >= AB8500_INT_GPIO6R && offset <= AB8500_INT_GPIO41R)
395 ab8500->mask[index + 2] |= mask;
396 if (offset >= AB9540_INT_GPIO50R && offset <= AB9540_INT_GPIO54R)
397 ab8500->mask[index + 1] |= mask;
398 if (offset == AB8540_INT_GPIO43R || offset == AB8540_INT_GPIO44R)
399 /* Here the falling IRQ is one bit lower */
400 ab8500->mask[index] |= (mask << 1);
401 }
402
403 static void ab8500_irq_unmask(struct irq_data *data)
404 {
405 struct ab8500 *ab8500 = irq_data_get_irq_chip_data(data);
406 unsigned int type = irqd_get_trigger_type(data);
407 int offset = data->hwirq;
408 int index = offset / 8;
409 int mask = 1 << (offset % 8);
410
411 if (type & IRQ_TYPE_EDGE_RISING)
412 ab8500->mask[index] &= ~mask;
413
414 /* The AB8500 GPIOs have two interrupts each (rising & falling). */
415 if (type & IRQ_TYPE_EDGE_FALLING) {
416 if (offset >= AB8500_INT_GPIO6R && offset <= AB8500_INT_GPIO41R)
417 ab8500->mask[index + 2] &= ~mask;
418 else if (offset >= AB9540_INT_GPIO50R && offset <= AB9540_INT_GPIO54R)
419 ab8500->mask[index + 1] &= ~mask;
420 else if (offset == AB8540_INT_GPIO43R || offset == AB8540_INT_GPIO44R)
421 /* Here the falling IRQ is one bit lower */
422 ab8500->mask[index] &= ~(mask << 1);
423 else
424 ab8500->mask[index] &= ~mask;
425 } else {
426 /* Satisfies the case where type is not set. */
427 ab8500->mask[index] &= ~mask;
428 }
429 }
430
431 static int ab8500_irq_set_type(struct irq_data *data, unsigned int type)
432 {
433 return 0;
434 }
435
436 static struct irq_chip ab8500_irq_chip = {
437 .name = "ab8500",
438 .irq_bus_lock = ab8500_irq_lock,
439 .irq_bus_sync_unlock = ab8500_irq_sync_unlock,
440 .irq_mask = ab8500_irq_mask,
441 .irq_disable = ab8500_irq_mask,
442 .irq_unmask = ab8500_irq_unmask,
443 .irq_set_type = ab8500_irq_set_type,
444 };
445
446 static void update_latch_offset(u8 *offset, int i)
447 {
448 /* Fix inconsistent ITFromLatch25 bit mapping... */
449 if (unlikely(*offset == 17))
450 *offset = 24;
451 /* Fix inconsistent ab8540 bit mapping... */
452 if (unlikely(*offset == 16))
453 *offset = 25;
454 if ((i==3) && (*offset >= 24))
455 *offset += 2;
456 }
457
458 static int ab8500_handle_hierarchical_line(struct ab8500 *ab8500,
459 int latch_offset, u8 latch_val)
460 {
461 int int_bit, line, i;
462
463 for (i = 0; i < ab8500->mask_size; i++)
464 if (ab8500->irq_reg_offset[i] == latch_offset)
465 break;
466
467 if (i >= ab8500->mask_size) {
468 dev_err(ab8500->dev, "Register offset 0x%2x not declared\n",
469 latch_offset);
470 return -ENXIO;
471 }
472
473 /* ignore masked out interrupts */
474 latch_val &= ~ab8500->mask[i];
475
476 while (latch_val) {
477 int_bit = __ffs(latch_val);
478 line = (i << 3) + int_bit;
479 latch_val &= ~(1 << int_bit);
480
481 /*
482 * This handles the falling edge hwirqs from the GPIO
483 * lines. Route them back to the line registered for the
484 * rising IRQ, as this is merely a flag for the same IRQ
485 * in linux terms.
486 */
487 if (line >= AB8500_INT_GPIO6F && line <= AB8500_INT_GPIO41F)
488 line -= 16;
489 if (line >= AB9540_INT_GPIO50F && line <= AB9540_INT_GPIO54F)
490 line -= 8;
491 if (line == AB8540_INT_GPIO43F || line == AB8540_INT_GPIO44F)
492 line += 1;
493
494 handle_nested_irq(irq_create_mapping(ab8500->domain, line));
495 }
496
497 return 0;
498 }
499
500 static int ab8500_handle_hierarchical_latch(struct ab8500 *ab8500,
501 int hier_offset, u8 hier_val)
502 {
503 int latch_bit, status;
504 u8 latch_offset, latch_val;
505
506 do {
507 latch_bit = __ffs(hier_val);
508 latch_offset = (hier_offset << 3) + latch_bit;
509
510 update_latch_offset(&latch_offset, hier_offset);
511
512 status = get_register_interruptible(ab8500,
513 AB8500_INTERRUPT,
514 AB8500_IT_LATCH1_REG + latch_offset,
515 &latch_val);
516 if (status < 0 || latch_val == 0)
517 goto discard;
518
519 status = ab8500_handle_hierarchical_line(ab8500,
520 latch_offset, latch_val);
521 if (status < 0)
522 return status;
523 discard:
524 hier_val &= ~(1 << latch_bit);
525 } while (hier_val);
526
527 return 0;
528 }
529
530 static irqreturn_t ab8500_hierarchical_irq(int irq, void *dev)
531 {
532 struct ab8500 *ab8500 = dev;
533 u8 i;
534
535 dev_vdbg(ab8500->dev, "interrupt\n");
536
537 /* Hierarchical interrupt version */
538 for (i = 0; i < (ab8500->it_latchhier_num); i++) {
539 int status;
540 u8 hier_val;
541
542 status = get_register_interruptible(ab8500, AB8500_INTERRUPT,
543 AB8500_IT_LATCHHIER1_REG + i, &hier_val);
544 if (status < 0 || hier_val == 0)
545 continue;
546
547 status = ab8500_handle_hierarchical_latch(ab8500, i, hier_val);
548 if (status < 0)
549 break;
550 }
551 return IRQ_HANDLED;
552 }
553
554 static int ab8500_irq_map(struct irq_domain *d, unsigned int virq,
555 irq_hw_number_t hwirq)
556 {
557 struct ab8500 *ab8500 = d->host_data;
558
559 if (!ab8500)
560 return -EINVAL;
561
562 irq_set_chip_data(virq, ab8500);
563 irq_set_chip_and_handler(virq, &ab8500_irq_chip,
564 handle_simple_irq);
565 irq_set_nested_thread(virq, 1);
566 #ifdef CONFIG_ARM
567 set_irq_flags(virq, IRQF_VALID);
568 #else
569 irq_set_noprobe(virq);
570 #endif
571
572 return 0;
573 }
574
575 static struct irq_domain_ops ab8500_irq_ops = {
576 .map = ab8500_irq_map,
577 .xlate = irq_domain_xlate_twocell,
578 };
579
580 static int ab8500_irq_init(struct ab8500 *ab8500, struct device_node *np)
581 {
582 int num_irqs;
583
584 if (is_ab8540(ab8500))
585 num_irqs = AB8540_NR_IRQS;
586 else if (is_ab9540(ab8500))
587 num_irqs = AB9540_NR_IRQS;
588 else if (is_ab8505(ab8500))
589 num_irqs = AB8505_NR_IRQS;
590 else
591 num_irqs = AB8500_NR_IRQS;
592
593 /* If ->irq_base is zero this will give a linear mapping */
594 ab8500->domain = irq_domain_add_simple(NULL,
595 num_irqs, ab8500->irq_base,
596 &ab8500_irq_ops, ab8500);
597
598 if (!ab8500->domain) {
599 dev_err(ab8500->dev, "Failed to create irqdomain\n");
600 return -ENOSYS;
601 }
602
603 return 0;
604 }
605
606 int ab8500_suspend(struct ab8500 *ab8500)
607 {
608 if (atomic_read(&ab8500->transfer_ongoing))
609 return -EINVAL;
610 else
611 return 0;
612 }
613
614 static struct resource ab8500_gpadc_resources[] = {
615 {
616 .name = "HW_CONV_END",
617 .start = AB8500_INT_GP_HW_ADC_CONV_END,
618 .end = AB8500_INT_GP_HW_ADC_CONV_END,
619 .flags = IORESOURCE_IRQ,
620 },
621 {
622 .name = "SW_CONV_END",
623 .start = AB8500_INT_GP_SW_ADC_CONV_END,
624 .end = AB8500_INT_GP_SW_ADC_CONV_END,
625 .flags = IORESOURCE_IRQ,
626 },
627 };
628
629 static struct resource ab8505_gpadc_resources[] = {
630 {
631 .name = "SW_CONV_END",
632 .start = AB8500_INT_GP_SW_ADC_CONV_END,
633 .end = AB8500_INT_GP_SW_ADC_CONV_END,
634 .flags = IORESOURCE_IRQ,
635 },
636 };
637
638 static struct resource ab8500_rtc_resources[] = {
639 {
640 .name = "60S",
641 .start = AB8500_INT_RTC_60S,
642 .end = AB8500_INT_RTC_60S,
643 .flags = IORESOURCE_IRQ,
644 },
645 {
646 .name = "ALARM",
647 .start = AB8500_INT_RTC_ALARM,
648 .end = AB8500_INT_RTC_ALARM,
649 .flags = IORESOURCE_IRQ,
650 },
651 };
652
653 static struct resource ab8540_rtc_resources[] = {
654 {
655 .name = "1S",
656 .start = AB8540_INT_RTC_1S,
657 .end = AB8540_INT_RTC_1S,
658 .flags = IORESOURCE_IRQ,
659 },
660 {
661 .name = "ALARM",
662 .start = AB8500_INT_RTC_ALARM,
663 .end = AB8500_INT_RTC_ALARM,
664 .flags = IORESOURCE_IRQ,
665 },
666 };
667
668 static struct resource ab8500_poweronkey_db_resources[] = {
669 {
670 .name = "ONKEY_DBF",
671 .start = AB8500_INT_PON_KEY1DB_F,
672 .end = AB8500_INT_PON_KEY1DB_F,
673 .flags = IORESOURCE_IRQ,
674 },
675 {
676 .name = "ONKEY_DBR",
677 .start = AB8500_INT_PON_KEY1DB_R,
678 .end = AB8500_INT_PON_KEY1DB_R,
679 .flags = IORESOURCE_IRQ,
680 },
681 };
682
683 static struct resource ab8500_av_acc_detect_resources[] = {
684 {
685 .name = "ACC_DETECT_1DB_F",
686 .start = AB8500_INT_ACC_DETECT_1DB_F,
687 .end = AB8500_INT_ACC_DETECT_1DB_F,
688 .flags = IORESOURCE_IRQ,
689 },
690 {
691 .name = "ACC_DETECT_1DB_R",
692 .start = AB8500_INT_ACC_DETECT_1DB_R,
693 .end = AB8500_INT_ACC_DETECT_1DB_R,
694 .flags = IORESOURCE_IRQ,
695 },
696 {
697 .name = "ACC_DETECT_21DB_F",
698 .start = AB8500_INT_ACC_DETECT_21DB_F,
699 .end = AB8500_INT_ACC_DETECT_21DB_F,
700 .flags = IORESOURCE_IRQ,
701 },
702 {
703 .name = "ACC_DETECT_21DB_R",
704 .start = AB8500_INT_ACC_DETECT_21DB_R,
705 .end = AB8500_INT_ACC_DETECT_21DB_R,
706 .flags = IORESOURCE_IRQ,
707 },
708 {
709 .name = "ACC_DETECT_22DB_F",
710 .start = AB8500_INT_ACC_DETECT_22DB_F,
711 .end = AB8500_INT_ACC_DETECT_22DB_F,
712 .flags = IORESOURCE_IRQ,
713 },
714 {
715 .name = "ACC_DETECT_22DB_R",
716 .start = AB8500_INT_ACC_DETECT_22DB_R,
717 .end = AB8500_INT_ACC_DETECT_22DB_R,
718 .flags = IORESOURCE_IRQ,
719 },
720 };
721
722 static struct resource ab8500_charger_resources[] = {
723 {
724 .name = "MAIN_CH_UNPLUG_DET",
725 .start = AB8500_INT_MAIN_CH_UNPLUG_DET,
726 .end = AB8500_INT_MAIN_CH_UNPLUG_DET,
727 .flags = IORESOURCE_IRQ,
728 },
729 {
730 .name = "MAIN_CHARGE_PLUG_DET",
731 .start = AB8500_INT_MAIN_CH_PLUG_DET,
732 .end = AB8500_INT_MAIN_CH_PLUG_DET,
733 .flags = IORESOURCE_IRQ,
734 },
735 {
736 .name = "VBUS_DET_R",
737 .start = AB8500_INT_VBUS_DET_R,
738 .end = AB8500_INT_VBUS_DET_R,
739 .flags = IORESOURCE_IRQ,
740 },
741 {
742 .name = "VBUS_DET_F",
743 .start = AB8500_INT_VBUS_DET_F,
744 .end = AB8500_INT_VBUS_DET_F,
745 .flags = IORESOURCE_IRQ,
746 },
747 {
748 .name = "USB_LINK_STATUS",
749 .start = AB8500_INT_USB_LINK_STATUS,
750 .end = AB8500_INT_USB_LINK_STATUS,
751 .flags = IORESOURCE_IRQ,
752 },
753 {
754 .name = "VBUS_OVV",
755 .start = AB8500_INT_VBUS_OVV,
756 .end = AB8500_INT_VBUS_OVV,
757 .flags = IORESOURCE_IRQ,
758 },
759 {
760 .name = "USB_CH_TH_PROT_R",
761 .start = AB8500_INT_USB_CH_TH_PROT_R,
762 .end = AB8500_INT_USB_CH_TH_PROT_R,
763 .flags = IORESOURCE_IRQ,
764 },
765 {
766 .name = "USB_CH_TH_PROT_F",
767 .start = AB8500_INT_USB_CH_TH_PROT_F,
768 .end = AB8500_INT_USB_CH_TH_PROT_F,
769 .flags = IORESOURCE_IRQ,
770 },
771 {
772 .name = "MAIN_EXT_CH_NOT_OK",
773 .start = AB8500_INT_MAIN_EXT_CH_NOT_OK,
774 .end = AB8500_INT_MAIN_EXT_CH_NOT_OK,
775 .flags = IORESOURCE_IRQ,
776 },
777 {
778 .name = "MAIN_CH_TH_PROT_R",
779 .start = AB8500_INT_MAIN_CH_TH_PROT_R,
780 .end = AB8500_INT_MAIN_CH_TH_PROT_R,
781 .flags = IORESOURCE_IRQ,
782 },
783 {
784 .name = "MAIN_CH_TH_PROT_F",
785 .start = AB8500_INT_MAIN_CH_TH_PROT_F,
786 .end = AB8500_INT_MAIN_CH_TH_PROT_F,
787 .flags = IORESOURCE_IRQ,
788 },
789 {
790 .name = "USB_CHARGER_NOT_OKR",
791 .start = AB8500_INT_USB_CHARGER_NOT_OKR,
792 .end = AB8500_INT_USB_CHARGER_NOT_OKR,
793 .flags = IORESOURCE_IRQ,
794 },
795 {
796 .name = "CH_WD_EXP",
797 .start = AB8500_INT_CH_WD_EXP,
798 .end = AB8500_INT_CH_WD_EXP,
799 .flags = IORESOURCE_IRQ,
800 },
801 {
802 .name = "VBUS_CH_DROP_END",
803 .start = AB8500_INT_VBUS_CH_DROP_END,
804 .end = AB8500_INT_VBUS_CH_DROP_END,
805 .flags = IORESOURCE_IRQ,
806 },
807 };
808
809 static struct resource ab8500_btemp_resources[] = {
810 {
811 .name = "BAT_CTRL_INDB",
812 .start = AB8500_INT_BAT_CTRL_INDB,
813 .end = AB8500_INT_BAT_CTRL_INDB,
814 .flags = IORESOURCE_IRQ,
815 },
816 {
817 .name = "BTEMP_LOW",
818 .start = AB8500_INT_BTEMP_LOW,
819 .end = AB8500_INT_BTEMP_LOW,
820 .flags = IORESOURCE_IRQ,
821 },
822 {
823 .name = "BTEMP_HIGH",
824 .start = AB8500_INT_BTEMP_HIGH,
825 .end = AB8500_INT_BTEMP_HIGH,
826 .flags = IORESOURCE_IRQ,
827 },
828 {
829 .name = "BTEMP_LOW_MEDIUM",
830 .start = AB8500_INT_BTEMP_LOW_MEDIUM,
831 .end = AB8500_INT_BTEMP_LOW_MEDIUM,
832 .flags = IORESOURCE_IRQ,
833 },
834 {
835 .name = "BTEMP_MEDIUM_HIGH",
836 .start = AB8500_INT_BTEMP_MEDIUM_HIGH,
837 .end = AB8500_INT_BTEMP_MEDIUM_HIGH,
838 .flags = IORESOURCE_IRQ,
839 },
840 };
841
842 static struct resource ab8500_fg_resources[] = {
843 {
844 .name = "NCONV_ACCU",
845 .start = AB8500_INT_CCN_CONV_ACC,
846 .end = AB8500_INT_CCN_CONV_ACC,
847 .flags = IORESOURCE_IRQ,
848 },
849 {
850 .name = "BATT_OVV",
851 .start = AB8500_INT_BATT_OVV,
852 .end = AB8500_INT_BATT_OVV,
853 .flags = IORESOURCE_IRQ,
854 },
855 {
856 .name = "LOW_BAT_F",
857 .start = AB8500_INT_LOW_BAT_F,
858 .end = AB8500_INT_LOW_BAT_F,
859 .flags = IORESOURCE_IRQ,
860 },
861 {
862 .name = "LOW_BAT_R",
863 .start = AB8500_INT_LOW_BAT_R,
864 .end = AB8500_INT_LOW_BAT_R,
865 .flags = IORESOURCE_IRQ,
866 },
867 {
868 .name = "CC_INT_CALIB",
869 .start = AB8500_INT_CC_INT_CALIB,
870 .end = AB8500_INT_CC_INT_CALIB,
871 .flags = IORESOURCE_IRQ,
872 },
873 {
874 .name = "CCEOC",
875 .start = AB8500_INT_CCEOC,
876 .end = AB8500_INT_CCEOC,
877 .flags = IORESOURCE_IRQ,
878 },
879 };
880
881 static struct resource ab8500_chargalg_resources[] = {};
882
883 #ifdef CONFIG_DEBUG_FS
884 static struct resource ab8500_debug_resources[] = {
885 {
886 .name = "IRQ_AB8500",
887 /*
888 * Number will be filled in. NOTE: this is deliberately
889 * not flagged as an IRQ in ordet to avoid remapping using
890 * the irqdomain in the MFD core, so that this IRQ passes
891 * unremapped to the debug code.
892 */
893 },
894 {
895 .name = "IRQ_FIRST",
896 .start = AB8500_INT_MAIN_EXT_CH_NOT_OK,
897 .end = AB8500_INT_MAIN_EXT_CH_NOT_OK,
898 .flags = IORESOURCE_IRQ,
899 },
900 {
901 .name = "IRQ_LAST",
902 .start = AB8500_INT_XTAL32K_KO,
903 .end = AB8500_INT_XTAL32K_KO,
904 .flags = IORESOURCE_IRQ,
905 },
906 };
907 #endif
908
909 static struct resource ab8500_usb_resources[] = {
910 {
911 .name = "ID_WAKEUP_R",
912 .start = AB8500_INT_ID_WAKEUP_R,
913 .end = AB8500_INT_ID_WAKEUP_R,
914 .flags = IORESOURCE_IRQ,
915 },
916 {
917 .name = "ID_WAKEUP_F",
918 .start = AB8500_INT_ID_WAKEUP_F,
919 .end = AB8500_INT_ID_WAKEUP_F,
920 .flags = IORESOURCE_IRQ,
921 },
922 {
923 .name = "VBUS_DET_F",
924 .start = AB8500_INT_VBUS_DET_F,
925 .end = AB8500_INT_VBUS_DET_F,
926 .flags = IORESOURCE_IRQ,
927 },
928 {
929 .name = "VBUS_DET_R",
930 .start = AB8500_INT_VBUS_DET_R,
931 .end = AB8500_INT_VBUS_DET_R,
932 .flags = IORESOURCE_IRQ,
933 },
934 {
935 .name = "USB_LINK_STATUS",
936 .start = AB8500_INT_USB_LINK_STATUS,
937 .end = AB8500_INT_USB_LINK_STATUS,
938 .flags = IORESOURCE_IRQ,
939 },
940 {
941 .name = "USB_ADP_PROBE_PLUG",
942 .start = AB8500_INT_ADP_PROBE_PLUG,
943 .end = AB8500_INT_ADP_PROBE_PLUG,
944 .flags = IORESOURCE_IRQ,
945 },
946 {
947 .name = "USB_ADP_PROBE_UNPLUG",
948 .start = AB8500_INT_ADP_PROBE_UNPLUG,
949 .end = AB8500_INT_ADP_PROBE_UNPLUG,
950 .flags = IORESOURCE_IRQ,
951 },
952 };
953
954 static struct resource ab8505_iddet_resources[] = {
955 {
956 .name = "KeyDeglitch",
957 .start = AB8505_INT_KEYDEGLITCH,
958 .end = AB8505_INT_KEYDEGLITCH,
959 .flags = IORESOURCE_IRQ,
960 },
961 {
962 .name = "KP",
963 .start = AB8505_INT_KP,
964 .end = AB8505_INT_KP,
965 .flags = IORESOURCE_IRQ,
966 },
967 {
968 .name = "IKP",
969 .start = AB8505_INT_IKP,
970 .end = AB8505_INT_IKP,
971 .flags = IORESOURCE_IRQ,
972 },
973 {
974 .name = "IKR",
975 .start = AB8505_INT_IKR,
976 .end = AB8505_INT_IKR,
977 .flags = IORESOURCE_IRQ,
978 },
979 {
980 .name = "KeyStuck",
981 .start = AB8505_INT_KEYSTUCK,
982 .end = AB8505_INT_KEYSTUCK,
983 .flags = IORESOURCE_IRQ,
984 },
985 {
986 .name = "VBUS_DET_R",
987 .start = AB8500_INT_VBUS_DET_R,
988 .end = AB8500_INT_VBUS_DET_R,
989 .flags = IORESOURCE_IRQ,
990 },
991 {
992 .name = "VBUS_DET_F",
993 .start = AB8500_INT_VBUS_DET_F,
994 .end = AB8500_INT_VBUS_DET_F,
995 .flags = IORESOURCE_IRQ,
996 },
997 {
998 .name = "ID_DET_PLUGR",
999 .start = AB8500_INT_ID_DET_PLUGR,
1000 .end = AB8500_INT_ID_DET_PLUGR,
1001 .flags = IORESOURCE_IRQ,
1002 },
1003 {
1004 .name = "ID_DET_PLUGF",
1005 .start = AB8500_INT_ID_DET_PLUGF,
1006 .end = AB8500_INT_ID_DET_PLUGF,
1007 .flags = IORESOURCE_IRQ,
1008 },
1009 };
1010
1011 static struct resource ab8500_temp_resources[] = {
1012 {
1013 .name = "ABX500_TEMP_WARM",
1014 .start = AB8500_INT_TEMP_WARM,
1015 .end = AB8500_INT_TEMP_WARM,
1016 .flags = IORESOURCE_IRQ,
1017 },
1018 };
1019
1020 static const struct mfd_cell ab8500_bm_devs[] = {
1021 {
1022 .name = "ab8500-charger",
1023 .of_compatible = "stericsson,ab8500-charger",
1024 .num_resources = ARRAY_SIZE(ab8500_charger_resources),
1025 .resources = ab8500_charger_resources,
1026 .platform_data = &ab8500_bm_data,
1027 .pdata_size = sizeof(ab8500_bm_data),
1028 },
1029 {
1030 .name = "ab8500-btemp",
1031 .of_compatible = "stericsson,ab8500-btemp",
1032 .num_resources = ARRAY_SIZE(ab8500_btemp_resources),
1033 .resources = ab8500_btemp_resources,
1034 .platform_data = &ab8500_bm_data,
1035 .pdata_size = sizeof(ab8500_bm_data),
1036 },
1037 {
1038 .name = "ab8500-fg",
1039 .of_compatible = "stericsson,ab8500-fg",
1040 .num_resources = ARRAY_SIZE(ab8500_fg_resources),
1041 .resources = ab8500_fg_resources,
1042 .platform_data = &ab8500_bm_data,
1043 .pdata_size = sizeof(ab8500_bm_data),
1044 },
1045 {
1046 .name = "ab8500-chargalg",
1047 .of_compatible = "stericsson,ab8500-chargalg",
1048 .num_resources = ARRAY_SIZE(ab8500_chargalg_resources),
1049 .resources = ab8500_chargalg_resources,
1050 .platform_data = &ab8500_bm_data,
1051 .pdata_size = sizeof(ab8500_bm_data),
1052 },
1053 };
1054
1055 static const struct mfd_cell ab8500_devs[] = {
1056 #ifdef CONFIG_DEBUG_FS
1057 {
1058 .name = "ab8500-debug",
1059 .of_compatible = "stericsson,ab8500-debug",
1060 .num_resources = ARRAY_SIZE(ab8500_debug_resources),
1061 .resources = ab8500_debug_resources,
1062 },
1063 #endif
1064 {
1065 .name = "ab8500-sysctrl",
1066 .of_compatible = "stericsson,ab8500-sysctrl",
1067 },
1068 {
1069 .name = "ab8500-ext-regulator",
1070 .of_compatible = "stericsson,ab8500-ext-regulator",
1071 },
1072 {
1073 .name = "ab8500-regulator",
1074 .of_compatible = "stericsson,ab8500-regulator",
1075 },
1076 {
1077 .name = "abx500-clk",
1078 .of_compatible = "stericsson,abx500-clk",
1079 },
1080 {
1081 .name = "ab8500-gpadc",
1082 .of_compatible = "stericsson,ab8500-gpadc",
1083 .num_resources = ARRAY_SIZE(ab8500_gpadc_resources),
1084 .resources = ab8500_gpadc_resources,
1085 },
1086 {
1087 .name = "ab8500-rtc",
1088 .of_compatible = "stericsson,ab8500-rtc",
1089 .num_resources = ARRAY_SIZE(ab8500_rtc_resources),
1090 .resources = ab8500_rtc_resources,
1091 },
1092 {
1093 .name = "ab8500-acc-det",
1094 .of_compatible = "stericsson,ab8500-acc-det",
1095 .num_resources = ARRAY_SIZE(ab8500_av_acc_detect_resources),
1096 .resources = ab8500_av_acc_detect_resources,
1097 },
1098 {
1099
1100 .name = "ab8500-poweron-key",
1101 .of_compatible = "stericsson,ab8500-poweron-key",
1102 .num_resources = ARRAY_SIZE(ab8500_poweronkey_db_resources),
1103 .resources = ab8500_poweronkey_db_resources,
1104 },
1105 {
1106 .name = "ab8500-pwm",
1107 .of_compatible = "stericsson,ab8500-pwm",
1108 .id = 1,
1109 },
1110 {
1111 .name = "ab8500-pwm",
1112 .of_compatible = "stericsson,ab8500-pwm",
1113 .id = 2,
1114 },
1115 {
1116 .name = "ab8500-pwm",
1117 .of_compatible = "stericsson,ab8500-pwm",
1118 .id = 3,
1119 },
1120 {
1121 .name = "ab8500-denc",
1122 .of_compatible = "stericsson,ab8500-denc",
1123 },
1124 {
1125 .name = "pinctrl-ab8500",
1126 .of_compatible = "stericsson,ab8500-gpio",
1127 },
1128 {
1129 .name = "abx500-temp",
1130 .of_compatible = "stericsson,abx500-temp",
1131 .num_resources = ARRAY_SIZE(ab8500_temp_resources),
1132 .resources = ab8500_temp_resources,
1133 },
1134 {
1135 .name = "ab8500-usb",
1136 .of_compatible = "stericsson,ab8500-usb",
1137 .num_resources = ARRAY_SIZE(ab8500_usb_resources),
1138 .resources = ab8500_usb_resources,
1139 },
1140 {
1141 .name = "ab8500-codec",
1142 .of_compatible = "stericsson,ab8500-codec",
1143 },
1144 };
1145
1146 static const struct mfd_cell ab9540_devs[] = {
1147 #ifdef CONFIG_DEBUG_FS
1148 {
1149 .name = "ab8500-debug",
1150 .num_resources = ARRAY_SIZE(ab8500_debug_resources),
1151 .resources = ab8500_debug_resources,
1152 },
1153 #endif
1154 {
1155 .name = "ab8500-sysctrl",
1156 },
1157 {
1158 .name = "ab8500-ext-regulator",
1159 },
1160 {
1161 .name = "ab8500-regulator",
1162 },
1163 {
1164 .name = "abx500-clk",
1165 .of_compatible = "stericsson,abx500-clk",
1166 },
1167 {
1168 .name = "ab8500-gpadc",
1169 .of_compatible = "stericsson,ab8500-gpadc",
1170 .num_resources = ARRAY_SIZE(ab8500_gpadc_resources),
1171 .resources = ab8500_gpadc_resources,
1172 },
1173 {
1174 .name = "ab8500-rtc",
1175 .num_resources = ARRAY_SIZE(ab8500_rtc_resources),
1176 .resources = ab8500_rtc_resources,
1177 },
1178 {
1179 .name = "ab8500-acc-det",
1180 .num_resources = ARRAY_SIZE(ab8500_av_acc_detect_resources),
1181 .resources = ab8500_av_acc_detect_resources,
1182 },
1183 {
1184 .name = "ab8500-poweron-key",
1185 .num_resources = ARRAY_SIZE(ab8500_poweronkey_db_resources),
1186 .resources = ab8500_poweronkey_db_resources,
1187 },
1188 {
1189 .name = "ab8500-pwm",
1190 .id = 1,
1191 },
1192 {
1193 .name = "abx500-temp",
1194 .num_resources = ARRAY_SIZE(ab8500_temp_resources),
1195 .resources = ab8500_temp_resources,
1196 },
1197 {
1198 .name = "pinctrl-ab9540",
1199 .of_compatible = "stericsson,ab9540-gpio",
1200 },
1201 {
1202 .name = "ab9540-usb",
1203 .num_resources = ARRAY_SIZE(ab8500_usb_resources),
1204 .resources = ab8500_usb_resources,
1205 },
1206 {
1207 .name = "ab9540-codec",
1208 },
1209 {
1210 .name = "ab-iddet",
1211 .num_resources = ARRAY_SIZE(ab8505_iddet_resources),
1212 .resources = ab8505_iddet_resources,
1213 },
1214 };
1215
1216 /* Device list for ab8505 */
1217 static const struct mfd_cell ab8505_devs[] = {
1218 #ifdef CONFIG_DEBUG_FS
1219 {
1220 .name = "ab8500-debug",
1221 .num_resources = ARRAY_SIZE(ab8500_debug_resources),
1222 .resources = ab8500_debug_resources,
1223 },
1224 #endif
1225 {
1226 .name = "ab8500-sysctrl",
1227 },
1228 {
1229 .name = "ab8500-regulator",
1230 },
1231 {
1232 .name = "abx500-clk",
1233 .of_compatible = "stericsson,abx500-clk",
1234 },
1235 {
1236 .name = "ab8500-gpadc",
1237 .of_compatible = "stericsson,ab8500-gpadc",
1238 .num_resources = ARRAY_SIZE(ab8505_gpadc_resources),
1239 .resources = ab8505_gpadc_resources,
1240 },
1241 {
1242 .name = "ab8500-rtc",
1243 .num_resources = ARRAY_SIZE(ab8500_rtc_resources),
1244 .resources = ab8500_rtc_resources,
1245 },
1246 {
1247 .name = "ab8500-acc-det",
1248 .num_resources = ARRAY_SIZE(ab8500_av_acc_detect_resources),
1249 .resources = ab8500_av_acc_detect_resources,
1250 },
1251 {
1252 .name = "ab8500-poweron-key",
1253 .num_resources = ARRAY_SIZE(ab8500_poweronkey_db_resources),
1254 .resources = ab8500_poweronkey_db_resources,
1255 },
1256 {
1257 .name = "ab8500-pwm",
1258 .id = 1,
1259 },
1260 {
1261 .name = "pinctrl-ab8505",
1262 },
1263 {
1264 .name = "ab8500-usb",
1265 .num_resources = ARRAY_SIZE(ab8500_usb_resources),
1266 .resources = ab8500_usb_resources,
1267 },
1268 {
1269 .name = "ab8500-codec",
1270 },
1271 {
1272 .name = "ab-iddet",
1273 .num_resources = ARRAY_SIZE(ab8505_iddet_resources),
1274 .resources = ab8505_iddet_resources,
1275 },
1276 };
1277
1278 static const struct mfd_cell ab8540_devs[] = {
1279 #ifdef CONFIG_DEBUG_FS
1280 {
1281 .name = "ab8500-debug",
1282 .num_resources = ARRAY_SIZE(ab8500_debug_resources),
1283 .resources = ab8500_debug_resources,
1284 },
1285 #endif
1286 {
1287 .name = "ab8500-sysctrl",
1288 },
1289 {
1290 .name = "ab8500-ext-regulator",
1291 },
1292 {
1293 .name = "ab8500-regulator",
1294 },
1295 {
1296 .name = "abx500-clk",
1297 .of_compatible = "stericsson,abx500-clk",
1298 },
1299 {
1300 .name = "ab8500-gpadc",
1301 .of_compatible = "stericsson,ab8500-gpadc",
1302 .num_resources = ARRAY_SIZE(ab8505_gpadc_resources),
1303 .resources = ab8505_gpadc_resources,
1304 },
1305 {
1306 .name = "ab8500-acc-det",
1307 .num_resources = ARRAY_SIZE(ab8500_av_acc_detect_resources),
1308 .resources = ab8500_av_acc_detect_resources,
1309 },
1310 {
1311 .name = "ab8500-poweron-key",
1312 .num_resources = ARRAY_SIZE(ab8500_poweronkey_db_resources),
1313 .resources = ab8500_poweronkey_db_resources,
1314 },
1315 {
1316 .name = "ab8500-pwm",
1317 .id = 1,
1318 },
1319 {
1320 .name = "abx500-temp",
1321 .num_resources = ARRAY_SIZE(ab8500_temp_resources),
1322 .resources = ab8500_temp_resources,
1323 },
1324 {
1325 .name = "pinctrl-ab8540",
1326 },
1327 {
1328 .name = "ab8540-usb",
1329 .num_resources = ARRAY_SIZE(ab8500_usb_resources),
1330 .resources = ab8500_usb_resources,
1331 },
1332 {
1333 .name = "ab8540-codec",
1334 },
1335 {
1336 .name = "ab-iddet",
1337 .num_resources = ARRAY_SIZE(ab8505_iddet_resources),
1338 .resources = ab8505_iddet_resources,
1339 },
1340 };
1341
1342 static const struct mfd_cell ab8540_cut1_devs[] = {
1343 {
1344 .name = "ab8500-rtc",
1345 .of_compatible = "stericsson,ab8500-rtc",
1346 .num_resources = ARRAY_SIZE(ab8500_rtc_resources),
1347 .resources = ab8500_rtc_resources,
1348 },
1349 };
1350
1351 static const struct mfd_cell ab8540_cut2_devs[] = {
1352 {
1353 .name = "ab8540-rtc",
1354 .of_compatible = "stericsson,ab8540-rtc",
1355 .num_resources = ARRAY_SIZE(ab8540_rtc_resources),
1356 .resources = ab8540_rtc_resources,
1357 },
1358 };
1359
1360 static ssize_t show_chip_id(struct device *dev,
1361 struct device_attribute *attr, char *buf)
1362 {
1363 struct ab8500 *ab8500;
1364
1365 ab8500 = dev_get_drvdata(dev);
1366
1367 return sprintf(buf, "%#x\n", ab8500 ? ab8500->chip_id : -EINVAL);
1368 }
1369
1370 /*
1371 * ab8500 has switched off due to (SWITCH_OFF_STATUS):
1372 * 0x01 Swoff bit programming
1373 * 0x02 Thermal protection activation
1374 * 0x04 Vbat lower then BattOk falling threshold
1375 * 0x08 Watchdog expired
1376 * 0x10 Non presence of 32kHz clock
1377 * 0x20 Battery level lower than power on reset threshold
1378 * 0x40 Power on key 1 pressed longer than 10 seconds
1379 * 0x80 DB8500 thermal shutdown
1380 */
1381 static ssize_t show_switch_off_status(struct device *dev,
1382 struct device_attribute *attr, char *buf)
1383 {
1384 int ret;
1385 u8 value;
1386 struct ab8500 *ab8500;
1387
1388 ab8500 = dev_get_drvdata(dev);
1389 ret = get_register_interruptible(ab8500, AB8500_RTC,
1390 AB8500_SWITCH_OFF_STATUS, &value);
1391 if (ret < 0)
1392 return ret;
1393 return sprintf(buf, "%#x\n", value);
1394 }
1395
1396 /* use mask and set to override the register turn_on_stat value */
1397 void ab8500_override_turn_on_stat(u8 mask, u8 set)
1398 {
1399 spin_lock(&on_stat_lock);
1400 turn_on_stat_mask = mask;
1401 turn_on_stat_set = set;
1402 spin_unlock(&on_stat_lock);
1403 }
1404
1405 /*
1406 * ab8500 has turned on due to (TURN_ON_STATUS):
1407 * 0x01 PORnVbat
1408 * 0x02 PonKey1dbF
1409 * 0x04 PonKey2dbF
1410 * 0x08 RTCAlarm
1411 * 0x10 MainChDet
1412 * 0x20 VbusDet
1413 * 0x40 UsbIDDetect
1414 * 0x80 Reserved
1415 */
1416 static ssize_t show_turn_on_status(struct device *dev,
1417 struct device_attribute *attr, char *buf)
1418 {
1419 int ret;
1420 u8 value;
1421 struct ab8500 *ab8500;
1422
1423 ab8500 = dev_get_drvdata(dev);
1424 ret = get_register_interruptible(ab8500, AB8500_SYS_CTRL1_BLOCK,
1425 AB8500_TURN_ON_STATUS, &value);
1426 if (ret < 0)
1427 return ret;
1428
1429 /*
1430 * In L9540, turn_on_status register is not updated correctly if
1431 * the device is rebooted with AC/USB charger connected. Due to
1432 * this, the device boots android instead of entering into charge
1433 * only mode. Read the AC/USB status register to detect the charger
1434 * presence and update the turn on status manually.
1435 */
1436 if (is_ab9540(ab8500)) {
1437 spin_lock(&on_stat_lock);
1438 value = (value & turn_on_stat_mask) | turn_on_stat_set;
1439 spin_unlock(&on_stat_lock);
1440 }
1441
1442 return sprintf(buf, "%#x\n", value);
1443 }
1444
1445 static ssize_t show_turn_on_status_2(struct device *dev,
1446 struct device_attribute *attr, char *buf)
1447 {
1448 int ret;
1449 u8 value;
1450 struct ab8500 *ab8500;
1451
1452 ab8500 = dev_get_drvdata(dev);
1453 ret = get_register_interruptible(ab8500, AB8500_SYS_CTRL1_BLOCK,
1454 AB8505_TURN_ON_STATUS_2, &value);
1455 if (ret < 0)
1456 return ret;
1457 return sprintf(buf, "%#x\n", (value & 0x1));
1458 }
1459
1460 static ssize_t show_ab9540_dbbrstn(struct device *dev,
1461 struct device_attribute *attr, char *buf)
1462 {
1463 struct ab8500 *ab8500;
1464 int ret;
1465 u8 value;
1466
1467 ab8500 = dev_get_drvdata(dev);
1468
1469 ret = get_register_interruptible(ab8500, AB8500_REGU_CTRL2,
1470 AB9540_MODEM_CTRL2_REG, &value);
1471 if (ret < 0)
1472 return ret;
1473
1474 return sprintf(buf, "%d\n",
1475 (value & AB9540_MODEM_CTRL2_SWDBBRSTN_BIT) ? 1 : 0);
1476 }
1477
1478 static ssize_t store_ab9540_dbbrstn(struct device *dev,
1479 struct device_attribute *attr, const char *buf, size_t count)
1480 {
1481 struct ab8500 *ab8500;
1482 int ret = count;
1483 int err;
1484 u8 bitvalues;
1485
1486 ab8500 = dev_get_drvdata(dev);
1487
1488 if (count > 0) {
1489 switch (buf[0]) {
1490 case '0':
1491 bitvalues = 0;
1492 break;
1493 case '1':
1494 bitvalues = AB9540_MODEM_CTRL2_SWDBBRSTN_BIT;
1495 break;
1496 default:
1497 goto exit;
1498 }
1499
1500 err = mask_and_set_register_interruptible(ab8500,
1501 AB8500_REGU_CTRL2, AB9540_MODEM_CTRL2_REG,
1502 AB9540_MODEM_CTRL2_SWDBBRSTN_BIT, bitvalues);
1503 if (err)
1504 dev_info(ab8500->dev,
1505 "Failed to set DBBRSTN %c, err %#x\n",
1506 buf[0], err);
1507 }
1508
1509 exit:
1510 return ret;
1511 }
1512
1513 static DEVICE_ATTR(chip_id, S_IRUGO, show_chip_id, NULL);
1514 static DEVICE_ATTR(switch_off_status, S_IRUGO, show_switch_off_status, NULL);
1515 static DEVICE_ATTR(turn_on_status, S_IRUGO, show_turn_on_status, NULL);
1516 static DEVICE_ATTR(turn_on_status_2, S_IRUGO, show_turn_on_status_2, NULL);
1517 static DEVICE_ATTR(dbbrstn, S_IRUGO | S_IWUSR,
1518 show_ab9540_dbbrstn, store_ab9540_dbbrstn);
1519
1520 static struct attribute *ab8500_sysfs_entries[] = {
1521 &dev_attr_chip_id.attr,
1522 &dev_attr_switch_off_status.attr,
1523 &dev_attr_turn_on_status.attr,
1524 NULL,
1525 };
1526
1527 static struct attribute *ab8505_sysfs_entries[] = {
1528 &dev_attr_turn_on_status_2.attr,
1529 NULL,
1530 };
1531
1532 static struct attribute *ab9540_sysfs_entries[] = {
1533 &dev_attr_chip_id.attr,
1534 &dev_attr_switch_off_status.attr,
1535 &dev_attr_turn_on_status.attr,
1536 &dev_attr_dbbrstn.attr,
1537 NULL,
1538 };
1539
1540 static struct attribute_group ab8500_attr_group = {
1541 .attrs = ab8500_sysfs_entries,
1542 };
1543
1544 static struct attribute_group ab8505_attr_group = {
1545 .attrs = ab8505_sysfs_entries,
1546 };
1547
1548 static struct attribute_group ab9540_attr_group = {
1549 .attrs = ab9540_sysfs_entries,
1550 };
1551
1552 static int ab8500_probe(struct platform_device *pdev)
1553 {
1554 static char *switch_off_status[] = {
1555 "Swoff bit programming",
1556 "Thermal protection activation",
1557 "Vbat lower then BattOk falling threshold",
1558 "Watchdog expired",
1559 "Non presence of 32kHz clock",
1560 "Battery level lower than power on reset threshold",
1561 "Power on key 1 pressed longer than 10 seconds",
1562 "DB8500 thermal shutdown"};
1563 static char *turn_on_status[] = {
1564 "Battery rising (Vbat)",
1565 "Power On Key 1 dbF",
1566 "Power On Key 2 dbF",
1567 "RTC Alarm",
1568 "Main Charger Detect",
1569 "Vbus Detect (USB)",
1570 "USB ID Detect",
1571 "UART Factory Mode Detect"};
1572 struct ab8500_platform_data *plat = dev_get_platdata(&pdev->dev);
1573 const struct platform_device_id *platid = platform_get_device_id(pdev);
1574 enum ab8500_version version = AB8500_VERSION_UNDEFINED;
1575 struct device_node *np = pdev->dev.of_node;
1576 struct ab8500 *ab8500;
1577 struct resource *resource;
1578 int ret;
1579 int i;
1580 u8 value;
1581
1582 ab8500 = devm_kzalloc(&pdev->dev, sizeof *ab8500, GFP_KERNEL);
1583 if (!ab8500)
1584 return -ENOMEM;
1585
1586 if (plat)
1587 ab8500->irq_base = plat->irq_base;
1588
1589 ab8500->dev = &pdev->dev;
1590
1591 resource = platform_get_resource(pdev, IORESOURCE_IRQ, 0);
1592 if (!resource)
1593 return -ENODEV;
1594
1595 ab8500->irq = resource->start;
1596
1597 ab8500->read = ab8500_prcmu_read;
1598 ab8500->write = ab8500_prcmu_write;
1599 ab8500->write_masked = ab8500_prcmu_write_masked;
1600
1601 mutex_init(&ab8500->lock);
1602 mutex_init(&ab8500->irq_lock);
1603 atomic_set(&ab8500->transfer_ongoing, 0);
1604
1605 platform_set_drvdata(pdev, ab8500);
1606
1607 if (platid)
1608 version = platid->driver_data;
1609
1610 if (version != AB8500_VERSION_UNDEFINED)
1611 ab8500->version = version;
1612 else {
1613 ret = get_register_interruptible(ab8500, AB8500_MISC,
1614 AB8500_IC_NAME_REG, &value);
1615 if (ret < 0)
1616 return ret;
1617
1618 ab8500->version = value;
1619 }
1620
1621 ret = get_register_interruptible(ab8500, AB8500_MISC,
1622 AB8500_REV_REG, &value);
1623 if (ret < 0)
1624 return ret;
1625
1626 ab8500->chip_id = value;
1627
1628 dev_info(ab8500->dev, "detected chip, %s rev. %1x.%1x\n",
1629 ab8500_version_str[ab8500->version],
1630 ab8500->chip_id >> 4,
1631 ab8500->chip_id & 0x0F);
1632
1633 /* Configure AB8540 */
1634 if (is_ab8540(ab8500)) {
1635 ab8500->mask_size = AB8540_NUM_IRQ_REGS;
1636 ab8500->irq_reg_offset = ab8540_irq_regoffset;
1637 ab8500->it_latchhier_num = AB8540_IT_LATCHHIER_NUM;
1638 }/* Configure AB8500 or AB9540 IRQ */
1639 else if (is_ab9540(ab8500) || is_ab8505(ab8500)) {
1640 ab8500->mask_size = AB9540_NUM_IRQ_REGS;
1641 ab8500->irq_reg_offset = ab9540_irq_regoffset;
1642 ab8500->it_latchhier_num = AB8500_IT_LATCHHIER_NUM;
1643 } else {
1644 ab8500->mask_size = AB8500_NUM_IRQ_REGS;
1645 ab8500->irq_reg_offset = ab8500_irq_regoffset;
1646 ab8500->it_latchhier_num = AB8500_IT_LATCHHIER_NUM;
1647 }
1648 ab8500->mask = devm_kzalloc(&pdev->dev, ab8500->mask_size, GFP_KERNEL);
1649 if (!ab8500->mask)
1650 return -ENOMEM;
1651 ab8500->oldmask = devm_kzalloc(&pdev->dev, ab8500->mask_size, GFP_KERNEL);
1652 if (!ab8500->oldmask)
1653 return -ENOMEM;
1654
1655 /*
1656 * ab8500 has switched off due to (SWITCH_OFF_STATUS):
1657 * 0x01 Swoff bit programming
1658 * 0x02 Thermal protection activation
1659 * 0x04 Vbat lower then BattOk falling threshold
1660 * 0x08 Watchdog expired
1661 * 0x10 Non presence of 32kHz clock
1662 * 0x20 Battery level lower than power on reset threshold
1663 * 0x40 Power on key 1 pressed longer than 10 seconds
1664 * 0x80 DB8500 thermal shutdown
1665 */
1666
1667 ret = get_register_interruptible(ab8500, AB8500_RTC,
1668 AB8500_SWITCH_OFF_STATUS, &value);
1669 if (ret < 0)
1670 return ret;
1671 dev_info(ab8500->dev, "switch off cause(s) (%#x): ", value);
1672
1673 if (value) {
1674 for (i = 0; i < ARRAY_SIZE(switch_off_status); i++) {
1675 if (value & 1)
1676 printk(KERN_CONT " \"%s\"",
1677 switch_off_status[i]);
1678 value = value >> 1;
1679
1680 }
1681 printk(KERN_CONT "\n");
1682 } else {
1683 printk(KERN_CONT " None\n");
1684 }
1685 ret = get_register_interruptible(ab8500, AB8500_SYS_CTRL1_BLOCK,
1686 AB8500_TURN_ON_STATUS, &value);
1687 if (ret < 0)
1688 return ret;
1689 dev_info(ab8500->dev, "turn on reason(s) (%#x): ", value);
1690
1691 if (value) {
1692 for (i = 0; i < ARRAY_SIZE(turn_on_status); i++) {
1693 if (value & 1)
1694 printk("\"%s\" ", turn_on_status[i]);
1695 value = value >> 1;
1696 }
1697 printk("\n");
1698 } else {
1699 printk("None\n");
1700 }
1701
1702 if (plat && plat->init)
1703 plat->init(ab8500);
1704
1705 if (is_ab9540(ab8500)) {
1706 ret = get_register_interruptible(ab8500, AB8500_CHARGER,
1707 AB8500_CH_USBCH_STAT1_REG, &value);
1708 if (ret < 0)
1709 return ret;
1710 if ((value & VBUS_DET_DBNC1) && (value & VBUS_DET_DBNC100))
1711 ab8500_override_turn_on_stat(~AB8500_POW_KEY_1_ON,
1712 AB8500_VBUS_DET);
1713 }
1714
1715 /* Clear and mask all interrupts */
1716 for (i = 0; i < ab8500->mask_size; i++) {
1717 /*
1718 * Interrupt register 12 doesn't exist prior to AB8500 version
1719 * 2.0
1720 */
1721 if (ab8500->irq_reg_offset[i] == 11 &&
1722 is_ab8500_1p1_or_earlier(ab8500))
1723 continue;
1724
1725 if (ab8500->irq_reg_offset[i] < 0)
1726 continue;
1727
1728 get_register_interruptible(ab8500, AB8500_INTERRUPT,
1729 AB8500_IT_LATCH1_REG + ab8500->irq_reg_offset[i],
1730 &value);
1731 set_register_interruptible(ab8500, AB8500_INTERRUPT,
1732 AB8500_IT_MASK1_REG + ab8500->irq_reg_offset[i], 0xff);
1733 }
1734
1735 ret = abx500_register_ops(ab8500->dev, &ab8500_ops);
1736 if (ret)
1737 return ret;
1738
1739 for (i = 0; i < ab8500->mask_size; i++)
1740 ab8500->mask[i] = ab8500->oldmask[i] = 0xff;
1741
1742 ret = ab8500_irq_init(ab8500, np);
1743 if (ret)
1744 return ret;
1745
1746 ret = devm_request_threaded_irq(&pdev->dev, ab8500->irq, NULL,
1747 ab8500_hierarchical_irq,
1748 IRQF_ONESHOT | IRQF_NO_SUSPEND,
1749 "ab8500", ab8500);
1750 if (ret)
1751 return ret;
1752
1753 #if CONFIG_DEBUG_FS
1754 /* Pass to debugfs */
1755 ab8500_debug_resources[0].start = ab8500->irq;
1756 ab8500_debug_resources[0].end = ab8500->irq;
1757 #endif
1758
1759 if (is_ab9540(ab8500))
1760 ret = mfd_add_devices(ab8500->dev, 0, ab9540_devs,
1761 ARRAY_SIZE(ab9540_devs), NULL,
1762 ab8500->irq_base, ab8500->domain);
1763 else if (is_ab8540(ab8500)) {
1764 ret = mfd_add_devices(ab8500->dev, 0, ab8540_devs,
1765 ARRAY_SIZE(ab8540_devs), NULL,
1766 ab8500->irq_base, NULL);
1767 if (ret)
1768 return ret;
1769
1770 if (is_ab8540_1p2_or_earlier(ab8500))
1771 ret = mfd_add_devices(ab8500->dev, 0, ab8540_cut1_devs,
1772 ARRAY_SIZE(ab8540_cut1_devs), NULL,
1773 ab8500->irq_base, NULL);
1774 else /* ab8540 >= cut2 */
1775 ret = mfd_add_devices(ab8500->dev, 0, ab8540_cut2_devs,
1776 ARRAY_SIZE(ab8540_cut2_devs), NULL,
1777 ab8500->irq_base, NULL);
1778 } else if (is_ab8505(ab8500))
1779 ret = mfd_add_devices(ab8500->dev, 0, ab8505_devs,
1780 ARRAY_SIZE(ab8505_devs), NULL,
1781 ab8500->irq_base, ab8500->domain);
1782 else
1783 ret = mfd_add_devices(ab8500->dev, 0, ab8500_devs,
1784 ARRAY_SIZE(ab8500_devs), NULL,
1785 ab8500->irq_base, ab8500->domain);
1786 if (ret)
1787 return ret;
1788
1789 if (!no_bm) {
1790 /* Add battery management devices */
1791 ret = mfd_add_devices(ab8500->dev, 0, ab8500_bm_devs,
1792 ARRAY_SIZE(ab8500_bm_devs), NULL,
1793 ab8500->irq_base, ab8500->domain);
1794 if (ret)
1795 dev_err(ab8500->dev, "error adding bm devices\n");
1796 }
1797
1798 if (((is_ab8505(ab8500) || is_ab9540(ab8500)) &&
1799 ab8500->chip_id >= AB8500_CUT2P0) || is_ab8540(ab8500))
1800 ret = sysfs_create_group(&ab8500->dev->kobj,
1801 &ab9540_attr_group);
1802 else
1803 ret = sysfs_create_group(&ab8500->dev->kobj,
1804 &ab8500_attr_group);
1805
1806 if ((is_ab8505(ab8500) || is_ab9540(ab8500)) &&
1807 ab8500->chip_id >= AB8500_CUT2P0)
1808 ret = sysfs_create_group(&ab8500->dev->kobj,
1809 &ab8505_attr_group);
1810
1811 if (ret)
1812 dev_err(ab8500->dev, "error creating sysfs entries\n");
1813
1814 return ret;
1815 }
1816
1817 static int ab8500_remove(struct platform_device *pdev)
1818 {
1819 struct ab8500 *ab8500 = platform_get_drvdata(pdev);
1820
1821 if (((is_ab8505(ab8500) || is_ab9540(ab8500)) &&
1822 ab8500->chip_id >= AB8500_CUT2P0) || is_ab8540(ab8500))
1823 sysfs_remove_group(&ab8500->dev->kobj, &ab9540_attr_group);
1824 else
1825 sysfs_remove_group(&ab8500->dev->kobj, &ab8500_attr_group);
1826
1827 if ((is_ab8505(ab8500) || is_ab9540(ab8500)) &&
1828 ab8500->chip_id >= AB8500_CUT2P0)
1829 sysfs_remove_group(&ab8500->dev->kobj, &ab8505_attr_group);
1830
1831 mfd_remove_devices(ab8500->dev);
1832
1833 return 0;
1834 }
1835
1836 static const struct platform_device_id ab8500_id[] = {
1837 { "ab8500-core", AB8500_VERSION_AB8500 },
1838 { "ab8505-i2c", AB8500_VERSION_AB8505 },
1839 { "ab9540-i2c", AB8500_VERSION_AB9540 },
1840 { "ab8540-i2c", AB8500_VERSION_AB8540 },
1841 { }
1842 };
1843
1844 static struct platform_driver ab8500_core_driver = {
1845 .driver = {
1846 .name = "ab8500-core",
1847 .owner = THIS_MODULE,
1848 },
1849 .probe = ab8500_probe,
1850 .remove = ab8500_remove,
1851 .id_table = ab8500_id,
1852 };
1853
1854 static int __init ab8500_core_init(void)
1855 {
1856 return platform_driver_register(&ab8500_core_driver);
1857 }
1858
1859 static void __exit ab8500_core_exit(void)
1860 {
1861 platform_driver_unregister(&ab8500_core_driver);
1862 }
1863 core_initcall(ab8500_core_init);
1864 module_exit(ab8500_core_exit);
1865
1866 MODULE_AUTHOR("Mattias Wallin, Srinidhi Kasagar, Rabin Vincent");
1867 MODULE_DESCRIPTION("AB8500 MFD core");
1868 MODULE_LICENSE("GPL v2");
Linux with added FPC-III support