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PM / sleep: Asynchronous threads for suspend_noirq
[linux/fpc-iii.git] / drivers / mfd / arizona-core.c
bloba45aab9f6bb135e64c0f0a420f75ed2508e17e92
1 /*
2 * Arizona core driver
3 *
4 * Copyright 2012 Wolfson Microelectronics plc
5 *
6 * Author: Mark Brown <broonie@opensource.wolfsonmicro.com>
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
11 */
12
13 #include <linux/delay.h>
14 #include <linux/err.h>
15 #include <linux/gpio.h>
16 #include <linux/interrupt.h>
17 #include <linux/mfd/core.h>
18 #include <linux/module.h>
19 #include <linux/of.h>
20 #include <linux/of_device.h>
21 #include <linux/of_gpio.h>
22 #include <linux/pm_runtime.h>
23 #include <linux/regmap.h>
24 #include <linux/regulator/consumer.h>
25 #include <linux/regulator/machine.h>
26 #include <linux/slab.h>
27
28 #include <linux/mfd/arizona/core.h>
29 #include <linux/mfd/arizona/registers.h>
30
31 #include "arizona.h"
32
33 static const char *wm5102_core_supplies[] = {
34 "AVDD",
35 "DBVDD1",
36 };
37
38 int arizona_clk32k_enable(struct arizona *arizona)
39 {
40 int ret = 0;
41
42 mutex_lock(&arizona->clk_lock);
43
44 arizona->clk32k_ref++;
45
46 if (arizona->clk32k_ref == 1) {
47 switch (arizona->pdata.clk32k_src) {
48 case ARIZONA_32KZ_MCLK1:
49 ret = pm_runtime_get_sync(arizona->dev);
50 if (ret != 0)
51 goto out;
52 break;
53 }
54
55 ret = regmap_update_bits(arizona->regmap, ARIZONA_CLOCK_32K_1,
56 ARIZONA_CLK_32K_ENA,
57 ARIZONA_CLK_32K_ENA);
58 }
59
60 out:
61 if (ret != 0)
62 arizona->clk32k_ref--;
63
64 mutex_unlock(&arizona->clk_lock);
65
66 return ret;
67 }
68 EXPORT_SYMBOL_GPL(arizona_clk32k_enable);
69
70 int arizona_clk32k_disable(struct arizona *arizona)
71 {
72 int ret = 0;
73
74 mutex_lock(&arizona->clk_lock);
75
76 BUG_ON(arizona->clk32k_ref <= 0);
77
78 arizona->clk32k_ref--;
79
80 if (arizona->clk32k_ref == 0) {
81 regmap_update_bits(arizona->regmap, ARIZONA_CLOCK_32K_1,
82 ARIZONA_CLK_32K_ENA, 0);
83
84 switch (arizona->pdata.clk32k_src) {
85 case ARIZONA_32KZ_MCLK1:
86 pm_runtime_put_sync(arizona->dev);
87 break;
88 }
89 }
90
91 mutex_unlock(&arizona->clk_lock);
92
93 return ret;
94 }
95 EXPORT_SYMBOL_GPL(arizona_clk32k_disable);
96
97 static irqreturn_t arizona_clkgen_err(int irq, void *data)
98 {
99 struct arizona *arizona = data;
100
101 dev_err(arizona->dev, "CLKGEN error\n");
102
103 return IRQ_HANDLED;
104 }
105
106 static irqreturn_t arizona_underclocked(int irq, void *data)
107 {
108 struct arizona *arizona = data;
109 unsigned int val;
110 int ret;
111
112 ret = regmap_read(arizona->regmap, ARIZONA_INTERRUPT_RAW_STATUS_8,
113 &val);
114 if (ret != 0) {
115 dev_err(arizona->dev, "Failed to read underclock status: %d\n",
116 ret);
117 return IRQ_NONE;
118 }
119
120 if (val & ARIZONA_AIF3_UNDERCLOCKED_STS)
121 dev_err(arizona->dev, "AIF3 underclocked\n");
122 if (val & ARIZONA_AIF2_UNDERCLOCKED_STS)
123 dev_err(arizona->dev, "AIF2 underclocked\n");
124 if (val & ARIZONA_AIF1_UNDERCLOCKED_STS)
125 dev_err(arizona->dev, "AIF1 underclocked\n");
126 if (val & ARIZONA_ISRC2_UNDERCLOCKED_STS)
127 dev_err(arizona->dev, "ISRC2 underclocked\n");
128 if (val & ARIZONA_ISRC1_UNDERCLOCKED_STS)
129 dev_err(arizona->dev, "ISRC1 underclocked\n");
130 if (val & ARIZONA_FX_UNDERCLOCKED_STS)
131 dev_err(arizona->dev, "FX underclocked\n");
132 if (val & ARIZONA_ASRC_UNDERCLOCKED_STS)
133 dev_err(arizona->dev, "ASRC underclocked\n");
134 if (val & ARIZONA_DAC_UNDERCLOCKED_STS)
135 dev_err(arizona->dev, "DAC underclocked\n");
136 if (val & ARIZONA_ADC_UNDERCLOCKED_STS)
137 dev_err(arizona->dev, "ADC underclocked\n");
138 if (val & ARIZONA_MIXER_UNDERCLOCKED_STS)
139 dev_err(arizona->dev, "Mixer dropped sample\n");
140
141 return IRQ_HANDLED;
142 }
143
144 static irqreturn_t arizona_overclocked(int irq, void *data)
145 {
146 struct arizona *arizona = data;
147 unsigned int val[2];
148 int ret;
149
150 ret = regmap_bulk_read(arizona->regmap, ARIZONA_INTERRUPT_RAW_STATUS_6,
151 &val[0], 2);
152 if (ret != 0) {
153 dev_err(arizona->dev, "Failed to read overclock status: %d\n",
154 ret);
155 return IRQ_NONE;
156 }
157
158 if (val[0] & ARIZONA_PWM_OVERCLOCKED_STS)
159 dev_err(arizona->dev, "PWM overclocked\n");
160 if (val[0] & ARIZONA_FX_CORE_OVERCLOCKED_STS)
161 dev_err(arizona->dev, "FX core overclocked\n");
162 if (val[0] & ARIZONA_DAC_SYS_OVERCLOCKED_STS)
163 dev_err(arizona->dev, "DAC SYS overclocked\n");
164 if (val[0] & ARIZONA_DAC_WARP_OVERCLOCKED_STS)
165 dev_err(arizona->dev, "DAC WARP overclocked\n");
166 if (val[0] & ARIZONA_ADC_OVERCLOCKED_STS)
167 dev_err(arizona->dev, "ADC overclocked\n");
168 if (val[0] & ARIZONA_MIXER_OVERCLOCKED_STS)
169 dev_err(arizona->dev, "Mixer overclocked\n");
170 if (val[0] & ARIZONA_AIF3_SYNC_OVERCLOCKED_STS)
171 dev_err(arizona->dev, "AIF3 overclocked\n");
172 if (val[0] & ARIZONA_AIF2_SYNC_OVERCLOCKED_STS)
173 dev_err(arizona->dev, "AIF2 overclocked\n");
174 if (val[0] & ARIZONA_AIF1_SYNC_OVERCLOCKED_STS)
175 dev_err(arizona->dev, "AIF1 overclocked\n");
176 if (val[0] & ARIZONA_PAD_CTRL_OVERCLOCKED_STS)
177 dev_err(arizona->dev, "Pad control overclocked\n");
178
179 if (val[1] & ARIZONA_SLIMBUS_SUBSYS_OVERCLOCKED_STS)
180 dev_err(arizona->dev, "Slimbus subsystem overclocked\n");
181 if (val[1] & ARIZONA_SLIMBUS_ASYNC_OVERCLOCKED_STS)
182 dev_err(arizona->dev, "Slimbus async overclocked\n");
183 if (val[1] & ARIZONA_SLIMBUS_SYNC_OVERCLOCKED_STS)
184 dev_err(arizona->dev, "Slimbus sync overclocked\n");
185 if (val[1] & ARIZONA_ASRC_ASYNC_SYS_OVERCLOCKED_STS)
186 dev_err(arizona->dev, "ASRC async system overclocked\n");
187 if (val[1] & ARIZONA_ASRC_ASYNC_WARP_OVERCLOCKED_STS)
188 dev_err(arizona->dev, "ASRC async WARP overclocked\n");
189 if (val[1] & ARIZONA_ASRC_SYNC_SYS_OVERCLOCKED_STS)
190 dev_err(arizona->dev, "ASRC sync system overclocked\n");
191 if (val[1] & ARIZONA_ASRC_SYNC_WARP_OVERCLOCKED_STS)
192 dev_err(arizona->dev, "ASRC sync WARP overclocked\n");
193 if (val[1] & ARIZONA_ADSP2_1_OVERCLOCKED_STS)
194 dev_err(arizona->dev, "DSP1 overclocked\n");
195 if (val[1] & ARIZONA_ISRC2_OVERCLOCKED_STS)
196 dev_err(arizona->dev, "ISRC2 overclocked\n");
197 if (val[1] & ARIZONA_ISRC1_OVERCLOCKED_STS)
198 dev_err(arizona->dev, "ISRC1 overclocked\n");
199
200 return IRQ_HANDLED;
201 }
202
203 static int arizona_poll_reg(struct arizona *arizona,
204 int timeout, unsigned int reg,
205 unsigned int mask, unsigned int target)
206 {
207 unsigned int val = 0;
208 int ret, i;
209
210 for (i = 0; i < timeout; i++) {
211 ret = regmap_read(arizona->regmap, reg, &val);
212 if (ret != 0) {
213 dev_err(arizona->dev, "Failed to read reg %u: %d\n",
214 reg, ret);
215 continue;
216 }
217
218 if ((val & mask) == target)
219 return 0;
220
221 msleep(1);
222 }
223
224 dev_err(arizona->dev, "Polling reg %u timed out: %x\n", reg, val);
225 return -ETIMEDOUT;
226 }
227
228 static int arizona_wait_for_boot(struct arizona *arizona)
229 {
230 int ret;
231
232 /*
233 * We can't use an interrupt as we need to runtime resume to do so,
234 * we won't race with the interrupt handler as it'll be blocked on
235 * runtime resume.
236 */
237 ret = arizona_poll_reg(arizona, 5, ARIZONA_INTERRUPT_RAW_STATUS_5,
238 ARIZONA_BOOT_DONE_STS, ARIZONA_BOOT_DONE_STS);
239
240 if (!ret)
241 regmap_write(arizona->regmap, ARIZONA_INTERRUPT_STATUS_5,
242 ARIZONA_BOOT_DONE_STS);
243
244 pm_runtime_mark_last_busy(arizona->dev);
245
246 return ret;
247 }
248
249 static int arizona_apply_hardware_patch(struct arizona* arizona)
250 {
251 unsigned int fll, sysclk;
252 int ret, err;
253
254 regcache_cache_bypass(arizona->regmap, true);
255
256 /* Cache existing FLL and SYSCLK settings */
257 ret = regmap_read(arizona->regmap, ARIZONA_FLL1_CONTROL_1, &fll);
258 if (ret != 0) {
259 dev_err(arizona->dev, "Failed to cache FLL settings: %d\n",
260 ret);
261 return ret;
262 }
263 ret = regmap_read(arizona->regmap, ARIZONA_SYSTEM_CLOCK_1, &sysclk);
264 if (ret != 0) {
265 dev_err(arizona->dev, "Failed to cache SYSCLK settings: %d\n",
266 ret);
267 return ret;
268 }
269
270 /* Start up SYSCLK using the FLL in free running mode */
271 ret = regmap_write(arizona->regmap, ARIZONA_FLL1_CONTROL_1,
272 ARIZONA_FLL1_ENA | ARIZONA_FLL1_FREERUN);
273 if (ret != 0) {
274 dev_err(arizona->dev,
275 "Failed to start FLL in freerunning mode: %d\n",
276 ret);
277 return ret;
278 }
279 ret = arizona_poll_reg(arizona, 25, ARIZONA_INTERRUPT_RAW_STATUS_5,
280 ARIZONA_FLL1_CLOCK_OK_STS,
281 ARIZONA_FLL1_CLOCK_OK_STS);
282 if (ret != 0) {
283 ret = -ETIMEDOUT;
284 goto err_fll;
285 }
286
287 ret = regmap_write(arizona->regmap, ARIZONA_SYSTEM_CLOCK_1, 0x0144);
288 if (ret != 0) {
289 dev_err(arizona->dev, "Failed to start SYSCLK: %d\n", ret);
290 goto err_fll;
291 }
292
293 /* Start the write sequencer and wait for it to finish */
294 ret = regmap_write(arizona->regmap, ARIZONA_WRITE_SEQUENCER_CTRL_0,
295 ARIZONA_WSEQ_ENA | ARIZONA_WSEQ_START | 160);
296 if (ret != 0) {
297 dev_err(arizona->dev, "Failed to start write sequencer: %d\n",
298 ret);
299 goto err_sysclk;
300 }
301 ret = arizona_poll_reg(arizona, 5, ARIZONA_WRITE_SEQUENCER_CTRL_1,
302 ARIZONA_WSEQ_BUSY, 0);
303 if (ret != 0) {
304 regmap_write(arizona->regmap, ARIZONA_WRITE_SEQUENCER_CTRL_0,
305 ARIZONA_WSEQ_ABORT);
306 ret = -ETIMEDOUT;
307 }
308
309 err_sysclk:
310 err = regmap_write(arizona->regmap, ARIZONA_SYSTEM_CLOCK_1, sysclk);
311 if (err != 0) {
312 dev_err(arizona->dev,
313 "Failed to re-apply old SYSCLK settings: %d\n",
314 err);
315 }
316
317 err_fll:
318 err = regmap_write(arizona->regmap, ARIZONA_FLL1_CONTROL_1, fll);
319 if (err != 0) {
320 dev_err(arizona->dev,
321 "Failed to re-apply old FLL settings: %d\n",
322 err);
323 }
324
325 regcache_cache_bypass(arizona->regmap, false);
326
327 if (ret != 0)
328 return ret;
329 else
330 return err;
331 }
332
333 #ifdef CONFIG_PM_RUNTIME
334 static int arizona_runtime_resume(struct device *dev)
335 {
336 struct arizona *arizona = dev_get_drvdata(dev);
337 int ret;
338
339 dev_dbg(arizona->dev, "Leaving AoD mode\n");
340
341 ret = regulator_enable(arizona->dcvdd);
342 if (ret != 0) {
343 dev_err(arizona->dev, "Failed to enable DCVDD: %d\n", ret);
344 return ret;
345 }
346
347 regcache_cache_only(arizona->regmap, false);
348
349 switch (arizona->type) {
350 case WM5102:
351 if (arizona->external_dcvdd) {
352 ret = regmap_update_bits(arizona->regmap,
353 ARIZONA_ISOLATION_CONTROL,
354 ARIZONA_ISOLATE_DCVDD1, 0);
355 if (ret != 0) {
356 dev_err(arizona->dev,
357 "Failed to connect DCVDD: %d\n", ret);
358 goto err;
359 }
360 }
361
362 ret = wm5102_patch(arizona);
363 if (ret != 0) {
364 dev_err(arizona->dev, "Failed to apply patch: %d\n",
365 ret);
366 goto err;
367 }
368
369 ret = arizona_apply_hardware_patch(arizona);
370 if (ret != 0) {
371 dev_err(arizona->dev,
372 "Failed to apply hardware patch: %d\n",
373 ret);
374 goto err;
375 }
376 break;
377 default:
378 ret = arizona_wait_for_boot(arizona);
379 if (ret != 0) {
380 goto err;
381 }
382
383 if (arizona->external_dcvdd) {
384 ret = regmap_update_bits(arizona->regmap,
385 ARIZONA_ISOLATION_CONTROL,
386 ARIZONA_ISOLATE_DCVDD1, 0);
387 if (ret != 0) {
388 dev_err(arizona->dev,
389 "Failed to connect DCVDD: %d\n", ret);
390 goto err;
391 }
392 }
393 break;
394 }
395
396 switch (arizona->type) {
397 case WM5102:
398 ret = wm5102_patch(arizona);
399 if (ret != 0) {
400 dev_err(arizona->dev, "Failed to apply patch: %d\n",
401 ret);
402 goto err;
403 }
404 default:
405 break;
406 }
407
408 ret = regcache_sync(arizona->regmap);
409 if (ret != 0) {
410 dev_err(arizona->dev, "Failed to restore register cache\n");
411 goto err;
412 }
413
414 return 0;
415
416 err:
417 regcache_cache_only(arizona->regmap, true);
418 regulator_disable(arizona->dcvdd);
419 return ret;
420 }
421
422 static int arizona_runtime_suspend(struct device *dev)
423 {
424 struct arizona *arizona = dev_get_drvdata(dev);
425 int ret;
426
427 dev_dbg(arizona->dev, "Entering AoD mode\n");
428
429 if (arizona->external_dcvdd) {
430 ret = regmap_update_bits(arizona->regmap,
431 ARIZONA_ISOLATION_CONTROL,
432 ARIZONA_ISOLATE_DCVDD1,
433 ARIZONA_ISOLATE_DCVDD1);
434 if (ret != 0) {
435 dev_err(arizona->dev, "Failed to isolate DCVDD: %d\n",
436 ret);
437 return ret;
438 }
439 }
440
441 regcache_cache_only(arizona->regmap, true);
442 regcache_mark_dirty(arizona->regmap);
443 regulator_disable(arizona->dcvdd);
444
445 return 0;
446 }
447 #endif
448
449 #ifdef CONFIG_PM_SLEEP
450 static int arizona_suspend(struct device *dev)
451 {
452 struct arizona *arizona = dev_get_drvdata(dev);
453
454 dev_dbg(arizona->dev, "Suspend, disabling IRQ\n");
455 disable_irq(arizona->irq);
456
457 return 0;
458 }
459
460 static int arizona_suspend_late(struct device *dev)
461 {
462 struct arizona *arizona = dev_get_drvdata(dev);
463
464 dev_dbg(arizona->dev, "Late suspend, reenabling IRQ\n");
465 enable_irq(arizona->irq);
466
467 return 0;
468 }
469
470 static int arizona_resume_noirq(struct device *dev)
471 {
472 struct arizona *arizona = dev_get_drvdata(dev);
473
474 dev_dbg(arizona->dev, "Early resume, disabling IRQ\n");
475 disable_irq(arizona->irq);
476
477 return 0;
478 }
479
480 static int arizona_resume(struct device *dev)
481 {
482 struct arizona *arizona = dev_get_drvdata(dev);
483
484 dev_dbg(arizona->dev, "Late resume, reenabling IRQ\n");
485 enable_irq(arizona->irq);
486
487 return 0;
488 }
489 #endif
490
491 const struct dev_pm_ops arizona_pm_ops = {
492 SET_RUNTIME_PM_OPS(arizona_runtime_suspend,
493 arizona_runtime_resume,
494 NULL)
495 SET_SYSTEM_SLEEP_PM_OPS(arizona_suspend, arizona_resume)
496 #ifdef CONFIG_PM_SLEEP
497 .suspend_late = arizona_suspend_late,
498 .resume_noirq = arizona_resume_noirq,
499 #endif
500 };
501 EXPORT_SYMBOL_GPL(arizona_pm_ops);
502
503 #ifdef CONFIG_OF
504 int arizona_of_get_type(struct device *dev)
505 {
506 const struct of_device_id *id = of_match_device(arizona_of_match, dev);
507
508 if (id)
509 return (int)id->data;
510 else
511 return 0;
512 }
513 EXPORT_SYMBOL_GPL(arizona_of_get_type);
514
515 static int arizona_of_get_core_pdata(struct arizona *arizona)
516 {
517 int ret, i;
518
519 arizona->pdata.reset = of_get_named_gpio(arizona->dev->of_node,
520 "wlf,reset", 0);
521 if (arizona->pdata.reset < 0)
522 arizona->pdata.reset = 0;
523
524 arizona->pdata.ldoena = of_get_named_gpio(arizona->dev->of_node,
525 "wlf,ldoena", 0);
526 if (arizona->pdata.ldoena < 0)
527 arizona->pdata.ldoena = 0;
528
529 ret = of_property_read_u32_array(arizona->dev->of_node,
530 "wlf,gpio-defaults",
531 arizona->pdata.gpio_defaults,
532 ARRAY_SIZE(arizona->pdata.gpio_defaults));
533 if (ret >= 0) {
534 /*
535 * All values are literal except out of range values
536 * which are chip default, translate into platform
537 * data which uses 0 as chip default and out of range
538 * as zero.
539 */
540 for (i = 0; i < ARRAY_SIZE(arizona->pdata.gpio_defaults); i++) {
541 if (arizona->pdata.gpio_defaults[i] > 0xffff)
542 arizona->pdata.gpio_defaults[i] = 0;
543 else if (arizona->pdata.gpio_defaults[i] == 0)
544 arizona->pdata.gpio_defaults[i] = 0x10000;
545 }
546 } else {
547 dev_err(arizona->dev, "Failed to parse GPIO defaults: %d\n",
548 ret);
549 }
550
551 return 0;
552 }
553
554 const struct of_device_id arizona_of_match[] = {
555 { .compatible = "wlf,wm5102", .data = (void *)WM5102 },
556 { .compatible = "wlf,wm5110", .data = (void *)WM5110 },
557 { .compatible = "wlf,wm8997", .data = (void *)WM8997 },
558 {},
559 };
560 EXPORT_SYMBOL_GPL(arizona_of_match);
561 #else
562 static inline int arizona_of_get_core_pdata(struct arizona *arizona)
563 {
564 return 0;
565 }
566 #endif
567
568 static const struct mfd_cell early_devs[] = {
569 { .name = "arizona-ldo1" },
570 };
571
572 static const char *wm5102_supplies[] = {
573 "DBVDD2",
574 "DBVDD3",
575 "CPVDD",
576 "SPKVDDL",
577 "SPKVDDR",
578 };
579
580 static const struct mfd_cell wm5102_devs[] = {
581 { .name = "arizona-micsupp" },
582 { .name = "arizona-extcon" },
583 { .name = "arizona-gpio" },
584 { .name = "arizona-haptics" },
585 { .name = "arizona-pwm" },
586 {
587 .name = "wm5102-codec",
588 .parent_supplies = wm5102_supplies,
589 .num_parent_supplies = ARRAY_SIZE(wm5102_supplies),
590 },
591 };
592
593 static const struct mfd_cell wm5110_devs[] = {
594 { .name = "arizona-micsupp" },
595 { .name = "arizona-extcon" },
596 { .name = "arizona-gpio" },
597 { .name = "arizona-haptics" },
598 { .name = "arizona-pwm" },
599 {
600 .name = "wm5110-codec",
601 .parent_supplies = wm5102_supplies,
602 .num_parent_supplies = ARRAY_SIZE(wm5102_supplies),
603 },
604 };
605
606 static const char *wm8997_supplies[] = {
607 "DBVDD2",
608 "CPVDD",
609 "SPKVDD",
610 };
611
612 static const struct mfd_cell wm8997_devs[] = {
613 { .name = "arizona-micsupp" },
614 { .name = "arizona-extcon" },
615 { .name = "arizona-gpio" },
616 { .name = "arizona-haptics" },
617 { .name = "arizona-pwm" },
618 {
619 .name = "wm8997-codec",
620 .parent_supplies = wm8997_supplies,
621 .num_parent_supplies = ARRAY_SIZE(wm8997_supplies),
622 },
623 };
624
625 int arizona_dev_init(struct arizona *arizona)
626 {
627 struct device *dev = arizona->dev;
628 const char *type_name;
629 unsigned int reg, val;
630 int (*apply_patch)(struct arizona *) = NULL;
631 int ret, i;
632
633 dev_set_drvdata(arizona->dev, arizona);
634 mutex_init(&arizona->clk_lock);
635
636 if (dev_get_platdata(arizona->dev))
637 memcpy(&arizona->pdata, dev_get_platdata(arizona->dev),
638 sizeof(arizona->pdata));
639 else
640 arizona_of_get_core_pdata(arizona);
641
642 regcache_cache_only(arizona->regmap, true);
643
644 switch (arizona->type) {
645 case WM5102:
646 case WM5110:
647 case WM8997:
648 for (i = 0; i < ARRAY_SIZE(wm5102_core_supplies); i++)
649 arizona->core_supplies[i].supply
650 = wm5102_core_supplies[i];
651 arizona->num_core_supplies = ARRAY_SIZE(wm5102_core_supplies);
652 break;
653 default:
654 dev_err(arizona->dev, "Unknown device type %d\n",
655 arizona->type);
656 return -EINVAL;
657 }
658
659 ret = mfd_add_devices(arizona->dev, -1, early_devs,
660 ARRAY_SIZE(early_devs), NULL, 0, NULL);
661 if (ret != 0) {
662 dev_err(dev, "Failed to add early children: %d\n", ret);
663 return ret;
664 }
665
666 ret = devm_regulator_bulk_get(dev, arizona->num_core_supplies,
667 arizona->core_supplies);
668 if (ret != 0) {
669 dev_err(dev, "Failed to request core supplies: %d\n",
670 ret);
671 goto err_early;
672 }
673
674 arizona->dcvdd = devm_regulator_get(arizona->dev, "DCVDD");
675 if (IS_ERR(arizona->dcvdd)) {
676 ret = PTR_ERR(arizona->dcvdd);
677 dev_err(dev, "Failed to request DCVDD: %d\n", ret);
678 goto err_early;
679 }
680
681 if (arizona->pdata.reset) {
682 /* Start out with /RESET low to put the chip into reset */
683 ret = gpio_request_one(arizona->pdata.reset,
684 GPIOF_DIR_OUT | GPIOF_INIT_LOW,
685 "arizona /RESET");
686 if (ret != 0) {
687 dev_err(dev, "Failed to request /RESET: %d\n", ret);
688 goto err_early;
689 }
690 }
691
692 ret = regulator_bulk_enable(arizona->num_core_supplies,
693 arizona->core_supplies);
694 if (ret != 0) {
695 dev_err(dev, "Failed to enable core supplies: %d\n",
696 ret);
697 goto err_early;
698 }
699
700 ret = regulator_enable(arizona->dcvdd);
701 if (ret != 0) {
702 dev_err(dev, "Failed to enable DCVDD: %d\n", ret);
703 goto err_enable;
704 }
705
706 if (arizona->pdata.reset) {
707 gpio_set_value_cansleep(arizona->pdata.reset, 1);
708 msleep(1);
709 }
710
711 regcache_cache_only(arizona->regmap, false);
712
713 /* Verify that this is a chip we know about */
714 ret = regmap_read(arizona->regmap, ARIZONA_SOFTWARE_RESET, &reg);
715 if (ret != 0) {
716 dev_err(dev, "Failed to read ID register: %d\n", ret);
717 goto err_reset;
718 }
719
720 switch (reg) {
721 case 0x5102:
722 case 0x5110:
723 case 0x8997:
724 break;
725 default:
726 dev_err(arizona->dev, "Unknown device ID: %x\n", reg);
727 goto err_reset;
728 }
729
730 /* If we have a /RESET GPIO we'll already be reset */
731 if (!arizona->pdata.reset) {
732 regcache_mark_dirty(arizona->regmap);
733
734 ret = regmap_write(arizona->regmap, ARIZONA_SOFTWARE_RESET, 0);
735 if (ret != 0) {
736 dev_err(dev, "Failed to reset device: %d\n", ret);
737 goto err_reset;
738 }
739
740 msleep(1);
741
742 ret = regcache_sync(arizona->regmap);
743 if (ret != 0) {
744 dev_err(dev, "Failed to sync device: %d\n", ret);
745 goto err_reset;
746 }
747 }
748
749 /* Ensure device startup is complete */
750 switch (arizona->type) {
751 case WM5102:
752 ret = regmap_read(arizona->regmap, 0x19, &val);
753 if (ret != 0)
754 dev_err(dev,
755 "Failed to check write sequencer state: %d\n",
756 ret);
757 else if (val & 0x01)
758 break;
759 /* Fall through */
760 default:
761 ret = arizona_wait_for_boot(arizona);
762 if (ret != 0) {
763 dev_err(arizona->dev,
764 "Device failed initial boot: %d\n", ret);
765 goto err_reset;
766 }
767 break;
768 }
769
770 /* Read the device ID information & do device specific stuff */
771 ret = regmap_read(arizona->regmap, ARIZONA_SOFTWARE_RESET, &reg);
772 if (ret != 0) {
773 dev_err(dev, "Failed to read ID register: %d\n", ret);
774 goto err_reset;
775 }
776
777 ret = regmap_read(arizona->regmap, ARIZONA_DEVICE_REVISION,
778 &arizona->rev);
779 if (ret != 0) {
780 dev_err(dev, "Failed to read revision register: %d\n", ret);
781 goto err_reset;
782 }
783 arizona->rev &= ARIZONA_DEVICE_REVISION_MASK;
784
785 switch (reg) {
786 #ifdef CONFIG_MFD_WM5102
787 case 0x5102:
788 type_name = "WM5102";
789 if (arizona->type != WM5102) {
790 dev_err(arizona->dev, "WM5102 registered as %d\n",
791 arizona->type);
792 arizona->type = WM5102;
793 }
794 apply_patch = wm5102_patch;
795 arizona->rev &= 0x7;
796 break;
797 #endif
798 #ifdef CONFIG_MFD_WM5110
799 case 0x5110:
800 type_name = "WM5110";
801 if (arizona->type != WM5110) {
802 dev_err(arizona->dev, "WM5110 registered as %d\n",
803 arizona->type);
804 arizona->type = WM5110;
805 }
806 apply_patch = wm5110_patch;
807 break;
808 #endif
809 #ifdef CONFIG_MFD_WM8997
810 case 0x8997:
811 type_name = "WM8997";
812 if (arizona->type != WM8997) {
813 dev_err(arizona->dev, "WM8997 registered as %d\n",
814 arizona->type);
815 arizona->type = WM8997;
816 }
817 apply_patch = wm8997_patch;
818 break;
819 #endif
820 default:
821 dev_err(arizona->dev, "Unknown device ID %x\n", reg);
822 goto err_reset;
823 }
824
825 dev_info(dev, "%s revision %c\n", type_name, arizona->rev + 'A');
826
827 if (apply_patch) {
828 ret = apply_patch(arizona);
829 if (ret != 0) {
830 dev_err(arizona->dev, "Failed to apply patch: %d\n",
831 ret);
832 goto err_reset;
833 }
834
835 switch (arizona->type) {
836 case WM5102:
837 ret = arizona_apply_hardware_patch(arizona);
838 if (ret != 0) {
839 dev_err(arizona->dev,
840 "Failed to apply hardware patch: %d\n",
841 ret);
842 goto err_reset;
843 }
844 break;
845 default:
846 break;
847 }
848 }
849
850 for (i = 0; i < ARRAY_SIZE(arizona->pdata.gpio_defaults); i++) {
851 if (!arizona->pdata.gpio_defaults[i])
852 continue;
853
854 regmap_write(arizona->regmap, ARIZONA_GPIO1_CTRL + i,
855 arizona->pdata.gpio_defaults[i]);
856 }
857
858 /*
859 * LDO1 can only be used to supply DCVDD so if it has no
860 * consumers then DCVDD is supplied externally.
861 */
862 if (arizona->pdata.ldo1 &&
863 arizona->pdata.ldo1->num_consumer_supplies == 0)
864 arizona->external_dcvdd = true;
865
866 pm_runtime_set_autosuspend_delay(arizona->dev, 100);
867 pm_runtime_use_autosuspend(arizona->dev);
868 pm_runtime_enable(arizona->dev);
869
870 /* Chip default */
871 if (!arizona->pdata.clk32k_src)
872 arizona->pdata.clk32k_src = ARIZONA_32KZ_MCLK2;
873
874 switch (arizona->pdata.clk32k_src) {
875 case ARIZONA_32KZ_MCLK1:
876 case ARIZONA_32KZ_MCLK2:
877 regmap_update_bits(arizona->regmap, ARIZONA_CLOCK_32K_1,
878 ARIZONA_CLK_32K_SRC_MASK,
879 arizona->pdata.clk32k_src - 1);
880 arizona_clk32k_enable(arizona);
881 break;
882 case ARIZONA_32KZ_NONE:
883 regmap_update_bits(arizona->regmap, ARIZONA_CLOCK_32K_1,
884 ARIZONA_CLK_32K_SRC_MASK, 2);
885 break;
886 default:
887 dev_err(arizona->dev, "Invalid 32kHz clock source: %d\n",
888 arizona->pdata.clk32k_src);
889 ret = -EINVAL;
890 goto err_reset;
891 }
892
893 for (i = 0; i < ARIZONA_MAX_MICBIAS; i++) {
894 if (!arizona->pdata.micbias[i].mV &&
895 !arizona->pdata.micbias[i].bypass)
896 continue;
897
898 /* Apply default for bypass mode */
899 if (!arizona->pdata.micbias[i].mV)
900 arizona->pdata.micbias[i].mV = 2800;
901
902 val = (arizona->pdata.micbias[i].mV - 1500) / 100;
903
904 val <<= ARIZONA_MICB1_LVL_SHIFT;
905
906 if (arizona->pdata.micbias[i].ext_cap)
907 val |= ARIZONA_MICB1_EXT_CAP;
908
909 if (arizona->pdata.micbias[i].discharge)
910 val |= ARIZONA_MICB1_DISCH;
911
912 if (arizona->pdata.micbias[i].soft_start)
913 val |= ARIZONA_MICB1_RATE;
914
915 if (arizona->pdata.micbias[i].bypass)
916 val |= ARIZONA_MICB1_BYPASS;
917
918 regmap_update_bits(arizona->regmap,
919 ARIZONA_MIC_BIAS_CTRL_1 + i,
920 ARIZONA_MICB1_LVL_MASK |
921 ARIZONA_MICB1_DISCH |
922 ARIZONA_MICB1_BYPASS |
923 ARIZONA_MICB1_RATE, val);
924 }
925
926 for (i = 0; i < ARIZONA_MAX_INPUT; i++) {
927 /* Default for both is 0 so noop with defaults */
928 val = arizona->pdata.dmic_ref[i]
929 << ARIZONA_IN1_DMIC_SUP_SHIFT;
930 val |= arizona->pdata.inmode[i] << ARIZONA_IN1_MODE_SHIFT;
931
932 regmap_update_bits(arizona->regmap,
933 ARIZONA_IN1L_CONTROL + (i * 8),
934 ARIZONA_IN1_DMIC_SUP_MASK |
935 ARIZONA_IN1_MODE_MASK, val);
936 }
937
938 for (i = 0; i < ARIZONA_MAX_OUTPUT; i++) {
939 /* Default is 0 so noop with defaults */
940 if (arizona->pdata.out_mono[i])
941 val = ARIZONA_OUT1_MONO;
942 else
943 val = 0;
944
945 regmap_update_bits(arizona->regmap,
946 ARIZONA_OUTPUT_PATH_CONFIG_1L + (i * 8),
947 ARIZONA_OUT1_MONO, val);
948 }
949
950 for (i = 0; i < ARIZONA_MAX_PDM_SPK; i++) {
951 if (arizona->pdata.spk_mute[i])
952 regmap_update_bits(arizona->regmap,
953 ARIZONA_PDM_SPK1_CTRL_1 + (i * 2),
954 ARIZONA_SPK1_MUTE_ENDIAN_MASK |
955 ARIZONA_SPK1_MUTE_SEQ1_MASK,
956 arizona->pdata.spk_mute[i]);
957
958 if (arizona->pdata.spk_fmt[i])
959 regmap_update_bits(arizona->regmap,
960 ARIZONA_PDM_SPK1_CTRL_2 + (i * 2),
961 ARIZONA_SPK1_FMT_MASK,
962 arizona->pdata.spk_fmt[i]);
963 }
964
965 /* Set up for interrupts */
966 ret = arizona_irq_init(arizona);
967 if (ret != 0)
968 goto err_reset;
969
970 arizona_request_irq(arizona, ARIZONA_IRQ_CLKGEN_ERR, "CLKGEN error",
971 arizona_clkgen_err, arizona);
972 arizona_request_irq(arizona, ARIZONA_IRQ_OVERCLOCKED, "Overclocked",
973 arizona_overclocked, arizona);
974 arizona_request_irq(arizona, ARIZONA_IRQ_UNDERCLOCKED, "Underclocked",
975 arizona_underclocked, arizona);
976
977 switch (arizona->type) {
978 case WM5102:
979 ret = mfd_add_devices(arizona->dev, -1, wm5102_devs,
980 ARRAY_SIZE(wm5102_devs), NULL, 0, NULL);
981 break;
982 case WM5110:
983 ret = mfd_add_devices(arizona->dev, -1, wm5110_devs,
984 ARRAY_SIZE(wm5110_devs), NULL, 0, NULL);
985 break;
986 case WM8997:
987 ret = mfd_add_devices(arizona->dev, -1, wm8997_devs,
988 ARRAY_SIZE(wm8997_devs), NULL, 0, NULL);
989 break;
990 }
991
992 if (ret != 0) {
993 dev_err(arizona->dev, "Failed to add subdevices: %d\n", ret);
994 goto err_irq;
995 }
996
997 #ifdef CONFIG_PM_RUNTIME
998 regulator_disable(arizona->dcvdd);
999 #endif
1000
1001 return 0;
1002
1003 err_irq:
1004 arizona_irq_exit(arizona);
1005 err_reset:
1006 if (arizona->pdata.reset) {
1007 gpio_set_value_cansleep(arizona->pdata.reset, 0);
1008 gpio_free(arizona->pdata.reset);
1009 }
1010 regulator_disable(arizona->dcvdd);
1011 err_enable:
1012 regulator_bulk_disable(arizona->num_core_supplies,
1013 arizona->core_supplies);
1014 err_early:
1015 mfd_remove_devices(dev);
1016 return ret;
1017 }
1018 EXPORT_SYMBOL_GPL(arizona_dev_init);
1019
1020 int arizona_dev_exit(struct arizona *arizona)
1021 {
1022 mfd_remove_devices(arizona->dev);
1023 arizona_free_irq(arizona, ARIZONA_IRQ_UNDERCLOCKED, arizona);
1024 arizona_free_irq(arizona, ARIZONA_IRQ_OVERCLOCKED, arizona);
1025 arizona_free_irq(arizona, ARIZONA_IRQ_CLKGEN_ERR, arizona);
1026 pm_runtime_disable(arizona->dev);
1027 arizona_irq_exit(arizona);
1028 if (arizona->pdata.reset)
1029 gpio_set_value_cansleep(arizona->pdata.reset, 0);
1030 regulator_disable(arizona->dcvdd);
1031 regulator_bulk_disable(ARRAY_SIZE(arizona->core_supplies),
1032 arizona->core_supplies);
1033 return 0;
1034 }
1035 EXPORT_SYMBOL_GPL(arizona_dev_exit);
Linux with added FPC-III support