2 * linux/drivers/mmc/host/tmio_mmc_pio.c
4 * Copyright (C) 2011 Guennadi Liakhovetski
5 * Copyright (C) 2007 Ian Molton
6 * Copyright (C) 2004 Ian Molton
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
12 * Driver for the MMC / SD / SDIO IP found in:
14 * TC6393XB, TC6391XB, TC6387XB, T7L66XB, ASIC3, SH-Mobile SoCs
16 * This driver draws mainly on scattered spec sheets, Reverse engineering
17 * of the toshiba e800 SD driver and some parts of the 2.4 ASIC3 driver (4 bit
18 * support). (Further 4 bit support from a later datasheet).
21 * Investigate using a workqueue for PIO transfers
24 * Better Power management
25 * Handle MMC errors better
26 * double buffer support
30 #include <linux/delay.h>
31 #include <linux/device.h>
32 #include <linux/highmem.h>
33 #include <linux/interrupt.h>
35 #include <linux/irq.h>
36 #include <linux/mfd/tmio.h>
37 #include <linux/mmc/host.h>
38 #include <linux/mmc/mmc.h>
39 #include <linux/mmc/slot-gpio.h>
40 #include <linux/mmc/tmio.h>
41 #include <linux/module.h>
42 #include <linux/pagemap.h>
43 #include <linux/platform_device.h>
44 #include <linux/pm_qos.h>
45 #include <linux/pm_runtime.h>
46 #include <linux/regulator/consumer.h>
47 #include <linux/scatterlist.h>
48 #include <linux/spinlock.h>
49 #include <linux/workqueue.h>
53 void tmio_mmc_enable_mmc_irqs(struct tmio_mmc_host
*host
, u32 i
)
55 host
->sdcard_irq_mask
&= ~(i
& TMIO_MASK_IRQ
);
56 sd_ctrl_write32(host
, CTL_IRQ_MASK
, host
->sdcard_irq_mask
);
59 void tmio_mmc_disable_mmc_irqs(struct tmio_mmc_host
*host
, u32 i
)
61 host
->sdcard_irq_mask
|= (i
& TMIO_MASK_IRQ
);
62 sd_ctrl_write32(host
, CTL_IRQ_MASK
, host
->sdcard_irq_mask
);
65 static void tmio_mmc_ack_mmc_irqs(struct tmio_mmc_host
*host
, u32 i
)
67 sd_ctrl_write32(host
, CTL_STATUS
, ~i
);
70 static void tmio_mmc_init_sg(struct tmio_mmc_host
*host
, struct mmc_data
*data
)
72 host
->sg_len
= data
->sg_len
;
73 host
->sg_ptr
= data
->sg
;
74 host
->sg_orig
= data
->sg
;
78 static int tmio_mmc_next_sg(struct tmio_mmc_host
*host
)
80 host
->sg_ptr
= sg_next(host
->sg_ptr
);
82 return --host
->sg_len
;
85 #ifdef CONFIG_MMC_DEBUG
87 #define STATUS_TO_TEXT(a, status, i) \
89 if (status & TMIO_STAT_##a) { \
96 static void pr_debug_status(u32 status
)
99 pr_debug("status: %08x = ", status
);
100 STATUS_TO_TEXT(CARD_REMOVE
, status
, i
);
101 STATUS_TO_TEXT(CARD_INSERT
, status
, i
);
102 STATUS_TO_TEXT(SIGSTATE
, status
, i
);
103 STATUS_TO_TEXT(WRPROTECT
, status
, i
);
104 STATUS_TO_TEXT(CARD_REMOVE_A
, status
, i
);
105 STATUS_TO_TEXT(CARD_INSERT_A
, status
, i
);
106 STATUS_TO_TEXT(SIGSTATE_A
, status
, i
);
107 STATUS_TO_TEXT(CMD_IDX_ERR
, status
, i
);
108 STATUS_TO_TEXT(STOPBIT_ERR
, status
, i
);
109 STATUS_TO_TEXT(ILL_FUNC
, status
, i
);
110 STATUS_TO_TEXT(CMD_BUSY
, status
, i
);
111 STATUS_TO_TEXT(CMDRESPEND
, status
, i
);
112 STATUS_TO_TEXT(DATAEND
, status
, i
);
113 STATUS_TO_TEXT(CRCFAIL
, status
, i
);
114 STATUS_TO_TEXT(DATATIMEOUT
, status
, i
);
115 STATUS_TO_TEXT(CMDTIMEOUT
, status
, i
);
116 STATUS_TO_TEXT(RXOVERFLOW
, status
, i
);
117 STATUS_TO_TEXT(TXUNDERRUN
, status
, i
);
118 STATUS_TO_TEXT(RXRDY
, status
, i
);
119 STATUS_TO_TEXT(TXRQ
, status
, i
);
120 STATUS_TO_TEXT(ILL_ACCESS
, status
, i
);
125 #define pr_debug_status(s) do { } while (0)
128 static void tmio_mmc_enable_sdio_irq(struct mmc_host
*mmc
, int enable
)
130 struct tmio_mmc_host
*host
= mmc_priv(mmc
);
133 host
->sdio_irq_mask
= TMIO_SDIO_MASK_ALL
&
134 ~TMIO_SDIO_STAT_IOIRQ
;
135 sd_ctrl_write16(host
, CTL_TRANSACTION_CTL
, 0x0001);
136 sd_ctrl_write16(host
, CTL_SDIO_IRQ_MASK
, host
->sdio_irq_mask
);
138 host
->sdio_irq_mask
= TMIO_SDIO_MASK_ALL
;
139 sd_ctrl_write16(host
, CTL_SDIO_IRQ_MASK
, host
->sdio_irq_mask
);
140 sd_ctrl_write16(host
, CTL_TRANSACTION_CTL
, 0x0000);
144 static void tmio_mmc_set_clock(struct tmio_mmc_host
*host
, int new_clock
)
149 for (clock
= host
->mmc
->f_min
, clk
= 0x80000080;
150 new_clock
>= (clock
<<1); clk
>>= 1)
155 if (host
->set_clk_div
)
156 host
->set_clk_div(host
->pdev
, (clk
>>22) & 1);
158 sd_ctrl_write16(host
, CTL_SD_CARD_CLK_CTL
, clk
& 0x1ff);
162 static void tmio_mmc_clk_stop(struct tmio_mmc_host
*host
)
164 /* implicit BUG_ON(!res) */
165 if (host
->pdata
->flags
& TMIO_MMC_HAVE_HIGH_REG
) {
166 sd_ctrl_write16(host
, CTL_CLK_AND_WAIT_CTL
, 0x0000);
170 sd_ctrl_write16(host
, CTL_SD_CARD_CLK_CTL
, ~0x0100 &
171 sd_ctrl_read16(host
, CTL_SD_CARD_CLK_CTL
));
175 static void tmio_mmc_clk_start(struct tmio_mmc_host
*host
)
177 sd_ctrl_write16(host
, CTL_SD_CARD_CLK_CTL
, 0x0100 |
178 sd_ctrl_read16(host
, CTL_SD_CARD_CLK_CTL
));
181 /* implicit BUG_ON(!res) */
182 if (host
->pdata
->flags
& TMIO_MMC_HAVE_HIGH_REG
) {
183 sd_ctrl_write16(host
, CTL_CLK_AND_WAIT_CTL
, 0x0100);
188 static void tmio_mmc_reset(struct tmio_mmc_host
*host
)
190 /* FIXME - should we set stop clock reg here */
191 sd_ctrl_write16(host
, CTL_RESET_SD
, 0x0000);
192 /* implicit BUG_ON(!res) */
193 if (host
->pdata
->flags
& TMIO_MMC_HAVE_HIGH_REG
)
194 sd_ctrl_write16(host
, CTL_RESET_SDIO
, 0x0000);
196 sd_ctrl_write16(host
, CTL_RESET_SD
, 0x0001);
197 if (host
->pdata
->flags
& TMIO_MMC_HAVE_HIGH_REG
)
198 sd_ctrl_write16(host
, CTL_RESET_SDIO
, 0x0001);
202 static void tmio_mmc_reset_work(struct work_struct
*work
)
204 struct tmio_mmc_host
*host
= container_of(work
, struct tmio_mmc_host
,
205 delayed_reset_work
.work
);
206 struct mmc_request
*mrq
;
209 spin_lock_irqsave(&host
->lock
, flags
);
213 * is request already finished? Since we use a non-blocking
214 * cancel_delayed_work(), it can happen, that a .set_ios() call preempts
215 * us, so, have to check for IS_ERR(host->mrq)
217 if (IS_ERR_OR_NULL(mrq
)
218 || time_is_after_jiffies(host
->last_req_ts
+
219 msecs_to_jiffies(2000))) {
220 spin_unlock_irqrestore(&host
->lock
, flags
);
224 dev_warn(&host
->pdev
->dev
,
225 "timeout waiting for hardware interrupt (CMD%u)\n",
229 host
->data
->error
= -ETIMEDOUT
;
231 host
->cmd
->error
= -ETIMEDOUT
;
233 mrq
->cmd
->error
= -ETIMEDOUT
;
237 host
->force_pio
= false;
239 spin_unlock_irqrestore(&host
->lock
, flags
);
241 tmio_mmc_reset(host
);
243 /* Ready for new calls */
246 tmio_mmc_abort_dma(host
);
247 mmc_request_done(host
->mmc
, mrq
);
250 /* called with host->lock held, interrupts disabled */
251 static void tmio_mmc_finish_request(struct tmio_mmc_host
*host
)
253 struct mmc_request
*mrq
;
256 spin_lock_irqsave(&host
->lock
, flags
);
259 if (IS_ERR_OR_NULL(mrq
)) {
260 spin_unlock_irqrestore(&host
->lock
, flags
);
266 host
->force_pio
= false;
268 cancel_delayed_work(&host
->delayed_reset_work
);
271 spin_unlock_irqrestore(&host
->lock
, flags
);
273 if (mrq
->cmd
->error
|| (mrq
->data
&& mrq
->data
->error
))
274 tmio_mmc_abort_dma(host
);
276 mmc_request_done(host
->mmc
, mrq
);
279 static void tmio_mmc_done_work(struct work_struct
*work
)
281 struct tmio_mmc_host
*host
= container_of(work
, struct tmio_mmc_host
,
283 tmio_mmc_finish_request(host
);
286 /* These are the bitmasks the tmio chip requires to implement the MMC response
287 * types. Note that R1 and R6 are the same in this scheme. */
288 #define APP_CMD 0x0040
289 #define RESP_NONE 0x0300
290 #define RESP_R1 0x0400
291 #define RESP_R1B 0x0500
292 #define RESP_R2 0x0600
293 #define RESP_R3 0x0700
294 #define DATA_PRESENT 0x0800
295 #define TRANSFER_READ 0x1000
296 #define TRANSFER_MULTI 0x2000
297 #define SECURITY_CMD 0x4000
299 static int tmio_mmc_start_command(struct tmio_mmc_host
*host
, struct mmc_command
*cmd
)
301 struct mmc_data
*data
= host
->data
;
303 u32 irq_mask
= TMIO_MASK_CMD
;
305 /* CMD12 is handled by hardware */
306 if (cmd
->opcode
== MMC_STOP_TRANSMISSION
&& !cmd
->arg
) {
307 sd_ctrl_write16(host
, CTL_STOP_INTERNAL_ACTION
, 0x001);
311 switch (mmc_resp_type(cmd
)) {
312 case MMC_RSP_NONE
: c
|= RESP_NONE
; break;
313 case MMC_RSP_R1
: c
|= RESP_R1
; break;
314 case MMC_RSP_R1B
: c
|= RESP_R1B
; break;
315 case MMC_RSP_R2
: c
|= RESP_R2
; break;
316 case MMC_RSP_R3
: c
|= RESP_R3
; break;
318 pr_debug("Unknown response type %d\n", mmc_resp_type(cmd
));
324 /* FIXME - this seems to be ok commented out but the spec suggest this bit
325 * should be set when issuing app commands.
326 * if(cmd->flags & MMC_FLAG_ACMD)
331 if (data
->blocks
> 1) {
332 sd_ctrl_write16(host
, CTL_STOP_INTERNAL_ACTION
, 0x100);
335 if (data
->flags
& MMC_DATA_READ
)
339 if (!host
->native_hotplug
)
340 irq_mask
&= ~(TMIO_STAT_CARD_REMOVE
| TMIO_STAT_CARD_INSERT
);
341 tmio_mmc_enable_mmc_irqs(host
, irq_mask
);
343 /* Fire off the command */
344 sd_ctrl_write32(host
, CTL_ARG_REG
, cmd
->arg
);
345 sd_ctrl_write16(host
, CTL_SD_CMD
, c
);
351 * This chip always returns (at least?) as much data as you ask for.
352 * I'm unsure what happens if you ask for less than a block. This should be
353 * looked into to ensure that a funny length read doesn't hose the controller.
355 static void tmio_mmc_pio_irq(struct tmio_mmc_host
*host
)
357 struct mmc_data
*data
= host
->data
;
363 if ((host
->chan_tx
|| host
->chan_rx
) && !host
->force_pio
) {
364 pr_err("PIO IRQ in DMA mode!\n");
367 pr_debug("Spurious PIO IRQ\n");
371 sg_virt
= tmio_mmc_kmap_atomic(host
->sg_ptr
, &flags
);
372 buf
= (unsigned short *)(sg_virt
+ host
->sg_off
);
374 count
= host
->sg_ptr
->length
- host
->sg_off
;
375 if (count
> data
->blksz
)
378 pr_debug("count: %08x offset: %08x flags %08x\n",
379 count
, host
->sg_off
, data
->flags
);
381 /* Transfer the data */
382 if (data
->flags
& MMC_DATA_READ
)
383 sd_ctrl_read16_rep(host
, CTL_SD_DATA_PORT
, buf
, count
>> 1);
385 sd_ctrl_write16_rep(host
, CTL_SD_DATA_PORT
, buf
, count
>> 1);
387 host
->sg_off
+= count
;
389 tmio_mmc_kunmap_atomic(host
->sg_ptr
, &flags
, sg_virt
);
391 if (host
->sg_off
== host
->sg_ptr
->length
)
392 tmio_mmc_next_sg(host
);
397 static void tmio_mmc_check_bounce_buffer(struct tmio_mmc_host
*host
)
399 if (host
->sg_ptr
== &host
->bounce_sg
) {
401 void *sg_vaddr
= tmio_mmc_kmap_atomic(host
->sg_orig
, &flags
);
402 memcpy(sg_vaddr
, host
->bounce_buf
, host
->bounce_sg
.length
);
403 tmio_mmc_kunmap_atomic(host
->sg_orig
, &flags
, sg_vaddr
);
407 /* needs to be called with host->lock held */
408 void tmio_mmc_do_data_irq(struct tmio_mmc_host
*host
)
410 struct mmc_data
*data
= host
->data
;
411 struct mmc_command
*stop
;
416 dev_warn(&host
->pdev
->dev
, "Spurious data end IRQ\n");
421 /* FIXME - return correct transfer count on errors */
423 data
->bytes_xfered
= data
->blocks
* data
->blksz
;
425 data
->bytes_xfered
= 0;
427 pr_debug("Completed data request\n");
430 * FIXME: other drivers allow an optional stop command of any given type
431 * which we dont do, as the chip can auto generate them.
432 * Perhaps we can be smarter about when to use auto CMD12 and
433 * only issue the auto request when we know this is the desired
434 * stop command, allowing fallback to the stop command the
435 * upper layers expect. For now, we do what works.
438 if (data
->flags
& MMC_DATA_READ
) {
439 if (host
->chan_rx
&& !host
->force_pio
)
440 tmio_mmc_check_bounce_buffer(host
);
441 dev_dbg(&host
->pdev
->dev
, "Complete Rx request %p\n",
444 dev_dbg(&host
->pdev
->dev
, "Complete Tx request %p\n",
449 if (stop
->opcode
== MMC_STOP_TRANSMISSION
&& !stop
->arg
)
450 sd_ctrl_write16(host
, CTL_STOP_INTERNAL_ACTION
, 0x000);
455 schedule_work(&host
->done
);
458 static void tmio_mmc_data_irq(struct tmio_mmc_host
*host
)
460 struct mmc_data
*data
;
461 spin_lock(&host
->lock
);
467 if (host
->chan_tx
&& (data
->flags
& MMC_DATA_WRITE
) && !host
->force_pio
) {
469 * Has all data been written out yet? Testing on SuperH showed,
470 * that in most cases the first interrupt comes already with the
471 * BUSY status bit clear, but on some operations, like mount or
472 * in the beginning of a write / sync / umount, there is one
473 * DATAEND interrupt with the BUSY bit set, in this cases
474 * waiting for one more interrupt fixes the problem.
476 if (!(sd_ctrl_read32(host
, CTL_STATUS
) & TMIO_STAT_CMD_BUSY
)) {
477 tmio_mmc_disable_mmc_irqs(host
, TMIO_STAT_DATAEND
);
478 tasklet_schedule(&host
->dma_complete
);
480 } else if (host
->chan_rx
&& (data
->flags
& MMC_DATA_READ
) && !host
->force_pio
) {
481 tmio_mmc_disable_mmc_irqs(host
, TMIO_STAT_DATAEND
);
482 tasklet_schedule(&host
->dma_complete
);
484 tmio_mmc_do_data_irq(host
);
485 tmio_mmc_disable_mmc_irqs(host
, TMIO_MASK_READOP
| TMIO_MASK_WRITEOP
);
488 spin_unlock(&host
->lock
);
491 static void tmio_mmc_cmd_irq(struct tmio_mmc_host
*host
,
494 struct mmc_command
*cmd
= host
->cmd
;
497 spin_lock(&host
->lock
);
500 pr_debug("Spurious CMD irq\n");
506 /* This controller is sicker than the PXA one. Not only do we need to
507 * drop the top 8 bits of the first response word, we also need to
508 * modify the order of the response for short response command types.
511 for (i
= 3, addr
= CTL_RESPONSE
; i
>= 0 ; i
--, addr
+= 4)
512 cmd
->resp
[i
] = sd_ctrl_read32(host
, addr
);
514 if (cmd
->flags
& MMC_RSP_136
) {
515 cmd
->resp
[0] = (cmd
->resp
[0] << 8) | (cmd
->resp
[1] >> 24);
516 cmd
->resp
[1] = (cmd
->resp
[1] << 8) | (cmd
->resp
[2] >> 24);
517 cmd
->resp
[2] = (cmd
->resp
[2] << 8) | (cmd
->resp
[3] >> 24);
519 } else if (cmd
->flags
& MMC_RSP_R3
) {
520 cmd
->resp
[0] = cmd
->resp
[3];
523 if (stat
& TMIO_STAT_CMDTIMEOUT
)
524 cmd
->error
= -ETIMEDOUT
;
525 else if (stat
& TMIO_STAT_CRCFAIL
&& cmd
->flags
& MMC_RSP_CRC
)
526 cmd
->error
= -EILSEQ
;
528 /* If there is data to handle we enable data IRQs here, and
529 * we will ultimatley finish the request in the data_end handler.
530 * If theres no data or we encountered an error, finish now.
532 if (host
->data
&& !cmd
->error
) {
533 if (host
->data
->flags
& MMC_DATA_READ
) {
534 if (host
->force_pio
|| !host
->chan_rx
)
535 tmio_mmc_enable_mmc_irqs(host
, TMIO_MASK_READOP
);
537 tasklet_schedule(&host
->dma_issue
);
539 if (host
->force_pio
|| !host
->chan_tx
)
540 tmio_mmc_enable_mmc_irqs(host
, TMIO_MASK_WRITEOP
);
542 tasklet_schedule(&host
->dma_issue
);
545 schedule_work(&host
->done
);
549 spin_unlock(&host
->lock
);
552 static void tmio_mmc_card_irq_status(struct tmio_mmc_host
*host
,
553 int *ireg
, int *status
)
555 *status
= sd_ctrl_read32(host
, CTL_STATUS
);
556 *ireg
= *status
& TMIO_MASK_IRQ
& ~host
->sdcard_irq_mask
;
558 pr_debug_status(*status
);
559 pr_debug_status(*ireg
);
562 static bool __tmio_mmc_card_detect_irq(struct tmio_mmc_host
*host
,
563 int ireg
, int status
)
565 struct mmc_host
*mmc
= host
->mmc
;
567 /* Card insert / remove attempts */
568 if (ireg
& (TMIO_STAT_CARD_INSERT
| TMIO_STAT_CARD_REMOVE
)) {
569 tmio_mmc_ack_mmc_irqs(host
, TMIO_STAT_CARD_INSERT
|
570 TMIO_STAT_CARD_REMOVE
);
571 if ((((ireg
& TMIO_STAT_CARD_REMOVE
) && mmc
->card
) ||
572 ((ireg
& TMIO_STAT_CARD_INSERT
) && !mmc
->card
)) &&
573 !work_pending(&mmc
->detect
.work
))
574 mmc_detect_change(host
->mmc
, msecs_to_jiffies(100));
581 irqreturn_t
tmio_mmc_card_detect_irq(int irq
, void *devid
)
583 unsigned int ireg
, status
;
584 struct tmio_mmc_host
*host
= devid
;
586 tmio_mmc_card_irq_status(host
, &ireg
, &status
);
587 __tmio_mmc_card_detect_irq(host
, ireg
, status
);
591 EXPORT_SYMBOL(tmio_mmc_card_detect_irq
);
593 static bool __tmio_mmc_sdcard_irq(struct tmio_mmc_host
*host
,
594 int ireg
, int status
)
596 /* Command completion */
597 if (ireg
& (TMIO_STAT_CMDRESPEND
| TMIO_STAT_CMDTIMEOUT
)) {
598 tmio_mmc_ack_mmc_irqs(host
,
599 TMIO_STAT_CMDRESPEND
|
600 TMIO_STAT_CMDTIMEOUT
);
601 tmio_mmc_cmd_irq(host
, status
);
606 if (ireg
& (TMIO_STAT_RXRDY
| TMIO_STAT_TXRQ
)) {
607 tmio_mmc_ack_mmc_irqs(host
, TMIO_STAT_RXRDY
| TMIO_STAT_TXRQ
);
608 tmio_mmc_pio_irq(host
);
612 /* Data transfer completion */
613 if (ireg
& TMIO_STAT_DATAEND
) {
614 tmio_mmc_ack_mmc_irqs(host
, TMIO_STAT_DATAEND
);
615 tmio_mmc_data_irq(host
);
622 irqreturn_t
tmio_mmc_sdcard_irq(int irq
, void *devid
)
624 unsigned int ireg
, status
;
625 struct tmio_mmc_host
*host
= devid
;
627 tmio_mmc_card_irq_status(host
, &ireg
, &status
);
628 __tmio_mmc_sdcard_irq(host
, ireg
, status
);
632 EXPORT_SYMBOL(tmio_mmc_sdcard_irq
);
634 irqreturn_t
tmio_mmc_sdio_irq(int irq
, void *devid
)
636 struct tmio_mmc_host
*host
= devid
;
637 struct mmc_host
*mmc
= host
->mmc
;
638 struct tmio_mmc_data
*pdata
= host
->pdata
;
639 unsigned int ireg
, status
;
641 if (!(pdata
->flags
& TMIO_MMC_SDIO_IRQ
))
644 status
= sd_ctrl_read16(host
, CTL_SDIO_STATUS
);
645 ireg
= status
& TMIO_SDIO_MASK_ALL
& ~host
->sdcard_irq_mask
;
647 sd_ctrl_write16(host
, CTL_SDIO_STATUS
, status
& ~TMIO_SDIO_MASK_ALL
);
649 if (mmc
->caps
& MMC_CAP_SDIO_IRQ
&& ireg
& TMIO_SDIO_STAT_IOIRQ
)
650 mmc_signal_sdio_irq(mmc
);
654 EXPORT_SYMBOL(tmio_mmc_sdio_irq
);
656 irqreturn_t
tmio_mmc_irq(int irq
, void *devid
)
658 struct tmio_mmc_host
*host
= devid
;
659 unsigned int ireg
, status
;
661 pr_debug("MMC IRQ begin\n");
663 tmio_mmc_card_irq_status(host
, &ireg
, &status
);
664 if (__tmio_mmc_card_detect_irq(host
, ireg
, status
))
666 if (__tmio_mmc_sdcard_irq(host
, ireg
, status
))
669 tmio_mmc_sdio_irq(irq
, devid
);
673 EXPORT_SYMBOL(tmio_mmc_irq
);
675 static int tmio_mmc_start_data(struct tmio_mmc_host
*host
,
676 struct mmc_data
*data
)
678 struct tmio_mmc_data
*pdata
= host
->pdata
;
680 pr_debug("setup data transfer: blocksize %08x nr_blocks %d\n",
681 data
->blksz
, data
->blocks
);
683 /* Some hardware cannot perform 2 byte requests in 4 bit mode */
684 if (host
->mmc
->ios
.bus_width
== MMC_BUS_WIDTH_4
) {
685 int blksz_2bytes
= pdata
->flags
& TMIO_MMC_BLKSZ_2BYTES
;
687 if (data
->blksz
< 2 || (data
->blksz
< 4 && !blksz_2bytes
)) {
688 pr_err("%s: %d byte block unsupported in 4 bit mode\n",
689 mmc_hostname(host
->mmc
), data
->blksz
);
694 tmio_mmc_init_sg(host
, data
);
697 /* Set transfer length / blocksize */
698 sd_ctrl_write16(host
, CTL_SD_XFER_LEN
, data
->blksz
);
699 sd_ctrl_write16(host
, CTL_XFER_BLK_COUNT
, data
->blocks
);
701 tmio_mmc_start_dma(host
, data
);
706 /* Process requests from the MMC layer */
707 static void tmio_mmc_request(struct mmc_host
*mmc
, struct mmc_request
*mrq
)
709 struct tmio_mmc_host
*host
= mmc_priv(mmc
);
713 spin_lock_irqsave(&host
->lock
, flags
);
716 pr_debug("request not null\n");
717 if (IS_ERR(host
->mrq
)) {
718 spin_unlock_irqrestore(&host
->lock
, flags
);
719 mrq
->cmd
->error
= -EAGAIN
;
720 mmc_request_done(mmc
, mrq
);
725 host
->last_req_ts
= jiffies
;
729 spin_unlock_irqrestore(&host
->lock
, flags
);
732 ret
= tmio_mmc_start_data(host
, mrq
->data
);
737 ret
= tmio_mmc_start_command(host
, mrq
->cmd
);
739 schedule_delayed_work(&host
->delayed_reset_work
,
740 msecs_to_jiffies(2000));
745 host
->force_pio
= false;
747 mrq
->cmd
->error
= ret
;
748 mmc_request_done(mmc
, mrq
);
751 static int tmio_mmc_clk_update(struct mmc_host
*mmc
)
753 struct tmio_mmc_host
*host
= mmc_priv(mmc
);
754 struct tmio_mmc_data
*pdata
= host
->pdata
;
757 if (!pdata
->clk_enable
)
760 ret
= pdata
->clk_enable(host
->pdev
, &mmc
->f_max
);
762 mmc
->f_min
= mmc
->f_max
/ 512;
767 static void tmio_mmc_power_on(struct tmio_mmc_host
*host
, unsigned short vdd
)
769 struct mmc_host
*mmc
= host
->mmc
;
772 /* .set_ios() is returning void, so, no chance to report an error */
775 host
->set_pwr(host
->pdev
, 1);
777 if (!IS_ERR(mmc
->supply
.vmmc
)) {
778 ret
= mmc_regulator_set_ocr(mmc
, mmc
->supply
.vmmc
, vdd
);
780 * Attention: empiric value. With a b43 WiFi SDIO card this
781 * delay proved necessary for reliable card-insertion probing.
782 * 100us were not enough. Is this the same 140us delay, as in
783 * tmio_mmc_set_ios()?
788 * It seems, VccQ should be switched on after Vcc, this is also what the
789 * omap_hsmmc.c driver does.
791 if (!IS_ERR(mmc
->supply
.vqmmc
) && !ret
) {
792 ret
= regulator_enable(mmc
->supply
.vqmmc
);
797 dev_dbg(&host
->pdev
->dev
, "Regulators failed to power up: %d\n",
801 static void tmio_mmc_power_off(struct tmio_mmc_host
*host
)
803 struct mmc_host
*mmc
= host
->mmc
;
805 if (!IS_ERR(mmc
->supply
.vqmmc
))
806 regulator_disable(mmc
->supply
.vqmmc
);
808 if (!IS_ERR(mmc
->supply
.vmmc
))
809 mmc_regulator_set_ocr(mmc
, mmc
->supply
.vmmc
, 0);
812 host
->set_pwr(host
->pdev
, 0);
815 /* Set MMC clock / power.
816 * Note: This controller uses a simple divider scheme therefore it cannot
817 * run a MMC card at full speed (20MHz). The max clock is 24MHz on SD, but as
818 * MMC wont run that fast, it has to be clocked at 12MHz which is the next
821 static void tmio_mmc_set_ios(struct mmc_host
*mmc
, struct mmc_ios
*ios
)
823 struct tmio_mmc_host
*host
= mmc_priv(mmc
);
824 struct device
*dev
= &host
->pdev
->dev
;
827 mutex_lock(&host
->ios_lock
);
829 spin_lock_irqsave(&host
->lock
, flags
);
831 if (IS_ERR(host
->mrq
)) {
833 "%s.%d: concurrent .set_ios(), clk %u, mode %u\n",
834 current
->comm
, task_pid_nr(current
),
835 ios
->clock
, ios
->power_mode
);
836 host
->mrq
= ERR_PTR(-EINTR
);
839 "%s.%d: CMD%u active since %lu, now %lu!\n",
840 current
->comm
, task_pid_nr(current
),
841 host
->mrq
->cmd
->opcode
, host
->last_req_ts
, jiffies
);
843 spin_unlock_irqrestore(&host
->lock
, flags
);
845 mutex_unlock(&host
->ios_lock
);
849 host
->mrq
= ERR_PTR(-EBUSY
);
851 spin_unlock_irqrestore(&host
->lock
, flags
);
854 * host->power toggles between false and true in both cases - either
855 * or not the controller can be runtime-suspended during inactivity.
856 * But if the controller has to be kept on, the runtime-pm usage_count
857 * is kept positive, so no suspending actually takes place.
859 if (ios
->power_mode
== MMC_POWER_ON
&& ios
->clock
) {
860 if (host
->power
!= TMIO_MMC_ON_RUN
) {
861 tmio_mmc_clk_update(mmc
);
862 pm_runtime_get_sync(dev
);
863 if (host
->resuming
) {
864 tmio_mmc_reset(host
);
865 host
->resuming
= false;
868 if (host
->power
== TMIO_MMC_OFF_STOP
)
869 tmio_mmc_reset(host
);
870 tmio_mmc_set_clock(host
, ios
->clock
);
871 if (host
->power
== TMIO_MMC_OFF_STOP
)
872 /* power up SD card and the bus */
873 tmio_mmc_power_on(host
, ios
->vdd
);
874 host
->power
= TMIO_MMC_ON_RUN
;
875 /* start bus clock */
876 tmio_mmc_clk_start(host
);
877 } else if (ios
->power_mode
!= MMC_POWER_UP
) {
878 struct tmio_mmc_data
*pdata
= host
->pdata
;
879 unsigned int old_power
= host
->power
;
881 if (old_power
!= TMIO_MMC_OFF_STOP
) {
882 if (ios
->power_mode
== MMC_POWER_OFF
) {
883 tmio_mmc_power_off(host
);
884 host
->power
= TMIO_MMC_OFF_STOP
;
886 host
->power
= TMIO_MMC_ON_STOP
;
890 if (old_power
== TMIO_MMC_ON_RUN
) {
891 tmio_mmc_clk_stop(host
);
893 if (pdata
->clk_disable
)
894 pdata
->clk_disable(host
->pdev
);
898 if (host
->power
!= TMIO_MMC_OFF_STOP
) {
899 switch (ios
->bus_width
) {
900 case MMC_BUS_WIDTH_1
:
901 sd_ctrl_write16(host
, CTL_SD_MEM_CARD_OPT
, 0x80e0);
903 case MMC_BUS_WIDTH_4
:
904 sd_ctrl_write16(host
, CTL_SD_MEM_CARD_OPT
, 0x00e0);
909 /* Let things settle. delay taken from winCE driver */
911 if (PTR_ERR(host
->mrq
) == -EINTR
)
912 dev_dbg(&host
->pdev
->dev
,
913 "%s.%d: IOS interrupted: clk %u, mode %u",
914 current
->comm
, task_pid_nr(current
),
915 ios
->clock
, ios
->power_mode
);
918 mutex_unlock(&host
->ios_lock
);
921 static int tmio_mmc_get_ro(struct mmc_host
*mmc
)
923 struct tmio_mmc_host
*host
= mmc_priv(mmc
);
924 struct tmio_mmc_data
*pdata
= host
->pdata
;
925 int ret
= mmc_gpio_get_ro(mmc
);
929 return !((pdata
->flags
& TMIO_MMC_WRPROTECT_DISABLE
) ||
930 (sd_ctrl_read32(host
, CTL_STATUS
) & TMIO_STAT_WRPROTECT
));
933 static const struct mmc_host_ops tmio_mmc_ops
= {
934 .request
= tmio_mmc_request
,
935 .set_ios
= tmio_mmc_set_ios
,
936 .get_ro
= tmio_mmc_get_ro
,
937 .get_cd
= mmc_gpio_get_cd
,
938 .enable_sdio_irq
= tmio_mmc_enable_sdio_irq
,
941 static int tmio_mmc_init_ocr(struct tmio_mmc_host
*host
)
943 struct tmio_mmc_data
*pdata
= host
->pdata
;
944 struct mmc_host
*mmc
= host
->mmc
;
946 mmc_regulator_get_supply(mmc
);
948 /* use ocr_mask if no regulator */
950 mmc
->ocr_avail
= pdata
->ocr_mask
;
954 * There is possibility that regulator has not been probed
957 return -EPROBE_DEFER
;
962 static void tmio_mmc_of_parse(struct platform_device
*pdev
,
963 struct tmio_mmc_data
*pdata
)
965 const struct device_node
*np
= pdev
->dev
.of_node
;
969 if (of_get_property(np
, "toshiba,mmc-wrprotect-disable", NULL
))
970 pdata
->flags
|= TMIO_MMC_WRPROTECT_DISABLE
;
973 int tmio_mmc_host_probe(struct tmio_mmc_host
**host
,
974 struct platform_device
*pdev
,
975 struct tmio_mmc_data
*pdata
)
977 struct tmio_mmc_host
*_host
;
978 struct mmc_host
*mmc
;
979 struct resource
*res_ctl
;
981 u32 irq_mask
= TMIO_MASK_CMD
;
983 tmio_mmc_of_parse(pdev
, pdata
);
985 if (!(pdata
->flags
& TMIO_MMC_HAS_IDLE_WAIT
))
986 pdata
->write16_hook
= NULL
;
988 res_ctl
= platform_get_resource(pdev
, IORESOURCE_MEM
, 0);
992 mmc
= mmc_alloc_host(sizeof(struct tmio_mmc_host
), &pdev
->dev
);
996 ret
= mmc_of_parse(mmc
);
1000 pdata
->dev
= &pdev
->dev
;
1001 _host
= mmc_priv(mmc
);
1002 _host
->pdata
= pdata
;
1005 platform_set_drvdata(pdev
, mmc
);
1007 _host
->set_pwr
= pdata
->set_pwr
;
1008 _host
->set_clk_div
= pdata
->set_clk_div
;
1010 ret
= tmio_mmc_init_ocr(_host
);
1014 _host
->ctl
= ioremap(res_ctl
->start
, resource_size(res_ctl
));
1020 mmc
->ops
= &tmio_mmc_ops
;
1021 mmc
->caps
|= MMC_CAP_4_BIT_DATA
| pdata
->capabilities
;
1022 mmc
->caps2
|= pdata
->capabilities2
;
1024 mmc
->max_blk_size
= 512;
1025 mmc
->max_blk_count
= (PAGE_CACHE_SIZE
/ mmc
->max_blk_size
) *
1027 mmc
->max_req_size
= mmc
->max_blk_size
* mmc
->max_blk_count
;
1028 mmc
->max_seg_size
= mmc
->max_req_size
;
1030 _host
->native_hotplug
= !(pdata
->flags
& TMIO_MMC_USE_GPIO_CD
||
1031 mmc
->caps
& MMC_CAP_NEEDS_POLL
||
1032 mmc
->caps
& MMC_CAP_NONREMOVABLE
||
1033 mmc
->slot
.cd_irq
>= 0);
1035 _host
->power
= TMIO_MMC_OFF_STOP
;
1036 pm_runtime_enable(&pdev
->dev
);
1037 ret
= pm_runtime_resume(&pdev
->dev
);
1041 if (tmio_mmc_clk_update(mmc
) < 0) {
1042 mmc
->f_max
= pdata
->hclk
;
1043 mmc
->f_min
= mmc
->f_max
/ 512;
1047 * There are 4 different scenarios for the card detection:
1048 * 1) an external gpio irq handles the cd (best for power savings)
1049 * 2) internal sdhi irq handles the cd
1050 * 3) a worker thread polls the sdhi - indicated by MMC_CAP_NEEDS_POLL
1051 * 4) the medium is non-removable - indicated by MMC_CAP_NONREMOVABLE
1053 * While we increment the runtime PM counter for all scenarios when
1054 * the mmc core activates us by calling an appropriate set_ios(), we
1055 * must additionally ensure that in case 2) the tmio mmc hardware stays
1056 * powered on during runtime for the card detection to work.
1058 if (_host
->native_hotplug
)
1059 pm_runtime_get_noresume(&pdev
->dev
);
1061 tmio_mmc_clk_stop(_host
);
1062 tmio_mmc_reset(_host
);
1064 _host
->sdcard_irq_mask
= sd_ctrl_read32(_host
, CTL_IRQ_MASK
);
1065 tmio_mmc_disable_mmc_irqs(_host
, TMIO_MASK_ALL
);
1067 /* Unmask the IRQs we want to know about */
1068 if (!_host
->chan_rx
)
1069 irq_mask
|= TMIO_MASK_READOP
;
1070 if (!_host
->chan_tx
)
1071 irq_mask
|= TMIO_MASK_WRITEOP
;
1072 if (!_host
->native_hotplug
)
1073 irq_mask
&= ~(TMIO_STAT_CARD_REMOVE
| TMIO_STAT_CARD_INSERT
);
1075 _host
->sdcard_irq_mask
&= ~irq_mask
;
1077 if (pdata
->flags
& TMIO_MMC_SDIO_IRQ
)
1078 tmio_mmc_enable_sdio_irq(mmc
, 0);
1080 spin_lock_init(&_host
->lock
);
1081 mutex_init(&_host
->ios_lock
);
1083 /* Init delayed work for request timeouts */
1084 INIT_DELAYED_WORK(&_host
->delayed_reset_work
, tmio_mmc_reset_work
);
1085 INIT_WORK(&_host
->done
, tmio_mmc_done_work
);
1087 /* See if we also get DMA */
1088 tmio_mmc_request_dma(_host
, pdata
);
1090 ret
= mmc_add_host(mmc
);
1091 if (pdata
->clk_disable
)
1092 pdata
->clk_disable(pdev
);
1094 tmio_mmc_host_remove(_host
);
1098 dev_pm_qos_expose_latency_limit(&pdev
->dev
, 100);
1100 if (pdata
->flags
& TMIO_MMC_USE_GPIO_CD
) {
1101 ret
= mmc_gpio_request_cd(mmc
, pdata
->cd_gpio
, 0);
1103 tmio_mmc_host_remove(_host
);
1113 pm_runtime_disable(&pdev
->dev
);
1114 iounmap(_host
->ctl
);
1120 EXPORT_SYMBOL(tmio_mmc_host_probe
);
1122 void tmio_mmc_host_remove(struct tmio_mmc_host
*host
)
1124 struct platform_device
*pdev
= host
->pdev
;
1125 struct mmc_host
*mmc
= host
->mmc
;
1127 if (!host
->native_hotplug
)
1128 pm_runtime_get_sync(&pdev
->dev
);
1130 dev_pm_qos_hide_latency_limit(&pdev
->dev
);
1132 mmc_remove_host(mmc
);
1133 cancel_work_sync(&host
->done
);
1134 cancel_delayed_work_sync(&host
->delayed_reset_work
);
1135 tmio_mmc_release_dma(host
);
1137 pm_runtime_put_sync(&pdev
->dev
);
1138 pm_runtime_disable(&pdev
->dev
);
1143 EXPORT_SYMBOL(tmio_mmc_host_remove
);
1146 int tmio_mmc_host_suspend(struct device
*dev
)
1148 struct mmc_host
*mmc
= dev_get_drvdata(dev
);
1149 struct tmio_mmc_host
*host
= mmc_priv(mmc
);
1151 tmio_mmc_disable_mmc_irqs(host
, TMIO_MASK_ALL
);
1154 EXPORT_SYMBOL(tmio_mmc_host_suspend
);
1156 int tmio_mmc_host_resume(struct device
*dev
)
1158 struct mmc_host
*mmc
= dev_get_drvdata(dev
);
1159 struct tmio_mmc_host
*host
= mmc_priv(mmc
);
1161 tmio_mmc_enable_dma(host
, true);
1163 /* The MMC core will perform the complete set up */
1164 host
->resuming
= true;
1167 EXPORT_SYMBOL(tmio_mmc_host_resume
);
1169 #endif /* CONFIG_PM */
1171 int tmio_mmc_host_runtime_suspend(struct device
*dev
)
1175 EXPORT_SYMBOL(tmio_mmc_host_runtime_suspend
);
1177 int tmio_mmc_host_runtime_resume(struct device
*dev
)
1179 struct mmc_host
*mmc
= dev_get_drvdata(dev
);
1180 struct tmio_mmc_host
*host
= mmc_priv(mmc
);
1182 tmio_mmc_enable_dma(host
, true);
1186 EXPORT_SYMBOL(tmio_mmc_host_runtime_resume
);
1188 MODULE_LICENSE("GPL v2");