drivers/mtd/nand/mpc5121_nfc.c

   1 /*
   2  * Copyright 2004-2008 Freescale Semiconductor, Inc.
   3  * Copyright 2009 Semihalf.
   4  *
   5  * Approved as OSADL project by a majority of OSADL members and funded
   6  * by OSADL membership fees in 2009;  for details see www.osadl.org.
   7  *
   8  * Based on original driver from Freescale Semiconductor
   9  * written by John Rigby <jrigby@freescale.com> on basis
  10  * of drivers/mtd/nand/mxc_nand.c. Reworked and extended
  11  * Piotr Ziecik <kosmo@semihalf.com>.
  12  *
  13  * This program is free software; you can redistribute it and/or
  14  * modify it under the terms of the GNU General Public License
  15  * as published by the Free Software Foundation; either version 2
  16  * of the License, or (at your option) any later version.
  17  * This program is distributed in the hope that it will be useful,
  18  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  19  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  20  * GNU General Public License for more details.
  21  *
  22  * You should have received a copy of the GNU General Public License
  23  * along with this program; if not, write to the Free Software
  24  * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston,
  25  * MA 02110-1301, USA.
  26  */
  27
  28 #include <linux/module.h>
  29 #include <linux/clk.h>
  30 #include <linux/gfp.h>
  31 #include <linux/delay.h>
  32 #include <linux/err.h>
  33 #include <linux/init.h>
  34 #include <linux/interrupt.h>
  35 #include <linux/io.h>
  36 #include <linux/mtd/mtd.h>
  37 #include <linux/mtd/nand.h>
  38 #include <linux/mtd/partitions.h>
  39 #include <linux/of_address.h>
  40 #include <linux/of_device.h>
  41 #include <linux/of_irq.h>
  42 #include <linux/of_platform.h>
  43
  44 #include <asm/mpc5121.h>
  45
  46 /* Addresses for NFC MAIN RAM BUFFER areas */
  47 #define NFC_MAIN_AREA(n)        ((n) *  0x200)
  48
  49 /* Addresses for NFC SPARE BUFFER areas */
  50 #define NFC_SPARE_BUFFERS       8
  51 #define NFC_SPARE_LEN           0x40
  52 #define NFC_SPARE_AREA(n)       (0x1000 + ((n) * NFC_SPARE_LEN))
  53
  54 /* MPC5121 NFC registers */
  55 #define NFC_BUF_ADDR            0x1E04
  56 #define NFC_FLASH_ADDR          0x1E06
  57 #define NFC_FLASH_CMD           0x1E08
  58 #define NFC_CONFIG              0x1E0A
  59 #define NFC_ECC_STATUS1         0x1E0C
  60 #define NFC_ECC_STATUS2         0x1E0E
  61 #define NFC_SPAS                0x1E10
  62 #define NFC_WRPROT              0x1E12
  63 #define NFC_NF_WRPRST           0x1E18
  64 #define NFC_CONFIG1             0x1E1A
  65 #define NFC_CONFIG2             0x1E1C
  66 #define NFC_UNLOCKSTART_BLK0    0x1E20
  67 #define NFC_UNLOCKEND_BLK0      0x1E22
  68 #define NFC_UNLOCKSTART_BLK1    0x1E24
  69 #define NFC_UNLOCKEND_BLK1      0x1E26
  70 #define NFC_UNLOCKSTART_BLK2    0x1E28
  71 #define NFC_UNLOCKEND_BLK2      0x1E2A
  72 #define NFC_UNLOCKSTART_BLK3    0x1E2C
  73 #define NFC_UNLOCKEND_BLK3      0x1E2E
  74
  75 /* Bit Definitions: NFC_BUF_ADDR */
  76 #define NFC_RBA_MASK            (7 << 0)
  77 #define NFC_ACTIVE_CS_SHIFT     5
  78 #define NFC_ACTIVE_CS_MASK      (3 << NFC_ACTIVE_CS_SHIFT)
  79
  80 /* Bit Definitions: NFC_CONFIG */
  81 #define NFC_BLS_UNLOCKED        (1 << 1)
  82
  83 /* Bit Definitions: NFC_CONFIG1 */
  84 #define NFC_ECC_4BIT            (1 << 0)
  85 #define NFC_FULL_PAGE_DMA       (1 << 1)
  86 #define NFC_SPARE_ONLY          (1 << 2)
  87 #define NFC_ECC_ENABLE          (1 << 3)
  88 #define NFC_INT_MASK            (1 << 4)
  89 #define NFC_BIG_ENDIAN          (1 << 5)
  90 #define NFC_RESET               (1 << 6)
  91 #define NFC_CE                  (1 << 7)
  92 #define NFC_ONE_CYCLE           (1 << 8)
  93 #define NFC_PPB_32              (0 << 9)
  94 #define NFC_PPB_64              (1 << 9)
  95 #define NFC_PPB_128             (2 << 9)
  96 #define NFC_PPB_256             (3 << 9)
  97 #define NFC_PPB_MASK            (3 << 9)
  98 #define NFC_FULL_PAGE_INT       (1 << 11)
  99
 100 /* Bit Definitions: NFC_CONFIG2 */
 101 #define NFC_COMMAND             (1 << 0)
 102 #define NFC_ADDRESS             (1 << 1)
 103 #define NFC_INPUT               (1 << 2)
 104 #define NFC_OUTPUT              (1 << 3)
 105 #define NFC_ID                  (1 << 4)
 106 #define NFC_STATUS              (1 << 5)
 107 #define NFC_CMD_FAIL            (1 << 15)
 108 #define NFC_INT                 (1 << 15)
 109
 110 /* Bit Definitions: NFC_WRPROT */
 111 #define NFC_WPC_LOCK_TIGHT      (1 << 0)
 112 #define NFC_WPC_LOCK            (1 << 1)
 113 #define NFC_WPC_UNLOCK          (1 << 2)
 114
 115 #define DRV_NAME                "mpc5121_nfc"
 116
 117 /* Timeouts */
 118 #define NFC_RESET_TIMEOUT       1000            /* 1 ms */
 119 #define NFC_TIMEOUT             (HZ / 10)       /* 1/10 s */
 120
 121 struct mpc5121_nfc_prv {
 122         struct mtd_info         mtd;
 123         struct nand_chip        chip;
 124         int                     irq;
 125         void __iomem            *regs;
 126         struct clk              *clk;
 127         wait_queue_head_t       irq_waitq;
 128         uint                    column;
 129         int                     spareonly;
 130         void __iomem            *csreg;
 131         struct device           *dev;
 132 };
 133
 134 static void mpc5121_nfc_done(struct mtd_info *mtd);
 135
 136 /* Read NFC register */
 137 static inline u16 nfc_read(struct mtd_info *mtd, uint reg)
 138 {
 139         struct nand_chip *chip = mtd->priv;
 140         struct mpc5121_nfc_prv *prv = chip->priv;
 141
 142         return in_be16(prv->regs + reg);
 143 }
 144
 145 /* Write NFC register */
 146 static inline void nfc_write(struct mtd_info *mtd, uint reg, u16 val)
 147 {
 148         struct nand_chip *chip = mtd->priv;
 149         struct mpc5121_nfc_prv *prv = chip->priv;
 150
 151         out_be16(prv->regs + reg, val);
 152 }
 153
 154 /* Set bits in NFC register */
 155 static inline void nfc_set(struct mtd_info *mtd, uint reg, u16 bits)
 156 {
 157         nfc_write(mtd, reg, nfc_read(mtd, reg) | bits);
 158 }
 159
 160 /* Clear bits in NFC register */
 161 static inline void nfc_clear(struct mtd_info *mtd, uint reg, u16 bits)
 162 {
 163         nfc_write(mtd, reg, nfc_read(mtd, reg) & ~bits);
 164 }
 165
 166 /* Invoke address cycle */
 167 static inline void mpc5121_nfc_send_addr(struct mtd_info *mtd, u16 addr)
 168 {
 169         nfc_write(mtd, NFC_FLASH_ADDR, addr);
 170         nfc_write(mtd, NFC_CONFIG2, NFC_ADDRESS);
 171         mpc5121_nfc_done(mtd);
 172 }
 173
 174 /* Invoke command cycle */
 175 static inline void mpc5121_nfc_send_cmd(struct mtd_info *mtd, u16 cmd)
 176 {
 177         nfc_write(mtd, NFC_FLASH_CMD, cmd);
 178         nfc_write(mtd, NFC_CONFIG2, NFC_COMMAND);
 179         mpc5121_nfc_done(mtd);
 180 }
 181
 182 /* Send data from NFC buffers to NAND flash */
 183 static inline void mpc5121_nfc_send_prog_page(struct mtd_info *mtd)
 184 {
 185         nfc_clear(mtd, NFC_BUF_ADDR, NFC_RBA_MASK);
 186         nfc_write(mtd, NFC_CONFIG2, NFC_INPUT);
 187         mpc5121_nfc_done(mtd);
 188 }
 189
 190 /* Receive data from NAND flash */
 191 static inline void mpc5121_nfc_send_read_page(struct mtd_info *mtd)
 192 {
 193         nfc_clear(mtd, NFC_BUF_ADDR, NFC_RBA_MASK);
 194         nfc_write(mtd, NFC_CONFIG2, NFC_OUTPUT);
 195         mpc5121_nfc_done(mtd);
 196 }
 197
 198 /* Receive ID from NAND flash */
 199 static inline void mpc5121_nfc_send_read_id(struct mtd_info *mtd)
 200 {
 201         nfc_clear(mtd, NFC_BUF_ADDR, NFC_RBA_MASK);
 202         nfc_write(mtd, NFC_CONFIG2, NFC_ID);
 203         mpc5121_nfc_done(mtd);
 204 }
 205
 206 /* Receive status from NAND flash */
 207 static inline void mpc5121_nfc_send_read_status(struct mtd_info *mtd)
 208 {
 209         nfc_clear(mtd, NFC_BUF_ADDR, NFC_RBA_MASK);
 210         nfc_write(mtd, NFC_CONFIG2, NFC_STATUS);
 211         mpc5121_nfc_done(mtd);
 212 }
 213
 214 /* NFC interrupt handler */
 215 static irqreturn_t mpc5121_nfc_irq(int irq, void *data)
 216 {
 217         struct mtd_info *mtd = data;
 218         struct nand_chip *chip = mtd->priv;
 219         struct mpc5121_nfc_prv *prv = chip->priv;
 220
 221         nfc_set(mtd, NFC_CONFIG1, NFC_INT_MASK);
 222         wake_up(&prv->irq_waitq);
 223
 224         return IRQ_HANDLED;
 225 }
 226
 227 /* Wait for operation complete */
 228 static void mpc5121_nfc_done(struct mtd_info *mtd)
 229 {
 230         struct nand_chip *chip = mtd->priv;
 231         struct mpc5121_nfc_prv *prv = chip->priv;
 232         int rv;
 233
 234         if ((nfc_read(mtd, NFC_CONFIG2) & NFC_INT) == 0) {
 235                 nfc_clear(mtd, NFC_CONFIG1, NFC_INT_MASK);
 236                 rv = wait_event_timeout(prv->irq_waitq,
 237                         (nfc_read(mtd, NFC_CONFIG2) & NFC_INT), NFC_TIMEOUT);
 238
 239                 if (!rv)
 240                         dev_warn(prv->dev,
 241                                 "Timeout while waiting for interrupt.\n");
 242         }
 243
 244         nfc_clear(mtd, NFC_CONFIG2, NFC_INT);
 245 }
 246
 247 /* Do address cycle(s) */
 248 static void mpc5121_nfc_addr_cycle(struct mtd_info *mtd, int column, int page)
 249 {
 250         struct nand_chip *chip = mtd->priv;
 251         u32 pagemask = chip->pagemask;
 252
 253         if (column != -1) {
 254                 mpc5121_nfc_send_addr(mtd, column);
 255                 if (mtd->writesize > 512)
 256                         mpc5121_nfc_send_addr(mtd, column >> 8);
 257         }
 258
 259         if (page != -1) {
 260                 do {
 261                         mpc5121_nfc_send_addr(mtd, page & 0xFF);
 262                         page >>= 8;
 263                         pagemask >>= 8;
 264                 } while (pagemask);
 265         }
 266 }
 267
 268 /* Control chip select signals */
 269 static void mpc5121_nfc_select_chip(struct mtd_info *mtd, int chip)
 270 {
 271         if (chip < 0) {
 272                 nfc_clear(mtd, NFC_CONFIG1, NFC_CE);
 273                 return;
 274         }
 275
 276         nfc_clear(mtd, NFC_BUF_ADDR, NFC_ACTIVE_CS_MASK);
 277         nfc_set(mtd, NFC_BUF_ADDR, (chip << NFC_ACTIVE_CS_SHIFT) &
 278                                                         NFC_ACTIVE_CS_MASK);
 279         nfc_set(mtd, NFC_CONFIG1, NFC_CE);
 280 }
 281
 282 /* Init external chip select logic on ADS5121 board */
 283 static int ads5121_chipselect_init(struct mtd_info *mtd)
 284 {
 285         struct nand_chip *chip = mtd->priv;
 286         struct mpc5121_nfc_prv *prv = chip->priv;
 287         struct device_node *dn;
 288
 289         dn = of_find_compatible_node(NULL, NULL, "fsl,mpc5121ads-cpld");
 290         if (dn) {
 291                 prv->csreg = of_iomap(dn, 0);
 292                 of_node_put(dn);
 293                 if (!prv->csreg)
 294                         return -ENOMEM;
 295
 296                 /* CPLD Register 9 controls NAND /CE Lines */
 297                 prv->csreg += 9;
 298                 return 0;
 299         }
 300
 301         return -EINVAL;
 302 }
 303
 304 /* Control chips select signal on ADS5121 board */
 305 static void ads5121_select_chip(struct mtd_info *mtd, int chip)
 306 {
 307         struct nand_chip *nand = mtd->priv;
 308         struct mpc5121_nfc_prv *prv = nand->priv;
 309         u8 v;
 310
 311         v = in_8(prv->csreg);
 312         v |= 0x0F;
 313
 314         if (chip >= 0) {
 315                 mpc5121_nfc_select_chip(mtd, 0);
 316                 v &= ~(1 << chip);
 317         } else
 318                 mpc5121_nfc_select_chip(mtd, -1);
 319
 320         out_8(prv->csreg, v);
 321 }
 322
 323 /* Read NAND Ready/Busy signal */
 324 static int mpc5121_nfc_dev_ready(struct mtd_info *mtd)
 325 {
 326         /*
 327          * NFC handles ready/busy signal internally. Therefore, this function
 328          * always returns status as ready.
 329          */
 330         return 1;
 331 }
 332
 333 /* Write command to NAND flash */
 334 static void mpc5121_nfc_command(struct mtd_info *mtd, unsigned command,
 335                                                         int column, int page)
 336 {
 337         struct nand_chip *chip = mtd->priv;
 338         struct mpc5121_nfc_prv *prv = chip->priv;
 339
 340         prv->column = (column >= 0) ? column : 0;
 341         prv->spareonly = 0;
 342
 343         switch (command) {
 344         case NAND_CMD_PAGEPROG:
 345                 mpc5121_nfc_send_prog_page(mtd);
 346                 break;
 347         /*
 348          * NFC does not support sub-page reads and writes,
 349          * so emulate them using full page transfers.
 350          */
 351         case NAND_CMD_READ0:
 352                 column = 0;
 353                 break;
 354
 355         case NAND_CMD_READ1:
 356                 prv->column += 256;
 357                 command = NAND_CMD_READ0;
 358                 column = 0;
 359                 break;
 360
 361         case NAND_CMD_READOOB:
 362                 prv->spareonly = 1;
 363                 command = NAND_CMD_READ0;
 364                 column = 0;
 365                 break;
 366
 367         case NAND_CMD_SEQIN:
 368                 mpc5121_nfc_command(mtd, NAND_CMD_READ0, column, page);
 369                 column = 0;
 370                 break;
 371
 372         case NAND_CMD_ERASE1:
 373         case NAND_CMD_ERASE2:
 374         case NAND_CMD_READID:
 375         case NAND_CMD_STATUS:
 376                 break;
 377
 378         default:
 379                 return;
 380         }
 381
 382         mpc5121_nfc_send_cmd(mtd, command);
 383         mpc5121_nfc_addr_cycle(mtd, column, page);
 384
 385         switch (command) {
 386         case NAND_CMD_READ0:
 387                 if (mtd->writesize > 512)
 388                         mpc5121_nfc_send_cmd(mtd, NAND_CMD_READSTART);
 389                 mpc5121_nfc_send_read_page(mtd);
 390                 break;
 391
 392         case NAND_CMD_READID:
 393                 mpc5121_nfc_send_read_id(mtd);
 394                 break;
 395
 396         case NAND_CMD_STATUS:
 397                 mpc5121_nfc_send_read_status(mtd);
 398                 if (chip->options & NAND_BUSWIDTH_16)
 399                         prv->column = 1;
 400                 else
 401                         prv->column = 0;
 402                 break;
 403         }
 404 }
 405
 406 /* Copy data from/to NFC spare buffers. */
 407 static void mpc5121_nfc_copy_spare(struct mtd_info *mtd, uint offset,
 408                                                 u8 *buffer, uint size, int wr)
 409 {
 410         struct nand_chip *nand = mtd->priv;
 411         struct mpc5121_nfc_prv *prv = nand->priv;
 412         uint o, s, sbsize, blksize;
 413
 414         /*
 415          * NAND spare area is available through NFC spare buffers.
 416          * The NFC divides spare area into (page_size / 512) chunks.
 417          * Each chunk is placed into separate spare memory area, using
 418          * first (spare_size / num_of_chunks) bytes of the buffer.
 419          *
 420          * For NAND device in which the spare area is not divided fully
 421          * by the number of chunks, number of used bytes in each spare
 422          * buffer is rounded down to the nearest even number of bytes,
 423          * and all remaining bytes are added to the last used spare area.
 424          *
 425          * For more information read section 26.6.10 of MPC5121e
 426          * Microcontroller Reference Manual, Rev. 3.
 427          */
 428
 429         /* Calculate number of valid bytes in each spare buffer */
 430         sbsize = (mtd->oobsize / (mtd->writesize / 512)) & ~1;
 431
 432         while (size) {
 433                 /* Calculate spare buffer number */
 434                 s = offset / sbsize;
 435                 if (s > NFC_SPARE_BUFFERS - 1)
 436                         s = NFC_SPARE_BUFFERS - 1;
 437
 438                 /*
 439                  * Calculate offset to requested data block in selected spare
 440                  * buffer and its size.
 441                  */
 442                 o = offset - (s * sbsize);
 443                 blksize = min(sbsize - o, size);
 444
 445                 if (wr)
 446                         memcpy_toio(prv->regs + NFC_SPARE_AREA(s) + o,
 447                                                         buffer, blksize);
 448                 else
 449                         memcpy_fromio(buffer,
 450                                 prv->regs + NFC_SPARE_AREA(s) + o, blksize);
 451
 452                 buffer += blksize;
 453                 offset += blksize;
 454                 size -= blksize;
 455         };
 456 }
 457
 458 /* Copy data from/to NFC main and spare buffers */
 459 static void mpc5121_nfc_buf_copy(struct mtd_info *mtd, u_char *buf, int len,
 460                                                                         int wr)
 461 {
 462         struct nand_chip *chip = mtd->priv;
 463         struct mpc5121_nfc_prv *prv = chip->priv;
 464         uint c = prv->column;
 465         uint l;
 466
 467         /* Handle spare area access */
 468         if (prv->spareonly || c >= mtd->writesize) {
 469                 /* Calculate offset from beginning of spare area */
 470                 if (c >= mtd->writesize)
 471                         c -= mtd->writesize;
 472
 473                 prv->column += len;
 474                 mpc5121_nfc_copy_spare(mtd, c, buf, len, wr);
 475                 return;
 476         }
 477
 478         /*
 479          * Handle main area access - limit copy length to prevent
 480          * crossing main/spare boundary.
 481          */
 482         l = min((uint)len, mtd->writesize - c);
 483         prv->column += l;
 484
 485         if (wr)
 486                 memcpy_toio(prv->regs + NFC_MAIN_AREA(0) + c, buf, l);
 487         else
 488                 memcpy_fromio(buf, prv->regs + NFC_MAIN_AREA(0) + c, l);
 489
 490         /* Handle crossing main/spare boundary */
 491         if (l != len) {
 492                 buf += l;
 493                 len -= l;
 494                 mpc5121_nfc_buf_copy(mtd, buf, len, wr);
 495         }
 496 }
 497
 498 /* Read data from NFC buffers */
 499 static void mpc5121_nfc_read_buf(struct mtd_info *mtd, u_char *buf, int len)
 500 {
 501         mpc5121_nfc_buf_copy(mtd, buf, len, 0);
 502 }
 503
 504 /* Write data to NFC buffers */
 505 static void mpc5121_nfc_write_buf(struct mtd_info *mtd,
 506                                                 const u_char *buf, int len)
 507 {
 508         mpc5121_nfc_buf_copy(mtd, (u_char *)buf, len, 1);
 509 }
 510
 511 /* Read byte from NFC buffers */
 512 static u8 mpc5121_nfc_read_byte(struct mtd_info *mtd)
 513 {
 514         u8 tmp;
 515
 516         mpc5121_nfc_read_buf(mtd, &tmp, sizeof(tmp));
 517
 518         return tmp;
 519 }
 520
 521 /* Read word from NFC buffers */
 522 static u16 mpc5121_nfc_read_word(struct mtd_info *mtd)
 523 {
 524         u16 tmp;
 525
 526         mpc5121_nfc_read_buf(mtd, (u_char *)&tmp, sizeof(tmp));
 527
 528         return tmp;
 529 }
 530
 531 /*
 532  * Read NFC configuration from Reset Config Word
 533  *
 534  * NFC is configured during reset in basis of information stored
 535  * in Reset Config Word. There is no other way to set NAND block
 536  * size, spare size and bus width.
 537  */
 538 static int mpc5121_nfc_read_hw_config(struct mtd_info *mtd)
 539 {
 540         struct nand_chip *chip = mtd->priv;
 541         struct mpc5121_nfc_prv *prv = chip->priv;
 542         struct mpc512x_reset_module *rm;
 543         struct device_node *rmnode;
 544         uint rcw_pagesize = 0;
 545         uint rcw_sparesize = 0;
 546         uint rcw_width;
 547         uint rcwh;
 548         uint romloc, ps;
 549         int ret = 0;
 550
 551         rmnode = of_find_compatible_node(NULL, NULL, "fsl,mpc5121-reset");
 552         if (!rmnode) {
 553                 dev_err(prv->dev, "Missing 'fsl,mpc5121-reset' "
 554                                         "node in device tree!\n");
 555                 return -ENODEV;
 556         }
 557
 558         rm = of_iomap(rmnode, 0);
 559         if (!rm) {
 560                 dev_err(prv->dev, "Error mapping reset module node!\n");
 561                 ret = -EBUSY;
 562                 goto out;
 563         }
 564
 565         rcwh = in_be32(&rm->rcwhr);
 566
 567         /* Bit 6: NFC bus width */
 568         rcw_width = ((rcwh >> 6) & 0x1) ? 2 : 1;
 569
 570         /* Bit 7: NFC Page/Spare size */
 571         ps = (rcwh >> 7) & 0x1;
 572
 573         /* Bits [22:21]: ROM Location */
 574         romloc = (rcwh >> 21) & 0x3;
 575
 576         /* Decode RCW bits */
 577         switch ((ps << 2) | romloc) {
 578         case 0x00:
 579         case 0x01:
 580                 rcw_pagesize = 512;
 581                 rcw_sparesize = 16;
 582                 break;
 583         case 0x02:
 584         case 0x03:
 585                 rcw_pagesize = 4096;
 586                 rcw_sparesize = 128;
 587                 break;
 588         case 0x04:
 589         case 0x05:
 590                 rcw_pagesize = 2048;
 591                 rcw_sparesize = 64;
 592                 break;
 593         case 0x06:
 594         case 0x07:
 595                 rcw_pagesize = 4096;
 596                 rcw_sparesize = 218;
 597                 break;
 598         }
 599
 600         mtd->writesize = rcw_pagesize;
 601         mtd->oobsize = rcw_sparesize;
 602         if (rcw_width == 2)
 603                 chip->options |= NAND_BUSWIDTH_16;
 604
 605         dev_notice(prv->dev, "Configured for "
 606                                 "%u-bit NAND, page size %u "
 607                                 "with %u spare.\n",
 608                                 rcw_width * 8, rcw_pagesize,
 609                                 rcw_sparesize);
 610         iounmap(rm);
 611 out:
 612         of_node_put(rmnode);
 613         return ret;
 614 }
 615
 616 /* Free driver resources */
 617 static void mpc5121_nfc_free(struct device *dev, struct mtd_info *mtd)
 618 {
 619         struct nand_chip *chip = mtd->priv;
 620         struct mpc5121_nfc_prv *prv = chip->priv;
 621
 622         if (prv->clk)
 623                 clk_disable_unprepare(prv->clk);
 624
 625         if (prv->csreg)
 626                 iounmap(prv->csreg);
 627 }
 628
 629 static int mpc5121_nfc_probe(struct platform_device *op)
 630 {
 631         struct device_node *rootnode, *dn = op->dev.of_node;
 632         struct clk *clk;
 633         struct device *dev = &op->dev;
 634         struct mpc5121_nfc_prv *prv;
 635         struct resource res;
 636         struct mtd_info *mtd;
 637         struct nand_chip *chip;
 638         unsigned long regs_paddr, regs_size;
 639         const __be32 *chips_no;
 640         int resettime = 0;
 641         int retval = 0;
 642         int rev, len;
 643         struct mtd_part_parser_data ppdata;
 644
 645         /*
 646          * Check SoC revision. This driver supports only NFC
 647          * in MPC5121 revision 2 and MPC5123 revision 3.
 648          */
 649         rev = (mfspr(SPRN_SVR) >> 4) & 0xF;
 650         if ((rev != 2) && (rev != 3)) {
 651                 dev_err(dev, "SoC revision %u is not supported!\n", rev);
 652                 return -ENXIO;
 653         }
 654
 655         prv = devm_kzalloc(dev, sizeof(*prv), GFP_KERNEL);
 656         if (!prv)
 657                 return -ENOMEM;
 658
 659         mtd = &prv->mtd;
 660         chip = &prv->chip;
 661
 662         mtd->priv = chip;
 663         chip->priv = prv;
 664         prv->dev = dev;
 665
 666         /* Read NFC configuration from Reset Config Word */
 667         retval = mpc5121_nfc_read_hw_config(mtd);
 668         if (retval) {
 669                 dev_err(dev, "Unable to read NFC config!\n");
 670                 return retval;
 671         }
 672
 673         prv->irq = irq_of_parse_and_map(dn, 0);
 674         if (prv->irq == NO_IRQ) {
 675                 dev_err(dev, "Error mapping IRQ!\n");
 676                 return -EINVAL;
 677         }
 678
 679         retval = of_address_to_resource(dn, 0, &res);
 680         if (retval) {
 681                 dev_err(dev, "Error parsing memory region!\n");
 682                 return retval;
 683         }
 684
 685         chips_no = of_get_property(dn, "chips", &len);
 686         if (!chips_no || len != sizeof(*chips_no)) {
 687                 dev_err(dev, "Invalid/missing 'chips' property!\n");
 688                 return -EINVAL;
 689         }
 690
 691         regs_paddr = res.start;
 692         regs_size = resource_size(&res);
 693
 694         if (!devm_request_mem_region(dev, regs_paddr, regs_size, DRV_NAME)) {
 695                 dev_err(dev, "Error requesting memory region!\n");
 696                 return -EBUSY;
 697         }
 698
 699         prv->regs = devm_ioremap(dev, regs_paddr, regs_size);
 700         if (!prv->regs) {
 701                 dev_err(dev, "Error mapping memory region!\n");
 702                 return -ENOMEM;
 703         }
 704
 705         mtd->name = "MPC5121 NAND";
 706         ppdata.of_node = dn;
 707         chip->dev_ready = mpc5121_nfc_dev_ready;
 708         chip->cmdfunc = mpc5121_nfc_command;
 709         chip->read_byte = mpc5121_nfc_read_byte;
 710         chip->read_word = mpc5121_nfc_read_word;
 711         chip->read_buf = mpc5121_nfc_read_buf;
 712         chip->write_buf = mpc5121_nfc_write_buf;
 713         chip->select_chip = mpc5121_nfc_select_chip;
 714         chip->bbt_options = NAND_BBT_USE_FLASH;
 715         chip->ecc.mode = NAND_ECC_SOFT;
 716
 717         /* Support external chip-select logic on ADS5121 board */
 718         rootnode = of_find_node_by_path("/");
 719         if (of_device_is_compatible(rootnode, "fsl,mpc5121ads")) {
 720                 retval = ads5121_chipselect_init(mtd);
 721                 if (retval) {
 722                         dev_err(dev, "Chipselect init error!\n");
 723                         of_node_put(rootnode);
 724                         return retval;
 725                 }
 726
 727                 chip->select_chip = ads5121_select_chip;
 728         }
 729         of_node_put(rootnode);
 730
 731         /* Enable NFC clock */
 732         clk = devm_clk_get(dev, "ipg");
 733         if (IS_ERR(clk)) {
 734                 dev_err(dev, "Unable to acquire NFC clock!\n");
 735                 retval = PTR_ERR(clk);
 736                 goto error;
 737         }
 738         retval = clk_prepare_enable(clk);
 739         if (retval) {
 740                 dev_err(dev, "Unable to enable NFC clock!\n");
 741                 goto error;
 742         }
 743         prv->clk = clk;
 744
 745         /* Reset NAND Flash controller */
 746         nfc_set(mtd, NFC_CONFIG1, NFC_RESET);
 747         while (nfc_read(mtd, NFC_CONFIG1) & NFC_RESET) {
 748                 if (resettime++ >= NFC_RESET_TIMEOUT) {
 749                         dev_err(dev, "Timeout while resetting NFC!\n");
 750                         retval = -EINVAL;
 751                         goto error;
 752                 }
 753
 754                 udelay(1);
 755         }
 756
 757         /* Enable write to NFC memory */
 758         nfc_write(mtd, NFC_CONFIG, NFC_BLS_UNLOCKED);
 759
 760         /* Enable write to all NAND pages */
 761         nfc_write(mtd, NFC_UNLOCKSTART_BLK0, 0x0000);
 762         nfc_write(mtd, NFC_UNLOCKEND_BLK0, 0xFFFF);
 763         nfc_write(mtd, NFC_WRPROT, NFC_WPC_UNLOCK);
 764
 765         /*
 766          * Setup NFC:
 767          *      - Big Endian transfers,
 768          *      - Interrupt after full page read/write.
 769          */
 770         nfc_write(mtd, NFC_CONFIG1, NFC_BIG_ENDIAN | NFC_INT_MASK |
 771                                                         NFC_FULL_PAGE_INT);
 772
 773         /* Set spare area size */
 774         nfc_write(mtd, NFC_SPAS, mtd->oobsize >> 1);
 775
 776         init_waitqueue_head(&prv->irq_waitq);
 777         retval = devm_request_irq(dev, prv->irq, &mpc5121_nfc_irq, 0, DRV_NAME,
 778                                                                         mtd);
 779         if (retval) {
 780                 dev_err(dev, "Error requesting IRQ!\n");
 781                 goto error;
 782         }
 783
 784         /* Detect NAND chips */
 785         if (nand_scan(mtd, be32_to_cpup(chips_no))) {
 786                 dev_err(dev, "NAND Flash not found !\n");
 787                 retval = -ENXIO;
 788                 goto error;
 789         }
 790
 791         /* Set erase block size */
 792         switch (mtd->erasesize / mtd->writesize) {
 793         case 32:
 794                 nfc_set(mtd, NFC_CONFIG1, NFC_PPB_32);
 795                 break;
 796
 797         case 64:
 798                 nfc_set(mtd, NFC_CONFIG1, NFC_PPB_64);
 799                 break;
 800
 801         case 128:
 802                 nfc_set(mtd, NFC_CONFIG1, NFC_PPB_128);
 803                 break;
 804
 805         case 256:
 806                 nfc_set(mtd, NFC_CONFIG1, NFC_PPB_256);
 807                 break;
 808
 809         default:
 810                 dev_err(dev, "Unsupported NAND flash!\n");
 811                 retval = -ENXIO;
 812                 goto error;
 813         }
 814
 815         dev_set_drvdata(dev, mtd);
 816
 817         /* Register device in MTD */
 818         retval = mtd_device_parse_register(mtd, NULL, &ppdata, NULL, 0);
 819         if (retval) {
 820                 dev_err(dev, "Error adding MTD device!\n");
 821                 goto error;
 822         }
 823
 824         return 0;
 825 error:
 826         mpc5121_nfc_free(dev, mtd);
 827         return retval;
 828 }
 829
 830 static int mpc5121_nfc_remove(struct platform_device *op)
 831 {
 832         struct device *dev = &op->dev;
 833         struct mtd_info *mtd = dev_get_drvdata(dev);
 834
 835         nand_release(mtd);
 836         mpc5121_nfc_free(dev, mtd);
 837
 838         return 0;
 839 }
 840
 841 static struct of_device_id mpc5121_nfc_match[] = {
 842         { .compatible = "fsl,mpc5121-nfc", },
 843         {},
 844 };
 845
 846 static struct platform_driver mpc5121_nfc_driver = {
 847         .probe          = mpc5121_nfc_probe,
 848         .remove         = mpc5121_nfc_remove,
 849         .driver         = {
 850                 .name = DRV_NAME,
 851                 .owner = THIS_MODULE,
 852                 .of_match_table = mpc5121_nfc_match,
 853         },
 854 };
 855
 856 module_platform_driver(mpc5121_nfc_driver);
 857
 858 MODULE_AUTHOR("Freescale Semiconductor, Inc.");
 859 MODULE_DESCRIPTION("MPC5121 NAND MTD driver");
 860 MODULE_LICENSE("GPL");