drivers/net/ethernet/broadcom/cnic_if.h

   1 /* cnic_if.h: Broadcom CNIC core network driver.
   2  *
   3  * Copyright (c) 2006-2013 Broadcom Corporation
   4  *
   5  * This program is free software; you can redistribute it and/or modify
   6  * it under the terms of the GNU General Public License as published by
   7  * the Free Software Foundation.
   8  *
   9  */
  10
  11
  12 #ifndef CNIC_IF_H
  13 #define CNIC_IF_H
  14
  15 #include "bnx2x/bnx2x_mfw_req.h"
  16
  17 #define CNIC_MODULE_VERSION     "2.5.19"
  18 #define CNIC_MODULE_RELDATE     "December 19, 2013"
  19
  20 #define CNIC_ULP_RDMA           0
  21 #define CNIC_ULP_ISCSI          1
  22 #define CNIC_ULP_FCOE           2
  23 #define CNIC_ULP_L4             3
  24 #define MAX_CNIC_ULP_TYPE_EXT   3
  25 #define MAX_CNIC_ULP_TYPE       4
  26
  27 struct kwqe {
  28         u32 kwqe_op_flag;
  29
  30 #define KWQE_QID_SHIFT          8
  31 #define KWQE_OPCODE_MASK        0x00ff0000
  32 #define KWQE_OPCODE_SHIFT       16
  33 #define KWQE_OPCODE(x)          ((x & KWQE_OPCODE_MASK) >> KWQE_OPCODE_SHIFT)
  34 #define KWQE_LAYER_MASK                 0x70000000
  35 #define KWQE_LAYER_SHIFT                28
  36 #define KWQE_FLAGS_LAYER_MASK_L2        (2<<28)
  37 #define KWQE_FLAGS_LAYER_MASK_L3        (3<<28)
  38 #define KWQE_FLAGS_LAYER_MASK_L4        (4<<28)
  39 #define KWQE_FLAGS_LAYER_MASK_L5_RDMA   (5<<28)
  40 #define KWQE_FLAGS_LAYER_MASK_L5_ISCSI  (6<<28)
  41 #define KWQE_FLAGS_LAYER_MASK_L5_FCOE   (7<<28)
  42
  43         u32 kwqe_info0;
  44         u32 kwqe_info1;
  45         u32 kwqe_info2;
  46         u32 kwqe_info3;
  47         u32 kwqe_info4;
  48         u32 kwqe_info5;
  49         u32 kwqe_info6;
  50 };
  51
  52 struct kwqe_16 {
  53         u32 kwqe_info0;
  54         u32 kwqe_info1;
  55         u32 kwqe_info2;
  56         u32 kwqe_info3;
  57 };
  58
  59 struct kcqe {
  60         u32 kcqe_info0;
  61         u32 kcqe_info1;
  62         u32 kcqe_info2;
  63         u32 kcqe_info3;
  64         u32 kcqe_info4;
  65         u32 kcqe_info5;
  66         u32 kcqe_info6;
  67         u32 kcqe_op_flag;
  68                 #define KCQE_RAMROD_COMPLETION          (0x1<<27) /* Everest */
  69                 #define KCQE_FLAGS_LAYER_MASK           (0x7<<28)
  70                 #define KCQE_FLAGS_LAYER_MASK_MISC      (0<<28)
  71                 #define KCQE_FLAGS_LAYER_MASK_L2        (2<<28)
  72                 #define KCQE_FLAGS_LAYER_MASK_L3        (3<<28)
  73                 #define KCQE_FLAGS_LAYER_MASK_L4        (4<<28)
  74                 #define KCQE_FLAGS_LAYER_MASK_L5_RDMA   (5<<28)
  75                 #define KCQE_FLAGS_LAYER_MASK_L5_ISCSI  (6<<28)
  76                 #define KCQE_FLAGS_LAYER_MASK_L5_FCOE   (7<<28)
  77                 #define KCQE_FLAGS_NEXT                 (1<<31)
  78                 #define KCQE_FLAGS_OPCODE_MASK          (0xff<<16)
  79                 #define KCQE_FLAGS_OPCODE_SHIFT         (16)
  80                 #define KCQE_OPCODE(op)                 \
  81                 (((op) & KCQE_FLAGS_OPCODE_MASK) >> KCQE_FLAGS_OPCODE_SHIFT)
  82 };
  83
  84 #define MAX_CNIC_CTL_DATA       64
  85 #define MAX_DRV_CTL_DATA        64
  86
  87 #define CNIC_CTL_STOP_CMD               1
  88 #define CNIC_CTL_START_CMD              2
  89 #define CNIC_CTL_COMPLETION_CMD         3
  90 #define CNIC_CTL_STOP_ISCSI_CMD         4
  91 #define CNIC_CTL_FCOE_STATS_GET_CMD     5
  92 #define CNIC_CTL_ISCSI_STATS_GET_CMD    6
  93
  94 #define DRV_CTL_IO_WR_CMD               0x101
  95 #define DRV_CTL_IO_RD_CMD               0x102
  96 #define DRV_CTL_CTX_WR_CMD              0x103
  97 #define DRV_CTL_CTXTBL_WR_CMD           0x104
  98 #define DRV_CTL_RET_L5_SPQ_CREDIT_CMD   0x105
  99 #define DRV_CTL_START_L2_CMD            0x106
 100 #define DRV_CTL_STOP_L2_CMD             0x107
 101 #define DRV_CTL_RET_L2_SPQ_CREDIT_CMD   0x10c
 102 #define DRV_CTL_ISCSI_STOPPED_CMD       0x10d
 103 #define DRV_CTL_ULP_REGISTER_CMD        0x10e
 104 #define DRV_CTL_ULP_UNREGISTER_CMD      0x10f
 105
 106 struct cnic_ctl_completion {
 107         u32     cid;
 108         u8      opcode;
 109         u8      error;
 110 };
 111
 112 struct cnic_ctl_info {
 113         int     cmd;
 114         union {
 115                 struct cnic_ctl_completion comp;
 116                 char bytes[MAX_CNIC_CTL_DATA];
 117         } data;
 118 };
 119
 120 struct drv_ctl_spq_credit {
 121         u32     credit_count;
 122 };
 123
 124 struct drv_ctl_io {
 125         u32             cid_addr;
 126         u32             offset;
 127         u32             data;
 128         dma_addr_t      dma_addr;
 129 };
 130
 131 struct drv_ctl_l2_ring {
 132         u32             client_id;
 133         u32             cid;
 134 };
 135
 136 struct drv_ctl_register_data {
 137         int ulp_type;
 138         struct fcoe_capabilities fcoe_features;
 139 };
 140
 141 struct drv_ctl_info {
 142         int     cmd;
 143         union {
 144                 struct drv_ctl_spq_credit credit;
 145                 struct drv_ctl_io io;
 146                 struct drv_ctl_l2_ring ring;
 147                 int ulp_type;
 148                 struct drv_ctl_register_data register_data;
 149                 char bytes[MAX_DRV_CTL_DATA];
 150         } data;
 151 };
 152
 153 struct cnic_ops {
 154         struct module   *cnic_owner;
 155         /* Calls to these functions are protected by RCU.  When
 156          * unregistering, we wait for any calls to complete before
 157          * continuing.
 158          */
 159         int             (*cnic_handler)(void *, void *);
 160         int             (*cnic_ctl)(void *, struct cnic_ctl_info *);
 161 };
 162
 163 #define MAX_CNIC_VEC    8
 164
 165 struct cnic_irq {
 166         unsigned int    vector;
 167         void            *status_blk;
 168         u32             status_blk_num;
 169         u32             status_blk_num2;
 170         u32             irq_flags;
 171 #define CNIC_IRQ_FL_MSIX                0x00000001
 172 };
 173
 174 struct cnic_eth_dev {
 175         struct module   *drv_owner;
 176         u32             drv_state;
 177 #define CNIC_DRV_STATE_REGD             0x00000001
 178 #define CNIC_DRV_STATE_USING_MSIX       0x00000002
 179 #define CNIC_DRV_STATE_NO_ISCSI_OOO     0x00000004
 180 #define CNIC_DRV_STATE_NO_ISCSI         0x00000008
 181 #define CNIC_DRV_STATE_NO_FCOE          0x00000010
 182 #define CNIC_DRV_STATE_HANDLES_IRQ      0x00000020
 183         u32             chip_id;
 184         u32             max_kwqe_pending;
 185         struct pci_dev  *pdev;
 186         void __iomem    *io_base;
 187         void __iomem    *io_base2;
 188         const void      *iro_arr;
 189
 190         u32             ctx_tbl_offset;
 191         u32             ctx_tbl_len;
 192         int             ctx_blk_size;
 193         u32             starting_cid;
 194         u32             max_iscsi_conn;
 195         u32             max_fcoe_conn;
 196         u32             max_rdma_conn;
 197         u32             fcoe_init_cid;
 198         u32             max_fcoe_exchanges;
 199         u32             fcoe_wwn_port_name_hi;
 200         u32             fcoe_wwn_port_name_lo;
 201         u32             fcoe_wwn_node_name_hi;
 202         u32             fcoe_wwn_node_name_lo;
 203
 204         u16             iscsi_l2_client_id;
 205         u16             iscsi_l2_cid;
 206         u8              iscsi_mac[ETH_ALEN];
 207
 208         int             num_irq;
 209         struct cnic_irq irq_arr[MAX_CNIC_VEC];
 210         int             (*drv_register_cnic)(struct net_device *,
 211                                              struct cnic_ops *, void *);
 212         int             (*drv_unregister_cnic)(struct net_device *);
 213         int             (*drv_submit_kwqes_32)(struct net_device *,
 214                                                struct kwqe *[], u32);
 215         int             (*drv_submit_kwqes_16)(struct net_device *,
 216                                                struct kwqe_16 *[], u32);
 217         int             (*drv_ctl)(struct net_device *, struct drv_ctl_info *);
 218         unsigned long   reserved1[2];
 219         union drv_info_to_mcp   *addr_drv_info_to_mcp;
 220 };
 221
 222 struct cnic_sockaddr {
 223         union {
 224                 struct sockaddr_in      v4;
 225                 struct sockaddr_in6     v6;
 226         } local;
 227         union {
 228                 struct sockaddr_in      v4;
 229                 struct sockaddr_in6     v6;
 230         } remote;
 231 };
 232
 233 struct cnic_sock {
 234         struct cnic_dev *dev;
 235         void    *context;
 236         u32     src_ip[4];
 237         u32     dst_ip[4];
 238         u16     src_port;
 239         u16     dst_port;
 240         u16     vlan_id;
 241         unsigned char old_ha[ETH_ALEN];
 242         unsigned char ha[ETH_ALEN];
 243         u32     mtu;
 244         u32     cid;
 245         u32     l5_cid;
 246         u32     pg_cid;
 247         int     ulp_type;
 248
 249         u32     ka_timeout;
 250         u32     ka_interval;
 251         u8      ka_max_probe_count;
 252         u8      tos;
 253         u8      ttl;
 254         u8      snd_seq_scale;
 255         u32     rcv_buf;
 256         u32     snd_buf;
 257         u32     seed;
 258
 259         unsigned long   tcp_flags;
 260 #define SK_TCP_NO_DELAY_ACK     0x1
 261 #define SK_TCP_KEEP_ALIVE       0x2
 262 #define SK_TCP_NAGLE            0x4
 263 #define SK_TCP_TIMESTAMP        0x8
 264 #define SK_TCP_SACK             0x10
 265 #define SK_TCP_SEG_SCALING      0x20
 266         unsigned long   flags;
 267 #define SK_F_INUSE              0
 268 #define SK_F_OFFLD_COMPLETE     1
 269 #define SK_F_OFFLD_SCHED        2
 270 #define SK_F_PG_OFFLD_COMPLETE  3
 271 #define SK_F_CONNECT_START      4
 272 #define SK_F_IPV6               5
 273 #define SK_F_CLOSING            7
 274 #define SK_F_HW_ERR             8
 275
 276         atomic_t ref_count;
 277         u32 state;
 278         struct kwqe kwqe1;
 279         struct kwqe kwqe2;
 280         struct kwqe kwqe3;
 281 };
 282
 283 struct cnic_dev {
 284         struct net_device       *netdev;
 285         struct pci_dev          *pcidev;
 286         void __iomem            *regview;
 287         struct list_head        list;
 288
 289         int (*register_device)(struct cnic_dev *dev, int ulp_type,
 290                                void *ulp_ctx);
 291         int (*unregister_device)(struct cnic_dev *dev, int ulp_type);
 292         int (*submit_kwqes)(struct cnic_dev *dev, struct kwqe *wqes[],
 293                                 u32 num_wqes);
 294         int (*submit_kwqes_16)(struct cnic_dev *dev, struct kwqe_16 *wqes[],
 295                                 u32 num_wqes);
 296
 297         int (*cm_create)(struct cnic_dev *, int, u32, u32, struct cnic_sock **,
 298                          void *);
 299         int (*cm_destroy)(struct cnic_sock *);
 300         int (*cm_connect)(struct cnic_sock *, struct cnic_sockaddr *);
 301         int (*cm_abort)(struct cnic_sock *);
 302         int (*cm_close)(struct cnic_sock *);
 303         struct cnic_dev *(*cm_select_dev)(struct sockaddr_in *, int ulp_type);
 304         int (*iscsi_nl_msg_recv)(struct cnic_dev *dev, u32 msg_type,
 305                                  char *data, u16 data_size);
 306         unsigned long   flags;
 307 #define CNIC_F_CNIC_UP          1
 308 #define CNIC_F_BNX2_CLASS       3
 309 #define CNIC_F_BNX2X_CLASS      4
 310         atomic_t        ref_count;
 311         u8              mac_addr[ETH_ALEN];
 312
 313         int             max_iscsi_conn;
 314         int             max_fcoe_conn;
 315         int             max_rdma_conn;
 316
 317         int             max_fcoe_exchanges;
 318
 319         union drv_info_to_mcp   *stats_addr;
 320         struct fcoe_capabilities        *fcoe_cap;
 321
 322         void            *cnic_priv;
 323 };
 324
 325 #define CNIC_WR(dev, off, val)          writel(val, dev->regview + off)
 326 #define CNIC_WR16(dev, off, val)        writew(val, dev->regview + off)
 327 #define CNIC_WR8(dev, off, val)         writeb(val, dev->regview + off)
 328 #define CNIC_RD(dev, off)               readl(dev->regview + off)
 329 #define CNIC_RD16(dev, off)             readw(dev->regview + off)
 330
 331 struct cnic_ulp_ops {
 332         /* Calls to these functions are protected by RCU.  When
 333          * unregistering, we wait for any calls to complete before
 334          * continuing.
 335          */
 336
 337         void (*cnic_init)(struct cnic_dev *dev);
 338         void (*cnic_exit)(struct cnic_dev *dev);
 339         void (*cnic_start)(void *ulp_ctx);
 340         void (*cnic_stop)(void *ulp_ctx);
 341         void (*indicate_kcqes)(void *ulp_ctx, struct kcqe *cqes[],
 342                                 u32 num_cqes);
 343         void (*indicate_netevent)(void *ulp_ctx, unsigned long event, u16 vid);
 344         void (*cm_connect_complete)(struct cnic_sock *);
 345         void (*cm_close_complete)(struct cnic_sock *);
 346         void (*cm_abort_complete)(struct cnic_sock *);
 347         void (*cm_remote_close)(struct cnic_sock *);
 348         void (*cm_remote_abort)(struct cnic_sock *);
 349         int (*iscsi_nl_send_msg)(void *ulp_ctx, u32 msg_type,
 350                                   char *data, u16 data_size);
 351         int (*cnic_get_stats)(void *ulp_ctx);
 352         struct module *owner;
 353         atomic_t ref_count;
 354 };
 355
 356 int cnic_register_driver(int ulp_type, struct cnic_ulp_ops *ulp_ops);
 357
 358 int cnic_unregister_driver(int ulp_type);
 359
 360 #endif