2 * Ethernet driver for the WIZnet W5300 chip.
4 * Copyright (C) 2008-2009 WIZnet Co.,Ltd.
5 * Copyright (C) 2011 Taehun Kim <kth3321 <at> gmail.com>
6 * Copyright (C) 2012 Mike Sinkovsky <msink@permonline.ru>
8 * Licensed under the GPL-2 or later.
11 #include <linux/kernel.h>
12 #include <linux/module.h>
13 #include <linux/kconfig.h>
14 #include <linux/netdevice.h>
15 #include <linux/etherdevice.h>
16 #include <linux/platform_device.h>
17 #include <linux/platform_data/wiznet.h>
18 #include <linux/ethtool.h>
19 #include <linux/skbuff.h>
20 #include <linux/types.h>
21 #include <linux/errno.h>
22 #include <linux/delay.h>
23 #include <linux/slab.h>
24 #include <linux/spinlock.h>
26 #include <linux/ioport.h>
27 #include <linux/interrupt.h>
28 #include <linux/irq.h>
29 #include <linux/gpio.h>
31 #define DRV_NAME "w5300"
32 #define DRV_VERSION "2012-04-04"
34 MODULE_DESCRIPTION("WIZnet W5300 Ethernet driver v"DRV_VERSION
);
35 MODULE_AUTHOR("Mike Sinkovsky <msink@permonline.ru>");
36 MODULE_ALIAS("platform:"DRV_NAME
);
37 MODULE_LICENSE("GPL");
42 #define W5300_MR 0x0000 /* Mode Register */
43 #define MR_DBW (1 << 15) /* Data bus width */
44 #define MR_MPF (1 << 14) /* Mac layer pause frame */
45 #define MR_WDF(n) (((n)&7)<<11) /* Write data fetch time */
46 #define MR_RDH (1 << 10) /* Read data hold time */
47 #define MR_FS (1 << 8) /* FIFO swap */
48 #define MR_RST (1 << 7) /* S/W reset */
49 #define MR_PB (1 << 4) /* Ping block */
50 #define MR_DBS (1 << 2) /* Data bus swap */
51 #define MR_IND (1 << 0) /* Indirect mode */
52 #define W5300_IR 0x0002 /* Interrupt Register */
53 #define W5300_IMR 0x0004 /* Interrupt Mask Register */
54 #define IR_S0 0x0001 /* S0 interrupt */
55 #define W5300_SHARL 0x0008 /* Source MAC address (0123) */
56 #define W5300_SHARH 0x000c /* Source MAC address (45) */
57 #define W5300_TMSRL 0x0020 /* Transmit Memory Size (0123) */
58 #define W5300_TMSRH 0x0024 /* Transmit Memory Size (4567) */
59 #define W5300_RMSRL 0x0028 /* Receive Memory Size (0123) */
60 #define W5300_RMSRH 0x002c /* Receive Memory Size (4567) */
61 #define W5300_MTYPE 0x0030 /* Memory Type */
62 #define W5300_IDR 0x00fe /* Chip ID register */
63 #define IDR_W5300 0x5300 /* =0x5300 for WIZnet W5300 */
64 #define W5300_S0_MR 0x0200 /* S0 Mode Register */
65 #define S0_MR_CLOSED 0x0000 /* Close mode */
66 #define S0_MR_MACRAW 0x0004 /* MAC RAW mode (promiscous) */
67 #define S0_MR_MACRAW_MF 0x0044 /* MAC RAW mode (filtered) */
68 #define W5300_S0_CR 0x0202 /* S0 Command Register */
69 #define S0_CR_OPEN 0x0001 /* OPEN command */
70 #define S0_CR_CLOSE 0x0010 /* CLOSE command */
71 #define S0_CR_SEND 0x0020 /* SEND command */
72 #define S0_CR_RECV 0x0040 /* RECV command */
73 #define W5300_S0_IMR 0x0204 /* S0 Interrupt Mask Register */
74 #define W5300_S0_IR 0x0206 /* S0 Interrupt Register */
75 #define S0_IR_RECV 0x0004 /* Receive interrupt */
76 #define S0_IR_SENDOK 0x0010 /* Send OK interrupt */
77 #define W5300_S0_SSR 0x0208 /* S0 Socket Status Register */
78 #define W5300_S0_TX_WRSR 0x0220 /* S0 TX Write Size Register */
79 #define W5300_S0_TX_FSR 0x0224 /* S0 TX Free Size Register */
80 #define W5300_S0_RX_RSR 0x0228 /* S0 Received data Size */
81 #define W5300_S0_TX_FIFO 0x022e /* S0 Transmit FIFO */
82 #define W5300_S0_RX_FIFO 0x0230 /* S0 Receive FIFO */
83 #define W5300_REGS_LEN 0x0400
86 * Device driver private data structure
92 u16 (*read
) (struct w5300_priv
*priv
, u16 addr
);
93 void (*write
)(struct w5300_priv
*priv
, u16 addr
, u16 data
);
98 struct napi_struct napi
;
99 struct net_device
*ndev
;
104 /************************************************************************
106 * Lowlevel I/O functions
108 ***********************************************************************/
111 * In direct address mode host system can directly access W5300 registers
112 * after mapping to Memory-Mapped I/O space.
114 * 0x400 bytes are required for memory space.
116 static inline u16
w5300_read_direct(struct w5300_priv
*priv
, u16 addr
)
118 return ioread16(priv
->base
+ (addr
<< CONFIG_WIZNET_BUS_SHIFT
));
121 static inline void w5300_write_direct(struct w5300_priv
*priv
,
124 iowrite16(data
, priv
->base
+ (addr
<< CONFIG_WIZNET_BUS_SHIFT
));
128 * In indirect address mode host system indirectly accesses registers by
129 * using Indirect Mode Address Register (IDM_AR) and Indirect Mode Data
130 * Register (IDM_DR), which are directly mapped to Memory-Mapped I/O space.
131 * Mode Register (MR) is directly accessible.
133 * Only 0x06 bytes are required for memory space.
135 #define W5300_IDM_AR 0x0002 /* Indirect Mode Address */
136 #define W5300_IDM_DR 0x0004 /* Indirect Mode Data */
138 static u16
w5300_read_indirect(struct w5300_priv
*priv
, u16 addr
)
143 spin_lock_irqsave(&priv
->reg_lock
, flags
);
144 w5300_write_direct(priv
, W5300_IDM_AR
, addr
);
146 data
= w5300_read_direct(priv
, W5300_IDM_DR
);
147 spin_unlock_irqrestore(&priv
->reg_lock
, flags
);
152 static void w5300_write_indirect(struct w5300_priv
*priv
, u16 addr
, u16 data
)
156 spin_lock_irqsave(&priv
->reg_lock
, flags
);
157 w5300_write_direct(priv
, W5300_IDM_AR
, addr
);
159 w5300_write_direct(priv
, W5300_IDM_DR
, data
);
161 spin_unlock_irqrestore(&priv
->reg_lock
, flags
);
164 #if defined(CONFIG_WIZNET_BUS_DIRECT)
165 #define w5300_read w5300_read_direct
166 #define w5300_write w5300_write_direct
168 #elif defined(CONFIG_WIZNET_BUS_INDIRECT)
169 #define w5300_read w5300_read_indirect
170 #define w5300_write w5300_write_indirect
172 #else /* CONFIG_WIZNET_BUS_ANY */
173 #define w5300_read priv->read
174 #define w5300_write priv->write
177 static u32
w5300_read32(struct w5300_priv
*priv
, u16 addr
)
180 data
= w5300_read(priv
, addr
) << 16;
181 data
|= w5300_read(priv
, addr
+ 2);
185 static void w5300_write32(struct w5300_priv
*priv
, u16 addr
, u32 data
)
187 w5300_write(priv
, addr
, data
>> 16);
188 w5300_write(priv
, addr
+ 2, data
);
191 static int w5300_command(struct w5300_priv
*priv
, u16 cmd
)
193 unsigned long timeout
= jiffies
+ msecs_to_jiffies(100);
195 w5300_write(priv
, W5300_S0_CR
, cmd
);
198 while (w5300_read(priv
, W5300_S0_CR
) != 0) {
199 if (time_after(jiffies
, timeout
))
207 static void w5300_read_frame(struct w5300_priv
*priv
, u8
*buf
, int len
)
212 for (i
= 0; i
< len
; i
+= 2) {
213 fifo
= w5300_read(priv
, W5300_S0_RX_FIFO
);
217 fifo
= w5300_read(priv
, W5300_S0_RX_FIFO
);
218 fifo
= w5300_read(priv
, W5300_S0_RX_FIFO
);
221 static void w5300_write_frame(struct w5300_priv
*priv
, u8
*buf
, int len
)
226 for (i
= 0; i
< len
; i
+= 2) {
229 w5300_write(priv
, W5300_S0_TX_FIFO
, fifo
);
231 w5300_write32(priv
, W5300_S0_TX_WRSR
, len
);
234 static void w5300_write_macaddr(struct w5300_priv
*priv
)
236 struct net_device
*ndev
= priv
->ndev
;
237 w5300_write32(priv
, W5300_SHARL
,
238 ndev
->dev_addr
[0] << 24 |
239 ndev
->dev_addr
[1] << 16 |
240 ndev
->dev_addr
[2] << 8 |
242 w5300_write(priv
, W5300_SHARH
,
243 ndev
->dev_addr
[4] << 8 |
248 static void w5300_hw_reset(struct w5300_priv
*priv
)
250 w5300_write_direct(priv
, W5300_MR
, MR_RST
);
253 w5300_write_direct(priv
, W5300_MR
, priv
->indirect
?
254 MR_WDF(7) | MR_PB
| MR_IND
:
257 w5300_write(priv
, W5300_IMR
, 0);
258 w5300_write_macaddr(priv
);
260 /* Configure 128K of internal memory
261 * as 64K RX fifo and 64K TX fifo
263 w5300_write32(priv
, W5300_RMSRL
, 64 << 24);
264 w5300_write32(priv
, W5300_RMSRH
, 0);
265 w5300_write32(priv
, W5300_TMSRL
, 64 << 24);
266 w5300_write32(priv
, W5300_TMSRH
, 0);
267 w5300_write(priv
, W5300_MTYPE
, 0x00ff);
271 static void w5300_hw_start(struct w5300_priv
*priv
)
273 w5300_write(priv
, W5300_S0_MR
, priv
->promisc
?
274 S0_MR_MACRAW
: S0_MR_MACRAW_MF
);
276 w5300_command(priv
, S0_CR_OPEN
);
277 w5300_write(priv
, W5300_S0_IMR
, S0_IR_RECV
| S0_IR_SENDOK
);
278 w5300_write(priv
, W5300_IMR
, IR_S0
);
282 static void w5300_hw_close(struct w5300_priv
*priv
)
284 w5300_write(priv
, W5300_IMR
, 0);
286 w5300_command(priv
, S0_CR_CLOSE
);
289 /***********************************************************************
291 * Device driver functions / callbacks
293 ***********************************************************************/
295 static void w5300_get_drvinfo(struct net_device
*ndev
,
296 struct ethtool_drvinfo
*info
)
298 strlcpy(info
->driver
, DRV_NAME
, sizeof(info
->driver
));
299 strlcpy(info
->version
, DRV_VERSION
, sizeof(info
->version
));
300 strlcpy(info
->bus_info
, dev_name(ndev
->dev
.parent
),
301 sizeof(info
->bus_info
));
304 static u32
w5300_get_link(struct net_device
*ndev
)
306 struct w5300_priv
*priv
= netdev_priv(ndev
);
308 if (gpio_is_valid(priv
->link_gpio
))
309 return !!gpio_get_value(priv
->link_gpio
);
314 static u32
w5300_get_msglevel(struct net_device
*ndev
)
316 struct w5300_priv
*priv
= netdev_priv(ndev
);
318 return priv
->msg_enable
;
321 static void w5300_set_msglevel(struct net_device
*ndev
, u32 value
)
323 struct w5300_priv
*priv
= netdev_priv(ndev
);
325 priv
->msg_enable
= value
;
328 static int w5300_get_regs_len(struct net_device
*ndev
)
330 return W5300_REGS_LEN
;
333 static void w5300_get_regs(struct net_device
*ndev
,
334 struct ethtool_regs
*regs
, void *_buf
)
336 struct w5300_priv
*priv
= netdev_priv(ndev
);
342 for (addr
= 0; addr
< W5300_REGS_LEN
; addr
+= 2) {
343 switch (addr
& 0x23f) {
344 case W5300_S0_TX_FIFO
: /* cannot read TX_FIFO */
345 case W5300_S0_RX_FIFO
: /* cannot read RX_FIFO */
349 data
= w5300_read(priv
, addr
);
357 static void w5300_tx_timeout(struct net_device
*ndev
)
359 struct w5300_priv
*priv
= netdev_priv(ndev
);
361 netif_stop_queue(ndev
);
362 w5300_hw_reset(priv
);
363 w5300_hw_start(priv
);
364 ndev
->stats
.tx_errors
++;
365 ndev
->trans_start
= jiffies
;
366 netif_wake_queue(ndev
);
369 static int w5300_start_tx(struct sk_buff
*skb
, struct net_device
*ndev
)
371 struct w5300_priv
*priv
= netdev_priv(ndev
);
373 netif_stop_queue(ndev
);
375 w5300_write_frame(priv
, skb
->data
, skb
->len
);
377 ndev
->stats
.tx_packets
++;
378 ndev
->stats
.tx_bytes
+= skb
->len
;
380 netif_dbg(priv
, tx_queued
, ndev
, "tx queued\n");
382 w5300_command(priv
, S0_CR_SEND
);
387 static int w5300_napi_poll(struct napi_struct
*napi
, int budget
)
389 struct w5300_priv
*priv
= container_of(napi
, struct w5300_priv
, napi
);
390 struct net_device
*ndev
= priv
->ndev
;
395 for (rx_count
= 0; rx_count
< budget
; rx_count
++) {
396 u32 rx_fifo_len
= w5300_read32(priv
, W5300_S0_RX_RSR
);
397 if (rx_fifo_len
== 0)
400 rx_len
= w5300_read(priv
, W5300_S0_RX_FIFO
);
402 skb
= netdev_alloc_skb_ip_align(ndev
, roundup(rx_len
, 2));
403 if (unlikely(!skb
)) {
405 for (i
= 0; i
< rx_fifo_len
; i
+= 2)
406 w5300_read(priv
, W5300_S0_RX_FIFO
);
407 ndev
->stats
.rx_dropped
++;
411 skb_put(skb
, rx_len
);
412 w5300_read_frame(priv
, skb
->data
, rx_len
);
413 skb
->protocol
= eth_type_trans(skb
, ndev
);
415 netif_receive_skb(skb
);
416 ndev
->stats
.rx_packets
++;
417 ndev
->stats
.rx_bytes
+= rx_len
;
420 if (rx_count
< budget
) {
421 w5300_write(priv
, W5300_IMR
, IR_S0
);
429 static irqreturn_t
w5300_interrupt(int irq
, void *ndev_instance
)
431 struct net_device
*ndev
= ndev_instance
;
432 struct w5300_priv
*priv
= netdev_priv(ndev
);
434 int ir
= w5300_read(priv
, W5300_S0_IR
);
437 w5300_write(priv
, W5300_S0_IR
, ir
);
440 if (ir
& S0_IR_SENDOK
) {
441 netif_dbg(priv
, tx_done
, ndev
, "tx done\n");
442 netif_wake_queue(ndev
);
445 if (ir
& S0_IR_RECV
) {
446 if (napi_schedule_prep(&priv
->napi
)) {
447 w5300_write(priv
, W5300_IMR
, 0);
449 __napi_schedule(&priv
->napi
);
456 static irqreturn_t
w5300_detect_link(int irq
, void *ndev_instance
)
458 struct net_device
*ndev
= ndev_instance
;
459 struct w5300_priv
*priv
= netdev_priv(ndev
);
461 if (netif_running(ndev
)) {
462 if (gpio_get_value(priv
->link_gpio
) != 0) {
463 netif_info(priv
, link
, ndev
, "link is up\n");
464 netif_carrier_on(ndev
);
466 netif_info(priv
, link
, ndev
, "link is down\n");
467 netif_carrier_off(ndev
);
474 static void w5300_set_rx_mode(struct net_device
*ndev
)
476 struct w5300_priv
*priv
= netdev_priv(ndev
);
477 bool set_promisc
= (ndev
->flags
& IFF_PROMISC
) != 0;
479 if (priv
->promisc
!= set_promisc
) {
480 priv
->promisc
= set_promisc
;
481 w5300_hw_start(priv
);
485 static int w5300_set_macaddr(struct net_device
*ndev
, void *addr
)
487 struct w5300_priv
*priv
= netdev_priv(ndev
);
488 struct sockaddr
*sock_addr
= addr
;
490 if (!is_valid_ether_addr(sock_addr
->sa_data
))
491 return -EADDRNOTAVAIL
;
492 memcpy(ndev
->dev_addr
, sock_addr
->sa_data
, ETH_ALEN
);
493 w5300_write_macaddr(priv
);
497 static int w5300_open(struct net_device
*ndev
)
499 struct w5300_priv
*priv
= netdev_priv(ndev
);
501 netif_info(priv
, ifup
, ndev
, "enabling\n");
502 w5300_hw_start(priv
);
503 napi_enable(&priv
->napi
);
504 netif_start_queue(ndev
);
505 if (!gpio_is_valid(priv
->link_gpio
) ||
506 gpio_get_value(priv
->link_gpio
) != 0)
507 netif_carrier_on(ndev
);
511 static int w5300_stop(struct net_device
*ndev
)
513 struct w5300_priv
*priv
= netdev_priv(ndev
);
515 netif_info(priv
, ifdown
, ndev
, "shutting down\n");
516 w5300_hw_close(priv
);
517 netif_carrier_off(ndev
);
518 netif_stop_queue(ndev
);
519 napi_disable(&priv
->napi
);
523 static const struct ethtool_ops w5300_ethtool_ops
= {
524 .get_drvinfo
= w5300_get_drvinfo
,
525 .get_msglevel
= w5300_get_msglevel
,
526 .set_msglevel
= w5300_set_msglevel
,
527 .get_link
= w5300_get_link
,
528 .get_regs_len
= w5300_get_regs_len
,
529 .get_regs
= w5300_get_regs
,
532 static const struct net_device_ops w5300_netdev_ops
= {
533 .ndo_open
= w5300_open
,
534 .ndo_stop
= w5300_stop
,
535 .ndo_start_xmit
= w5300_start_tx
,
536 .ndo_tx_timeout
= w5300_tx_timeout
,
537 .ndo_set_rx_mode
= w5300_set_rx_mode
,
538 .ndo_set_mac_address
= w5300_set_macaddr
,
539 .ndo_validate_addr
= eth_validate_addr
,
540 .ndo_change_mtu
= eth_change_mtu
,
543 static int w5300_hw_probe(struct platform_device
*pdev
)
545 struct wiznet_platform_data
*data
= dev_get_platdata(&pdev
->dev
);
546 struct net_device
*ndev
= platform_get_drvdata(pdev
);
547 struct w5300_priv
*priv
= netdev_priv(ndev
);
548 const char *name
= netdev_name(ndev
);
549 struct resource
*mem
;
554 if (data
&& is_valid_ether_addr(data
->mac_addr
)) {
555 memcpy(ndev
->dev_addr
, data
->mac_addr
, ETH_ALEN
);
557 eth_hw_addr_random(ndev
);
560 mem
= platform_get_resource(pdev
, IORESOURCE_MEM
, 0);
563 mem_size
= resource_size(mem
);
564 if (!devm_request_mem_region(&pdev
->dev
, mem
->start
, mem_size
, name
))
566 priv
->base
= devm_ioremap(&pdev
->dev
, mem
->start
, mem_size
);
570 spin_lock_init(&priv
->reg_lock
);
571 priv
->indirect
= mem_size
< W5300_BUS_DIRECT_SIZE
;
572 if (priv
->indirect
) {
573 priv
->read
= w5300_read_indirect
;
574 priv
->write
= w5300_write_indirect
;
576 priv
->read
= w5300_read_direct
;
577 priv
->write
= w5300_write_direct
;
580 w5300_hw_reset(priv
);
581 if (w5300_read(priv
, W5300_IDR
) != IDR_W5300
)
584 irq
= platform_get_irq(pdev
, 0);
587 ret
= request_irq(irq
, w5300_interrupt
,
588 IRQ_TYPE_LEVEL_LOW
, name
, ndev
);
593 priv
->link_gpio
= data
? data
->link_gpio
: -EINVAL
;
594 if (gpio_is_valid(priv
->link_gpio
)) {
595 char *link_name
= devm_kzalloc(&pdev
->dev
, 16, GFP_KERNEL
);
598 snprintf(link_name
, 16, "%s-link", name
);
599 priv
->link_irq
= gpio_to_irq(priv
->link_gpio
);
600 if (request_any_context_irq(priv
->link_irq
, w5300_detect_link
,
601 IRQF_TRIGGER_RISING
| IRQF_TRIGGER_FALLING
,
602 link_name
, priv
->ndev
) < 0)
603 priv
->link_gpio
= -EINVAL
;
606 netdev_info(ndev
, "at 0x%llx irq %d\n", (u64
)mem
->start
, irq
);
610 static int w5300_probe(struct platform_device
*pdev
)
612 struct w5300_priv
*priv
;
613 struct net_device
*ndev
;
616 ndev
= alloc_etherdev(sizeof(*priv
));
619 SET_NETDEV_DEV(ndev
, &pdev
->dev
);
620 platform_set_drvdata(pdev
, ndev
);
621 priv
= netdev_priv(ndev
);
625 ndev
->netdev_ops
= &w5300_netdev_ops
;
626 ndev
->ethtool_ops
= &w5300_ethtool_ops
;
627 ndev
->watchdog_timeo
= HZ
;
628 netif_napi_add(ndev
, &priv
->napi
, w5300_napi_poll
, 16);
630 /* This chip doesn't support VLAN packets with normal MTU,
631 * so disable VLAN for this device.
633 ndev
->features
|= NETIF_F_VLAN_CHALLENGED
;
635 err
= register_netdev(ndev
);
639 err
= w5300_hw_probe(pdev
);
646 unregister_netdev(ndev
);
652 static int w5300_remove(struct platform_device
*pdev
)
654 struct net_device
*ndev
= platform_get_drvdata(pdev
);
655 struct w5300_priv
*priv
= netdev_priv(ndev
);
657 w5300_hw_reset(priv
);
658 free_irq(priv
->irq
, ndev
);
659 if (gpio_is_valid(priv
->link_gpio
))
660 free_irq(priv
->link_irq
, ndev
);
662 unregister_netdev(ndev
);
667 #ifdef CONFIG_PM_SLEEP
668 static int w5300_suspend(struct device
*dev
)
670 struct platform_device
*pdev
= to_platform_device(dev
);
671 struct net_device
*ndev
= platform_get_drvdata(pdev
);
672 struct w5300_priv
*priv
= netdev_priv(ndev
);
674 if (netif_running(ndev
)) {
675 netif_carrier_off(ndev
);
676 netif_device_detach(ndev
);
678 w5300_hw_close(priv
);
683 static int w5300_resume(struct device
*dev
)
685 struct platform_device
*pdev
= to_platform_device(dev
);
686 struct net_device
*ndev
= platform_get_drvdata(pdev
);
687 struct w5300_priv
*priv
= netdev_priv(ndev
);
689 if (!netif_running(ndev
)) {
690 w5300_hw_reset(priv
);
691 w5300_hw_start(priv
);
693 netif_device_attach(ndev
);
694 if (!gpio_is_valid(priv
->link_gpio
) ||
695 gpio_get_value(priv
->link_gpio
) != 0)
696 netif_carrier_on(ndev
);
700 #endif /* CONFIG_PM_SLEEP */
702 static SIMPLE_DEV_PM_OPS(w5300_pm_ops
, w5300_suspend
, w5300_resume
);
704 static struct platform_driver w5300_driver
= {
707 .owner
= THIS_MODULE
,
710 .probe
= w5300_probe
,
711 .remove
= w5300_remove
,
714 module_platform_driver(w5300_driver
);