2 * Copyright (c) 2014 Realtek Semiconductor Corp. All rights reserved.
4 * This program is free software; you can redistribute it and/or
5 * modify it under the terms of the GNU General Public License
6 * version 2 as published by the Free Software Foundation.
10 #include <linux/signal.h>
11 #include <linux/slab.h>
12 #include <linux/module.h>
13 #include <linux/netdevice.h>
14 #include <linux/etherdevice.h>
15 #include <linux/mii.h>
16 #include <linux/ethtool.h>
17 #include <linux/usb.h>
18 #include <linux/crc32.h>
19 #include <linux/if_vlan.h>
20 #include <linux/uaccess.h>
21 #include <linux/list.h>
23 #include <linux/ipv6.h>
25 /* Version Information */
26 #define DRIVER_VERSION "v1.04.0 (2014/01/15)"
27 #define DRIVER_AUTHOR "Realtek linux nic maintainers <nic_swsd@realtek.com>"
28 #define DRIVER_DESC "Realtek RTL8152/RTL8153 Based USB Ethernet Adapters"
29 #define MODULENAME "r8152"
31 #define R8152_PHY_ID 32
33 #define PLA_IDR 0xc000
34 #define PLA_RCR 0xc010
35 #define PLA_RMS 0xc016
36 #define PLA_RXFIFO_CTRL0 0xc0a0
37 #define PLA_RXFIFO_CTRL1 0xc0a4
38 #define PLA_RXFIFO_CTRL2 0xc0a8
39 #define PLA_FMC 0xc0b4
40 #define PLA_CFG_WOL 0xc0b6
41 #define PLA_TEREDO_CFG 0xc0bc
42 #define PLA_MAR 0xcd00
43 #define PLA_BACKUP 0xd000
44 #define PAL_BDC_CR 0xd1a0
45 #define PLA_TEREDO_TIMER 0xd2cc
46 #define PLA_REALWOW_TIMER 0xd2e8
47 #define PLA_LEDSEL 0xdd90
48 #define PLA_LED_FEATURE 0xdd92
49 #define PLA_PHYAR 0xde00
50 #define PLA_BOOT_CTRL 0xe004
51 #define PLA_GPHY_INTR_IMR 0xe022
52 #define PLA_EEE_CR 0xe040
53 #define PLA_EEEP_CR 0xe080
54 #define PLA_MAC_PWR_CTRL 0xe0c0
55 #define PLA_MAC_PWR_CTRL2 0xe0ca
56 #define PLA_MAC_PWR_CTRL3 0xe0cc
57 #define PLA_MAC_PWR_CTRL4 0xe0ce
58 #define PLA_WDT6_CTRL 0xe428
59 #define PLA_TCR0 0xe610
60 #define PLA_TCR1 0xe612
61 #define PLA_TXFIFO_CTRL 0xe618
62 #define PLA_RSTTELLY 0xe800
64 #define PLA_CRWECR 0xe81c
65 #define PLA_CONFIG5 0xe822
66 #define PLA_PHY_PWR 0xe84c
67 #define PLA_OOB_CTRL 0xe84f
68 #define PLA_CPCR 0xe854
69 #define PLA_MISC_0 0xe858
70 #define PLA_MISC_1 0xe85a
71 #define PLA_OCP_GPHY_BASE 0xe86c
72 #define PLA_TELLYCNT 0xe890
73 #define PLA_SFF_STS_7 0xe8de
74 #define PLA_PHYSTATUS 0xe908
75 #define PLA_BP_BA 0xfc26
76 #define PLA_BP_0 0xfc28
77 #define PLA_BP_1 0xfc2a
78 #define PLA_BP_2 0xfc2c
79 #define PLA_BP_3 0xfc2e
80 #define PLA_BP_4 0xfc30
81 #define PLA_BP_5 0xfc32
82 #define PLA_BP_6 0xfc34
83 #define PLA_BP_7 0xfc36
84 #define PLA_BP_EN 0xfc38
86 #define USB_U2P3_CTRL 0xb460
87 #define USB_DEV_STAT 0xb808
88 #define USB_USB_CTRL 0xd406
89 #define USB_PHY_CTRL 0xd408
90 #define USB_TX_AGG 0xd40a
91 #define USB_RX_BUF_TH 0xd40c
92 #define USB_USB_TIMER 0xd428
93 #define USB_RX_EARLY_AGG 0xd42c
94 #define USB_PM_CTRL_STATUS 0xd432
95 #define USB_TX_DMA 0xd434
96 #define USB_TOLERANCE 0xd490
97 #define USB_LPM_CTRL 0xd41a
98 #define USB_UPS_CTRL 0xd800
99 #define USB_MISC_0 0xd81a
100 #define USB_POWER_CUT 0xd80a
101 #define USB_AFE_CTRL2 0xd824
102 #define USB_WDT11_CTRL 0xe43c
103 #define USB_BP_BA 0xfc26
104 #define USB_BP_0 0xfc28
105 #define USB_BP_1 0xfc2a
106 #define USB_BP_2 0xfc2c
107 #define USB_BP_3 0xfc2e
108 #define USB_BP_4 0xfc30
109 #define USB_BP_5 0xfc32
110 #define USB_BP_6 0xfc34
111 #define USB_BP_7 0xfc36
112 #define USB_BP_EN 0xfc38
115 #define OCP_ALDPS_CONFIG 0x2010
116 #define OCP_EEE_CONFIG1 0x2080
117 #define OCP_EEE_CONFIG2 0x2092
118 #define OCP_EEE_CONFIG3 0x2094
119 #define OCP_BASE_MII 0xa400
120 #define OCP_EEE_AR 0xa41a
121 #define OCP_EEE_DATA 0xa41c
122 #define OCP_PHY_STATUS 0xa420
123 #define OCP_POWER_CFG 0xa430
124 #define OCP_EEE_CFG 0xa432
125 #define OCP_SRAM_ADDR 0xa436
126 #define OCP_SRAM_DATA 0xa438
127 #define OCP_DOWN_SPEED 0xa442
128 #define OCP_EEE_CFG2 0xa5d0
129 #define OCP_ADC_CFG 0xbc06
132 #define SRAM_LPF_CFG 0x8012
133 #define SRAM_10M_AMP1 0x8080
134 #define SRAM_10M_AMP2 0x8082
135 #define SRAM_IMPEDANCE 0x8084
138 #define RCR_AAP 0x00000001
139 #define RCR_APM 0x00000002
140 #define RCR_AM 0x00000004
141 #define RCR_AB 0x00000008
142 #define RCR_ACPT_ALL (RCR_AAP | RCR_APM | RCR_AM | RCR_AB)
144 /* PLA_RXFIFO_CTRL0 */
145 #define RXFIFO_THR1_NORMAL 0x00080002
146 #define RXFIFO_THR1_OOB 0x01800003
148 /* PLA_RXFIFO_CTRL1 */
149 #define RXFIFO_THR2_FULL 0x00000060
150 #define RXFIFO_THR2_HIGH 0x00000038
151 #define RXFIFO_THR2_OOB 0x0000004a
152 #define RXFIFO_THR2_NORMAL 0x00a0
154 /* PLA_RXFIFO_CTRL2 */
155 #define RXFIFO_THR3_FULL 0x00000078
156 #define RXFIFO_THR3_HIGH 0x00000048
157 #define RXFIFO_THR3_OOB 0x0000005a
158 #define RXFIFO_THR3_NORMAL 0x0110
160 /* PLA_TXFIFO_CTRL */
161 #define TXFIFO_THR_NORMAL 0x00400008
162 #define TXFIFO_THR_NORMAL2 0x01000008
165 #define FMC_FCR_MCU_EN 0x0001
168 #define EEEP_CR_EEEP_TX 0x0002
171 #define WDT6_SET_MODE 0x0010
174 #define TCR0_TX_EMPTY 0x0800
175 #define TCR0_AUTO_FIFO 0x0080
178 #define VERSION_MASK 0x7cf0
186 #define CRWECR_NORAML 0x00
187 #define CRWECR_CONFIG 0xc0
190 #define NOW_IS_OOB 0x80
191 #define TXFIFO_EMPTY 0x20
192 #define RXFIFO_EMPTY 0x10
193 #define LINK_LIST_READY 0x02
194 #define DIS_MCU_CLROOB 0x01
195 #define FIFO_EMPTY (TXFIFO_EMPTY | RXFIFO_EMPTY)
198 #define RXDY_GATED_EN 0x0008
201 #define RE_INIT_LL 0x8000
202 #define MCU_BORW_EN 0x4000
205 #define CPCR_RX_VLAN 0x0040
208 #define MAGIC_EN 0x0001
211 #define TEREDO_SEL 0x8000
212 #define TEREDO_WAKE_MASK 0x7f00
213 #define TEREDO_RS_EVENT_MASK 0x00fe
214 #define OOB_TEREDO_EN 0x0001
217 #define ALDPS_PROXY_MODE 0x0001
220 #define LAN_WAKE_EN 0x0002
222 /* PLA_LED_FEATURE */
223 #define LED_MODE_MASK 0x0700
226 #define TX_10M_IDLE_EN 0x0080
227 #define PFM_PWM_SWITCH 0x0040
229 /* PLA_MAC_PWR_CTRL */
230 #define D3_CLK_GATED_EN 0x00004000
231 #define MCU_CLK_RATIO 0x07010f07
232 #define MCU_CLK_RATIO_MASK 0x0f0f0f0f
233 #define ALDPS_SPDWN_RATIO 0x0f87
235 /* PLA_MAC_PWR_CTRL2 */
236 #define EEE_SPDWN_RATIO 0x8007
238 /* PLA_MAC_PWR_CTRL3 */
239 #define PKT_AVAIL_SPDWN_EN 0x0100
240 #define SUSPEND_SPDWN_EN 0x0004
241 #define U1U2_SPDWN_EN 0x0002
242 #define L1_SPDWN_EN 0x0001
244 /* PLA_MAC_PWR_CTRL4 */
245 #define PWRSAVE_SPDWN_EN 0x1000
246 #define RXDV_SPDWN_EN 0x0800
247 #define TX10MIDLE_EN 0x0100
248 #define TP100_SPDWN_EN 0x0020
249 #define TP500_SPDWN_EN 0x0010
250 #define TP1000_SPDWN_EN 0x0008
251 #define EEE_SPDWN_EN 0x0001
253 /* PLA_GPHY_INTR_IMR */
254 #define GPHY_STS_MSK 0x0001
255 #define SPEED_DOWN_MSK 0x0002
256 #define SPDWN_RXDV_MSK 0x0004
257 #define SPDWN_LINKCHG_MSK 0x0008
260 #define PHYAR_FLAG 0x80000000
263 #define EEE_RX_EN 0x0001
264 #define EEE_TX_EN 0x0002
267 #define AUTOLOAD_DONE 0x0002
270 #define STAT_SPEED_MASK 0x0006
271 #define STAT_SPEED_HIGH 0x0000
272 #define STAT_SPEED_FULL 0x0001
275 #define TX_AGG_MAX_THRESHOLD 0x03
278 #define RX_THR_SUPPER 0x0c350180
279 #define RX_THR_HIGH 0x7a120180
280 #define RX_THR_SLOW 0xffff0180
283 #define TEST_MODE_DISABLE 0x00000001
284 #define TX_SIZE_ADJUST1 0x00000100
287 #define POWER_CUT 0x0100
289 /* USB_PM_CTRL_STATUS */
290 #define RESUME_INDICATE 0x0001
293 #define RX_AGG_DISABLE 0x0010
296 #define U2P3_ENABLE 0x0001
299 #define PWR_EN 0x0001
300 #define PHASE2_EN 0x0008
303 #define PCUT_STATUS 0x0001
305 /* USB_RX_EARLY_AGG */
306 #define EARLY_AGG_SUPPER 0x0e832981
307 #define EARLY_AGG_HIGH 0x0e837a12
308 #define EARLY_AGG_SLOW 0x0e83ffff
311 #define TIMER11_EN 0x0001
314 #define LPM_TIMER_MASK 0x0c
315 #define LPM_TIMER_500MS 0x04 /* 500 ms */
316 #define LPM_TIMER_500US 0x0c /* 500 us */
319 #define SEN_VAL_MASK 0xf800
320 #define SEN_VAL_NORMAL 0xa000
321 #define SEL_RXIDLE 0x0100
323 /* OCP_ALDPS_CONFIG */
324 #define ENPWRSAVE 0x8000
325 #define ENPDNPS 0x0200
326 #define LINKENA 0x0100
327 #define DIS_SDSAVE 0x0010
330 #define PHY_STAT_MASK 0x0007
331 #define PHY_STAT_LAN_ON 3
332 #define PHY_STAT_PWRDN 5
335 #define EEE_CLKDIV_EN 0x8000
336 #define EN_ALDPS 0x0004
337 #define EN_10M_PLLOFF 0x0001
339 /* OCP_EEE_CONFIG1 */
340 #define RG_TXLPI_MSK_HFDUP 0x8000
341 #define RG_MATCLR_EN 0x4000
342 #define EEE_10_CAP 0x2000
343 #define EEE_NWAY_EN 0x1000
344 #define TX_QUIET_EN 0x0200
345 #define RX_QUIET_EN 0x0100
346 #define SDRISETIME 0x0010 /* bit 4 ~ 6 */
347 #define RG_RXLPI_MSK_HFDUP 0x0008
348 #define SDFALLTIME 0x0007 /* bit 0 ~ 2 */
350 /* OCP_EEE_CONFIG2 */
351 #define RG_LPIHYS_NUM 0x7000 /* bit 12 ~ 15 */
352 #define RG_DACQUIET_EN 0x0400
353 #define RG_LDVQUIET_EN 0x0200
354 #define RG_CKRSEL 0x0020
355 #define RG_EEEPRG_EN 0x0010
357 /* OCP_EEE_CONFIG3 */
358 #define FST_SNR_EYE_R 0x1500 /* bit 7 ~ 15 */
359 #define RG_LFS_SEL 0x0060 /* bit 6 ~ 5 */
360 #define MSK_PH 0x0006 /* bit 0 ~ 3 */
363 /* bit[15:14] function */
364 #define FUN_ADDR 0x0000
365 #define FUN_DATA 0x4000
366 /* bit[4:0] device addr */
367 #define DEVICE_ADDR 0x0007
370 #define EEE_ADDR 0x003C
371 #define EEE_DATA 0x0002
374 #define CTAP_SHORT_EN 0x0040
375 #define EEE10_EN 0x0010
378 #define EN_10M_BGOFF 0x0080
381 #define MY1000_EEE 0x0004
382 #define MY100_EEE 0x0002
385 #define CKADSEL_L 0x0100
386 #define ADC_EN 0x0080
387 #define EN_EMI_L 0x0040
390 #define LPF_AUTO_TUNE 0x8000
393 #define GDAC_IB_UPALL 0x0008
396 #define AMP_DN 0x0200
399 #define RX_DRIVING_MASK 0x6000
401 enum rtl_register_content
{
409 #define RTL8152_MAX_TX 10
410 #define RTL8152_MAX_RX 10
416 #define INTR_LINK 0x0004
418 #define RTL8152_REQT_READ 0xc0
419 #define RTL8152_REQT_WRITE 0x40
420 #define RTL8152_REQ_GET_REGS 0x05
421 #define RTL8152_REQ_SET_REGS 0x05
423 #define BYTE_EN_DWORD 0xff
424 #define BYTE_EN_WORD 0x33
425 #define BYTE_EN_BYTE 0x11
426 #define BYTE_EN_SIX_BYTES 0x3f
427 #define BYTE_EN_START_MASK 0x0f
428 #define BYTE_EN_END_MASK 0xf0
430 #define RTL8152_RMS (VLAN_ETH_FRAME_LEN + VLAN_HLEN)
431 #define RTL8152_TX_TIMEOUT (HZ)
441 /* Define these values to match your device */
442 #define VENDOR_ID_REALTEK 0x0bda
443 #define PRODUCT_ID_RTL8152 0x8152
444 #define PRODUCT_ID_RTL8153 0x8153
446 #define VENDOR_ID_SAMSUNG 0x04e8
447 #define PRODUCT_ID_SAMSUNG 0xa101
449 #define MCU_TYPE_PLA 0x0100
450 #define MCU_TYPE_USB 0x0000
452 #define REALTEK_USB_DEVICE(vend, prod) \
453 USB_DEVICE_INTERFACE_CLASS(vend, prod, USB_CLASS_VENDOR_SPEC)
457 #define RX_LEN_MASK 0x7fff
467 #define TX_FS (1 << 31) /* First segment of a packet */
468 #define TX_LS (1 << 30) /* Final segment of a packet */
469 #define TX_LEN_MASK 0x3ffff
472 #define UDP_CS (1 << 31) /* Calculate UDP/IP checksum */
473 #define TCP_CS (1 << 30) /* Calculate TCP/IP checksum */
474 #define IPV4_CS (1 << 29) /* Calculate IPv4 checksum */
475 #define IPV6_CS (1 << 28) /* Calculate IPv6 checksum */
481 struct list_head list
;
483 struct r8152
*context
;
489 struct list_head list
;
491 struct r8152
*context
;
500 struct usb_device
*udev
;
501 struct tasklet_struct tl
;
502 struct usb_interface
*intf
;
503 struct net_device
*netdev
;
504 struct urb
*intr_urb
;
505 struct tx_agg tx_info
[RTL8152_MAX_TX
];
506 struct rx_agg rx_info
[RTL8152_MAX_RX
];
507 struct list_head rx_done
, tx_free
;
508 struct sk_buff_head tx_queue
;
509 spinlock_t rx_lock
, tx_lock
;
510 struct delayed_work schedule
;
511 struct mii_if_info mii
;
514 void (*init
)(struct r8152
*);
515 int (*enable
)(struct r8152
*);
516 void (*disable
)(struct r8152
*);
517 void (*down
)(struct r8152
*);
518 void (*unload
)(struct r8152
*);
540 /* Maximum number of multicast addresses to filter (vs. Rx-all-multicast).
541 * The RTL chips use a 64 element hash table based on the Ethernet CRC.
543 static const int multicast_filter_limit
= 32;
544 static unsigned int rx_buf_sz
= 16384;
547 int get_registers(struct r8152
*tp
, u16 value
, u16 index
, u16 size
, void *data
)
552 tmp
= kmalloc(size
, GFP_KERNEL
);
556 ret
= usb_control_msg(tp
->udev
, usb_rcvctrlpipe(tp
->udev
, 0),
557 RTL8152_REQ_GET_REGS
, RTL8152_REQT_READ
,
558 value
, index
, tmp
, size
, 500);
560 memcpy(data
, tmp
, size
);
567 int set_registers(struct r8152
*tp
, u16 value
, u16 index
, u16 size
, void *data
)
572 tmp
= kmalloc(size
, GFP_KERNEL
);
576 memcpy(tmp
, data
, size
);
578 ret
= usb_control_msg(tp
->udev
, usb_sndctrlpipe(tp
->udev
, 0),
579 RTL8152_REQ_SET_REGS
, RTL8152_REQT_WRITE
,
580 value
, index
, tmp
, size
, 500);
586 static int generic_ocp_read(struct r8152
*tp
, u16 index
, u16 size
,
587 void *data
, u16 type
)
592 if (test_bit(RTL8152_UNPLUG
, &tp
->flags
))
595 /* both size and indix must be 4 bytes align */
596 if ((size
& 3) || !size
|| (index
& 3) || !data
)
599 if ((u32
)index
+ (u32
)size
> 0xffff)
604 ret
= get_registers(tp
, index
, type
, limit
, data
);
612 ret
= get_registers(tp
, index
, type
, size
, data
);
626 static int generic_ocp_write(struct r8152
*tp
, u16 index
, u16 byteen
,
627 u16 size
, void *data
, u16 type
)
630 u16 byteen_start
, byteen_end
, byen
;
633 if (test_bit(RTL8152_UNPLUG
, &tp
->flags
))
636 /* both size and indix must be 4 bytes align */
637 if ((size
& 3) || !size
|| (index
& 3) || !data
)
640 if ((u32
)index
+ (u32
)size
> 0xffff)
643 byteen_start
= byteen
& BYTE_EN_START_MASK
;
644 byteen_end
= byteen
& BYTE_EN_END_MASK
;
646 byen
= byteen_start
| (byteen_start
<< 4);
647 ret
= set_registers(tp
, index
, type
| byen
, 4, data
);
660 ret
= set_registers(tp
, index
,
661 type
| BYTE_EN_DWORD
,
670 ret
= set_registers(tp
, index
,
671 type
| BYTE_EN_DWORD
,
683 byen
= byteen_end
| (byteen_end
>> 4);
684 ret
= set_registers(tp
, index
, type
| byen
, 4, data
);
694 int pla_ocp_read(struct r8152
*tp
, u16 index
, u16 size
, void *data
)
696 return generic_ocp_read(tp
, index
, size
, data
, MCU_TYPE_PLA
);
700 int pla_ocp_write(struct r8152
*tp
, u16 index
, u16 byteen
, u16 size
, void *data
)
702 return generic_ocp_write(tp
, index
, byteen
, size
, data
, MCU_TYPE_PLA
);
706 int usb_ocp_read(struct r8152
*tp
, u16 index
, u16 size
, void *data
)
708 return generic_ocp_read(tp
, index
, size
, data
, MCU_TYPE_USB
);
712 int usb_ocp_write(struct r8152
*tp
, u16 index
, u16 byteen
, u16 size
, void *data
)
714 return generic_ocp_write(tp
, index
, byteen
, size
, data
, MCU_TYPE_USB
);
717 static u32
ocp_read_dword(struct r8152
*tp
, u16 type
, u16 index
)
721 generic_ocp_read(tp
, index
, sizeof(data
), &data
, type
);
723 return __le32_to_cpu(data
);
726 static void ocp_write_dword(struct r8152
*tp
, u16 type
, u16 index
, u32 data
)
728 __le32 tmp
= __cpu_to_le32(data
);
730 generic_ocp_write(tp
, index
, BYTE_EN_DWORD
, sizeof(tmp
), &tmp
, type
);
733 static u16
ocp_read_word(struct r8152
*tp
, u16 type
, u16 index
)
737 u8 shift
= index
& 2;
741 generic_ocp_read(tp
, index
, sizeof(tmp
), &tmp
, type
);
743 data
= __le32_to_cpu(tmp
);
744 data
>>= (shift
* 8);
750 static void ocp_write_word(struct r8152
*tp
, u16 type
, u16 index
, u32 data
)
754 u16 byen
= BYTE_EN_WORD
;
755 u8 shift
= index
& 2;
761 mask
<<= (shift
* 8);
762 data
<<= (shift
* 8);
766 generic_ocp_read(tp
, index
, sizeof(tmp
), &tmp
, type
);
768 data
|= __le32_to_cpu(tmp
) & ~mask
;
769 tmp
= __cpu_to_le32(data
);
771 generic_ocp_write(tp
, index
, byen
, sizeof(tmp
), &tmp
, type
);
774 static u8
ocp_read_byte(struct r8152
*tp
, u16 type
, u16 index
)
778 u8 shift
= index
& 3;
782 generic_ocp_read(tp
, index
, sizeof(tmp
), &tmp
, type
);
784 data
= __le32_to_cpu(tmp
);
785 data
>>= (shift
* 8);
791 static void ocp_write_byte(struct r8152
*tp
, u16 type
, u16 index
, u32 data
)
795 u16 byen
= BYTE_EN_BYTE
;
796 u8 shift
= index
& 3;
802 mask
<<= (shift
* 8);
803 data
<<= (shift
* 8);
807 generic_ocp_read(tp
, index
, sizeof(tmp
), &tmp
, type
);
809 data
|= __le32_to_cpu(tmp
) & ~mask
;
810 tmp
= __cpu_to_le32(data
);
812 generic_ocp_write(tp
, index
, byen
, sizeof(tmp
), &tmp
, type
);
815 static u16
ocp_reg_read(struct r8152
*tp
, u16 addr
)
817 u16 ocp_base
, ocp_index
;
819 ocp_base
= addr
& 0xf000;
820 if (ocp_base
!= tp
->ocp_base
) {
821 ocp_write_word(tp
, MCU_TYPE_PLA
, PLA_OCP_GPHY_BASE
, ocp_base
);
822 tp
->ocp_base
= ocp_base
;
825 ocp_index
= (addr
& 0x0fff) | 0xb000;
826 return ocp_read_word(tp
, MCU_TYPE_PLA
, ocp_index
);
829 static void ocp_reg_write(struct r8152
*tp
, u16 addr
, u16 data
)
831 u16 ocp_base
, ocp_index
;
833 ocp_base
= addr
& 0xf000;
834 if (ocp_base
!= tp
->ocp_base
) {
835 ocp_write_word(tp
, MCU_TYPE_PLA
, PLA_OCP_GPHY_BASE
, ocp_base
);
836 tp
->ocp_base
= ocp_base
;
839 ocp_index
= (addr
& 0x0fff) | 0xb000;
840 ocp_write_word(tp
, MCU_TYPE_PLA
, ocp_index
, data
);
843 static inline void r8152_mdio_write(struct r8152
*tp
, u32 reg_addr
, u32 value
)
845 ocp_reg_write(tp
, OCP_BASE_MII
+ reg_addr
* 2, value
);
848 static inline int r8152_mdio_read(struct r8152
*tp
, u32 reg_addr
)
850 return ocp_reg_read(tp
, OCP_BASE_MII
+ reg_addr
* 2);
853 static void sram_write(struct r8152
*tp
, u16 addr
, u16 data
)
855 ocp_reg_write(tp
, OCP_SRAM_ADDR
, addr
);
856 ocp_reg_write(tp
, OCP_SRAM_DATA
, data
);
859 static u16
sram_read(struct r8152
*tp
, u16 addr
)
861 ocp_reg_write(tp
, OCP_SRAM_ADDR
, addr
);
862 return ocp_reg_read(tp
, OCP_SRAM_DATA
);
865 static int read_mii_word(struct net_device
*netdev
, int phy_id
, int reg
)
867 struct r8152
*tp
= netdev_priv(netdev
);
869 if (phy_id
!= R8152_PHY_ID
)
872 return r8152_mdio_read(tp
, reg
);
876 void write_mii_word(struct net_device
*netdev
, int phy_id
, int reg
, int val
)
878 struct r8152
*tp
= netdev_priv(netdev
);
880 if (phy_id
!= R8152_PHY_ID
)
883 r8152_mdio_write(tp
, reg
, val
);
887 int r8152_submit_rx(struct r8152
*tp
, struct rx_agg
*agg
, gfp_t mem_flags
);
889 static inline void set_ethernet_addr(struct r8152
*tp
)
891 struct net_device
*dev
= tp
->netdev
;
894 if (pla_ocp_read(tp
, PLA_IDR
, sizeof(node_id
), node_id
) < 0)
895 netif_notice(tp
, probe
, dev
, "inet addr fail\n");
897 memcpy(dev
->dev_addr
, node_id
, dev
->addr_len
);
898 memcpy(dev
->perm_addr
, dev
->dev_addr
, dev
->addr_len
);
902 static int rtl8152_set_mac_address(struct net_device
*netdev
, void *p
)
904 struct r8152
*tp
= netdev_priv(netdev
);
905 struct sockaddr
*addr
= p
;
907 if (!is_valid_ether_addr(addr
->sa_data
))
908 return -EADDRNOTAVAIL
;
910 memcpy(netdev
->dev_addr
, addr
->sa_data
, netdev
->addr_len
);
912 ocp_write_byte(tp
, MCU_TYPE_PLA
, PLA_CRWECR
, CRWECR_CONFIG
);
913 pla_ocp_write(tp
, PLA_IDR
, BYTE_EN_SIX_BYTES
, 8, addr
->sa_data
);
914 ocp_write_byte(tp
, MCU_TYPE_PLA
, PLA_CRWECR
, CRWECR_NORAML
);
919 static struct net_device_stats
*rtl8152_get_stats(struct net_device
*dev
)
924 static void read_bulk_callback(struct urb
*urb
)
926 struct net_device
*netdev
;
928 int status
= urb
->status
;
941 if (test_bit(RTL8152_UNPLUG
, &tp
->flags
))
944 if (!test_bit(WORK_ENABLE
, &tp
->flags
))
949 /* When link down, the driver would cancel all bulks. */
950 /* This avoid the re-submitting bulk */
951 if (!netif_carrier_ok(netdev
))
956 if (urb
->actual_length
< ETH_ZLEN
)
959 spin_lock_irqsave(&tp
->rx_lock
, flags
);
960 list_add_tail(&agg
->list
, &tp
->rx_done
);
961 spin_unlock_irqrestore(&tp
->rx_lock
, flags
);
962 tasklet_schedule(&tp
->tl
);
965 set_bit(RTL8152_UNPLUG
, &tp
->flags
);
966 netif_device_detach(tp
->netdev
);
969 return; /* the urb is in unlink state */
972 netdev_warn(netdev
, "maybe reset is needed?\n");
976 netdev_warn(netdev
, "Rx status %d\n", status
);
980 result
= r8152_submit_rx(tp
, agg
, GFP_ATOMIC
);
981 if (result
== -ENODEV
) {
982 netif_device_detach(tp
->netdev
);
984 spin_lock_irqsave(&tp
->rx_lock
, flags
);
985 list_add_tail(&agg
->list
, &tp
->rx_done
);
986 spin_unlock_irqrestore(&tp
->rx_lock
, flags
);
987 tasklet_schedule(&tp
->tl
);
991 static void write_bulk_callback(struct urb
*urb
)
993 struct net_device_stats
*stats
;
997 int status
= urb
->status
;
1007 stats
= rtl8152_get_stats(tp
->netdev
);
1009 if (net_ratelimit())
1010 netdev_warn(tp
->netdev
, "Tx status %d\n", status
);
1011 stats
->tx_errors
+= agg
->skb_num
;
1013 stats
->tx_packets
+= agg
->skb_num
;
1014 stats
->tx_bytes
+= agg
->skb_len
;
1017 spin_lock_irqsave(&tp
->tx_lock
, flags
);
1018 list_add_tail(&agg
->list
, &tp
->tx_free
);
1019 spin_unlock_irqrestore(&tp
->tx_lock
, flags
);
1021 if (!netif_carrier_ok(tp
->netdev
))
1024 if (!test_bit(WORK_ENABLE
, &tp
->flags
))
1027 if (test_bit(RTL8152_UNPLUG
, &tp
->flags
))
1030 if (!skb_queue_empty(&tp
->tx_queue
))
1031 tasklet_schedule(&tp
->tl
);
1034 static void intr_callback(struct urb
*urb
)
1038 int status
= urb
->status
;
1045 if (!test_bit(WORK_ENABLE
, &tp
->flags
))
1048 if (test_bit(RTL8152_UNPLUG
, &tp
->flags
))
1052 case 0: /* success */
1054 case -ECONNRESET
: /* unlink */
1056 netif_device_detach(tp
->netdev
);
1060 netif_info(tp
, intr
, tp
->netdev
, "intr status -EOVERFLOW\n");
1062 /* -EPIPE: should clear the halt */
1064 netif_info(tp
, intr
, tp
->netdev
, "intr status %d\n", status
);
1068 d
= urb
->transfer_buffer
;
1069 if (INTR_LINK
& __le16_to_cpu(d
[0])) {
1070 if (!(tp
->speed
& LINK_STATUS
)) {
1071 set_bit(RTL8152_LINK_CHG
, &tp
->flags
);
1072 schedule_delayed_work(&tp
->schedule
, 0);
1075 if (tp
->speed
& LINK_STATUS
) {
1076 set_bit(RTL8152_LINK_CHG
, &tp
->flags
);
1077 schedule_delayed_work(&tp
->schedule
, 0);
1082 res
= usb_submit_urb(urb
, GFP_ATOMIC
);
1084 netif_device_detach(tp
->netdev
);
1086 netif_err(tp
, intr
, tp
->netdev
,
1087 "can't resubmit intr, status %d\n", res
);
1090 static inline void *rx_agg_align(void *data
)
1092 return (void *)ALIGN((uintptr_t)data
, RX_ALIGN
);
1095 static inline void *tx_agg_align(void *data
)
1097 return (void *)ALIGN((uintptr_t)data
, TX_ALIGN
);
1100 static void free_all_mem(struct r8152
*tp
)
1104 for (i
= 0; i
< RTL8152_MAX_RX
; i
++) {
1105 usb_free_urb(tp
->rx_info
[i
].urb
);
1106 tp
->rx_info
[i
].urb
= NULL
;
1108 kfree(tp
->rx_info
[i
].buffer
);
1109 tp
->rx_info
[i
].buffer
= NULL
;
1110 tp
->rx_info
[i
].head
= NULL
;
1113 for (i
= 0; i
< RTL8152_MAX_TX
; i
++) {
1114 usb_free_urb(tp
->tx_info
[i
].urb
);
1115 tp
->tx_info
[i
].urb
= NULL
;
1117 kfree(tp
->tx_info
[i
].buffer
);
1118 tp
->tx_info
[i
].buffer
= NULL
;
1119 tp
->tx_info
[i
].head
= NULL
;
1122 usb_free_urb(tp
->intr_urb
);
1123 tp
->intr_urb
= NULL
;
1125 kfree(tp
->intr_buff
);
1126 tp
->intr_buff
= NULL
;
1129 static int alloc_all_mem(struct r8152
*tp
)
1131 struct net_device
*netdev
= tp
->netdev
;
1132 struct usb_interface
*intf
= tp
->intf
;
1133 struct usb_host_interface
*alt
= intf
->cur_altsetting
;
1134 struct usb_host_endpoint
*ep_intr
= alt
->endpoint
+ 2;
1139 node
= netdev
->dev
.parent
? dev_to_node(netdev
->dev
.parent
) : -1;
1141 spin_lock_init(&tp
->rx_lock
);
1142 spin_lock_init(&tp
->tx_lock
);
1143 INIT_LIST_HEAD(&tp
->rx_done
);
1144 INIT_LIST_HEAD(&tp
->tx_free
);
1145 skb_queue_head_init(&tp
->tx_queue
);
1147 for (i
= 0; i
< RTL8152_MAX_RX
; i
++) {
1148 buf
= kmalloc_node(rx_buf_sz
, GFP_KERNEL
, node
);
1152 if (buf
!= rx_agg_align(buf
)) {
1154 buf
= kmalloc_node(rx_buf_sz
+ RX_ALIGN
, GFP_KERNEL
,
1160 urb
= usb_alloc_urb(0, GFP_KERNEL
);
1166 INIT_LIST_HEAD(&tp
->rx_info
[i
].list
);
1167 tp
->rx_info
[i
].context
= tp
;
1168 tp
->rx_info
[i
].urb
= urb
;
1169 tp
->rx_info
[i
].buffer
= buf
;
1170 tp
->rx_info
[i
].head
= rx_agg_align(buf
);
1173 for (i
= 0; i
< RTL8152_MAX_TX
; i
++) {
1174 buf
= kmalloc_node(rx_buf_sz
, GFP_KERNEL
, node
);
1178 if (buf
!= tx_agg_align(buf
)) {
1180 buf
= kmalloc_node(rx_buf_sz
+ TX_ALIGN
, GFP_KERNEL
,
1186 urb
= usb_alloc_urb(0, GFP_KERNEL
);
1192 INIT_LIST_HEAD(&tp
->tx_info
[i
].list
);
1193 tp
->tx_info
[i
].context
= tp
;
1194 tp
->tx_info
[i
].urb
= urb
;
1195 tp
->tx_info
[i
].buffer
= buf
;
1196 tp
->tx_info
[i
].head
= tx_agg_align(buf
);
1198 list_add_tail(&tp
->tx_info
[i
].list
, &tp
->tx_free
);
1201 tp
->intr_urb
= usb_alloc_urb(0, GFP_KERNEL
);
1205 tp
->intr_buff
= kmalloc(INTBUFSIZE
, GFP_KERNEL
);
1209 tp
->intr_interval
= (int)ep_intr
->desc
.bInterval
;
1210 usb_fill_int_urb(tp
->intr_urb
, tp
->udev
, usb_rcvintpipe(tp
->udev
, 3),
1211 tp
->intr_buff
, INTBUFSIZE
, intr_callback
,
1212 tp
, tp
->intr_interval
);
1221 static struct tx_agg
*r8152_get_tx_agg(struct r8152
*tp
)
1223 struct tx_agg
*agg
= NULL
;
1224 unsigned long flags
;
1226 spin_lock_irqsave(&tp
->tx_lock
, flags
);
1227 if (!list_empty(&tp
->tx_free
)) {
1228 struct list_head
*cursor
;
1230 cursor
= tp
->tx_free
.next
;
1231 list_del_init(cursor
);
1232 agg
= list_entry(cursor
, struct tx_agg
, list
);
1234 spin_unlock_irqrestore(&tp
->tx_lock
, flags
);
1240 r8152_tx_csum(struct r8152
*tp
, struct tx_desc
*desc
, struct sk_buff
*skb
)
1242 memset(desc
, 0, sizeof(*desc
));
1244 desc
->opts1
= cpu_to_le32((skb
->len
& TX_LEN_MASK
) | TX_FS
| TX_LS
);
1246 if (skb
->ip_summed
== CHECKSUM_PARTIAL
) {
1251 if (skb
->protocol
== htons(ETH_P_8021Q
))
1252 protocol
= vlan_eth_hdr(skb
)->h_vlan_encapsulated_proto
;
1254 protocol
= skb
->protocol
;
1257 case htons(ETH_P_IP
):
1259 ip_protocol
= ip_hdr(skb
)->protocol
;
1262 case htons(ETH_P_IPV6
):
1264 ip_protocol
= ipv6_hdr(skb
)->nexthdr
;
1268 ip_protocol
= IPPROTO_RAW
;
1272 if (ip_protocol
== IPPROTO_TCP
) {
1274 opts2
|= (skb_transport_offset(skb
) & 0x7fff) << 17;
1275 } else if (ip_protocol
== IPPROTO_UDP
) {
1281 desc
->opts2
= cpu_to_le32(opts2
);
1285 static int r8152_tx_agg_fill(struct r8152
*tp
, struct tx_agg
*agg
)
1290 tx_data
= agg
->head
;
1291 agg
->skb_num
= agg
->skb_len
= 0;
1294 while (remain
>= ETH_ZLEN
+ sizeof(struct tx_desc
)) {
1295 struct tx_desc
*tx_desc
;
1296 struct sk_buff
*skb
;
1299 skb
= skb_dequeue(&tp
->tx_queue
);
1303 remain
-= sizeof(*tx_desc
);
1306 skb_queue_head(&tp
->tx_queue
, skb
);
1310 tx_data
= tx_agg_align(tx_data
);
1311 tx_desc
= (struct tx_desc
*)tx_data
;
1312 tx_data
+= sizeof(*tx_desc
);
1314 r8152_tx_csum(tp
, tx_desc
, skb
);
1315 memcpy(tx_data
, skb
->data
, len
);
1317 agg
->skb_len
+= len
;
1318 dev_kfree_skb_any(skb
);
1321 remain
= rx_buf_sz
- (int)(tx_agg_align(tx_data
) - agg
->head
);
1324 netif_tx_lock(tp
->netdev
);
1326 if (netif_queue_stopped(tp
->netdev
) &&
1327 skb_queue_len(&tp
->tx_queue
) < tp
->tx_qlen
)
1328 netif_wake_queue(tp
->netdev
);
1330 netif_tx_unlock(tp
->netdev
);
1332 usb_fill_bulk_urb(agg
->urb
, tp
->udev
, usb_sndbulkpipe(tp
->udev
, 2),
1333 agg
->head
, (int)(tx_data
- (u8
*)agg
->head
),
1334 (usb_complete_t
)write_bulk_callback
, agg
);
1336 return usb_submit_urb(agg
->urb
, GFP_ATOMIC
);
1339 static void rx_bottom(struct r8152
*tp
)
1341 unsigned long flags
;
1342 struct list_head
*cursor
, *next
;
1344 spin_lock_irqsave(&tp
->rx_lock
, flags
);
1345 list_for_each_safe(cursor
, next
, &tp
->rx_done
) {
1346 struct rx_desc
*rx_desc
;
1353 list_del_init(cursor
);
1354 spin_unlock_irqrestore(&tp
->rx_lock
, flags
);
1356 agg
= list_entry(cursor
, struct rx_agg
, list
);
1358 if (urb
->actual_length
< ETH_ZLEN
)
1361 rx_desc
= agg
->head
;
1362 rx_data
= agg
->head
;
1363 len_used
+= sizeof(struct rx_desc
);
1365 while (urb
->actual_length
> len_used
) {
1366 struct net_device
*netdev
= tp
->netdev
;
1367 struct net_device_stats
*stats
;
1368 unsigned int pkt_len
;
1369 struct sk_buff
*skb
;
1371 pkt_len
= le32_to_cpu(rx_desc
->opts1
) & RX_LEN_MASK
;
1372 if (pkt_len
< ETH_ZLEN
)
1375 len_used
+= pkt_len
;
1376 if (urb
->actual_length
< len_used
)
1379 stats
= rtl8152_get_stats(netdev
);
1381 pkt_len
-= CRC_SIZE
;
1382 rx_data
+= sizeof(struct rx_desc
);
1384 skb
= netdev_alloc_skb_ip_align(netdev
, pkt_len
);
1386 stats
->rx_dropped
++;
1389 memcpy(skb
->data
, rx_data
, pkt_len
);
1390 skb_put(skb
, pkt_len
);
1391 skb
->protocol
= eth_type_trans(skb
, netdev
);
1393 stats
->rx_packets
++;
1394 stats
->rx_bytes
+= pkt_len
;
1396 rx_data
= rx_agg_align(rx_data
+ pkt_len
+ CRC_SIZE
);
1397 rx_desc
= (struct rx_desc
*)rx_data
;
1398 len_used
= (int)(rx_data
- (u8
*)agg
->head
);
1399 len_used
+= sizeof(struct rx_desc
);
1403 ret
= r8152_submit_rx(tp
, agg
, GFP_ATOMIC
);
1404 spin_lock_irqsave(&tp
->rx_lock
, flags
);
1405 if (ret
&& ret
!= -ENODEV
) {
1406 list_add_tail(&agg
->list
, next
);
1407 tasklet_schedule(&tp
->tl
);
1410 spin_unlock_irqrestore(&tp
->rx_lock
, flags
);
1413 static void tx_bottom(struct r8152
*tp
)
1420 if (skb_queue_empty(&tp
->tx_queue
))
1423 agg
= r8152_get_tx_agg(tp
);
1427 res
= r8152_tx_agg_fill(tp
, agg
);
1429 struct net_device_stats
*stats
;
1430 struct net_device
*netdev
;
1431 unsigned long flags
;
1433 netdev
= tp
->netdev
;
1434 stats
= rtl8152_get_stats(netdev
);
1436 if (res
== -ENODEV
) {
1437 netif_device_detach(netdev
);
1439 netif_warn(tp
, tx_err
, netdev
,
1440 "failed tx_urb %d\n", res
);
1441 stats
->tx_dropped
+= agg
->skb_num
;
1442 spin_lock_irqsave(&tp
->tx_lock
, flags
);
1443 list_add_tail(&agg
->list
, &tp
->tx_free
);
1444 spin_unlock_irqrestore(&tp
->tx_lock
, flags
);
1450 static void bottom_half(unsigned long data
)
1454 tp
= (struct r8152
*)data
;
1456 if (test_bit(RTL8152_UNPLUG
, &tp
->flags
))
1459 if (!test_bit(WORK_ENABLE
, &tp
->flags
))
1462 /* When link down, the driver would cancel all bulks. */
1463 /* This avoid the re-submitting bulk */
1464 if (!netif_carrier_ok(tp
->netdev
))
1472 int r8152_submit_rx(struct r8152
*tp
, struct rx_agg
*agg
, gfp_t mem_flags
)
1474 usb_fill_bulk_urb(agg
->urb
, tp
->udev
, usb_rcvbulkpipe(tp
->udev
, 1),
1475 agg
->head
, rx_buf_sz
,
1476 (usb_complete_t
)read_bulk_callback
, agg
);
1478 return usb_submit_urb(agg
->urb
, mem_flags
);
1481 static void rtl8152_tx_timeout(struct net_device
*netdev
)
1483 struct r8152
*tp
= netdev_priv(netdev
);
1486 netif_warn(tp
, tx_err
, netdev
, "Tx timeout\n");
1487 for (i
= 0; i
< RTL8152_MAX_TX
; i
++)
1488 usb_unlink_urb(tp
->tx_info
[i
].urb
);
1491 static void rtl8152_set_rx_mode(struct net_device
*netdev
)
1493 struct r8152
*tp
= netdev_priv(netdev
);
1495 if (tp
->speed
& LINK_STATUS
) {
1496 set_bit(RTL8152_SET_RX_MODE
, &tp
->flags
);
1497 schedule_delayed_work(&tp
->schedule
, 0);
1501 static void _rtl8152_set_rx_mode(struct net_device
*netdev
)
1503 struct r8152
*tp
= netdev_priv(netdev
);
1504 u32 mc_filter
[2]; /* Multicast hash filter */
1508 clear_bit(RTL8152_SET_RX_MODE
, &tp
->flags
);
1509 netif_stop_queue(netdev
);
1510 ocp_data
= ocp_read_dword(tp
, MCU_TYPE_PLA
, PLA_RCR
);
1511 ocp_data
&= ~RCR_ACPT_ALL
;
1512 ocp_data
|= RCR_AB
| RCR_APM
;
1514 if (netdev
->flags
& IFF_PROMISC
) {
1515 /* Unconditionally log net taps. */
1516 netif_notice(tp
, link
, netdev
, "Promiscuous mode enabled\n");
1517 ocp_data
|= RCR_AM
| RCR_AAP
;
1518 mc_filter
[1] = mc_filter
[0] = 0xffffffff;
1519 } else if ((netdev_mc_count(netdev
) > multicast_filter_limit
) ||
1520 (netdev
->flags
& IFF_ALLMULTI
)) {
1521 /* Too many to filter perfectly -- accept all multicasts. */
1523 mc_filter
[1] = mc_filter
[0] = 0xffffffff;
1525 struct netdev_hw_addr
*ha
;
1527 mc_filter
[1] = mc_filter
[0] = 0;
1528 netdev_for_each_mc_addr(ha
, netdev
) {
1529 int bit_nr
= ether_crc(ETH_ALEN
, ha
->addr
) >> 26;
1530 mc_filter
[bit_nr
>> 5] |= 1 << (bit_nr
& 31);
1535 tmp
[0] = __cpu_to_le32(swab32(mc_filter
[1]));
1536 tmp
[1] = __cpu_to_le32(swab32(mc_filter
[0]));
1538 pla_ocp_write(tp
, PLA_MAR
, BYTE_EN_DWORD
, sizeof(tmp
), tmp
);
1539 ocp_write_dword(tp
, MCU_TYPE_PLA
, PLA_RCR
, ocp_data
);
1540 netif_wake_queue(netdev
);
1543 static netdev_tx_t
rtl8152_start_xmit(struct sk_buff
*skb
,
1544 struct net_device
*netdev
)
1546 struct r8152
*tp
= netdev_priv(netdev
);
1548 skb_tx_timestamp(skb
);
1550 skb_queue_tail(&tp
->tx_queue
, skb
);
1552 if (list_empty(&tp
->tx_free
) &&
1553 skb_queue_len(&tp
->tx_queue
) > tp
->tx_qlen
)
1554 netif_stop_queue(netdev
);
1556 if (!list_empty(&tp
->tx_free
))
1557 tasklet_schedule(&tp
->tl
);
1559 return NETDEV_TX_OK
;
1562 static void r8152b_reset_packet_filter(struct r8152
*tp
)
1566 ocp_data
= ocp_read_word(tp
, MCU_TYPE_PLA
, PLA_FMC
);
1567 ocp_data
&= ~FMC_FCR_MCU_EN
;
1568 ocp_write_word(tp
, MCU_TYPE_PLA
, PLA_FMC
, ocp_data
);
1569 ocp_data
|= FMC_FCR_MCU_EN
;
1570 ocp_write_word(tp
, MCU_TYPE_PLA
, PLA_FMC
, ocp_data
);
1573 static void rtl8152_nic_reset(struct r8152
*tp
)
1577 ocp_write_byte(tp
, MCU_TYPE_PLA
, PLA_CR
, CR_RST
);
1579 for (i
= 0; i
< 1000; i
++) {
1580 if (!(ocp_read_byte(tp
, MCU_TYPE_PLA
, PLA_CR
) & CR_RST
))
1586 static void set_tx_qlen(struct r8152
*tp
)
1588 struct net_device
*netdev
= tp
->netdev
;
1590 tp
->tx_qlen
= rx_buf_sz
/ (netdev
->mtu
+ VLAN_ETH_HLEN
+ VLAN_HLEN
+
1591 sizeof(struct tx_desc
));
1594 static inline u8
rtl8152_get_speed(struct r8152
*tp
)
1596 return ocp_read_byte(tp
, MCU_TYPE_PLA
, PLA_PHYSTATUS
);
1599 static void rtl_set_eee_plus(struct r8152
*tp
)
1604 speed
= rtl8152_get_speed(tp
);
1605 if (speed
& _10bps
) {
1606 ocp_data
= ocp_read_word(tp
, MCU_TYPE_PLA
, PLA_EEEP_CR
);
1607 ocp_data
|= EEEP_CR_EEEP_TX
;
1608 ocp_write_word(tp
, MCU_TYPE_PLA
, PLA_EEEP_CR
, ocp_data
);
1610 ocp_data
= ocp_read_word(tp
, MCU_TYPE_PLA
, PLA_EEEP_CR
);
1611 ocp_data
&= ~EEEP_CR_EEEP_TX
;
1612 ocp_write_word(tp
, MCU_TYPE_PLA
, PLA_EEEP_CR
, ocp_data
);
1616 static int rtl_enable(struct r8152
*tp
)
1621 r8152b_reset_packet_filter(tp
);
1623 ocp_data
= ocp_read_byte(tp
, MCU_TYPE_PLA
, PLA_CR
);
1624 ocp_data
|= CR_RE
| CR_TE
;
1625 ocp_write_byte(tp
, MCU_TYPE_PLA
, PLA_CR
, ocp_data
);
1627 ocp_data
= ocp_read_word(tp
, MCU_TYPE_PLA
, PLA_MISC_1
);
1628 ocp_data
&= ~RXDY_GATED_EN
;
1629 ocp_write_word(tp
, MCU_TYPE_PLA
, PLA_MISC_1
, ocp_data
);
1631 INIT_LIST_HEAD(&tp
->rx_done
);
1633 for (i
= 0; i
< RTL8152_MAX_RX
; i
++) {
1634 INIT_LIST_HEAD(&tp
->rx_info
[i
].list
);
1635 ret
|= r8152_submit_rx(tp
, &tp
->rx_info
[i
], GFP_KERNEL
);
1641 static int rtl8152_enable(struct r8152
*tp
)
1644 rtl_set_eee_plus(tp
);
1646 return rtl_enable(tp
);
1649 static void r8153_set_rx_agg(struct r8152
*tp
)
1653 speed
= rtl8152_get_speed(tp
);
1654 if (speed
& _1000bps
) {
1655 if (tp
->udev
->speed
== USB_SPEED_SUPER
) {
1656 ocp_write_dword(tp
, MCU_TYPE_USB
, USB_RX_BUF_TH
,
1658 ocp_write_dword(tp
, MCU_TYPE_USB
, USB_RX_EARLY_AGG
,
1661 ocp_write_dword(tp
, MCU_TYPE_USB
, USB_RX_BUF_TH
,
1663 ocp_write_dword(tp
, MCU_TYPE_USB
, USB_RX_EARLY_AGG
,
1667 ocp_write_dword(tp
, MCU_TYPE_USB
, USB_RX_BUF_TH
, RX_THR_SLOW
);
1668 ocp_write_dword(tp
, MCU_TYPE_USB
, USB_RX_EARLY_AGG
,
1673 static int rtl8153_enable(struct r8152
*tp
)
1676 rtl_set_eee_plus(tp
);
1677 r8153_set_rx_agg(tp
);
1679 return rtl_enable(tp
);
1682 static void rtl8152_disable(struct r8152
*tp
)
1684 struct net_device_stats
*stats
= rtl8152_get_stats(tp
->netdev
);
1685 struct sk_buff
*skb
;
1689 ocp_data
= ocp_read_dword(tp
, MCU_TYPE_PLA
, PLA_RCR
);
1690 ocp_data
&= ~RCR_ACPT_ALL
;
1691 ocp_write_dword(tp
, MCU_TYPE_PLA
, PLA_RCR
, ocp_data
);
1693 while ((skb
= skb_dequeue(&tp
->tx_queue
))) {
1695 stats
->tx_dropped
++;
1698 for (i
= 0; i
< RTL8152_MAX_TX
; i
++)
1699 usb_kill_urb(tp
->tx_info
[i
].urb
);
1701 ocp_data
= ocp_read_word(tp
, MCU_TYPE_PLA
, PLA_MISC_1
);
1702 ocp_data
|= RXDY_GATED_EN
;
1703 ocp_write_word(tp
, MCU_TYPE_PLA
, PLA_MISC_1
, ocp_data
);
1705 for (i
= 0; i
< 1000; i
++) {
1706 ocp_data
= ocp_read_byte(tp
, MCU_TYPE_PLA
, PLA_OOB_CTRL
);
1707 if ((ocp_data
& FIFO_EMPTY
) == FIFO_EMPTY
)
1712 for (i
= 0; i
< 1000; i
++) {
1713 if (ocp_read_word(tp
, MCU_TYPE_PLA
, PLA_TCR0
) & TCR0_TX_EMPTY
)
1718 for (i
= 0; i
< RTL8152_MAX_RX
; i
++)
1719 usb_kill_urb(tp
->rx_info
[i
].urb
);
1721 rtl8152_nic_reset(tp
);
1724 static void r8152b_exit_oob(struct r8152
*tp
)
1729 ocp_data
= ocp_read_dword(tp
, MCU_TYPE_PLA
, PLA_RCR
);
1730 ocp_data
&= ~RCR_ACPT_ALL
;
1731 ocp_write_dword(tp
, MCU_TYPE_PLA
, PLA_RCR
, ocp_data
);
1733 ocp_data
= ocp_read_word(tp
, MCU_TYPE_PLA
, PLA_MISC_1
);
1734 ocp_data
|= RXDY_GATED_EN
;
1735 ocp_write_word(tp
, MCU_TYPE_PLA
, PLA_MISC_1
, ocp_data
);
1737 ocp_write_byte(tp
, MCU_TYPE_PLA
, PLA_CRWECR
, CRWECR_NORAML
);
1738 ocp_write_byte(tp
, MCU_TYPE_PLA
, PLA_CR
, 0x00);
1740 ocp_data
= ocp_read_byte(tp
, MCU_TYPE_PLA
, PLA_OOB_CTRL
);
1741 ocp_data
&= ~NOW_IS_OOB
;
1742 ocp_write_byte(tp
, MCU_TYPE_PLA
, PLA_OOB_CTRL
, ocp_data
);
1744 ocp_data
= ocp_read_word(tp
, MCU_TYPE_PLA
, PLA_SFF_STS_7
);
1745 ocp_data
&= ~MCU_BORW_EN
;
1746 ocp_write_word(tp
, MCU_TYPE_PLA
, PLA_SFF_STS_7
, ocp_data
);
1748 for (i
= 0; i
< 1000; i
++) {
1749 ocp_data
= ocp_read_byte(tp
, MCU_TYPE_PLA
, PLA_OOB_CTRL
);
1750 if (ocp_data
& LINK_LIST_READY
)
1755 ocp_data
= ocp_read_word(tp
, MCU_TYPE_PLA
, PLA_SFF_STS_7
);
1756 ocp_data
|= RE_INIT_LL
;
1757 ocp_write_word(tp
, MCU_TYPE_PLA
, PLA_SFF_STS_7
, ocp_data
);
1759 for (i
= 0; i
< 1000; i
++) {
1760 ocp_data
= ocp_read_byte(tp
, MCU_TYPE_PLA
, PLA_OOB_CTRL
);
1761 if (ocp_data
& LINK_LIST_READY
)
1766 rtl8152_nic_reset(tp
);
1768 /* rx share fifo credit full threshold */
1769 ocp_write_dword(tp
, MCU_TYPE_PLA
, PLA_RXFIFO_CTRL0
, RXFIFO_THR1_NORMAL
);
1771 ocp_data
= ocp_read_word(tp
, MCU_TYPE_USB
, USB_DEV_STAT
);
1772 ocp_data
&= STAT_SPEED_MASK
;
1773 if (ocp_data
== STAT_SPEED_FULL
) {
1774 /* rx share fifo credit near full threshold */
1775 ocp_write_dword(tp
, MCU_TYPE_PLA
, PLA_RXFIFO_CTRL1
,
1777 ocp_write_dword(tp
, MCU_TYPE_PLA
, PLA_RXFIFO_CTRL2
,
1780 /* rx share fifo credit near full threshold */
1781 ocp_write_dword(tp
, MCU_TYPE_PLA
, PLA_RXFIFO_CTRL1
,
1783 ocp_write_dword(tp
, MCU_TYPE_PLA
, PLA_RXFIFO_CTRL2
,
1787 /* TX share fifo free credit full threshold */
1788 ocp_write_dword(tp
, MCU_TYPE_PLA
, PLA_TXFIFO_CTRL
, TXFIFO_THR_NORMAL
);
1790 ocp_write_byte(tp
, MCU_TYPE_USB
, USB_TX_AGG
, TX_AGG_MAX_THRESHOLD
);
1791 ocp_write_dword(tp
, MCU_TYPE_USB
, USB_RX_BUF_TH
, RX_THR_HIGH
);
1792 ocp_write_dword(tp
, MCU_TYPE_USB
, USB_TX_DMA
,
1793 TEST_MODE_DISABLE
| TX_SIZE_ADJUST1
);
1795 ocp_data
= ocp_read_word(tp
, MCU_TYPE_PLA
, PLA_CPCR
);
1796 ocp_data
&= ~CPCR_RX_VLAN
;
1797 ocp_write_word(tp
, MCU_TYPE_PLA
, PLA_CPCR
, ocp_data
);
1799 ocp_write_word(tp
, MCU_TYPE_PLA
, PLA_RMS
, RTL8152_RMS
);
1801 ocp_data
= ocp_read_word(tp
, MCU_TYPE_PLA
, PLA_TCR0
);
1802 ocp_data
|= TCR0_AUTO_FIFO
;
1803 ocp_write_word(tp
, MCU_TYPE_PLA
, PLA_TCR0
, ocp_data
);
1806 static void r8152b_enter_oob(struct r8152
*tp
)
1811 ocp_data
= ocp_read_byte(tp
, MCU_TYPE_PLA
, PLA_OOB_CTRL
);
1812 ocp_data
&= ~NOW_IS_OOB
;
1813 ocp_write_byte(tp
, MCU_TYPE_PLA
, PLA_OOB_CTRL
, ocp_data
);
1815 ocp_write_dword(tp
, MCU_TYPE_PLA
, PLA_RXFIFO_CTRL0
, RXFIFO_THR1_OOB
);
1816 ocp_write_dword(tp
, MCU_TYPE_PLA
, PLA_RXFIFO_CTRL1
, RXFIFO_THR2_OOB
);
1817 ocp_write_dword(tp
, MCU_TYPE_PLA
, PLA_RXFIFO_CTRL2
, RXFIFO_THR3_OOB
);
1819 rtl8152_disable(tp
);
1821 for (i
= 0; i
< 1000; i
++) {
1822 ocp_data
= ocp_read_byte(tp
, MCU_TYPE_PLA
, PLA_OOB_CTRL
);
1823 if (ocp_data
& LINK_LIST_READY
)
1828 ocp_data
= ocp_read_word(tp
, MCU_TYPE_PLA
, PLA_SFF_STS_7
);
1829 ocp_data
|= RE_INIT_LL
;
1830 ocp_write_word(tp
, MCU_TYPE_PLA
, PLA_SFF_STS_7
, ocp_data
);
1832 for (i
= 0; i
< 1000; i
++) {
1833 ocp_data
= ocp_read_byte(tp
, MCU_TYPE_PLA
, PLA_OOB_CTRL
);
1834 if (ocp_data
& LINK_LIST_READY
)
1839 ocp_write_word(tp
, MCU_TYPE_PLA
, PLA_RMS
, RTL8152_RMS
);
1841 ocp_data
= ocp_read_word(tp
, MCU_TYPE_PLA
, PLA_CFG_WOL
);
1842 ocp_data
|= MAGIC_EN
;
1843 ocp_write_word(tp
, MCU_TYPE_PLA
, PLA_CFG_WOL
, ocp_data
);
1845 ocp_data
= ocp_read_word(tp
, MCU_TYPE_PLA
, PLA_CPCR
);
1846 ocp_data
|= CPCR_RX_VLAN
;
1847 ocp_write_word(tp
, MCU_TYPE_PLA
, PLA_CPCR
, ocp_data
);
1849 ocp_data
= ocp_read_word(tp
, MCU_TYPE_PLA
, PAL_BDC_CR
);
1850 ocp_data
|= ALDPS_PROXY_MODE
;
1851 ocp_write_word(tp
, MCU_TYPE_PLA
, PAL_BDC_CR
, ocp_data
);
1853 ocp_data
= ocp_read_byte(tp
, MCU_TYPE_PLA
, PLA_OOB_CTRL
);
1854 ocp_data
|= NOW_IS_OOB
| DIS_MCU_CLROOB
;
1855 ocp_write_byte(tp
, MCU_TYPE_PLA
, PLA_OOB_CTRL
, ocp_data
);
1857 ocp_write_byte(tp
, MCU_TYPE_PLA
, PLA_CONFIG5
, LAN_WAKE_EN
);
1859 ocp_data
= ocp_read_word(tp
, MCU_TYPE_PLA
, PLA_MISC_1
);
1860 ocp_data
&= ~RXDY_GATED_EN
;
1861 ocp_write_word(tp
, MCU_TYPE_PLA
, PLA_MISC_1
, ocp_data
);
1863 ocp_data
= ocp_read_dword(tp
, MCU_TYPE_PLA
, PLA_RCR
);
1864 ocp_data
|= RCR_APM
| RCR_AM
| RCR_AB
;
1865 ocp_write_dword(tp
, MCU_TYPE_PLA
, PLA_RCR
, ocp_data
);
1868 static void r8152b_disable_aldps(struct r8152
*tp
)
1870 ocp_reg_write(tp
, OCP_ALDPS_CONFIG
, ENPDNPS
| LINKENA
| DIS_SDSAVE
);
1874 static inline void r8152b_enable_aldps(struct r8152
*tp
)
1876 ocp_reg_write(tp
, OCP_ALDPS_CONFIG
, ENPWRSAVE
| ENPDNPS
|
1877 LINKENA
| DIS_SDSAVE
);
1880 static void r8153_hw_phy_cfg(struct r8152
*tp
)
1885 ocp_reg_write(tp
, OCP_ADC_CFG
, CKADSEL_L
| ADC_EN
| EN_EMI_L
);
1886 r8152_mdio_write(tp
, MII_BMCR
, BMCR_ANENABLE
);
1888 if (tp
->version
== RTL_VER_03
) {
1889 data
= ocp_reg_read(tp
, OCP_EEE_CFG
);
1890 data
&= ~CTAP_SHORT_EN
;
1891 ocp_reg_write(tp
, OCP_EEE_CFG
, data
);
1894 data
= ocp_reg_read(tp
, OCP_POWER_CFG
);
1895 data
|= EEE_CLKDIV_EN
;
1896 ocp_reg_write(tp
, OCP_POWER_CFG
, data
);
1898 data
= ocp_reg_read(tp
, OCP_DOWN_SPEED
);
1899 data
|= EN_10M_BGOFF
;
1900 ocp_reg_write(tp
, OCP_DOWN_SPEED
, data
);
1901 data
= ocp_reg_read(tp
, OCP_POWER_CFG
);
1902 data
|= EN_10M_PLLOFF
;
1903 ocp_reg_write(tp
, OCP_POWER_CFG
, data
);
1904 data
= sram_read(tp
, SRAM_IMPEDANCE
);
1905 data
&= ~RX_DRIVING_MASK
;
1906 sram_write(tp
, SRAM_IMPEDANCE
, data
);
1908 ocp_data
= ocp_read_word(tp
, MCU_TYPE_PLA
, PLA_PHY_PWR
);
1909 ocp_data
|= PFM_PWM_SWITCH
;
1910 ocp_write_word(tp
, MCU_TYPE_PLA
, PLA_PHY_PWR
, ocp_data
);
1912 data
= sram_read(tp
, SRAM_LPF_CFG
);
1913 data
|= LPF_AUTO_TUNE
;
1914 sram_write(tp
, SRAM_LPF_CFG
, data
);
1916 data
= sram_read(tp
, SRAM_10M_AMP1
);
1917 data
|= GDAC_IB_UPALL
;
1918 sram_write(tp
, SRAM_10M_AMP1
, data
);
1919 data
= sram_read(tp
, SRAM_10M_AMP2
);
1921 sram_write(tp
, SRAM_10M_AMP2
, data
);
1924 static void r8153_u1u2en(struct r8152
*tp
, int enable
)
1929 memset(u1u2
, 0xff, sizeof(u1u2
));
1931 memset(u1u2
, 0x00, sizeof(u1u2
));
1933 usb_ocp_write(tp
, USB_TOLERANCE
, BYTE_EN_SIX_BYTES
, sizeof(u1u2
), u1u2
);
1936 static void r8153_u2p3en(struct r8152
*tp
, int enable
)
1940 ocp_data
= ocp_read_word(tp
, MCU_TYPE_USB
, USB_U2P3_CTRL
);
1942 ocp_data
|= U2P3_ENABLE
;
1944 ocp_data
&= ~U2P3_ENABLE
;
1945 ocp_write_word(tp
, MCU_TYPE_USB
, USB_U2P3_CTRL
, ocp_data
);
1948 static void r8153_power_cut_en(struct r8152
*tp
, int enable
)
1952 ocp_data
= ocp_read_word(tp
, MCU_TYPE_USB
, USB_POWER_CUT
);
1954 ocp_data
|= PWR_EN
| PHASE2_EN
;
1956 ocp_data
&= ~(PWR_EN
| PHASE2_EN
);
1957 ocp_write_word(tp
, MCU_TYPE_USB
, USB_POWER_CUT
, ocp_data
);
1959 ocp_data
= ocp_read_word(tp
, MCU_TYPE_USB
, USB_MISC_0
);
1960 ocp_data
&= ~PCUT_STATUS
;
1961 ocp_write_word(tp
, MCU_TYPE_USB
, USB_MISC_0
, ocp_data
);
1964 static void r8153_teredo_off(struct r8152
*tp
)
1968 ocp_data
= ocp_read_word(tp
, MCU_TYPE_PLA
, PLA_TEREDO_CFG
);
1969 ocp_data
&= ~(TEREDO_SEL
| TEREDO_RS_EVENT_MASK
| OOB_TEREDO_EN
);
1970 ocp_write_word(tp
, MCU_TYPE_PLA
, PLA_TEREDO_CFG
, ocp_data
);
1972 ocp_write_word(tp
, MCU_TYPE_PLA
, PLA_WDT6_CTRL
, WDT6_SET_MODE
);
1973 ocp_write_word(tp
, MCU_TYPE_PLA
, PLA_REALWOW_TIMER
, 0);
1974 ocp_write_dword(tp
, MCU_TYPE_PLA
, PLA_TEREDO_TIMER
, 0);
1977 static void r8153_first_init(struct r8152
*tp
)
1982 ocp_data
= ocp_read_word(tp
, MCU_TYPE_PLA
, PLA_MISC_1
);
1983 ocp_data
|= RXDY_GATED_EN
;
1984 ocp_write_word(tp
, MCU_TYPE_PLA
, PLA_MISC_1
, ocp_data
);
1986 r8153_teredo_off(tp
);
1988 ocp_data
= ocp_read_dword(tp
, MCU_TYPE_PLA
, PLA_RCR
);
1989 ocp_data
&= ~RCR_ACPT_ALL
;
1990 ocp_write_dword(tp
, MCU_TYPE_PLA
, PLA_RCR
, ocp_data
);
1992 r8153_hw_phy_cfg(tp
);
1994 rtl8152_nic_reset(tp
);
1996 ocp_data
= ocp_read_byte(tp
, MCU_TYPE_PLA
, PLA_OOB_CTRL
);
1997 ocp_data
&= ~NOW_IS_OOB
;
1998 ocp_write_byte(tp
, MCU_TYPE_PLA
, PLA_OOB_CTRL
, ocp_data
);
2000 ocp_data
= ocp_read_word(tp
, MCU_TYPE_PLA
, PLA_SFF_STS_7
);
2001 ocp_data
&= ~MCU_BORW_EN
;
2002 ocp_write_word(tp
, MCU_TYPE_PLA
, PLA_SFF_STS_7
, ocp_data
);
2004 for (i
= 0; i
< 1000; i
++) {
2005 ocp_data
= ocp_read_byte(tp
, MCU_TYPE_PLA
, PLA_OOB_CTRL
);
2006 if (ocp_data
& LINK_LIST_READY
)
2011 ocp_data
= ocp_read_word(tp
, MCU_TYPE_PLA
, PLA_SFF_STS_7
);
2012 ocp_data
|= RE_INIT_LL
;
2013 ocp_write_word(tp
, MCU_TYPE_PLA
, PLA_SFF_STS_7
, ocp_data
);
2015 for (i
= 0; i
< 1000; i
++) {
2016 ocp_data
= ocp_read_byte(tp
, MCU_TYPE_PLA
, PLA_OOB_CTRL
);
2017 if (ocp_data
& LINK_LIST_READY
)
2022 ocp_data
= ocp_read_word(tp
, MCU_TYPE_PLA
, PLA_CPCR
);
2023 ocp_data
&= ~CPCR_RX_VLAN
;
2024 ocp_write_word(tp
, MCU_TYPE_PLA
, PLA_CPCR
, ocp_data
);
2026 ocp_write_word(tp
, MCU_TYPE_PLA
, PLA_RMS
, RTL8152_RMS
);
2028 ocp_data
= ocp_read_word(tp
, MCU_TYPE_PLA
, PLA_TCR0
);
2029 ocp_data
|= TCR0_AUTO_FIFO
;
2030 ocp_write_word(tp
, MCU_TYPE_PLA
, PLA_TCR0
, ocp_data
);
2032 rtl8152_nic_reset(tp
);
2034 /* rx share fifo credit full threshold */
2035 ocp_write_dword(tp
, MCU_TYPE_PLA
, PLA_RXFIFO_CTRL0
, RXFIFO_THR1_NORMAL
);
2036 ocp_write_word(tp
, MCU_TYPE_PLA
, PLA_RXFIFO_CTRL1
, RXFIFO_THR2_NORMAL
);
2037 ocp_write_word(tp
, MCU_TYPE_PLA
, PLA_RXFIFO_CTRL2
, RXFIFO_THR3_NORMAL
);
2038 /* TX share fifo free credit full threshold */
2039 ocp_write_dword(tp
, MCU_TYPE_PLA
, PLA_TXFIFO_CTRL
, TXFIFO_THR_NORMAL2
);
2041 /* rx aggregation */
2042 ocp_data
= ocp_read_word(tp
, MCU_TYPE_USB
, USB_USB_CTRL
);
2043 ocp_data
&= ~RX_AGG_DISABLE
;
2044 ocp_write_word(tp
, MCU_TYPE_USB
, USB_USB_CTRL
, ocp_data
);
2047 static void r8153_enter_oob(struct r8152
*tp
)
2052 ocp_data
= ocp_read_byte(tp
, MCU_TYPE_PLA
, PLA_OOB_CTRL
);
2053 ocp_data
&= ~NOW_IS_OOB
;
2054 ocp_write_byte(tp
, MCU_TYPE_PLA
, PLA_OOB_CTRL
, ocp_data
);
2056 rtl8152_disable(tp
);
2058 for (i
= 0; i
< 1000; i
++) {
2059 ocp_data
= ocp_read_byte(tp
, MCU_TYPE_PLA
, PLA_OOB_CTRL
);
2060 if (ocp_data
& LINK_LIST_READY
)
2065 ocp_data
= ocp_read_word(tp
, MCU_TYPE_PLA
, PLA_SFF_STS_7
);
2066 ocp_data
|= RE_INIT_LL
;
2067 ocp_write_word(tp
, MCU_TYPE_PLA
, PLA_SFF_STS_7
, ocp_data
);
2069 for (i
= 0; i
< 1000; i
++) {
2070 ocp_data
= ocp_read_byte(tp
, MCU_TYPE_PLA
, PLA_OOB_CTRL
);
2071 if (ocp_data
& LINK_LIST_READY
)
2076 ocp_write_word(tp
, MCU_TYPE_PLA
, PLA_RMS
, RTL8152_RMS
);
2078 ocp_data
= ocp_read_word(tp
, MCU_TYPE_PLA
, PLA_CFG_WOL
);
2079 ocp_data
|= MAGIC_EN
;
2080 ocp_write_word(tp
, MCU_TYPE_PLA
, PLA_CFG_WOL
, ocp_data
);
2082 ocp_data
= ocp_read_word(tp
, MCU_TYPE_PLA
, PLA_TEREDO_CFG
);
2083 ocp_data
&= ~TEREDO_WAKE_MASK
;
2084 ocp_write_word(tp
, MCU_TYPE_PLA
, PLA_TEREDO_CFG
, ocp_data
);
2086 ocp_data
= ocp_read_word(tp
, MCU_TYPE_PLA
, PLA_CPCR
);
2087 ocp_data
|= CPCR_RX_VLAN
;
2088 ocp_write_word(tp
, MCU_TYPE_PLA
, PLA_CPCR
, ocp_data
);
2090 ocp_data
= ocp_read_word(tp
, MCU_TYPE_PLA
, PAL_BDC_CR
);
2091 ocp_data
|= ALDPS_PROXY_MODE
;
2092 ocp_write_word(tp
, MCU_TYPE_PLA
, PAL_BDC_CR
, ocp_data
);
2094 ocp_data
= ocp_read_byte(tp
, MCU_TYPE_PLA
, PLA_OOB_CTRL
);
2095 ocp_data
|= NOW_IS_OOB
| DIS_MCU_CLROOB
;
2096 ocp_write_byte(tp
, MCU_TYPE_PLA
, PLA_OOB_CTRL
, ocp_data
);
2098 ocp_write_byte(tp
, MCU_TYPE_PLA
, PLA_CONFIG5
, LAN_WAKE_EN
);
2100 ocp_data
= ocp_read_word(tp
, MCU_TYPE_PLA
, PLA_MISC_1
);
2101 ocp_data
&= ~RXDY_GATED_EN
;
2102 ocp_write_word(tp
, MCU_TYPE_PLA
, PLA_MISC_1
, ocp_data
);
2104 ocp_data
= ocp_read_dword(tp
, MCU_TYPE_PLA
, PLA_RCR
);
2105 ocp_data
|= RCR_APM
| RCR_AM
| RCR_AB
;
2106 ocp_write_dword(tp
, MCU_TYPE_PLA
, PLA_RCR
, ocp_data
);
2109 static void r8153_disable_aldps(struct r8152
*tp
)
2113 data
= ocp_reg_read(tp
, OCP_POWER_CFG
);
2115 ocp_reg_write(tp
, OCP_POWER_CFG
, data
);
2119 static void r8153_enable_aldps(struct r8152
*tp
)
2123 data
= ocp_reg_read(tp
, OCP_POWER_CFG
);
2125 ocp_reg_write(tp
, OCP_POWER_CFG
, data
);
2128 static int rtl8152_set_speed(struct r8152
*tp
, u8 autoneg
, u16 speed
, u8 duplex
)
2130 u16 bmcr
, anar
, gbcr
;
2133 cancel_delayed_work_sync(&tp
->schedule
);
2134 anar
= r8152_mdio_read(tp
, MII_ADVERTISE
);
2135 anar
&= ~(ADVERTISE_10HALF
| ADVERTISE_10FULL
|
2136 ADVERTISE_100HALF
| ADVERTISE_100FULL
);
2137 if (tp
->mii
.supports_gmii
) {
2138 gbcr
= r8152_mdio_read(tp
, MII_CTRL1000
);
2139 gbcr
&= ~(ADVERTISE_1000FULL
| ADVERTISE_1000HALF
);
2144 if (autoneg
== AUTONEG_DISABLE
) {
2145 if (speed
== SPEED_10
) {
2147 anar
|= ADVERTISE_10HALF
| ADVERTISE_10FULL
;
2148 } else if (speed
== SPEED_100
) {
2149 bmcr
= BMCR_SPEED100
;
2150 anar
|= ADVERTISE_100HALF
| ADVERTISE_100FULL
;
2151 } else if (speed
== SPEED_1000
&& tp
->mii
.supports_gmii
) {
2152 bmcr
= BMCR_SPEED1000
;
2153 gbcr
|= ADVERTISE_1000FULL
| ADVERTISE_1000HALF
;
2159 if (duplex
== DUPLEX_FULL
)
2160 bmcr
|= BMCR_FULLDPLX
;
2162 if (speed
== SPEED_10
) {
2163 if (duplex
== DUPLEX_FULL
)
2164 anar
|= ADVERTISE_10HALF
| ADVERTISE_10FULL
;
2166 anar
|= ADVERTISE_10HALF
;
2167 } else if (speed
== SPEED_100
) {
2168 if (duplex
== DUPLEX_FULL
) {
2169 anar
|= ADVERTISE_10HALF
| ADVERTISE_10FULL
;
2170 anar
|= ADVERTISE_100HALF
| ADVERTISE_100FULL
;
2172 anar
|= ADVERTISE_10HALF
;
2173 anar
|= ADVERTISE_100HALF
;
2175 } else if (speed
== SPEED_1000
&& tp
->mii
.supports_gmii
) {
2176 if (duplex
== DUPLEX_FULL
) {
2177 anar
|= ADVERTISE_10HALF
| ADVERTISE_10FULL
;
2178 anar
|= ADVERTISE_100HALF
| ADVERTISE_100FULL
;
2179 gbcr
|= ADVERTISE_1000FULL
| ADVERTISE_1000HALF
;
2181 anar
|= ADVERTISE_10HALF
;
2182 anar
|= ADVERTISE_100HALF
;
2183 gbcr
|= ADVERTISE_1000HALF
;
2190 bmcr
= BMCR_ANENABLE
| BMCR_ANRESTART
;
2193 if (tp
->mii
.supports_gmii
)
2194 r8152_mdio_write(tp
, MII_CTRL1000
, gbcr
);
2196 r8152_mdio_write(tp
, MII_ADVERTISE
, anar
);
2197 r8152_mdio_write(tp
, MII_BMCR
, bmcr
);
2204 static void rtl8152_down(struct r8152
*tp
)
2208 ocp_data
= ocp_read_word(tp
, MCU_TYPE_USB
, USB_UPS_CTRL
);
2209 ocp_data
&= ~POWER_CUT
;
2210 ocp_write_word(tp
, MCU_TYPE_USB
, USB_UPS_CTRL
, ocp_data
);
2212 r8152b_disable_aldps(tp
);
2213 r8152b_enter_oob(tp
);
2214 r8152b_enable_aldps(tp
);
2217 static void rtl8153_down(struct r8152
*tp
)
2219 r8153_u1u2en(tp
, 0);
2220 r8153_power_cut_en(tp
, 0);
2221 r8153_disable_aldps(tp
);
2222 r8153_enter_oob(tp
);
2223 r8153_enable_aldps(tp
);
2226 static void set_carrier(struct r8152
*tp
)
2228 struct net_device
*netdev
= tp
->netdev
;
2231 clear_bit(RTL8152_LINK_CHG
, &tp
->flags
);
2232 speed
= rtl8152_get_speed(tp
);
2234 if (speed
& LINK_STATUS
) {
2235 if (!(tp
->speed
& LINK_STATUS
)) {
2236 tp
->rtl_ops
.enable(tp
);
2237 set_bit(RTL8152_SET_RX_MODE
, &tp
->flags
);
2238 netif_carrier_on(netdev
);
2241 if (tp
->speed
& LINK_STATUS
) {
2242 netif_carrier_off(netdev
);
2243 tasklet_disable(&tp
->tl
);
2244 tp
->rtl_ops
.disable(tp
);
2245 tasklet_enable(&tp
->tl
);
2251 static void rtl_work_func_t(struct work_struct
*work
)
2253 struct r8152
*tp
= container_of(work
, struct r8152
, schedule
.work
);
2255 if (!test_bit(WORK_ENABLE
, &tp
->flags
))
2258 if (test_bit(RTL8152_UNPLUG
, &tp
->flags
))
2261 if (test_bit(RTL8152_LINK_CHG
, &tp
->flags
))
2264 if (test_bit(RTL8152_SET_RX_MODE
, &tp
->flags
))
2265 _rtl8152_set_rx_mode(tp
->netdev
);
2271 static int rtl8152_open(struct net_device
*netdev
)
2273 struct r8152
*tp
= netdev_priv(netdev
);
2276 rtl8152_set_speed(tp
, AUTONEG_ENABLE
,
2277 tp
->mii
.supports_gmii
? SPEED_1000
: SPEED_100
,
2280 netif_carrier_off(netdev
);
2281 netif_start_queue(netdev
);
2282 set_bit(WORK_ENABLE
, &tp
->flags
);
2283 res
= usb_submit_urb(tp
->intr_urb
, GFP_KERNEL
);
2286 netif_device_detach(tp
->netdev
);
2287 netif_warn(tp
, ifup
, netdev
, "intr_urb submit failed: %d\n",
2295 static int rtl8152_close(struct net_device
*netdev
)
2297 struct r8152
*tp
= netdev_priv(netdev
);
2300 clear_bit(WORK_ENABLE
, &tp
->flags
);
2301 usb_kill_urb(tp
->intr_urb
);
2302 cancel_delayed_work_sync(&tp
->schedule
);
2303 netif_stop_queue(netdev
);
2304 tasklet_disable(&tp
->tl
);
2305 tp
->rtl_ops
.disable(tp
);
2306 tasklet_enable(&tp
->tl
);
2311 static void rtl_clear_bp(struct r8152
*tp
)
2313 ocp_write_dword(tp
, MCU_TYPE_PLA
, PLA_BP_0
, 0);
2314 ocp_write_dword(tp
, MCU_TYPE_PLA
, PLA_BP_2
, 0);
2315 ocp_write_dword(tp
, MCU_TYPE_PLA
, PLA_BP_4
, 0);
2316 ocp_write_dword(tp
, MCU_TYPE_PLA
, PLA_BP_6
, 0);
2317 ocp_write_dword(tp
, MCU_TYPE_USB
, USB_BP_0
, 0);
2318 ocp_write_dword(tp
, MCU_TYPE_USB
, USB_BP_2
, 0);
2319 ocp_write_dword(tp
, MCU_TYPE_USB
, USB_BP_4
, 0);
2320 ocp_write_dword(tp
, MCU_TYPE_USB
, USB_BP_6
, 0);
2322 ocp_write_word(tp
, MCU_TYPE_PLA
, PLA_BP_BA
, 0);
2323 ocp_write_word(tp
, MCU_TYPE_USB
, USB_BP_BA
, 0);
2326 static void r8153_clear_bp(struct r8152
*tp
)
2328 ocp_write_byte(tp
, MCU_TYPE_PLA
, PLA_BP_EN
, 0);
2329 ocp_write_byte(tp
, MCU_TYPE_USB
, USB_BP_EN
, 0);
2333 static void r8152b_enable_eee(struct r8152
*tp
)
2337 ocp_data
= ocp_read_word(tp
, MCU_TYPE_PLA
, PLA_EEE_CR
);
2338 ocp_data
|= EEE_RX_EN
| EEE_TX_EN
;
2339 ocp_write_word(tp
, MCU_TYPE_PLA
, PLA_EEE_CR
, ocp_data
);
2340 ocp_reg_write(tp
, OCP_EEE_CONFIG1
, RG_TXLPI_MSK_HFDUP
| RG_MATCLR_EN
|
2341 EEE_10_CAP
| EEE_NWAY_EN
|
2342 TX_QUIET_EN
| RX_QUIET_EN
|
2343 SDRISETIME
| RG_RXLPI_MSK_HFDUP
|
2345 ocp_reg_write(tp
, OCP_EEE_CONFIG2
, RG_LPIHYS_NUM
| RG_DACQUIET_EN
|
2346 RG_LDVQUIET_EN
| RG_CKRSEL
|
2348 ocp_reg_write(tp
, OCP_EEE_CONFIG3
, FST_SNR_EYE_R
| RG_LFS_SEL
| MSK_PH
);
2349 ocp_reg_write(tp
, OCP_EEE_AR
, FUN_ADDR
| DEVICE_ADDR
);
2350 ocp_reg_write(tp
, OCP_EEE_DATA
, EEE_ADDR
);
2351 ocp_reg_write(tp
, OCP_EEE_AR
, FUN_DATA
| DEVICE_ADDR
);
2352 ocp_reg_write(tp
, OCP_EEE_DATA
, EEE_DATA
);
2353 ocp_reg_write(tp
, OCP_EEE_AR
, 0x0000);
2356 static void r8153_enable_eee(struct r8152
*tp
)
2361 ocp_data
= ocp_read_word(tp
, MCU_TYPE_PLA
, PLA_EEE_CR
);
2362 ocp_data
|= EEE_RX_EN
| EEE_TX_EN
;
2363 ocp_write_word(tp
, MCU_TYPE_PLA
, PLA_EEE_CR
, ocp_data
);
2364 data
= ocp_reg_read(tp
, OCP_EEE_CFG
);
2366 ocp_reg_write(tp
, OCP_EEE_CFG
, data
);
2367 data
= ocp_reg_read(tp
, OCP_EEE_CFG2
);
2368 data
|= MY1000_EEE
| MY100_EEE
;
2369 ocp_reg_write(tp
, OCP_EEE_CFG2
, data
);
2372 static void r8152b_enable_fc(struct r8152
*tp
)
2376 anar
= r8152_mdio_read(tp
, MII_ADVERTISE
);
2377 anar
|= ADVERTISE_PAUSE_CAP
| ADVERTISE_PAUSE_ASYM
;
2378 r8152_mdio_write(tp
, MII_ADVERTISE
, anar
);
2381 static void r8152b_hw_phy_cfg(struct r8152
*tp
)
2383 r8152_mdio_write(tp
, MII_BMCR
, BMCR_ANENABLE
);
2384 r8152b_disable_aldps(tp
);
2387 static void r8152b_init(struct r8152
*tp
)
2394 if (tp
->version
== RTL_VER_01
) {
2395 ocp_data
= ocp_read_word(tp
, MCU_TYPE_PLA
, PLA_LED_FEATURE
);
2396 ocp_data
&= ~LED_MODE_MASK
;
2397 ocp_write_word(tp
, MCU_TYPE_PLA
, PLA_LED_FEATURE
, ocp_data
);
2400 r8152b_hw_phy_cfg(tp
);
2402 ocp_data
= ocp_read_word(tp
, MCU_TYPE_USB
, USB_UPS_CTRL
);
2403 ocp_data
&= ~POWER_CUT
;
2404 ocp_write_word(tp
, MCU_TYPE_USB
, USB_UPS_CTRL
, ocp_data
);
2406 ocp_data
= ocp_read_word(tp
, MCU_TYPE_USB
, USB_PM_CTRL_STATUS
);
2407 ocp_data
&= ~RESUME_INDICATE
;
2408 ocp_write_word(tp
, MCU_TYPE_USB
, USB_PM_CTRL_STATUS
, ocp_data
);
2410 r8152b_exit_oob(tp
);
2412 ocp_data
= ocp_read_word(tp
, MCU_TYPE_PLA
, PLA_PHY_PWR
);
2413 ocp_data
|= TX_10M_IDLE_EN
| PFM_PWM_SWITCH
;
2414 ocp_write_word(tp
, MCU_TYPE_PLA
, PLA_PHY_PWR
, ocp_data
);
2415 ocp_data
= ocp_read_dword(tp
, MCU_TYPE_PLA
, PLA_MAC_PWR_CTRL
);
2416 ocp_data
&= ~MCU_CLK_RATIO_MASK
;
2417 ocp_data
|= MCU_CLK_RATIO
| D3_CLK_GATED_EN
;
2418 ocp_write_dword(tp
, MCU_TYPE_PLA
, PLA_MAC_PWR_CTRL
, ocp_data
);
2419 ocp_data
= GPHY_STS_MSK
| SPEED_DOWN_MSK
|
2420 SPDWN_RXDV_MSK
| SPDWN_LINKCHG_MSK
;
2421 ocp_write_word(tp
, MCU_TYPE_PLA
, PLA_GPHY_INTR_IMR
, ocp_data
);
2423 r8152b_enable_eee(tp
);
2424 r8152b_enable_aldps(tp
);
2425 r8152b_enable_fc(tp
);
2427 r8152_mdio_write(tp
, MII_BMCR
, BMCR_RESET
| BMCR_ANENABLE
|
2429 for (i
= 0; i
< 100; i
++) {
2431 if (!(r8152_mdio_read(tp
, MII_BMCR
) & BMCR_RESET
))
2435 /* enable rx aggregation */
2436 ocp_data
= ocp_read_word(tp
, MCU_TYPE_USB
, USB_USB_CTRL
);
2437 ocp_data
&= ~RX_AGG_DISABLE
;
2438 ocp_write_word(tp
, MCU_TYPE_USB
, USB_USB_CTRL
, ocp_data
);
2441 static void r8153_init(struct r8152
*tp
)
2446 r8153_u1u2en(tp
, 0);
2448 for (i
= 0; i
< 500; i
++) {
2449 if (ocp_read_word(tp
, MCU_TYPE_PLA
, PLA_BOOT_CTRL
) &
2455 for (i
= 0; i
< 500; i
++) {
2456 ocp_data
= ocp_reg_read(tp
, OCP_PHY_STATUS
) & PHY_STAT_MASK
;
2457 if (ocp_data
== PHY_STAT_LAN_ON
|| ocp_data
== PHY_STAT_PWRDN
)
2462 r8153_u2p3en(tp
, 0);
2464 ocp_data
= ocp_read_word(tp
, MCU_TYPE_USB
, USB_WDT11_CTRL
);
2465 ocp_data
&= ~TIMER11_EN
;
2466 ocp_write_word(tp
, MCU_TYPE_USB
, USB_WDT11_CTRL
, ocp_data
);
2470 ocp_data
= ocp_read_word(tp
, MCU_TYPE_PLA
, PLA_LED_FEATURE
);
2471 ocp_data
&= ~LED_MODE_MASK
;
2472 ocp_write_word(tp
, MCU_TYPE_PLA
, PLA_LED_FEATURE
, ocp_data
);
2474 ocp_data
= ocp_read_byte(tp
, MCU_TYPE_USB
, USB_LPM_CTRL
);
2475 ocp_data
&= ~LPM_TIMER_MASK
;
2476 if (tp
->udev
->speed
== USB_SPEED_SUPER
)
2477 ocp_data
|= LPM_TIMER_500US
;
2479 ocp_data
|= LPM_TIMER_500MS
;
2480 ocp_write_byte(tp
, MCU_TYPE_USB
, USB_LPM_CTRL
, ocp_data
);
2482 ocp_data
= ocp_read_word(tp
, MCU_TYPE_USB
, USB_AFE_CTRL2
);
2483 ocp_data
&= ~SEN_VAL_MASK
;
2484 ocp_data
|= SEN_VAL_NORMAL
| SEL_RXIDLE
;
2485 ocp_write_word(tp
, MCU_TYPE_USB
, USB_AFE_CTRL2
, ocp_data
);
2487 r8153_power_cut_en(tp
, 0);
2488 r8153_u1u2en(tp
, 1);
2490 r8153_first_init(tp
);
2492 ocp_write_word(tp
, MCU_TYPE_PLA
, PLA_MAC_PWR_CTRL
, ALDPS_SPDWN_RATIO
);
2493 ocp_write_word(tp
, MCU_TYPE_PLA
, PLA_MAC_PWR_CTRL2
, EEE_SPDWN_RATIO
);
2494 ocp_write_word(tp
, MCU_TYPE_PLA
, PLA_MAC_PWR_CTRL3
,
2495 PKT_AVAIL_SPDWN_EN
| SUSPEND_SPDWN_EN
|
2496 U1U2_SPDWN_EN
| L1_SPDWN_EN
);
2497 ocp_write_word(tp
, MCU_TYPE_PLA
, PLA_MAC_PWR_CTRL4
,
2498 PWRSAVE_SPDWN_EN
| RXDV_SPDWN_EN
| TX10MIDLE_EN
|
2499 TP100_SPDWN_EN
| TP500_SPDWN_EN
| TP1000_SPDWN_EN
|
2502 r8153_enable_eee(tp
);
2503 r8153_enable_aldps(tp
);
2504 r8152b_enable_fc(tp
);
2506 r8152_mdio_write(tp
, MII_BMCR
, BMCR_RESET
| BMCR_ANENABLE
|
2510 static int rtl8152_suspend(struct usb_interface
*intf
, pm_message_t message
)
2512 struct r8152
*tp
= usb_get_intfdata(intf
);
2514 netif_device_detach(tp
->netdev
);
2516 if (netif_running(tp
->netdev
)) {
2517 clear_bit(WORK_ENABLE
, &tp
->flags
);
2518 usb_kill_urb(tp
->intr_urb
);
2519 cancel_delayed_work_sync(&tp
->schedule
);
2520 tasklet_disable(&tp
->tl
);
2523 tp
->rtl_ops
.down(tp
);
2528 static int rtl8152_resume(struct usb_interface
*intf
)
2530 struct r8152
*tp
= usb_get_intfdata(intf
);
2532 tp
->rtl_ops
.init(tp
);
2533 netif_device_attach(tp
->netdev
);
2534 if (netif_running(tp
->netdev
)) {
2535 rtl8152_set_speed(tp
, AUTONEG_ENABLE
,
2536 tp
->mii
.supports_gmii
? SPEED_1000
: SPEED_100
,
2539 netif_carrier_off(tp
->netdev
);
2540 set_bit(WORK_ENABLE
, &tp
->flags
);
2541 usb_submit_urb(tp
->intr_urb
, GFP_KERNEL
);
2542 tasklet_enable(&tp
->tl
);
2548 static void rtl8152_get_drvinfo(struct net_device
*netdev
,
2549 struct ethtool_drvinfo
*info
)
2551 struct r8152
*tp
= netdev_priv(netdev
);
2553 strncpy(info
->driver
, MODULENAME
, ETHTOOL_BUSINFO_LEN
);
2554 strncpy(info
->version
, DRIVER_VERSION
, ETHTOOL_BUSINFO_LEN
);
2555 usb_make_path(tp
->udev
, info
->bus_info
, sizeof(info
->bus_info
));
2559 int rtl8152_get_settings(struct net_device
*netdev
, struct ethtool_cmd
*cmd
)
2561 struct r8152
*tp
= netdev_priv(netdev
);
2563 if (!tp
->mii
.mdio_read
)
2566 return mii_ethtool_gset(&tp
->mii
, cmd
);
2569 static int rtl8152_set_settings(struct net_device
*dev
, struct ethtool_cmd
*cmd
)
2571 struct r8152
*tp
= netdev_priv(dev
);
2573 return rtl8152_set_speed(tp
, cmd
->autoneg
, cmd
->speed
, cmd
->duplex
);
2576 static struct ethtool_ops ops
= {
2577 .get_drvinfo
= rtl8152_get_drvinfo
,
2578 .get_settings
= rtl8152_get_settings
,
2579 .set_settings
= rtl8152_set_settings
,
2580 .get_link
= ethtool_op_get_link
,
2583 static int rtl8152_ioctl(struct net_device
*netdev
, struct ifreq
*rq
, int cmd
)
2585 struct r8152
*tp
= netdev_priv(netdev
);
2586 struct mii_ioctl_data
*data
= if_mii(rq
);
2591 data
->phy_id
= R8152_PHY_ID
; /* Internal PHY */
2595 data
->val_out
= r8152_mdio_read(tp
, data
->reg_num
);
2599 if (!capable(CAP_NET_ADMIN
)) {
2603 r8152_mdio_write(tp
, data
->reg_num
, data
->val_in
);
2613 static const struct net_device_ops rtl8152_netdev_ops
= {
2614 .ndo_open
= rtl8152_open
,
2615 .ndo_stop
= rtl8152_close
,
2616 .ndo_do_ioctl
= rtl8152_ioctl
,
2617 .ndo_start_xmit
= rtl8152_start_xmit
,
2618 .ndo_tx_timeout
= rtl8152_tx_timeout
,
2619 .ndo_set_rx_mode
= rtl8152_set_rx_mode
,
2620 .ndo_set_mac_address
= rtl8152_set_mac_address
,
2622 .ndo_change_mtu
= eth_change_mtu
,
2623 .ndo_validate_addr
= eth_validate_addr
,
2626 static void r8152b_get_version(struct r8152
*tp
)
2631 ocp_data
= ocp_read_word(tp
, MCU_TYPE_PLA
, PLA_TCR1
);
2632 version
= (u16
)(ocp_data
& VERSION_MASK
);
2636 tp
->version
= RTL_VER_01
;
2639 tp
->version
= RTL_VER_02
;
2642 tp
->version
= RTL_VER_03
;
2643 tp
->mii
.supports_gmii
= 1;
2646 tp
->version
= RTL_VER_04
;
2647 tp
->mii
.supports_gmii
= 1;
2650 tp
->version
= RTL_VER_05
;
2651 tp
->mii
.supports_gmii
= 1;
2654 netif_info(tp
, probe
, tp
->netdev
,
2655 "Unknown version 0x%04x\n", version
);
2660 static void rtl8152_unload(struct r8152
*tp
)
2664 if (tp
->version
!= RTL_VER_01
) {
2665 ocp_data
= ocp_read_word(tp
, MCU_TYPE_USB
, USB_UPS_CTRL
);
2666 ocp_data
|= POWER_CUT
;
2667 ocp_write_word(tp
, MCU_TYPE_USB
, USB_UPS_CTRL
, ocp_data
);
2670 ocp_data
= ocp_read_word(tp
, MCU_TYPE_USB
, USB_PM_CTRL_STATUS
);
2671 ocp_data
&= ~RESUME_INDICATE
;
2672 ocp_write_word(tp
, MCU_TYPE_USB
, USB_PM_CTRL_STATUS
, ocp_data
);
2675 static void rtl8153_unload(struct r8152
*tp
)
2677 r8153_power_cut_en(tp
, 1);
2680 static int rtl_ops_init(struct r8152
*tp
, const struct usb_device_id
*id
)
2682 struct rtl_ops
*ops
= &tp
->rtl_ops
;
2685 switch (id
->idVendor
) {
2686 case VENDOR_ID_REALTEK
:
2687 switch (id
->idProduct
) {
2688 case PRODUCT_ID_RTL8152
:
2689 ops
->init
= r8152b_init
;
2690 ops
->enable
= rtl8152_enable
;
2691 ops
->disable
= rtl8152_disable
;
2692 ops
->down
= rtl8152_down
;
2693 ops
->unload
= rtl8152_unload
;
2696 case PRODUCT_ID_RTL8153
:
2697 ops
->init
= r8153_init
;
2698 ops
->enable
= rtl8153_enable
;
2699 ops
->disable
= rtl8152_disable
;
2700 ops
->down
= rtl8153_down
;
2701 ops
->unload
= rtl8153_unload
;
2709 case VENDOR_ID_SAMSUNG
:
2710 switch (id
->idProduct
) {
2711 case PRODUCT_ID_SAMSUNG
:
2712 ops
->init
= r8153_init
;
2713 ops
->enable
= rtl8153_enable
;
2714 ops
->disable
= rtl8152_disable
;
2715 ops
->down
= rtl8153_down
;
2716 ops
->unload
= rtl8153_unload
;
2729 netif_err(tp
, probe
, tp
->netdev
, "Unknown Device\n");
2734 static int rtl8152_probe(struct usb_interface
*intf
,
2735 const struct usb_device_id
*id
)
2737 struct usb_device
*udev
= interface_to_usbdev(intf
);
2739 struct net_device
*netdev
;
2742 netdev
= alloc_etherdev(sizeof(struct r8152
));
2744 dev_err(&intf
->dev
, "Out of memory\n");
2748 SET_NETDEV_DEV(netdev
, &intf
->dev
);
2749 tp
= netdev_priv(netdev
);
2750 tp
->msg_enable
= 0x7FFF;
2753 tp
->netdev
= netdev
;
2756 ret
= rtl_ops_init(tp
, id
);
2760 tasklet_init(&tp
->tl
, bottom_half
, (unsigned long)tp
);
2761 INIT_DELAYED_WORK(&tp
->schedule
, rtl_work_func_t
);
2763 netdev
->netdev_ops
= &rtl8152_netdev_ops
;
2764 netdev
->watchdog_timeo
= RTL8152_TX_TIMEOUT
;
2766 netdev
->features
|= NETIF_F_IP_CSUM
;
2767 netdev
->hw_features
= NETIF_F_IP_CSUM
;
2768 SET_ETHTOOL_OPS(netdev
, &ops
);
2770 tp
->mii
.dev
= netdev
;
2771 tp
->mii
.mdio_read
= read_mii_word
;
2772 tp
->mii
.mdio_write
= write_mii_word
;
2773 tp
->mii
.phy_id_mask
= 0x3f;
2774 tp
->mii
.reg_num_mask
= 0x1f;
2775 tp
->mii
.phy_id
= R8152_PHY_ID
;
2776 tp
->mii
.supports_gmii
= 0;
2778 r8152b_get_version(tp
);
2779 tp
->rtl_ops
.init(tp
);
2780 set_ethernet_addr(tp
);
2782 ret
= alloc_all_mem(tp
);
2786 usb_set_intfdata(intf
, tp
);
2788 ret
= register_netdev(netdev
);
2790 netif_err(tp
, probe
, netdev
, "couldn't register the device\n");
2794 netif_info(tp
, probe
, netdev
, "%s\n", DRIVER_VERSION
);
2799 usb_set_intfdata(intf
, NULL
);
2801 free_netdev(netdev
);
2805 static void rtl8152_disconnect(struct usb_interface
*intf
)
2807 struct r8152
*tp
= usb_get_intfdata(intf
);
2809 usb_set_intfdata(intf
, NULL
);
2811 set_bit(RTL8152_UNPLUG
, &tp
->flags
);
2812 tasklet_kill(&tp
->tl
);
2813 unregister_netdev(tp
->netdev
);
2814 tp
->rtl_ops
.unload(tp
);
2816 free_netdev(tp
->netdev
);
2820 /* table of devices that work with this driver */
2821 static struct usb_device_id rtl8152_table
[] = {
2822 {REALTEK_USB_DEVICE(VENDOR_ID_REALTEK
, PRODUCT_ID_RTL8152
)},
2823 {REALTEK_USB_DEVICE(VENDOR_ID_REALTEK
, PRODUCT_ID_RTL8153
)},
2824 {REALTEK_USB_DEVICE(VENDOR_ID_SAMSUNG
, PRODUCT_ID_SAMSUNG
)},
2828 MODULE_DEVICE_TABLE(usb
, rtl8152_table
);
2830 static struct usb_driver rtl8152_driver
= {
2832 .id_table
= rtl8152_table
,
2833 .probe
= rtl8152_probe
,
2834 .disconnect
= rtl8152_disconnect
,
2835 .suspend
= rtl8152_suspend
,
2836 .resume
= rtl8152_resume
,
2837 .reset_resume
= rtl8152_resume
,
2840 module_usb_driver(rtl8152_driver
);
2842 MODULE_AUTHOR(DRIVER_AUTHOR
);
2843 MODULE_DESCRIPTION(DRIVER_DESC
);
2844 MODULE_LICENSE("GPL");