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PM / sleep: Asynchronous threads for suspend_noirq
[linux/fpc-iii.git] / drivers / net / wireless / iwlegacy / common.c
blob02e8233ccf29865e988eed0be9036c7dfc2179c8
1 /******************************************************************************
2 *
3 * GPL LICENSE SUMMARY
4 *
5 * Copyright(c) 2008 - 2011 Intel Corporation. All rights reserved.
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of version 2 of the GNU General Public License as
9 * published by the Free Software Foundation.
10 *
11 * This program is distributed in the hope that it will be useful, but
12 * WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
14 * General Public License for more details.
15 *
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110,
19 * USA
20 *
21 * The full GNU General Public License is included in this distribution
22 * in the file called LICENSE.GPL.
23 *
24 * Contact Information:
25 * Intel Linux Wireless <ilw@linux.intel.com>
26 * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
27 *****************************************************************************/
28
29 #include <linux/kernel.h>
30 #include <linux/module.h>
31 #include <linux/etherdevice.h>
32 #include <linux/sched.h>
33 #include <linux/slab.h>
34 #include <linux/types.h>
35 #include <linux/lockdep.h>
36 #include <linux/pci.h>
37 #include <linux/dma-mapping.h>
38 #include <linux/delay.h>
39 #include <linux/skbuff.h>
40 #include <net/mac80211.h>
41
42 #include "common.h"
43
44 int
45 _il_poll_bit(struct il_priv *il, u32 addr, u32 bits, u32 mask, int timeout)
46 {
47 const int interval = 10; /* microseconds */
48 int t = 0;
49
50 do {
51 if ((_il_rd(il, addr) & mask) == (bits & mask))
52 return t;
53 udelay(interval);
54 t += interval;
55 } while (t < timeout);
56
57 return -ETIMEDOUT;
58 }
59 EXPORT_SYMBOL(_il_poll_bit);
60
61 void
62 il_set_bit(struct il_priv *p, u32 r, u32 m)
63 {
64 unsigned long reg_flags;
65
66 spin_lock_irqsave(&p->reg_lock, reg_flags);
67 _il_set_bit(p, r, m);
68 spin_unlock_irqrestore(&p->reg_lock, reg_flags);
69 }
70 EXPORT_SYMBOL(il_set_bit);
71
72 void
73 il_clear_bit(struct il_priv *p, u32 r, u32 m)
74 {
75 unsigned long reg_flags;
76
77 spin_lock_irqsave(&p->reg_lock, reg_flags);
78 _il_clear_bit(p, r, m);
79 spin_unlock_irqrestore(&p->reg_lock, reg_flags);
80 }
81 EXPORT_SYMBOL(il_clear_bit);
82
83 bool
84 _il_grab_nic_access(struct il_priv *il)
85 {
86 int ret;
87 u32 val;
88
89 /* this bit wakes up the NIC */
90 _il_set_bit(il, CSR_GP_CNTRL, CSR_GP_CNTRL_REG_FLAG_MAC_ACCESS_REQ);
91
92 /*
93 * These bits say the device is running, and should keep running for
94 * at least a short while (at least as long as MAC_ACCESS_REQ stays 1),
95 * but they do not indicate that embedded SRAM is restored yet;
96 * 3945 and 4965 have volatile SRAM, and must save/restore contents
97 * to/from host DRAM when sleeping/waking for power-saving.
98 * Each direction takes approximately 1/4 millisecond; with this
99 * overhead, it's a good idea to grab and hold MAC_ACCESS_REQUEST if a
100 * series of register accesses are expected (e.g. reading Event Log),
101 * to keep device from sleeping.
102 *
103 * CSR_UCODE_DRV_GP1 register bit MAC_SLEEP == 0 indicates that
104 * SRAM is okay/restored. We don't check that here because this call
105 * is just for hardware register access; but GP1 MAC_SLEEP check is a
106 * good idea before accessing 3945/4965 SRAM (e.g. reading Event Log).
107 *
108 */
109 ret =
110 _il_poll_bit(il, CSR_GP_CNTRL, CSR_GP_CNTRL_REG_VAL_MAC_ACCESS_EN,
111 (CSR_GP_CNTRL_REG_FLAG_MAC_CLOCK_READY |
112 CSR_GP_CNTRL_REG_FLAG_GOING_TO_SLEEP), 15000);
113 if (unlikely(ret < 0)) {
114 val = _il_rd(il, CSR_GP_CNTRL);
115 WARN_ONCE(1, "Timeout waiting for ucode processor access "
116 "(CSR_GP_CNTRL 0x%08x)\n", val);
117 _il_wr(il, CSR_RESET, CSR_RESET_REG_FLAG_FORCE_NMI);
118 return false;
119 }
120
121 return true;
122 }
123 EXPORT_SYMBOL_GPL(_il_grab_nic_access);
124
125 int
126 il_poll_bit(struct il_priv *il, u32 addr, u32 mask, int timeout)
127 {
128 const int interval = 10; /* microseconds */
129 int t = 0;
130
131 do {
132 if ((il_rd(il, addr) & mask) == mask)
133 return t;
134 udelay(interval);
135 t += interval;
136 } while (t < timeout);
137
138 return -ETIMEDOUT;
139 }
140 EXPORT_SYMBOL(il_poll_bit);
141
142 u32
143 il_rd_prph(struct il_priv *il, u32 reg)
144 {
145 unsigned long reg_flags;
146 u32 val;
147
148 spin_lock_irqsave(&il->reg_lock, reg_flags);
149 _il_grab_nic_access(il);
150 val = _il_rd_prph(il, reg);
151 _il_release_nic_access(il);
152 spin_unlock_irqrestore(&il->reg_lock, reg_flags);
153 return val;
154 }
155 EXPORT_SYMBOL(il_rd_prph);
156
157 void
158 il_wr_prph(struct il_priv *il, u32 addr, u32 val)
159 {
160 unsigned long reg_flags;
161
162 spin_lock_irqsave(&il->reg_lock, reg_flags);
163 if (likely(_il_grab_nic_access(il))) {
164 _il_wr_prph(il, addr, val);
165 _il_release_nic_access(il);
166 }
167 spin_unlock_irqrestore(&il->reg_lock, reg_flags);
168 }
169 EXPORT_SYMBOL(il_wr_prph);
170
171 u32
172 il_read_targ_mem(struct il_priv *il, u32 addr)
173 {
174 unsigned long reg_flags;
175 u32 value;
176
177 spin_lock_irqsave(&il->reg_lock, reg_flags);
178 _il_grab_nic_access(il);
179
180 _il_wr(il, HBUS_TARG_MEM_RADDR, addr);
181 value = _il_rd(il, HBUS_TARG_MEM_RDAT);
182
183 _il_release_nic_access(il);
184 spin_unlock_irqrestore(&il->reg_lock, reg_flags);
185 return value;
186 }
187 EXPORT_SYMBOL(il_read_targ_mem);
188
189 void
190 il_write_targ_mem(struct il_priv *il, u32 addr, u32 val)
191 {
192 unsigned long reg_flags;
193
194 spin_lock_irqsave(&il->reg_lock, reg_flags);
195 if (likely(_il_grab_nic_access(il))) {
196 _il_wr(il, HBUS_TARG_MEM_WADDR, addr);
197 _il_wr(il, HBUS_TARG_MEM_WDAT, val);
198 _il_release_nic_access(il);
199 }
200 spin_unlock_irqrestore(&il->reg_lock, reg_flags);
201 }
202 EXPORT_SYMBOL(il_write_targ_mem);
203
204 const char *
205 il_get_cmd_string(u8 cmd)
206 {
207 switch (cmd) {
208 IL_CMD(N_ALIVE);
209 IL_CMD(N_ERROR);
210 IL_CMD(C_RXON);
211 IL_CMD(C_RXON_ASSOC);
212 IL_CMD(C_QOS_PARAM);
213 IL_CMD(C_RXON_TIMING);
214 IL_CMD(C_ADD_STA);
215 IL_CMD(C_REM_STA);
216 IL_CMD(C_WEPKEY);
217 IL_CMD(N_3945_RX);
218 IL_CMD(C_TX);
219 IL_CMD(C_RATE_SCALE);
220 IL_CMD(C_LEDS);
221 IL_CMD(C_TX_LINK_QUALITY_CMD);
222 IL_CMD(C_CHANNEL_SWITCH);
223 IL_CMD(N_CHANNEL_SWITCH);
224 IL_CMD(C_SPECTRUM_MEASUREMENT);
225 IL_CMD(N_SPECTRUM_MEASUREMENT);
226 IL_CMD(C_POWER_TBL);
227 IL_CMD(N_PM_SLEEP);
228 IL_CMD(N_PM_DEBUG_STATS);
229 IL_CMD(C_SCAN);
230 IL_CMD(C_SCAN_ABORT);
231 IL_CMD(N_SCAN_START);
232 IL_CMD(N_SCAN_RESULTS);
233 IL_CMD(N_SCAN_COMPLETE);
234 IL_CMD(N_BEACON);
235 IL_CMD(C_TX_BEACON);
236 IL_CMD(C_TX_PWR_TBL);
237 IL_CMD(C_BT_CONFIG);
238 IL_CMD(C_STATS);
239 IL_CMD(N_STATS);
240 IL_CMD(N_CARD_STATE);
241 IL_CMD(N_MISSED_BEACONS);
242 IL_CMD(C_CT_KILL_CONFIG);
243 IL_CMD(C_SENSITIVITY);
244 IL_CMD(C_PHY_CALIBRATION);
245 IL_CMD(N_RX_PHY);
246 IL_CMD(N_RX_MPDU);
247 IL_CMD(N_RX);
248 IL_CMD(N_COMPRESSED_BA);
249 default:
250 return "UNKNOWN";
251
252 }
253 }
254 EXPORT_SYMBOL(il_get_cmd_string);
255
256 #define HOST_COMPLETE_TIMEOUT (HZ / 2)
257
258 static void
259 il_generic_cmd_callback(struct il_priv *il, struct il_device_cmd *cmd,
260 struct il_rx_pkt *pkt)
261 {
262 if (pkt->hdr.flags & IL_CMD_FAILED_MSK) {
263 IL_ERR("Bad return from %s (0x%08X)\n",
264 il_get_cmd_string(cmd->hdr.cmd), pkt->hdr.flags);
265 return;
266 }
267 #ifdef CONFIG_IWLEGACY_DEBUG
268 switch (cmd->hdr.cmd) {
269 case C_TX_LINK_QUALITY_CMD:
270 case C_SENSITIVITY:
271 D_HC_DUMP("back from %s (0x%08X)\n",
272 il_get_cmd_string(cmd->hdr.cmd), pkt->hdr.flags);
273 break;
274 default:
275 D_HC("back from %s (0x%08X)\n", il_get_cmd_string(cmd->hdr.cmd),
276 pkt->hdr.flags);
277 }
278 #endif
279 }
280
281 static int
282 il_send_cmd_async(struct il_priv *il, struct il_host_cmd *cmd)
283 {
284 int ret;
285
286 BUG_ON(!(cmd->flags & CMD_ASYNC));
287
288 /* An asynchronous command can not expect an SKB to be set. */
289 BUG_ON(cmd->flags & CMD_WANT_SKB);
290
291 /* Assign a generic callback if one is not provided */
292 if (!cmd->callback)
293 cmd->callback = il_generic_cmd_callback;
294
295 if (test_bit(S_EXIT_PENDING, &il->status))
296 return -EBUSY;
297
298 ret = il_enqueue_hcmd(il, cmd);
299 if (ret < 0) {
300 IL_ERR("Error sending %s: enqueue_hcmd failed: %d\n",
301 il_get_cmd_string(cmd->id), ret);
302 return ret;
303 }
304 return 0;
305 }
306
307 int
308 il_send_cmd_sync(struct il_priv *il, struct il_host_cmd *cmd)
309 {
310 int cmd_idx;
311 int ret;
312
313 lockdep_assert_held(&il->mutex);
314
315 BUG_ON(cmd->flags & CMD_ASYNC);
316
317 /* A synchronous command can not have a callback set. */
318 BUG_ON(cmd->callback);
319
320 D_INFO("Attempting to send sync command %s\n",
321 il_get_cmd_string(cmd->id));
322
323 set_bit(S_HCMD_ACTIVE, &il->status);
324 D_INFO("Setting HCMD_ACTIVE for command %s\n",
325 il_get_cmd_string(cmd->id));
326
327 cmd_idx = il_enqueue_hcmd(il, cmd);
328 if (cmd_idx < 0) {
329 ret = cmd_idx;
330 IL_ERR("Error sending %s: enqueue_hcmd failed: %d\n",
331 il_get_cmd_string(cmd->id), ret);
332 goto out;
333 }
334
335 ret = wait_event_timeout(il->wait_command_queue,
336 !test_bit(S_HCMD_ACTIVE, &il->status),
337 HOST_COMPLETE_TIMEOUT);
338 if (!ret) {
339 if (test_bit(S_HCMD_ACTIVE, &il->status)) {
340 IL_ERR("Error sending %s: time out after %dms.\n",
341 il_get_cmd_string(cmd->id),
342 jiffies_to_msecs(HOST_COMPLETE_TIMEOUT));
343
344 clear_bit(S_HCMD_ACTIVE, &il->status);
345 D_INFO("Clearing HCMD_ACTIVE for command %s\n",
346 il_get_cmd_string(cmd->id));
347 ret = -ETIMEDOUT;
348 goto cancel;
349 }
350 }
351
352 if (test_bit(S_RFKILL, &il->status)) {
353 IL_ERR("Command %s aborted: RF KILL Switch\n",
354 il_get_cmd_string(cmd->id));
355 ret = -ECANCELED;
356 goto fail;
357 }
358 if (test_bit(S_FW_ERROR, &il->status)) {
359 IL_ERR("Command %s failed: FW Error\n",
360 il_get_cmd_string(cmd->id));
361 ret = -EIO;
362 goto fail;
363 }
364 if ((cmd->flags & CMD_WANT_SKB) && !cmd->reply_page) {
365 IL_ERR("Error: Response NULL in '%s'\n",
366 il_get_cmd_string(cmd->id));
367 ret = -EIO;
368 goto cancel;
369 }
370
371 ret = 0;
372 goto out;
373
374 cancel:
375 if (cmd->flags & CMD_WANT_SKB) {
376 /*
377 * Cancel the CMD_WANT_SKB flag for the cmd in the
378 * TX cmd queue. Otherwise in case the cmd comes
379 * in later, it will possibly set an invalid
380 * address (cmd->meta.source).
381 */
382 il->txq[il->cmd_queue].meta[cmd_idx].flags &= ~CMD_WANT_SKB;
383 }
384 fail:
385 if (cmd->reply_page) {
386 il_free_pages(il, cmd->reply_page);
387 cmd->reply_page = 0;
388 }
389 out:
390 return ret;
391 }
392 EXPORT_SYMBOL(il_send_cmd_sync);
393
394 int
395 il_send_cmd(struct il_priv *il, struct il_host_cmd *cmd)
396 {
397 if (cmd->flags & CMD_ASYNC)
398 return il_send_cmd_async(il, cmd);
399
400 return il_send_cmd_sync(il, cmd);
401 }
402 EXPORT_SYMBOL(il_send_cmd);
403
404 int
405 il_send_cmd_pdu(struct il_priv *il, u8 id, u16 len, const void *data)
406 {
407 struct il_host_cmd cmd = {
408 .id = id,
409 .len = len,
410 .data = data,
411 };
412
413 return il_send_cmd_sync(il, &cmd);
414 }
415 EXPORT_SYMBOL(il_send_cmd_pdu);
416
417 int
418 il_send_cmd_pdu_async(struct il_priv *il, u8 id, u16 len, const void *data,
419 void (*callback) (struct il_priv *il,
420 struct il_device_cmd *cmd,
421 struct il_rx_pkt *pkt))
422 {
423 struct il_host_cmd cmd = {
424 .id = id,
425 .len = len,
426 .data = data,
427 };
428
429 cmd.flags |= CMD_ASYNC;
430 cmd.callback = callback;
431
432 return il_send_cmd_async(il, &cmd);
433 }
434 EXPORT_SYMBOL(il_send_cmd_pdu_async);
435
436 /* default: IL_LED_BLINK(0) using blinking idx table */
437 static int led_mode;
438 module_param(led_mode, int, S_IRUGO);
439 MODULE_PARM_DESC(led_mode,
440 "0=system default, " "1=On(RF On)/Off(RF Off), 2=blinking");
441
442 /* Throughput OFF time(ms) ON time (ms)
443 * >300 25 25
444 * >200 to 300 40 40
445 * >100 to 200 55 55
446 * >70 to 100 65 65
447 * >50 to 70 75 75
448 * >20 to 50 85 85
449 * >10 to 20 95 95
450 * >5 to 10 110 110
451 * >1 to 5 130 130
452 * >0 to 1 167 167
453 * <=0 SOLID ON
454 */
455 static const struct ieee80211_tpt_blink il_blink[] = {
456 {.throughput = 0, .blink_time = 334},
457 {.throughput = 1 * 1024 - 1, .blink_time = 260},
458 {.throughput = 5 * 1024 - 1, .blink_time = 220},
459 {.throughput = 10 * 1024 - 1, .blink_time = 190},
460 {.throughput = 20 * 1024 - 1, .blink_time = 170},
461 {.throughput = 50 * 1024 - 1, .blink_time = 150},
462 {.throughput = 70 * 1024 - 1, .blink_time = 130},
463 {.throughput = 100 * 1024 - 1, .blink_time = 110},
464 {.throughput = 200 * 1024 - 1, .blink_time = 80},
465 {.throughput = 300 * 1024 - 1, .blink_time = 50},
466 };
467
468 /*
469 * Adjust led blink rate to compensate on a MAC Clock difference on every HW
470 * Led blink rate analysis showed an average deviation of 0% on 3945,
471 * 5% on 4965 HW.
472 * Need to compensate on the led on/off time per HW according to the deviation
473 * to achieve the desired led frequency
474 * The calculation is: (100-averageDeviation)/100 * blinkTime
475 * For code efficiency the calculation will be:
476 * compensation = (100 - averageDeviation) * 64 / 100
477 * NewBlinkTime = (compensation * BlinkTime) / 64
478 */
479 static inline u8
480 il_blink_compensation(struct il_priv *il, u8 time, u16 compensation)
481 {
482 if (!compensation) {
483 IL_ERR("undefined blink compensation: "
484 "use pre-defined blinking time\n");
485 return time;
486 }
487
488 return (u8) ((time * compensation) >> 6);
489 }
490
491 /* Set led pattern command */
492 static int
493 il_led_cmd(struct il_priv *il, unsigned long on, unsigned long off)
494 {
495 struct il_led_cmd led_cmd = {
496 .id = IL_LED_LINK,
497 .interval = IL_DEF_LED_INTRVL
498 };
499 int ret;
500
501 if (!test_bit(S_READY, &il->status))
502 return -EBUSY;
503
504 if (il->blink_on == on && il->blink_off == off)
505 return 0;
506
507 if (off == 0) {
508 /* led is SOLID_ON */
509 on = IL_LED_SOLID;
510 }
511
512 D_LED("Led blink time compensation=%u\n",
513 il->cfg->led_compensation);
514 led_cmd.on =
515 il_blink_compensation(il, on,
516 il->cfg->led_compensation);
517 led_cmd.off =
518 il_blink_compensation(il, off,
519 il->cfg->led_compensation);
520
521 ret = il->ops->send_led_cmd(il, &led_cmd);
522 if (!ret) {
523 il->blink_on = on;
524 il->blink_off = off;
525 }
526 return ret;
527 }
528
529 static void
530 il_led_brightness_set(struct led_classdev *led_cdev,
531 enum led_brightness brightness)
532 {
533 struct il_priv *il = container_of(led_cdev, struct il_priv, led);
534 unsigned long on = 0;
535
536 if (brightness > 0)
537 on = IL_LED_SOLID;
538
539 il_led_cmd(il, on, 0);
540 }
541
542 static int
543 il_led_blink_set(struct led_classdev *led_cdev, unsigned long *delay_on,
544 unsigned long *delay_off)
545 {
546 struct il_priv *il = container_of(led_cdev, struct il_priv, led);
547
548 return il_led_cmd(il, *delay_on, *delay_off);
549 }
550
551 void
552 il_leds_init(struct il_priv *il)
553 {
554 int mode = led_mode;
555 int ret;
556
557 if (mode == IL_LED_DEFAULT)
558 mode = il->cfg->led_mode;
559
560 il->led.name =
561 kasprintf(GFP_KERNEL, "%s-led", wiphy_name(il->hw->wiphy));
562 il->led.brightness_set = il_led_brightness_set;
563 il->led.blink_set = il_led_blink_set;
564 il->led.max_brightness = 1;
565
566 switch (mode) {
567 case IL_LED_DEFAULT:
568 WARN_ON(1);
569 break;
570 case IL_LED_BLINK:
571 il->led.default_trigger =
572 ieee80211_create_tpt_led_trigger(il->hw,
573 IEEE80211_TPT_LEDTRIG_FL_CONNECTED,
574 il_blink,
575 ARRAY_SIZE(il_blink));
576 break;
577 case IL_LED_RF_STATE:
578 il->led.default_trigger = ieee80211_get_radio_led_name(il->hw);
579 break;
580 }
581
582 ret = led_classdev_register(&il->pci_dev->dev, &il->led);
583 if (ret) {
584 kfree(il->led.name);
585 return;
586 }
587
588 il->led_registered = true;
589 }
590 EXPORT_SYMBOL(il_leds_init);
591
592 void
593 il_leds_exit(struct il_priv *il)
594 {
595 if (!il->led_registered)
596 return;
597
598 led_classdev_unregister(&il->led);
599 kfree(il->led.name);
600 }
601 EXPORT_SYMBOL(il_leds_exit);
602
603 /************************** EEPROM BANDS ****************************
604 *
605 * The il_eeprom_band definitions below provide the mapping from the
606 * EEPROM contents to the specific channel number supported for each
607 * band.
608 *
609 * For example, il_priv->eeprom.band_3_channels[4] from the band_3
610 * definition below maps to physical channel 42 in the 5.2GHz spectrum.
611 * The specific geography and calibration information for that channel
612 * is contained in the eeprom map itself.
613 *
614 * During init, we copy the eeprom information and channel map
615 * information into il->channel_info_24/52 and il->channel_map_24/52
616 *
617 * channel_map_24/52 provides the idx in the channel_info array for a
618 * given channel. We have to have two separate maps as there is channel
619 * overlap with the 2.4GHz and 5.2GHz spectrum as seen in band_1 and
620 * band_2
621 *
622 * A value of 0xff stored in the channel_map indicates that the channel
623 * is not supported by the hardware at all.
624 *
625 * A value of 0xfe in the channel_map indicates that the channel is not
626 * valid for Tx with the current hardware. This means that
627 * while the system can tune and receive on a given channel, it may not
628 * be able to associate or transmit any frames on that
629 * channel. There is no corresponding channel information for that
630 * entry.
631 *
632 *********************************************************************/
633
634 /* 2.4 GHz */
635 const u8 il_eeprom_band_1[14] = {
636 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14
637 };
638
639 /* 5.2 GHz bands */
640 static const u8 il_eeprom_band_2[] = { /* 4915-5080MHz */
641 183, 184, 185, 187, 188, 189, 192, 196, 7, 8, 11, 12, 16
642 };
643
644 static const u8 il_eeprom_band_3[] = { /* 5170-5320MHz */
645 34, 36, 38, 40, 42, 44, 46, 48, 52, 56, 60, 64
646 };
647
648 static const u8 il_eeprom_band_4[] = { /* 5500-5700MHz */
649 100, 104, 108, 112, 116, 120, 124, 128, 132, 136, 140
650 };
651
652 static const u8 il_eeprom_band_5[] = { /* 5725-5825MHz */
653 145, 149, 153, 157, 161, 165
654 };
655
656 static const u8 il_eeprom_band_6[] = { /* 2.4 ht40 channel */
657 1, 2, 3, 4, 5, 6, 7
658 };
659
660 static const u8 il_eeprom_band_7[] = { /* 5.2 ht40 channel */
661 36, 44, 52, 60, 100, 108, 116, 124, 132, 149, 157
662 };
663
664 /******************************************************************************
665 *
666 * EEPROM related functions
667 *
668 ******************************************************************************/
669
670 static int
671 il_eeprom_verify_signature(struct il_priv *il)
672 {
673 u32 gp = _il_rd(il, CSR_EEPROM_GP) & CSR_EEPROM_GP_VALID_MSK;
674 int ret = 0;
675
676 D_EEPROM("EEPROM signature=0x%08x\n", gp);
677 switch (gp) {
678 case CSR_EEPROM_GP_GOOD_SIG_EEP_LESS_THAN_4K:
679 case CSR_EEPROM_GP_GOOD_SIG_EEP_MORE_THAN_4K:
680 break;
681 default:
682 IL_ERR("bad EEPROM signature," "EEPROM_GP=0x%08x\n", gp);
683 ret = -ENOENT;
684 break;
685 }
686 return ret;
687 }
688
689 const u8 *
690 il_eeprom_query_addr(const struct il_priv *il, size_t offset)
691 {
692 BUG_ON(offset >= il->cfg->eeprom_size);
693 return &il->eeprom[offset];
694 }
695 EXPORT_SYMBOL(il_eeprom_query_addr);
696
697 u16
698 il_eeprom_query16(const struct il_priv *il, size_t offset)
699 {
700 if (!il->eeprom)
701 return 0;
702 return (u16) il->eeprom[offset] | ((u16) il->eeprom[offset + 1] << 8);
703 }
704 EXPORT_SYMBOL(il_eeprom_query16);
705
706 /**
707 * il_eeprom_init - read EEPROM contents
708 *
709 * Load the EEPROM contents from adapter into il->eeprom
710 *
711 * NOTE: This routine uses the non-debug IO access functions.
712 */
713 int
714 il_eeprom_init(struct il_priv *il)
715 {
716 __le16 *e;
717 u32 gp = _il_rd(il, CSR_EEPROM_GP);
718 int sz;
719 int ret;
720 u16 addr;
721
722 /* allocate eeprom */
723 sz = il->cfg->eeprom_size;
724 D_EEPROM("NVM size = %d\n", sz);
725 il->eeprom = kzalloc(sz, GFP_KERNEL);
726 if (!il->eeprom) {
727 ret = -ENOMEM;
728 goto alloc_err;
729 }
730 e = (__le16 *) il->eeprom;
731
732 il->ops->apm_init(il);
733
734 ret = il_eeprom_verify_signature(il);
735 if (ret < 0) {
736 IL_ERR("EEPROM not found, EEPROM_GP=0x%08x\n", gp);
737 ret = -ENOENT;
738 goto err;
739 }
740
741 /* Make sure driver (instead of uCode) is allowed to read EEPROM */
742 ret = il->ops->eeprom_acquire_semaphore(il);
743 if (ret < 0) {
744 IL_ERR("Failed to acquire EEPROM semaphore.\n");
745 ret = -ENOENT;
746 goto err;
747 }
748
749 /* eeprom is an array of 16bit values */
750 for (addr = 0; addr < sz; addr += sizeof(u16)) {
751 u32 r;
752
753 _il_wr(il, CSR_EEPROM_REG,
754 CSR_EEPROM_REG_MSK_ADDR & (addr << 1));
755
756 ret =
757 _il_poll_bit(il, CSR_EEPROM_REG,
758 CSR_EEPROM_REG_READ_VALID_MSK,
759 CSR_EEPROM_REG_READ_VALID_MSK,
760 IL_EEPROM_ACCESS_TIMEOUT);
761 if (ret < 0) {
762 IL_ERR("Time out reading EEPROM[%d]\n", addr);
763 goto done;
764 }
765 r = _il_rd(il, CSR_EEPROM_REG);
766 e[addr / 2] = cpu_to_le16(r >> 16);
767 }
768
769 D_EEPROM("NVM Type: %s, version: 0x%x\n", "EEPROM",
770 il_eeprom_query16(il, EEPROM_VERSION));
771
772 ret = 0;
773 done:
774 il->ops->eeprom_release_semaphore(il);
775
776 err:
777 if (ret)
778 il_eeprom_free(il);
779 /* Reset chip to save power until we load uCode during "up". */
780 il_apm_stop(il);
781 alloc_err:
782 return ret;
783 }
784 EXPORT_SYMBOL(il_eeprom_init);
785
786 void
787 il_eeprom_free(struct il_priv *il)
788 {
789 kfree(il->eeprom);
790 il->eeprom = NULL;
791 }
792 EXPORT_SYMBOL(il_eeprom_free);
793
794 static void
795 il_init_band_reference(const struct il_priv *il, int eep_band,
796 int *eeprom_ch_count,
797 const struct il_eeprom_channel **eeprom_ch_info,
798 const u8 **eeprom_ch_idx)
799 {
800 u32 offset = il->cfg->regulatory_bands[eep_band - 1];
801
802 switch (eep_band) {
803 case 1: /* 2.4GHz band */
804 *eeprom_ch_count = ARRAY_SIZE(il_eeprom_band_1);
805 *eeprom_ch_info =
806 (struct il_eeprom_channel *)il_eeprom_query_addr(il,
807 offset);
808 *eeprom_ch_idx = il_eeprom_band_1;
809 break;
810 case 2: /* 4.9GHz band */
811 *eeprom_ch_count = ARRAY_SIZE(il_eeprom_band_2);
812 *eeprom_ch_info =
813 (struct il_eeprom_channel *)il_eeprom_query_addr(il,
814 offset);
815 *eeprom_ch_idx = il_eeprom_band_2;
816 break;
817 case 3: /* 5.2GHz band */
818 *eeprom_ch_count = ARRAY_SIZE(il_eeprom_band_3);
819 *eeprom_ch_info =
820 (struct il_eeprom_channel *)il_eeprom_query_addr(il,
821 offset);
822 *eeprom_ch_idx = il_eeprom_band_3;
823 break;
824 case 4: /* 5.5GHz band */
825 *eeprom_ch_count = ARRAY_SIZE(il_eeprom_band_4);
826 *eeprom_ch_info =
827 (struct il_eeprom_channel *)il_eeprom_query_addr(il,
828 offset);
829 *eeprom_ch_idx = il_eeprom_band_4;
830 break;
831 case 5: /* 5.7GHz band */
832 *eeprom_ch_count = ARRAY_SIZE(il_eeprom_band_5);
833 *eeprom_ch_info =
834 (struct il_eeprom_channel *)il_eeprom_query_addr(il,
835 offset);
836 *eeprom_ch_idx = il_eeprom_band_5;
837 break;
838 case 6: /* 2.4GHz ht40 channels */
839 *eeprom_ch_count = ARRAY_SIZE(il_eeprom_band_6);
840 *eeprom_ch_info =
841 (struct il_eeprom_channel *)il_eeprom_query_addr(il,
842 offset);
843 *eeprom_ch_idx = il_eeprom_band_6;
844 break;
845 case 7: /* 5 GHz ht40 channels */
846 *eeprom_ch_count = ARRAY_SIZE(il_eeprom_band_7);
847 *eeprom_ch_info =
848 (struct il_eeprom_channel *)il_eeprom_query_addr(il,
849 offset);
850 *eeprom_ch_idx = il_eeprom_band_7;
851 break;
852 default:
853 BUG();
854 }
855 }
856
857 #define CHECK_AND_PRINT(x) ((eeprom_ch->flags & EEPROM_CHANNEL_##x) \
858 ? # x " " : "")
859 /**
860 * il_mod_ht40_chan_info - Copy ht40 channel info into driver's il.
861 *
862 * Does not set up a command, or touch hardware.
863 */
864 static int
865 il_mod_ht40_chan_info(struct il_priv *il, enum ieee80211_band band, u16 channel,
866 const struct il_eeprom_channel *eeprom_ch,
867 u8 clear_ht40_extension_channel)
868 {
869 struct il_channel_info *ch_info;
870
871 ch_info =
872 (struct il_channel_info *)il_get_channel_info(il, band, channel);
873
874 if (!il_is_channel_valid(ch_info))
875 return -1;
876
877 D_EEPROM("HT40 Ch. %d [%sGHz] %s%s%s%s%s(0x%02x %ddBm):"
878 " Ad-Hoc %ssupported\n", ch_info->channel,
879 il_is_channel_a_band(ch_info) ? "5.2" : "2.4",
880 CHECK_AND_PRINT(IBSS), CHECK_AND_PRINT(ACTIVE),
881 CHECK_AND_PRINT(RADAR), CHECK_AND_PRINT(WIDE),
882 CHECK_AND_PRINT(DFS), eeprom_ch->flags,
883 eeprom_ch->max_power_avg,
884 ((eeprom_ch->flags & EEPROM_CHANNEL_IBSS) &&
885 !(eeprom_ch->flags & EEPROM_CHANNEL_RADAR)) ? "" : "not ");
886
887 ch_info->ht40_eeprom = *eeprom_ch;
888 ch_info->ht40_max_power_avg = eeprom_ch->max_power_avg;
889 ch_info->ht40_flags = eeprom_ch->flags;
890 if (eeprom_ch->flags & EEPROM_CHANNEL_VALID)
891 ch_info->ht40_extension_channel &=
892 ~clear_ht40_extension_channel;
893
894 return 0;
895 }
896
897 #define CHECK_AND_PRINT_I(x) ((eeprom_ch_info[ch].flags & EEPROM_CHANNEL_##x) \
898 ? # x " " : "")
899
900 /**
901 * il_init_channel_map - Set up driver's info for all possible channels
902 */
903 int
904 il_init_channel_map(struct il_priv *il)
905 {
906 int eeprom_ch_count = 0;
907 const u8 *eeprom_ch_idx = NULL;
908 const struct il_eeprom_channel *eeprom_ch_info = NULL;
909 int band, ch;
910 struct il_channel_info *ch_info;
911
912 if (il->channel_count) {
913 D_EEPROM("Channel map already initialized.\n");
914 return 0;
915 }
916
917 D_EEPROM("Initializing regulatory info from EEPROM\n");
918
919 il->channel_count =
920 ARRAY_SIZE(il_eeprom_band_1) + ARRAY_SIZE(il_eeprom_band_2) +
921 ARRAY_SIZE(il_eeprom_band_3) + ARRAY_SIZE(il_eeprom_band_4) +
922 ARRAY_SIZE(il_eeprom_band_5);
923
924 D_EEPROM("Parsing data for %d channels.\n", il->channel_count);
925
926 il->channel_info =
927 kzalloc(sizeof(struct il_channel_info) * il->channel_count,
928 GFP_KERNEL);
929 if (!il->channel_info) {
930 IL_ERR("Could not allocate channel_info\n");
931 il->channel_count = 0;
932 return -ENOMEM;
933 }
934
935 ch_info = il->channel_info;
936
937 /* Loop through the 5 EEPROM bands adding them in order to the
938 * channel map we maintain (that contains additional information than
939 * what just in the EEPROM) */
940 for (band = 1; band <= 5; band++) {
941
942 il_init_band_reference(il, band, &eeprom_ch_count,
943 &eeprom_ch_info, &eeprom_ch_idx);
944
945 /* Loop through each band adding each of the channels */
946 for (ch = 0; ch < eeprom_ch_count; ch++) {
947 ch_info->channel = eeprom_ch_idx[ch];
948 ch_info->band =
949 (band ==
950 1) ? IEEE80211_BAND_2GHZ : IEEE80211_BAND_5GHZ;
951
952 /* permanently store EEPROM's channel regulatory flags
953 * and max power in channel info database. */
954 ch_info->eeprom = eeprom_ch_info[ch];
955
956 /* Copy the run-time flags so they are there even on
957 * invalid channels */
958 ch_info->flags = eeprom_ch_info[ch].flags;
959 /* First write that ht40 is not enabled, and then enable
960 * one by one */
961 ch_info->ht40_extension_channel =
962 IEEE80211_CHAN_NO_HT40;
963
964 if (!(il_is_channel_valid(ch_info))) {
965 D_EEPROM("Ch. %d Flags %x [%sGHz] - "
966 "No traffic\n", ch_info->channel,
967 ch_info->flags,
968 il_is_channel_a_band(ch_info) ? "5.2" :
969 "2.4");
970 ch_info++;
971 continue;
972 }
973
974 /* Initialize regulatory-based run-time data */
975 ch_info->max_power_avg = ch_info->curr_txpow =
976 eeprom_ch_info[ch].max_power_avg;
977 ch_info->scan_power = eeprom_ch_info[ch].max_power_avg;
978 ch_info->min_power = 0;
979
980 D_EEPROM("Ch. %d [%sGHz] " "%s%s%s%s%s%s(0x%02x %ddBm):"
981 " Ad-Hoc %ssupported\n", ch_info->channel,
982 il_is_channel_a_band(ch_info) ? "5.2" : "2.4",
983 CHECK_AND_PRINT_I(VALID),
984 CHECK_AND_PRINT_I(IBSS),
985 CHECK_AND_PRINT_I(ACTIVE),
986 CHECK_AND_PRINT_I(RADAR),
987 CHECK_AND_PRINT_I(WIDE),
988 CHECK_AND_PRINT_I(DFS),
989 eeprom_ch_info[ch].flags,
990 eeprom_ch_info[ch].max_power_avg,
991 ((eeprom_ch_info[ch].
992 flags & EEPROM_CHANNEL_IBSS) &&
993 !(eeprom_ch_info[ch].
994 flags & EEPROM_CHANNEL_RADAR)) ? "" :
995 "not ");
996
997 ch_info++;
998 }
999 }
1000
1001 /* Check if we do have HT40 channels */
1002 if (il->cfg->regulatory_bands[5] == EEPROM_REGULATORY_BAND_NO_HT40 &&
1003 il->cfg->regulatory_bands[6] == EEPROM_REGULATORY_BAND_NO_HT40)
1004 return 0;
1005
1006 /* Two additional EEPROM bands for 2.4 and 5 GHz HT40 channels */
1007 for (band = 6; band <= 7; band++) {
1008 enum ieee80211_band ieeeband;
1009
1010 il_init_band_reference(il, band, &eeprom_ch_count,
1011 &eeprom_ch_info, &eeprom_ch_idx);
1012
1013 /* EEPROM band 6 is 2.4, band 7 is 5 GHz */
1014 ieeeband =
1015 (band == 6) ? IEEE80211_BAND_2GHZ : IEEE80211_BAND_5GHZ;
1016
1017 /* Loop through each band adding each of the channels */
1018 for (ch = 0; ch < eeprom_ch_count; ch++) {
1019 /* Set up driver's info for lower half */
1020 il_mod_ht40_chan_info(il, ieeeband, eeprom_ch_idx[ch],
1021 &eeprom_ch_info[ch],
1022 IEEE80211_CHAN_NO_HT40PLUS);
1023
1024 /* Set up driver's info for upper half */
1025 il_mod_ht40_chan_info(il, ieeeband,
1026 eeprom_ch_idx[ch] + 4,
1027 &eeprom_ch_info[ch],
1028 IEEE80211_CHAN_NO_HT40MINUS);
1029 }
1030 }
1031
1032 return 0;
1033 }
1034 EXPORT_SYMBOL(il_init_channel_map);
1035
1036 /*
1037 * il_free_channel_map - undo allocations in il_init_channel_map
1038 */
1039 void
1040 il_free_channel_map(struct il_priv *il)
1041 {
1042 kfree(il->channel_info);
1043 il->channel_count = 0;
1044 }
1045 EXPORT_SYMBOL(il_free_channel_map);
1046
1047 /**
1048 * il_get_channel_info - Find driver's ilate channel info
1049 *
1050 * Based on band and channel number.
1051 */
1052 const struct il_channel_info *
1053 il_get_channel_info(const struct il_priv *il, enum ieee80211_band band,
1054 u16 channel)
1055 {
1056 int i;
1057
1058 switch (band) {
1059 case IEEE80211_BAND_5GHZ:
1060 for (i = 14; i < il->channel_count; i++) {
1061 if (il->channel_info[i].channel == channel)
1062 return &il->channel_info[i];
1063 }
1064 break;
1065 case IEEE80211_BAND_2GHZ:
1066 if (channel >= 1 && channel <= 14)
1067 return &il->channel_info[channel - 1];
1068 break;
1069 default:
1070 BUG();
1071 }
1072
1073 return NULL;
1074 }
1075 EXPORT_SYMBOL(il_get_channel_info);
1076
1077 /*
1078 * Setting power level allows the card to go to sleep when not busy.
1079 *
1080 * We calculate a sleep command based on the required latency, which
1081 * we get from mac80211. In order to handle thermal throttling, we can
1082 * also use pre-defined power levels.
1083 */
1084
1085 /*
1086 * This defines the old power levels. They are still used by default
1087 * (level 1) and for thermal throttle (levels 3 through 5)
1088 */
1089
1090 struct il_power_vec_entry {
1091 struct il_powertable_cmd cmd;
1092 u8 no_dtim; /* number of skip dtim */
1093 };
1094
1095 static void
1096 il_power_sleep_cam_cmd(struct il_priv *il, struct il_powertable_cmd *cmd)
1097 {
1098 memset(cmd, 0, sizeof(*cmd));
1099
1100 if (il->power_data.pci_pm)
1101 cmd->flags |= IL_POWER_PCI_PM_MSK;
1102
1103 D_POWER("Sleep command for CAM\n");
1104 }
1105
1106 static int
1107 il_set_power(struct il_priv *il, struct il_powertable_cmd *cmd)
1108 {
1109 D_POWER("Sending power/sleep command\n");
1110 D_POWER("Flags value = 0x%08X\n", cmd->flags);
1111 D_POWER("Tx timeout = %u\n", le32_to_cpu(cmd->tx_data_timeout));
1112 D_POWER("Rx timeout = %u\n", le32_to_cpu(cmd->rx_data_timeout));
1113 D_POWER("Sleep interval vector = { %d , %d , %d , %d , %d }\n",
1114 le32_to_cpu(cmd->sleep_interval[0]),
1115 le32_to_cpu(cmd->sleep_interval[1]),
1116 le32_to_cpu(cmd->sleep_interval[2]),
1117 le32_to_cpu(cmd->sleep_interval[3]),
1118 le32_to_cpu(cmd->sleep_interval[4]));
1119
1120 return il_send_cmd_pdu(il, C_POWER_TBL,
1121 sizeof(struct il_powertable_cmd), cmd);
1122 }
1123
1124 static int
1125 il_power_set_mode(struct il_priv *il, struct il_powertable_cmd *cmd, bool force)
1126 {
1127 int ret;
1128 bool update_chains;
1129
1130 lockdep_assert_held(&il->mutex);
1131
1132 /* Don't update the RX chain when chain noise calibration is running */
1133 update_chains = il->chain_noise_data.state == IL_CHAIN_NOISE_DONE ||
1134 il->chain_noise_data.state == IL_CHAIN_NOISE_ALIVE;
1135
1136 if (!memcmp(&il->power_data.sleep_cmd, cmd, sizeof(*cmd)) && !force)
1137 return 0;
1138
1139 if (!il_is_ready_rf(il))
1140 return -EIO;
1141
1142 /* scan complete use sleep_power_next, need to be updated */
1143 memcpy(&il->power_data.sleep_cmd_next, cmd, sizeof(*cmd));
1144 if (test_bit(S_SCANNING, &il->status) && !force) {
1145 D_INFO("Defer power set mode while scanning\n");
1146 return 0;
1147 }
1148
1149 if (cmd->flags & IL_POWER_DRIVER_ALLOW_SLEEP_MSK)
1150 set_bit(S_POWER_PMI, &il->status);
1151
1152 ret = il_set_power(il, cmd);
1153 if (!ret) {
1154 if (!(cmd->flags & IL_POWER_DRIVER_ALLOW_SLEEP_MSK))
1155 clear_bit(S_POWER_PMI, &il->status);
1156
1157 if (il->ops->update_chain_flags && update_chains)
1158 il->ops->update_chain_flags(il);
1159 else if (il->ops->update_chain_flags)
1160 D_POWER("Cannot update the power, chain noise "
1161 "calibration running: %d\n",
1162 il->chain_noise_data.state);
1163
1164 memcpy(&il->power_data.sleep_cmd, cmd, sizeof(*cmd));
1165 } else
1166 IL_ERR("set power fail, ret = %d", ret);
1167
1168 return ret;
1169 }
1170
1171 int
1172 il_power_update_mode(struct il_priv *il, bool force)
1173 {
1174 struct il_powertable_cmd cmd;
1175
1176 il_power_sleep_cam_cmd(il, &cmd);
1177 return il_power_set_mode(il, &cmd, force);
1178 }
1179 EXPORT_SYMBOL(il_power_update_mode);
1180
1181 /* initialize to default */
1182 void
1183 il_power_initialize(struct il_priv *il)
1184 {
1185 u16 lctl;
1186
1187 pcie_capability_read_word(il->pci_dev, PCI_EXP_LNKCTL, &lctl);
1188 il->power_data.pci_pm = !(lctl & PCI_EXP_LNKCTL_ASPM_L0S);
1189
1190 il->power_data.debug_sleep_level_override = -1;
1191
1192 memset(&il->power_data.sleep_cmd, 0, sizeof(il->power_data.sleep_cmd));
1193 }
1194 EXPORT_SYMBOL(il_power_initialize);
1195
1196 /* For active scan, listen ACTIVE_DWELL_TIME (msec) on each channel after
1197 * sending probe req. This should be set long enough to hear probe responses
1198 * from more than one AP. */
1199 #define IL_ACTIVE_DWELL_TIME_24 (30) /* all times in msec */
1200 #define IL_ACTIVE_DWELL_TIME_52 (20)
1201
1202 #define IL_ACTIVE_DWELL_FACTOR_24GHZ (3)
1203 #define IL_ACTIVE_DWELL_FACTOR_52GHZ (2)
1204
1205 /* For passive scan, listen PASSIVE_DWELL_TIME (msec) on each channel.
1206 * Must be set longer than active dwell time.
1207 * For the most reliable scan, set > AP beacon interval (typically 100msec). */
1208 #define IL_PASSIVE_DWELL_TIME_24 (20) /* all times in msec */
1209 #define IL_PASSIVE_DWELL_TIME_52 (10)
1210 #define IL_PASSIVE_DWELL_BASE (100)
1211 #define IL_CHANNEL_TUNE_TIME 5
1212
1213 static int
1214 il_send_scan_abort(struct il_priv *il)
1215 {
1216 int ret;
1217 struct il_rx_pkt *pkt;
1218 struct il_host_cmd cmd = {
1219 .id = C_SCAN_ABORT,
1220 .flags = CMD_WANT_SKB,
1221 };
1222
1223 /* Exit instantly with error when device is not ready
1224 * to receive scan abort command or it does not perform
1225 * hardware scan currently */
1226 if (!test_bit(S_READY, &il->status) ||
1227 !test_bit(S_GEO_CONFIGURED, &il->status) ||
1228 !test_bit(S_SCAN_HW, &il->status) ||
1229 test_bit(S_FW_ERROR, &il->status) ||
1230 test_bit(S_EXIT_PENDING, &il->status))
1231 return -EIO;
1232
1233 ret = il_send_cmd_sync(il, &cmd);
1234 if (ret)
1235 return ret;
1236
1237 pkt = (struct il_rx_pkt *)cmd.reply_page;
1238 if (pkt->u.status != CAN_ABORT_STATUS) {
1239 /* The scan abort will return 1 for success or
1240 * 2 for "failure". A failure condition can be
1241 * due to simply not being in an active scan which
1242 * can occur if we send the scan abort before we
1243 * the microcode has notified us that a scan is
1244 * completed. */
1245 D_SCAN("SCAN_ABORT ret %d.\n", pkt->u.status);
1246 ret = -EIO;
1247 }
1248
1249 il_free_pages(il, cmd.reply_page);
1250 return ret;
1251 }
1252
1253 static void
1254 il_complete_scan(struct il_priv *il, bool aborted)
1255 {
1256 /* check if scan was requested from mac80211 */
1257 if (il->scan_request) {
1258 D_SCAN("Complete scan in mac80211\n");
1259 ieee80211_scan_completed(il->hw, aborted);
1260 }
1261
1262 il->scan_vif = NULL;
1263 il->scan_request = NULL;
1264 }
1265
1266 void
1267 il_force_scan_end(struct il_priv *il)
1268 {
1269 lockdep_assert_held(&il->mutex);
1270
1271 if (!test_bit(S_SCANNING, &il->status)) {
1272 D_SCAN("Forcing scan end while not scanning\n");
1273 return;
1274 }
1275
1276 D_SCAN("Forcing scan end\n");
1277 clear_bit(S_SCANNING, &il->status);
1278 clear_bit(S_SCAN_HW, &il->status);
1279 clear_bit(S_SCAN_ABORTING, &il->status);
1280 il_complete_scan(il, true);
1281 }
1282
1283 static void
1284 il_do_scan_abort(struct il_priv *il)
1285 {
1286 int ret;
1287
1288 lockdep_assert_held(&il->mutex);
1289
1290 if (!test_bit(S_SCANNING, &il->status)) {
1291 D_SCAN("Not performing scan to abort\n");
1292 return;
1293 }
1294
1295 if (test_and_set_bit(S_SCAN_ABORTING, &il->status)) {
1296 D_SCAN("Scan abort in progress\n");
1297 return;
1298 }
1299
1300 ret = il_send_scan_abort(il);
1301 if (ret) {
1302 D_SCAN("Send scan abort failed %d\n", ret);
1303 il_force_scan_end(il);
1304 } else
1305 D_SCAN("Successfully send scan abort\n");
1306 }
1307
1308 /**
1309 * il_scan_cancel - Cancel any currently executing HW scan
1310 */
1311 int
1312 il_scan_cancel(struct il_priv *il)
1313 {
1314 D_SCAN("Queuing abort scan\n");
1315 queue_work(il->workqueue, &il->abort_scan);
1316 return 0;
1317 }
1318 EXPORT_SYMBOL(il_scan_cancel);
1319
1320 /**
1321 * il_scan_cancel_timeout - Cancel any currently executing HW scan
1322 * @ms: amount of time to wait (in milliseconds) for scan to abort
1323 *
1324 */
1325 int
1326 il_scan_cancel_timeout(struct il_priv *il, unsigned long ms)
1327 {
1328 unsigned long timeout = jiffies + msecs_to_jiffies(ms);
1329
1330 lockdep_assert_held(&il->mutex);
1331
1332 D_SCAN("Scan cancel timeout\n");
1333
1334 il_do_scan_abort(il);
1335
1336 while (time_before_eq(jiffies, timeout)) {
1337 if (!test_bit(S_SCAN_HW, &il->status))
1338 break;
1339 msleep(20);
1340 }
1341
1342 return test_bit(S_SCAN_HW, &il->status);
1343 }
1344 EXPORT_SYMBOL(il_scan_cancel_timeout);
1345
1346 /* Service response to C_SCAN (0x80) */
1347 static void
1348 il_hdl_scan(struct il_priv *il, struct il_rx_buf *rxb)
1349 {
1350 #ifdef CONFIG_IWLEGACY_DEBUG
1351 struct il_rx_pkt *pkt = rxb_addr(rxb);
1352 struct il_scanreq_notification *notif =
1353 (struct il_scanreq_notification *)pkt->u.raw;
1354
1355 D_SCAN("Scan request status = 0x%x\n", notif->status);
1356 #endif
1357 }
1358
1359 /* Service N_SCAN_START (0x82) */
1360 static void
1361 il_hdl_scan_start(struct il_priv *il, struct il_rx_buf *rxb)
1362 {
1363 struct il_rx_pkt *pkt = rxb_addr(rxb);
1364 struct il_scanstart_notification *notif =
1365 (struct il_scanstart_notification *)pkt->u.raw;
1366 il->scan_start_tsf = le32_to_cpu(notif->tsf_low);
1367 D_SCAN("Scan start: " "%d [802.11%s] "
1368 "(TSF: 0x%08X:%08X) - %d (beacon timer %u)\n", notif->channel,
1369 notif->band ? "bg" : "a", le32_to_cpu(notif->tsf_high),
1370 le32_to_cpu(notif->tsf_low), notif->status, notif->beacon_timer);
1371 }
1372
1373 /* Service N_SCAN_RESULTS (0x83) */
1374 static void
1375 il_hdl_scan_results(struct il_priv *il, struct il_rx_buf *rxb)
1376 {
1377 #ifdef CONFIG_IWLEGACY_DEBUG
1378 struct il_rx_pkt *pkt = rxb_addr(rxb);
1379 struct il_scanresults_notification *notif =
1380 (struct il_scanresults_notification *)pkt->u.raw;
1381
1382 D_SCAN("Scan ch.res: " "%d [802.11%s] " "(TSF: 0x%08X:%08X) - %d "
1383 "elapsed=%lu usec\n", notif->channel, notif->band ? "bg" : "a",
1384 le32_to_cpu(notif->tsf_high), le32_to_cpu(notif->tsf_low),
1385 le32_to_cpu(notif->stats[0]),
1386 le32_to_cpu(notif->tsf_low) - il->scan_start_tsf);
1387 #endif
1388 }
1389
1390 /* Service N_SCAN_COMPLETE (0x84) */
1391 static void
1392 il_hdl_scan_complete(struct il_priv *il, struct il_rx_buf *rxb)
1393 {
1394
1395 #ifdef CONFIG_IWLEGACY_DEBUG
1396 struct il_rx_pkt *pkt = rxb_addr(rxb);
1397 struct il_scancomplete_notification *scan_notif = (void *)pkt->u.raw;
1398 #endif
1399
1400 D_SCAN("Scan complete: %d channels (TSF 0x%08X:%08X) - %d\n",
1401 scan_notif->scanned_channels, scan_notif->tsf_low,
1402 scan_notif->tsf_high, scan_notif->status);
1403
1404 /* The HW is no longer scanning */
1405 clear_bit(S_SCAN_HW, &il->status);
1406
1407 D_SCAN("Scan on %sGHz took %dms\n",
1408 (il->scan_band == IEEE80211_BAND_2GHZ) ? "2.4" : "5.2",
1409 jiffies_to_msecs(jiffies - il->scan_start));
1410
1411 queue_work(il->workqueue, &il->scan_completed);
1412 }
1413
1414 void
1415 il_setup_rx_scan_handlers(struct il_priv *il)
1416 {
1417 /* scan handlers */
1418 il->handlers[C_SCAN] = il_hdl_scan;
1419 il->handlers[N_SCAN_START] = il_hdl_scan_start;
1420 il->handlers[N_SCAN_RESULTS] = il_hdl_scan_results;
1421 il->handlers[N_SCAN_COMPLETE] = il_hdl_scan_complete;
1422 }
1423 EXPORT_SYMBOL(il_setup_rx_scan_handlers);
1424
1425 u16
1426 il_get_active_dwell_time(struct il_priv *il, enum ieee80211_band band,
1427 u8 n_probes)
1428 {
1429 if (band == IEEE80211_BAND_5GHZ)
1430 return IL_ACTIVE_DWELL_TIME_52 +
1431 IL_ACTIVE_DWELL_FACTOR_52GHZ * (n_probes + 1);
1432 else
1433 return IL_ACTIVE_DWELL_TIME_24 +
1434 IL_ACTIVE_DWELL_FACTOR_24GHZ * (n_probes + 1);
1435 }
1436 EXPORT_SYMBOL(il_get_active_dwell_time);
1437
1438 u16
1439 il_get_passive_dwell_time(struct il_priv *il, enum ieee80211_band band,
1440 struct ieee80211_vif *vif)
1441 {
1442 u16 value;
1443
1444 u16 passive =
1445 (band ==
1446 IEEE80211_BAND_2GHZ) ? IL_PASSIVE_DWELL_BASE +
1447 IL_PASSIVE_DWELL_TIME_24 : IL_PASSIVE_DWELL_BASE +
1448 IL_PASSIVE_DWELL_TIME_52;
1449
1450 if (il_is_any_associated(il)) {
1451 /*
1452 * If we're associated, we clamp the maximum passive
1453 * dwell time to be 98% of the smallest beacon interval
1454 * (minus 2 * channel tune time)
1455 */
1456 value = il->vif ? il->vif->bss_conf.beacon_int : 0;
1457 if (value > IL_PASSIVE_DWELL_BASE || !value)
1458 value = IL_PASSIVE_DWELL_BASE;
1459 value = (value * 98) / 100 - IL_CHANNEL_TUNE_TIME * 2;
1460 passive = min(value, passive);
1461 }
1462
1463 return passive;
1464 }
1465 EXPORT_SYMBOL(il_get_passive_dwell_time);
1466
1467 void
1468 il_init_scan_params(struct il_priv *il)
1469 {
1470 u8 ant_idx = fls(il->hw_params.valid_tx_ant) - 1;
1471 if (!il->scan_tx_ant[IEEE80211_BAND_5GHZ])
1472 il->scan_tx_ant[IEEE80211_BAND_5GHZ] = ant_idx;
1473 if (!il->scan_tx_ant[IEEE80211_BAND_2GHZ])
1474 il->scan_tx_ant[IEEE80211_BAND_2GHZ] = ant_idx;
1475 }
1476 EXPORT_SYMBOL(il_init_scan_params);
1477
1478 static int
1479 il_scan_initiate(struct il_priv *il, struct ieee80211_vif *vif)
1480 {
1481 int ret;
1482
1483 lockdep_assert_held(&il->mutex);
1484
1485 cancel_delayed_work(&il->scan_check);
1486
1487 if (!il_is_ready_rf(il)) {
1488 IL_WARN("Request scan called when driver not ready.\n");
1489 return -EIO;
1490 }
1491
1492 if (test_bit(S_SCAN_HW, &il->status)) {
1493 D_SCAN("Multiple concurrent scan requests in parallel.\n");
1494 return -EBUSY;
1495 }
1496
1497 if (test_bit(S_SCAN_ABORTING, &il->status)) {
1498 D_SCAN("Scan request while abort pending.\n");
1499 return -EBUSY;
1500 }
1501
1502 D_SCAN("Starting scan...\n");
1503
1504 set_bit(S_SCANNING, &il->status);
1505 il->scan_start = jiffies;
1506
1507 ret = il->ops->request_scan(il, vif);
1508 if (ret) {
1509 clear_bit(S_SCANNING, &il->status);
1510 return ret;
1511 }
1512
1513 queue_delayed_work(il->workqueue, &il->scan_check,
1514 IL_SCAN_CHECK_WATCHDOG);
1515
1516 return 0;
1517 }
1518
1519 int
1520 il_mac_hw_scan(struct ieee80211_hw *hw, struct ieee80211_vif *vif,
1521 struct cfg80211_scan_request *req)
1522 {
1523 struct il_priv *il = hw->priv;
1524 int ret;
1525
1526 if (req->n_channels == 0) {
1527 IL_ERR("Can not scan on no channels.\n");
1528 return -EINVAL;
1529 }
1530
1531 mutex_lock(&il->mutex);
1532 D_MAC80211("enter\n");
1533
1534 if (test_bit(S_SCANNING, &il->status)) {
1535 D_SCAN("Scan already in progress.\n");
1536 ret = -EAGAIN;
1537 goto out_unlock;
1538 }
1539
1540 /* mac80211 will only ask for one band at a time */
1541 il->scan_request = req;
1542 il->scan_vif = vif;
1543 il->scan_band = req->channels[0]->band;
1544
1545 ret = il_scan_initiate(il, vif);
1546
1547 out_unlock:
1548 D_MAC80211("leave ret %d\n", ret);
1549 mutex_unlock(&il->mutex);
1550
1551 return ret;
1552 }
1553 EXPORT_SYMBOL(il_mac_hw_scan);
1554
1555 static void
1556 il_bg_scan_check(struct work_struct *data)
1557 {
1558 struct il_priv *il =
1559 container_of(data, struct il_priv, scan_check.work);
1560
1561 D_SCAN("Scan check work\n");
1562
1563 /* Since we are here firmware does not finish scan and
1564 * most likely is in bad shape, so we don't bother to
1565 * send abort command, just force scan complete to mac80211 */
1566 mutex_lock(&il->mutex);
1567 il_force_scan_end(il);
1568 mutex_unlock(&il->mutex);
1569 }
1570
1571 /**
1572 * il_fill_probe_req - fill in all required fields and IE for probe request
1573 */
1574
1575 u16
1576 il_fill_probe_req(struct il_priv *il, struct ieee80211_mgmt *frame,
1577 const u8 *ta, const u8 *ies, int ie_len, int left)
1578 {
1579 int len = 0;
1580 u8 *pos = NULL;
1581
1582 /* Make sure there is enough space for the probe request,
1583 * two mandatory IEs and the data */
1584 left -= 24;
1585 if (left < 0)
1586 return 0;
1587
1588 frame->frame_control = cpu_to_le16(IEEE80211_STYPE_PROBE_REQ);
1589 eth_broadcast_addr(frame->da);
1590 memcpy(frame->sa, ta, ETH_ALEN);
1591 eth_broadcast_addr(frame->bssid);
1592 frame->seq_ctrl = 0;
1593
1594 len += 24;
1595
1596 /* ...next IE... */
1597 pos = &frame->u.probe_req.variable[0];
1598
1599 /* fill in our indirect SSID IE */
1600 left -= 2;
1601 if (left < 0)
1602 return 0;
1603 *pos++ = WLAN_EID_SSID;
1604 *pos++ = 0;
1605
1606 len += 2;
1607
1608 if (WARN_ON(left < ie_len))
1609 return len;
1610
1611 if (ies && ie_len) {
1612 memcpy(pos, ies, ie_len);
1613 len += ie_len;
1614 }
1615
1616 return (u16) len;
1617 }
1618 EXPORT_SYMBOL(il_fill_probe_req);
1619
1620 static void
1621 il_bg_abort_scan(struct work_struct *work)
1622 {
1623 struct il_priv *il = container_of(work, struct il_priv, abort_scan);
1624
1625 D_SCAN("Abort scan work\n");
1626
1627 /* We keep scan_check work queued in case when firmware will not
1628 * report back scan completed notification */
1629 mutex_lock(&il->mutex);
1630 il_scan_cancel_timeout(il, 200);
1631 mutex_unlock(&il->mutex);
1632 }
1633
1634 static void
1635 il_bg_scan_completed(struct work_struct *work)
1636 {
1637 struct il_priv *il = container_of(work, struct il_priv, scan_completed);
1638 bool aborted;
1639
1640 D_SCAN("Completed scan.\n");
1641
1642 cancel_delayed_work(&il->scan_check);
1643
1644 mutex_lock(&il->mutex);
1645
1646 aborted = test_and_clear_bit(S_SCAN_ABORTING, &il->status);
1647 if (aborted)
1648 D_SCAN("Aborted scan completed.\n");
1649
1650 if (!test_and_clear_bit(S_SCANNING, &il->status)) {
1651 D_SCAN("Scan already completed.\n");
1652 goto out_settings;
1653 }
1654
1655 il_complete_scan(il, aborted);
1656
1657 out_settings:
1658 /* Can we still talk to firmware ? */
1659 if (!il_is_ready_rf(il))
1660 goto out;
1661
1662 /*
1663 * We do not commit power settings while scan is pending,
1664 * do it now if the settings changed.
1665 */
1666 il_power_set_mode(il, &il->power_data.sleep_cmd_next, false);
1667 il_set_tx_power(il, il->tx_power_next, false);
1668
1669 il->ops->post_scan(il);
1670
1671 out:
1672 mutex_unlock(&il->mutex);
1673 }
1674
1675 void
1676 il_setup_scan_deferred_work(struct il_priv *il)
1677 {
1678 INIT_WORK(&il->scan_completed, il_bg_scan_completed);
1679 INIT_WORK(&il->abort_scan, il_bg_abort_scan);
1680 INIT_DELAYED_WORK(&il->scan_check, il_bg_scan_check);
1681 }
1682 EXPORT_SYMBOL(il_setup_scan_deferred_work);
1683
1684 void
1685 il_cancel_scan_deferred_work(struct il_priv *il)
1686 {
1687 cancel_work_sync(&il->abort_scan);
1688 cancel_work_sync(&il->scan_completed);
1689
1690 if (cancel_delayed_work_sync(&il->scan_check)) {
1691 mutex_lock(&il->mutex);
1692 il_force_scan_end(il);
1693 mutex_unlock(&il->mutex);
1694 }
1695 }
1696 EXPORT_SYMBOL(il_cancel_scan_deferred_work);
1697
1698 /* il->sta_lock must be held */
1699 static void
1700 il_sta_ucode_activate(struct il_priv *il, u8 sta_id)
1701 {
1702
1703 if (!(il->stations[sta_id].used & IL_STA_DRIVER_ACTIVE))
1704 IL_ERR("ACTIVATE a non DRIVER active station id %u addr %pM\n",
1705 sta_id, il->stations[sta_id].sta.sta.addr);
1706
1707 if (il->stations[sta_id].used & IL_STA_UCODE_ACTIVE) {
1708 D_ASSOC("STA id %u addr %pM already present"
1709 " in uCode (according to driver)\n", sta_id,
1710 il->stations[sta_id].sta.sta.addr);
1711 } else {
1712 il->stations[sta_id].used |= IL_STA_UCODE_ACTIVE;
1713 D_ASSOC("Added STA id %u addr %pM to uCode\n", sta_id,
1714 il->stations[sta_id].sta.sta.addr);
1715 }
1716 }
1717
1718 static int
1719 il_process_add_sta_resp(struct il_priv *il, struct il_addsta_cmd *addsta,
1720 struct il_rx_pkt *pkt, bool sync)
1721 {
1722 u8 sta_id = addsta->sta.sta_id;
1723 unsigned long flags;
1724 int ret = -EIO;
1725
1726 if (pkt->hdr.flags & IL_CMD_FAILED_MSK) {
1727 IL_ERR("Bad return from C_ADD_STA (0x%08X)\n", pkt->hdr.flags);
1728 return ret;
1729 }
1730
1731 D_INFO("Processing response for adding station %u\n", sta_id);
1732
1733 spin_lock_irqsave(&il->sta_lock, flags);
1734
1735 switch (pkt->u.add_sta.status) {
1736 case ADD_STA_SUCCESS_MSK:
1737 D_INFO("C_ADD_STA PASSED\n");
1738 il_sta_ucode_activate(il, sta_id);
1739 ret = 0;
1740 break;
1741 case ADD_STA_NO_ROOM_IN_TBL:
1742 IL_ERR("Adding station %d failed, no room in table.\n", sta_id);
1743 break;
1744 case ADD_STA_NO_BLOCK_ACK_RESOURCE:
1745 IL_ERR("Adding station %d failed, no block ack resource.\n",
1746 sta_id);
1747 break;
1748 case ADD_STA_MODIFY_NON_EXIST_STA:
1749 IL_ERR("Attempting to modify non-existing station %d\n",
1750 sta_id);
1751 break;
1752 default:
1753 D_ASSOC("Received C_ADD_STA:(0x%08X)\n", pkt->u.add_sta.status);
1754 break;
1755 }
1756
1757 D_INFO("%s station id %u addr %pM\n",
1758 il->stations[sta_id].sta.mode ==
1759 STA_CONTROL_MODIFY_MSK ? "Modified" : "Added", sta_id,
1760 il->stations[sta_id].sta.sta.addr);
1761
1762 /*
1763 * XXX: The MAC address in the command buffer is often changed from
1764 * the original sent to the device. That is, the MAC address
1765 * written to the command buffer often is not the same MAC address
1766 * read from the command buffer when the command returns. This
1767 * issue has not yet been resolved and this debugging is left to
1768 * observe the problem.
1769 */
1770 D_INFO("%s station according to cmd buffer %pM\n",
1771 il->stations[sta_id].sta.mode ==
1772 STA_CONTROL_MODIFY_MSK ? "Modified" : "Added", addsta->sta.addr);
1773 spin_unlock_irqrestore(&il->sta_lock, flags);
1774
1775 return ret;
1776 }
1777
1778 static void
1779 il_add_sta_callback(struct il_priv *il, struct il_device_cmd *cmd,
1780 struct il_rx_pkt *pkt)
1781 {
1782 struct il_addsta_cmd *addsta = (struct il_addsta_cmd *)cmd->cmd.payload;
1783
1784 il_process_add_sta_resp(il, addsta, pkt, false);
1785
1786 }
1787
1788 int
1789 il_send_add_sta(struct il_priv *il, struct il_addsta_cmd *sta, u8 flags)
1790 {
1791 struct il_rx_pkt *pkt = NULL;
1792 int ret = 0;
1793 u8 data[sizeof(*sta)];
1794 struct il_host_cmd cmd = {
1795 .id = C_ADD_STA,
1796 .flags = flags,
1797 .data = data,
1798 };
1799 u8 sta_id __maybe_unused = sta->sta.sta_id;
1800
1801 D_INFO("Adding sta %u (%pM) %ssynchronously\n", sta_id, sta->sta.addr,
1802 flags & CMD_ASYNC ? "a" : "");
1803
1804 if (flags & CMD_ASYNC)
1805 cmd.callback = il_add_sta_callback;
1806 else {
1807 cmd.flags |= CMD_WANT_SKB;
1808 might_sleep();
1809 }
1810
1811 cmd.len = il->ops->build_addsta_hcmd(sta, data);
1812 ret = il_send_cmd(il, &cmd);
1813
1814 if (ret || (flags & CMD_ASYNC))
1815 return ret;
1816
1817 if (ret == 0) {
1818 pkt = (struct il_rx_pkt *)cmd.reply_page;
1819 ret = il_process_add_sta_resp(il, sta, pkt, true);
1820 }
1821 il_free_pages(il, cmd.reply_page);
1822
1823 return ret;
1824 }
1825 EXPORT_SYMBOL(il_send_add_sta);
1826
1827 static void
1828 il_set_ht_add_station(struct il_priv *il, u8 idx, struct ieee80211_sta *sta)
1829 {
1830 struct ieee80211_sta_ht_cap *sta_ht_inf = &sta->ht_cap;
1831 __le32 sta_flags;
1832
1833 if (!sta || !sta_ht_inf->ht_supported)
1834 goto done;
1835
1836 D_ASSOC("spatial multiplexing power save mode: %s\n",
1837 (sta->smps_mode == IEEE80211_SMPS_STATIC) ? "static" :
1838 (sta->smps_mode == IEEE80211_SMPS_DYNAMIC) ? "dynamic" :
1839 "disabled");
1840
1841 sta_flags = il->stations[idx].sta.station_flags;
1842
1843 sta_flags &= ~(STA_FLG_RTS_MIMO_PROT_MSK | STA_FLG_MIMO_DIS_MSK);
1844
1845 switch (sta->smps_mode) {
1846 case IEEE80211_SMPS_STATIC:
1847 sta_flags |= STA_FLG_MIMO_DIS_MSK;
1848 break;
1849 case IEEE80211_SMPS_DYNAMIC:
1850 sta_flags |= STA_FLG_RTS_MIMO_PROT_MSK;
1851 break;
1852 case IEEE80211_SMPS_OFF:
1853 break;
1854 default:
1855 IL_WARN("Invalid MIMO PS mode %d\n", sta->smps_mode);
1856 break;
1857 }
1858
1859 sta_flags |=
1860 cpu_to_le32((u32) sta_ht_inf->
1861 ampdu_factor << STA_FLG_MAX_AGG_SIZE_POS);
1862
1863 sta_flags |=
1864 cpu_to_le32((u32) sta_ht_inf->
1865 ampdu_density << STA_FLG_AGG_MPDU_DENSITY_POS);
1866
1867 if (il_is_ht40_tx_allowed(il, &sta->ht_cap))
1868 sta_flags |= STA_FLG_HT40_EN_MSK;
1869 else
1870 sta_flags &= ~STA_FLG_HT40_EN_MSK;
1871
1872 il->stations[idx].sta.station_flags = sta_flags;
1873 done:
1874 return;
1875 }
1876
1877 /**
1878 * il_prep_station - Prepare station information for addition
1879 *
1880 * should be called with sta_lock held
1881 */
1882 u8
1883 il_prep_station(struct il_priv *il, const u8 *addr, bool is_ap,
1884 struct ieee80211_sta *sta)
1885 {
1886 struct il_station_entry *station;
1887 int i;
1888 u8 sta_id = IL_INVALID_STATION;
1889 u16 rate;
1890
1891 if (is_ap)
1892 sta_id = IL_AP_ID;
1893 else if (is_broadcast_ether_addr(addr))
1894 sta_id = il->hw_params.bcast_id;
1895 else
1896 for (i = IL_STA_ID; i < il->hw_params.max_stations; i++) {
1897 if (ether_addr_equal(il->stations[i].sta.sta.addr,
1898 addr)) {
1899 sta_id = i;
1900 break;
1901 }
1902
1903 if (!il->stations[i].used &&
1904 sta_id == IL_INVALID_STATION)
1905 sta_id = i;
1906 }
1907
1908 /*
1909 * These two conditions have the same outcome, but keep them
1910 * separate
1911 */
1912 if (unlikely(sta_id == IL_INVALID_STATION))
1913 return sta_id;
1914
1915 /*
1916 * uCode is not able to deal with multiple requests to add a
1917 * station. Keep track if one is in progress so that we do not send
1918 * another.
1919 */
1920 if (il->stations[sta_id].used & IL_STA_UCODE_INPROGRESS) {
1921 D_INFO("STA %d already in process of being added.\n", sta_id);
1922 return sta_id;
1923 }
1924
1925 if ((il->stations[sta_id].used & IL_STA_DRIVER_ACTIVE) &&
1926 (il->stations[sta_id].used & IL_STA_UCODE_ACTIVE) &&
1927 ether_addr_equal(il->stations[sta_id].sta.sta.addr, addr)) {
1928 D_ASSOC("STA %d (%pM) already added, not adding again.\n",
1929 sta_id, addr);
1930 return sta_id;
1931 }
1932
1933 station = &il->stations[sta_id];
1934 station->used = IL_STA_DRIVER_ACTIVE;
1935 D_ASSOC("Add STA to driver ID %d: %pM\n", sta_id, addr);
1936 il->num_stations++;
1937
1938 /* Set up the C_ADD_STA command to send to device */
1939 memset(&station->sta, 0, sizeof(struct il_addsta_cmd));
1940 memcpy(station->sta.sta.addr, addr, ETH_ALEN);
1941 station->sta.mode = 0;
1942 station->sta.sta.sta_id = sta_id;
1943 station->sta.station_flags = 0;
1944
1945 /*
1946 * OK to call unconditionally, since local stations (IBSS BSSID
1947 * STA and broadcast STA) pass in a NULL sta, and mac80211
1948 * doesn't allow HT IBSS.
1949 */
1950 il_set_ht_add_station(il, sta_id, sta);
1951
1952 /* 3945 only */
1953 rate = (il->band == IEEE80211_BAND_5GHZ) ? RATE_6M_PLCP : RATE_1M_PLCP;
1954 /* Turn on both antennas for the station... */
1955 station->sta.rate_n_flags = cpu_to_le16(rate | RATE_MCS_ANT_AB_MSK);
1956
1957 return sta_id;
1958
1959 }
1960 EXPORT_SYMBOL_GPL(il_prep_station);
1961
1962 #define STA_WAIT_TIMEOUT (HZ/2)
1963
1964 /**
1965 * il_add_station_common -
1966 */
1967 int
1968 il_add_station_common(struct il_priv *il, const u8 *addr, bool is_ap,
1969 struct ieee80211_sta *sta, u8 *sta_id_r)
1970 {
1971 unsigned long flags_spin;
1972 int ret = 0;
1973 u8 sta_id;
1974 struct il_addsta_cmd sta_cmd;
1975
1976 *sta_id_r = 0;
1977 spin_lock_irqsave(&il->sta_lock, flags_spin);
1978 sta_id = il_prep_station(il, addr, is_ap, sta);
1979 if (sta_id == IL_INVALID_STATION) {
1980 IL_ERR("Unable to prepare station %pM for addition\n", addr);
1981 spin_unlock_irqrestore(&il->sta_lock, flags_spin);
1982 return -EINVAL;
1983 }
1984
1985 /*
1986 * uCode is not able to deal with multiple requests to add a
1987 * station. Keep track if one is in progress so that we do not send
1988 * another.
1989 */
1990 if (il->stations[sta_id].used & IL_STA_UCODE_INPROGRESS) {
1991 D_INFO("STA %d already in process of being added.\n", sta_id);
1992 spin_unlock_irqrestore(&il->sta_lock, flags_spin);
1993 return -EEXIST;
1994 }
1995
1996 if ((il->stations[sta_id].used & IL_STA_DRIVER_ACTIVE) &&
1997 (il->stations[sta_id].used & IL_STA_UCODE_ACTIVE)) {
1998 D_ASSOC("STA %d (%pM) already added, not adding again.\n",
1999 sta_id, addr);
2000 spin_unlock_irqrestore(&il->sta_lock, flags_spin);
2001 return -EEXIST;
2002 }
2003
2004 il->stations[sta_id].used |= IL_STA_UCODE_INPROGRESS;
2005 memcpy(&sta_cmd, &il->stations[sta_id].sta,
2006 sizeof(struct il_addsta_cmd));
2007 spin_unlock_irqrestore(&il->sta_lock, flags_spin);
2008
2009 /* Add station to device's station table */
2010 ret = il_send_add_sta(il, &sta_cmd, CMD_SYNC);
2011 if (ret) {
2012 spin_lock_irqsave(&il->sta_lock, flags_spin);
2013 IL_ERR("Adding station %pM failed.\n",
2014 il->stations[sta_id].sta.sta.addr);
2015 il->stations[sta_id].used &= ~IL_STA_DRIVER_ACTIVE;
2016 il->stations[sta_id].used &= ~IL_STA_UCODE_INPROGRESS;
2017 spin_unlock_irqrestore(&il->sta_lock, flags_spin);
2018 }
2019 *sta_id_r = sta_id;
2020 return ret;
2021 }
2022 EXPORT_SYMBOL(il_add_station_common);
2023
2024 /**
2025 * il_sta_ucode_deactivate - deactivate ucode status for a station
2026 *
2027 * il->sta_lock must be held
2028 */
2029 static void
2030 il_sta_ucode_deactivate(struct il_priv *il, u8 sta_id)
2031 {
2032 /* Ucode must be active and driver must be non active */
2033 if ((il->stations[sta_id].
2034 used & (IL_STA_UCODE_ACTIVE | IL_STA_DRIVER_ACTIVE)) !=
2035 IL_STA_UCODE_ACTIVE)
2036 IL_ERR("removed non active STA %u\n", sta_id);
2037
2038 il->stations[sta_id].used &= ~IL_STA_UCODE_ACTIVE;
2039
2040 memset(&il->stations[sta_id], 0, sizeof(struct il_station_entry));
2041 D_ASSOC("Removed STA %u\n", sta_id);
2042 }
2043
2044 static int
2045 il_send_remove_station(struct il_priv *il, const u8 * addr, int sta_id,
2046 bool temporary)
2047 {
2048 struct il_rx_pkt *pkt;
2049 int ret;
2050
2051 unsigned long flags_spin;
2052 struct il_rem_sta_cmd rm_sta_cmd;
2053
2054 struct il_host_cmd cmd = {
2055 .id = C_REM_STA,
2056 .len = sizeof(struct il_rem_sta_cmd),
2057 .flags = CMD_SYNC,
2058 .data = &rm_sta_cmd,
2059 };
2060
2061 memset(&rm_sta_cmd, 0, sizeof(rm_sta_cmd));
2062 rm_sta_cmd.num_sta = 1;
2063 memcpy(&rm_sta_cmd.addr, addr, ETH_ALEN);
2064
2065 cmd.flags |= CMD_WANT_SKB;
2066
2067 ret = il_send_cmd(il, &cmd);
2068
2069 if (ret)
2070 return ret;
2071
2072 pkt = (struct il_rx_pkt *)cmd.reply_page;
2073 if (pkt->hdr.flags & IL_CMD_FAILED_MSK) {
2074 IL_ERR("Bad return from C_REM_STA (0x%08X)\n", pkt->hdr.flags);
2075 ret = -EIO;
2076 }
2077
2078 if (!ret) {
2079 switch (pkt->u.rem_sta.status) {
2080 case REM_STA_SUCCESS_MSK:
2081 if (!temporary) {
2082 spin_lock_irqsave(&il->sta_lock, flags_spin);
2083 il_sta_ucode_deactivate(il, sta_id);
2084 spin_unlock_irqrestore(&il->sta_lock,
2085 flags_spin);
2086 }
2087 D_ASSOC("C_REM_STA PASSED\n");
2088 break;
2089 default:
2090 ret = -EIO;
2091 IL_ERR("C_REM_STA failed\n");
2092 break;
2093 }
2094 }
2095 il_free_pages(il, cmd.reply_page);
2096
2097 return ret;
2098 }
2099
2100 /**
2101 * il_remove_station - Remove driver's knowledge of station.
2102 */
2103 int
2104 il_remove_station(struct il_priv *il, const u8 sta_id, const u8 * addr)
2105 {
2106 unsigned long flags;
2107
2108 if (!il_is_ready(il)) {
2109 D_INFO("Unable to remove station %pM, device not ready.\n",
2110 addr);
2111 /*
2112 * It is typical for stations to be removed when we are
2113 * going down. Return success since device will be down
2114 * soon anyway
2115 */
2116 return 0;
2117 }
2118
2119 D_ASSOC("Removing STA from driver:%d %pM\n", sta_id, addr);
2120
2121 if (WARN_ON(sta_id == IL_INVALID_STATION))
2122 return -EINVAL;
2123
2124 spin_lock_irqsave(&il->sta_lock, flags);
2125
2126 if (!(il->stations[sta_id].used & IL_STA_DRIVER_ACTIVE)) {
2127 D_INFO("Removing %pM but non DRIVER active\n", addr);
2128 goto out_err;
2129 }
2130
2131 if (!(il->stations[sta_id].used & IL_STA_UCODE_ACTIVE)) {
2132 D_INFO("Removing %pM but non UCODE active\n", addr);
2133 goto out_err;
2134 }
2135
2136 if (il->stations[sta_id].used & IL_STA_LOCAL) {
2137 kfree(il->stations[sta_id].lq);
2138 il->stations[sta_id].lq = NULL;
2139 }
2140
2141 il->stations[sta_id].used &= ~IL_STA_DRIVER_ACTIVE;
2142
2143 il->num_stations--;
2144
2145 BUG_ON(il->num_stations < 0);
2146
2147 spin_unlock_irqrestore(&il->sta_lock, flags);
2148
2149 return il_send_remove_station(il, addr, sta_id, false);
2150 out_err:
2151 spin_unlock_irqrestore(&il->sta_lock, flags);
2152 return -EINVAL;
2153 }
2154 EXPORT_SYMBOL_GPL(il_remove_station);
2155
2156 /**
2157 * il_clear_ucode_stations - clear ucode station table bits
2158 *
2159 * This function clears all the bits in the driver indicating
2160 * which stations are active in the ucode. Call when something
2161 * other than explicit station management would cause this in
2162 * the ucode, e.g. unassociated RXON.
2163 */
2164 void
2165 il_clear_ucode_stations(struct il_priv *il)
2166 {
2167 int i;
2168 unsigned long flags_spin;
2169 bool cleared = false;
2170
2171 D_INFO("Clearing ucode stations in driver\n");
2172
2173 spin_lock_irqsave(&il->sta_lock, flags_spin);
2174 for (i = 0; i < il->hw_params.max_stations; i++) {
2175 if (il->stations[i].used & IL_STA_UCODE_ACTIVE) {
2176 D_INFO("Clearing ucode active for station %d\n", i);
2177 il->stations[i].used &= ~IL_STA_UCODE_ACTIVE;
2178 cleared = true;
2179 }
2180 }
2181 spin_unlock_irqrestore(&il->sta_lock, flags_spin);
2182
2183 if (!cleared)
2184 D_INFO("No active stations found to be cleared\n");
2185 }
2186 EXPORT_SYMBOL(il_clear_ucode_stations);
2187
2188 /**
2189 * il_restore_stations() - Restore driver known stations to device
2190 *
2191 * All stations considered active by driver, but not present in ucode, is
2192 * restored.
2193 *
2194 * Function sleeps.
2195 */
2196 void
2197 il_restore_stations(struct il_priv *il)
2198 {
2199 struct il_addsta_cmd sta_cmd;
2200 struct il_link_quality_cmd lq;
2201 unsigned long flags_spin;
2202 int i;
2203 bool found = false;
2204 int ret;
2205 bool send_lq;
2206
2207 if (!il_is_ready(il)) {
2208 D_INFO("Not ready yet, not restoring any stations.\n");
2209 return;
2210 }
2211
2212 D_ASSOC("Restoring all known stations ... start.\n");
2213 spin_lock_irqsave(&il->sta_lock, flags_spin);
2214 for (i = 0; i < il->hw_params.max_stations; i++) {
2215 if ((il->stations[i].used & IL_STA_DRIVER_ACTIVE) &&
2216 !(il->stations[i].used & IL_STA_UCODE_ACTIVE)) {
2217 D_ASSOC("Restoring sta %pM\n",
2218 il->stations[i].sta.sta.addr);
2219 il->stations[i].sta.mode = 0;
2220 il->stations[i].used |= IL_STA_UCODE_INPROGRESS;
2221 found = true;
2222 }
2223 }
2224
2225 for (i = 0; i < il->hw_params.max_stations; i++) {
2226 if ((il->stations[i].used & IL_STA_UCODE_INPROGRESS)) {
2227 memcpy(&sta_cmd, &il->stations[i].sta,
2228 sizeof(struct il_addsta_cmd));
2229 send_lq = false;
2230 if (il->stations[i].lq) {
2231 memcpy(&lq, il->stations[i].lq,
2232 sizeof(struct il_link_quality_cmd));
2233 send_lq = true;
2234 }
2235 spin_unlock_irqrestore(&il->sta_lock, flags_spin);
2236 ret = il_send_add_sta(il, &sta_cmd, CMD_SYNC);
2237 if (ret) {
2238 spin_lock_irqsave(&il->sta_lock, flags_spin);
2239 IL_ERR("Adding station %pM failed.\n",
2240 il->stations[i].sta.sta.addr);
2241 il->stations[i].used &= ~IL_STA_DRIVER_ACTIVE;
2242 il->stations[i].used &=
2243 ~IL_STA_UCODE_INPROGRESS;
2244 spin_unlock_irqrestore(&il->sta_lock,
2245 flags_spin);
2246 }
2247 /*
2248 * Rate scaling has already been initialized, send
2249 * current LQ command
2250 */
2251 if (send_lq)
2252 il_send_lq_cmd(il, &lq, CMD_SYNC, true);
2253 spin_lock_irqsave(&il->sta_lock, flags_spin);
2254 il->stations[i].used &= ~IL_STA_UCODE_INPROGRESS;
2255 }
2256 }
2257
2258 spin_unlock_irqrestore(&il->sta_lock, flags_spin);
2259 if (!found)
2260 D_INFO("Restoring all known stations"
2261 " .... no stations to be restored.\n");
2262 else
2263 D_INFO("Restoring all known stations" " .... complete.\n");
2264 }
2265 EXPORT_SYMBOL(il_restore_stations);
2266
2267 int
2268 il_get_free_ucode_key_idx(struct il_priv *il)
2269 {
2270 int i;
2271
2272 for (i = 0; i < il->sta_key_max_num; i++)
2273 if (!test_and_set_bit(i, &il->ucode_key_table))
2274 return i;
2275
2276 return WEP_INVALID_OFFSET;
2277 }
2278 EXPORT_SYMBOL(il_get_free_ucode_key_idx);
2279
2280 void
2281 il_dealloc_bcast_stations(struct il_priv *il)
2282 {
2283 unsigned long flags;
2284 int i;
2285
2286 spin_lock_irqsave(&il->sta_lock, flags);
2287 for (i = 0; i < il->hw_params.max_stations; i++) {
2288 if (!(il->stations[i].used & IL_STA_BCAST))
2289 continue;
2290
2291 il->stations[i].used &= ~IL_STA_UCODE_ACTIVE;
2292 il->num_stations--;
2293 BUG_ON(il->num_stations < 0);
2294 kfree(il->stations[i].lq);
2295 il->stations[i].lq = NULL;
2296 }
2297 spin_unlock_irqrestore(&il->sta_lock, flags);
2298 }
2299 EXPORT_SYMBOL_GPL(il_dealloc_bcast_stations);
2300
2301 #ifdef CONFIG_IWLEGACY_DEBUG
2302 static void
2303 il_dump_lq_cmd(struct il_priv *il, struct il_link_quality_cmd *lq)
2304 {
2305 int i;
2306 D_RATE("lq station id 0x%x\n", lq->sta_id);
2307 D_RATE("lq ant 0x%X 0x%X\n", lq->general_params.single_stream_ant_msk,
2308 lq->general_params.dual_stream_ant_msk);
2309
2310 for (i = 0; i < LINK_QUAL_MAX_RETRY_NUM; i++)
2311 D_RATE("lq idx %d 0x%X\n", i, lq->rs_table[i].rate_n_flags);
2312 }
2313 #else
2314 static inline void
2315 il_dump_lq_cmd(struct il_priv *il, struct il_link_quality_cmd *lq)
2316 {
2317 }
2318 #endif
2319
2320 /**
2321 * il_is_lq_table_valid() - Test one aspect of LQ cmd for validity
2322 *
2323 * It sometimes happens when a HT rate has been in use and we
2324 * loose connectivity with AP then mac80211 will first tell us that the
2325 * current channel is not HT anymore before removing the station. In such a
2326 * scenario the RXON flags will be updated to indicate we are not
2327 * communicating HT anymore, but the LQ command may still contain HT rates.
2328 * Test for this to prevent driver from sending LQ command between the time
2329 * RXON flags are updated and when LQ command is updated.
2330 */
2331 static bool
2332 il_is_lq_table_valid(struct il_priv *il, struct il_link_quality_cmd *lq)
2333 {
2334 int i;
2335
2336 if (il->ht.enabled)
2337 return true;
2338
2339 D_INFO("Channel %u is not an HT channel\n", il->active.channel);
2340 for (i = 0; i < LINK_QUAL_MAX_RETRY_NUM; i++) {
2341 if (le32_to_cpu(lq->rs_table[i].rate_n_flags) & RATE_MCS_HT_MSK) {
2342 D_INFO("idx %d of LQ expects HT channel\n", i);
2343 return false;
2344 }
2345 }
2346 return true;
2347 }
2348
2349 /**
2350 * il_send_lq_cmd() - Send link quality command
2351 * @init: This command is sent as part of station initialization right
2352 * after station has been added.
2353 *
2354 * The link quality command is sent as the last step of station creation.
2355 * This is the special case in which init is set and we call a callback in
2356 * this case to clear the state indicating that station creation is in
2357 * progress.
2358 */
2359 int
2360 il_send_lq_cmd(struct il_priv *il, struct il_link_quality_cmd *lq,
2361 u8 flags, bool init)
2362 {
2363 int ret = 0;
2364 unsigned long flags_spin;
2365
2366 struct il_host_cmd cmd = {
2367 .id = C_TX_LINK_QUALITY_CMD,
2368 .len = sizeof(struct il_link_quality_cmd),
2369 .flags = flags,
2370 .data = lq,
2371 };
2372
2373 if (WARN_ON(lq->sta_id == IL_INVALID_STATION))
2374 return -EINVAL;
2375
2376 spin_lock_irqsave(&il->sta_lock, flags_spin);
2377 if (!(il->stations[lq->sta_id].used & IL_STA_DRIVER_ACTIVE)) {
2378 spin_unlock_irqrestore(&il->sta_lock, flags_spin);
2379 return -EINVAL;
2380 }
2381 spin_unlock_irqrestore(&il->sta_lock, flags_spin);
2382
2383 il_dump_lq_cmd(il, lq);
2384 BUG_ON(init && (cmd.flags & CMD_ASYNC));
2385
2386 if (il_is_lq_table_valid(il, lq))
2387 ret = il_send_cmd(il, &cmd);
2388 else
2389 ret = -EINVAL;
2390
2391 if (cmd.flags & CMD_ASYNC)
2392 return ret;
2393
2394 if (init) {
2395 D_INFO("init LQ command complete,"
2396 " clearing sta addition status for sta %d\n",
2397 lq->sta_id);
2398 spin_lock_irqsave(&il->sta_lock, flags_spin);
2399 il->stations[lq->sta_id].used &= ~IL_STA_UCODE_INPROGRESS;
2400 spin_unlock_irqrestore(&il->sta_lock, flags_spin);
2401 }
2402 return ret;
2403 }
2404 EXPORT_SYMBOL(il_send_lq_cmd);
2405
2406 int
2407 il_mac_sta_remove(struct ieee80211_hw *hw, struct ieee80211_vif *vif,
2408 struct ieee80211_sta *sta)
2409 {
2410 struct il_priv *il = hw->priv;
2411 struct il_station_priv_common *sta_common = (void *)sta->drv_priv;
2412 int ret;
2413
2414 mutex_lock(&il->mutex);
2415 D_MAC80211("enter station %pM\n", sta->addr);
2416
2417 ret = il_remove_station(il, sta_common->sta_id, sta->addr);
2418 if (ret)
2419 IL_ERR("Error removing station %pM\n", sta->addr);
2420
2421 D_MAC80211("leave ret %d\n", ret);
2422 mutex_unlock(&il->mutex);
2423
2424 return ret;
2425 }
2426 EXPORT_SYMBOL(il_mac_sta_remove);
2427
2428 /************************** RX-FUNCTIONS ****************************/
2429 /*
2430 * Rx theory of operation
2431 *
2432 * Driver allocates a circular buffer of Receive Buffer Descriptors (RBDs),
2433 * each of which point to Receive Buffers to be filled by the NIC. These get
2434 * used not only for Rx frames, but for any command response or notification
2435 * from the NIC. The driver and NIC manage the Rx buffers by means
2436 * of idxes into the circular buffer.
2437 *
2438 * Rx Queue Indexes
2439 * The host/firmware share two idx registers for managing the Rx buffers.
2440 *
2441 * The READ idx maps to the first position that the firmware may be writing
2442 * to -- the driver can read up to (but not including) this position and get
2443 * good data.
2444 * The READ idx is managed by the firmware once the card is enabled.
2445 *
2446 * The WRITE idx maps to the last position the driver has read from -- the
2447 * position preceding WRITE is the last slot the firmware can place a packet.
2448 *
2449 * The queue is empty (no good data) if WRITE = READ - 1, and is full if
2450 * WRITE = READ.
2451 *
2452 * During initialization, the host sets up the READ queue position to the first
2453 * IDX position, and WRITE to the last (READ - 1 wrapped)
2454 *
2455 * When the firmware places a packet in a buffer, it will advance the READ idx
2456 * and fire the RX interrupt. The driver can then query the READ idx and
2457 * process as many packets as possible, moving the WRITE idx forward as it
2458 * resets the Rx queue buffers with new memory.
2459 *
2460 * The management in the driver is as follows:
2461 * + A list of pre-allocated SKBs is stored in iwl->rxq->rx_free. When
2462 * iwl->rxq->free_count drops to or below RX_LOW_WATERMARK, work is scheduled
2463 * to replenish the iwl->rxq->rx_free.
2464 * + In il_rx_replenish (scheduled) if 'processed' != 'read' then the
2465 * iwl->rxq is replenished and the READ IDX is updated (updating the
2466 * 'processed' and 'read' driver idxes as well)
2467 * + A received packet is processed and handed to the kernel network stack,
2468 * detached from the iwl->rxq. The driver 'processed' idx is updated.
2469 * + The Host/Firmware iwl->rxq is replenished at tasklet time from the rx_free
2470 * list. If there are no allocated buffers in iwl->rxq->rx_free, the READ
2471 * IDX is not incremented and iwl->status(RX_STALLED) is set. If there
2472 * were enough free buffers and RX_STALLED is set it is cleared.
2473 *
2474 *
2475 * Driver sequence:
2476 *
2477 * il_rx_queue_alloc() Allocates rx_free
2478 * il_rx_replenish() Replenishes rx_free list from rx_used, and calls
2479 * il_rx_queue_restock
2480 * il_rx_queue_restock() Moves available buffers from rx_free into Rx
2481 * queue, updates firmware pointers, and updates
2482 * the WRITE idx. If insufficient rx_free buffers
2483 * are available, schedules il_rx_replenish
2484 *
2485 * -- enable interrupts --
2486 * ISR - il_rx() Detach il_rx_bufs from pool up to the
2487 * READ IDX, detaching the SKB from the pool.
2488 * Moves the packet buffer from queue to rx_used.
2489 * Calls il_rx_queue_restock to refill any empty
2490 * slots.
2491 * ...
2492 *
2493 */
2494
2495 /**
2496 * il_rx_queue_space - Return number of free slots available in queue.
2497 */
2498 int
2499 il_rx_queue_space(const struct il_rx_queue *q)
2500 {
2501 int s = q->read - q->write;
2502 if (s <= 0)
2503 s += RX_QUEUE_SIZE;
2504 /* keep some buffer to not confuse full and empty queue */
2505 s -= 2;
2506 if (s < 0)
2507 s = 0;
2508 return s;
2509 }
2510 EXPORT_SYMBOL(il_rx_queue_space);
2511
2512 /**
2513 * il_rx_queue_update_write_ptr - Update the write pointer for the RX queue
2514 */
2515 void
2516 il_rx_queue_update_write_ptr(struct il_priv *il, struct il_rx_queue *q)
2517 {
2518 unsigned long flags;
2519 u32 rx_wrt_ptr_reg = il->hw_params.rx_wrt_ptr_reg;
2520 u32 reg;
2521
2522 spin_lock_irqsave(&q->lock, flags);
2523
2524 if (q->need_update == 0)
2525 goto exit_unlock;
2526
2527 /* If power-saving is in use, make sure device is awake */
2528 if (test_bit(S_POWER_PMI, &il->status)) {
2529 reg = _il_rd(il, CSR_UCODE_DRV_GP1);
2530
2531 if (reg & CSR_UCODE_DRV_GP1_BIT_MAC_SLEEP) {
2532 D_INFO("Rx queue requesting wakeup," " GP1 = 0x%x\n",
2533 reg);
2534 il_set_bit(il, CSR_GP_CNTRL,
2535 CSR_GP_CNTRL_REG_FLAG_MAC_ACCESS_REQ);
2536 goto exit_unlock;
2537 }
2538
2539 q->write_actual = (q->write & ~0x7);
2540 il_wr(il, rx_wrt_ptr_reg, q->write_actual);
2541
2542 /* Else device is assumed to be awake */
2543 } else {
2544 /* Device expects a multiple of 8 */
2545 q->write_actual = (q->write & ~0x7);
2546 il_wr(il, rx_wrt_ptr_reg, q->write_actual);
2547 }
2548
2549 q->need_update = 0;
2550
2551 exit_unlock:
2552 spin_unlock_irqrestore(&q->lock, flags);
2553 }
2554 EXPORT_SYMBOL(il_rx_queue_update_write_ptr);
2555
2556 int
2557 il_rx_queue_alloc(struct il_priv *il)
2558 {
2559 struct il_rx_queue *rxq = &il->rxq;
2560 struct device *dev = &il->pci_dev->dev;
2561 int i;
2562
2563 spin_lock_init(&rxq->lock);
2564 INIT_LIST_HEAD(&rxq->rx_free);
2565 INIT_LIST_HEAD(&rxq->rx_used);
2566
2567 /* Alloc the circular buffer of Read Buffer Descriptors (RBDs) */
2568 rxq->bd = dma_alloc_coherent(dev, 4 * RX_QUEUE_SIZE, &rxq->bd_dma,
2569 GFP_KERNEL);
2570 if (!rxq->bd)
2571 goto err_bd;
2572
2573 rxq->rb_stts = dma_alloc_coherent(dev, sizeof(struct il_rb_status),
2574 &rxq->rb_stts_dma, GFP_KERNEL);
2575 if (!rxq->rb_stts)
2576 goto err_rb;
2577
2578 /* Fill the rx_used queue with _all_ of the Rx buffers */
2579 for (i = 0; i < RX_FREE_BUFFERS + RX_QUEUE_SIZE; i++)
2580 list_add_tail(&rxq->pool[i].list, &rxq->rx_used);
2581
2582 /* Set us so that we have processed and used all buffers, but have
2583 * not restocked the Rx queue with fresh buffers */
2584 rxq->read = rxq->write = 0;
2585 rxq->write_actual = 0;
2586 rxq->free_count = 0;
2587 rxq->need_update = 0;
2588 return 0;
2589
2590 err_rb:
2591 dma_free_coherent(&il->pci_dev->dev, 4 * RX_QUEUE_SIZE, rxq->bd,
2592 rxq->bd_dma);
2593 err_bd:
2594 return -ENOMEM;
2595 }
2596 EXPORT_SYMBOL(il_rx_queue_alloc);
2597
2598 void
2599 il_hdl_spectrum_measurement(struct il_priv *il, struct il_rx_buf *rxb)
2600 {
2601 struct il_rx_pkt *pkt = rxb_addr(rxb);
2602 struct il_spectrum_notification *report = &(pkt->u.spectrum_notif);
2603
2604 if (!report->state) {
2605 D_11H("Spectrum Measure Notification: Start\n");
2606 return;
2607 }
2608
2609 memcpy(&il->measure_report, report, sizeof(*report));
2610 il->measurement_status |= MEASUREMENT_READY;
2611 }
2612 EXPORT_SYMBOL(il_hdl_spectrum_measurement);
2613
2614 /*
2615 * returns non-zero if packet should be dropped
2616 */
2617 int
2618 il_set_decrypted_flag(struct il_priv *il, struct ieee80211_hdr *hdr,
2619 u32 decrypt_res, struct ieee80211_rx_status *stats)
2620 {
2621 u16 fc = le16_to_cpu(hdr->frame_control);
2622
2623 /*
2624 * All contexts have the same setting here due to it being
2625 * a module parameter, so OK to check any context.
2626 */
2627 if (il->active.filter_flags & RXON_FILTER_DIS_DECRYPT_MSK)
2628 return 0;
2629
2630 if (!(fc & IEEE80211_FCTL_PROTECTED))
2631 return 0;
2632
2633 D_RX("decrypt_res:0x%x\n", decrypt_res);
2634 switch (decrypt_res & RX_RES_STATUS_SEC_TYPE_MSK) {
2635 case RX_RES_STATUS_SEC_TYPE_TKIP:
2636 /* The uCode has got a bad phase 1 Key, pushes the packet.
2637 * Decryption will be done in SW. */
2638 if ((decrypt_res & RX_RES_STATUS_DECRYPT_TYPE_MSK) ==
2639 RX_RES_STATUS_BAD_KEY_TTAK)
2640 break;
2641
2642 case RX_RES_STATUS_SEC_TYPE_WEP:
2643 if ((decrypt_res & RX_RES_STATUS_DECRYPT_TYPE_MSK) ==
2644 RX_RES_STATUS_BAD_ICV_MIC) {
2645 /* bad ICV, the packet is destroyed since the
2646 * decryption is inplace, drop it */
2647 D_RX("Packet destroyed\n");
2648 return -1;
2649 }
2650 case RX_RES_STATUS_SEC_TYPE_CCMP:
2651 if ((decrypt_res & RX_RES_STATUS_DECRYPT_TYPE_MSK) ==
2652 RX_RES_STATUS_DECRYPT_OK) {
2653 D_RX("hw decrypt successfully!!!\n");
2654 stats->flag |= RX_FLAG_DECRYPTED;
2655 }
2656 break;
2657
2658 default:
2659 break;
2660 }
2661 return 0;
2662 }
2663 EXPORT_SYMBOL(il_set_decrypted_flag);
2664
2665 /**
2666 * il_txq_update_write_ptr - Send new write idx to hardware
2667 */
2668 void
2669 il_txq_update_write_ptr(struct il_priv *il, struct il_tx_queue *txq)
2670 {
2671 u32 reg = 0;
2672 int txq_id = txq->q.id;
2673
2674 if (txq->need_update == 0)
2675 return;
2676
2677 /* if we're trying to save power */
2678 if (test_bit(S_POWER_PMI, &il->status)) {
2679 /* wake up nic if it's powered down ...
2680 * uCode will wake up, and interrupt us again, so next
2681 * time we'll skip this part. */
2682 reg = _il_rd(il, CSR_UCODE_DRV_GP1);
2683
2684 if (reg & CSR_UCODE_DRV_GP1_BIT_MAC_SLEEP) {
2685 D_INFO("Tx queue %d requesting wakeup," " GP1 = 0x%x\n",
2686 txq_id, reg);
2687 il_set_bit(il, CSR_GP_CNTRL,
2688 CSR_GP_CNTRL_REG_FLAG_MAC_ACCESS_REQ);
2689 return;
2690 }
2691
2692 il_wr(il, HBUS_TARG_WRPTR, txq->q.write_ptr | (txq_id << 8));
2693
2694 /*
2695 * else not in power-save mode,
2696 * uCode will never sleep when we're
2697 * trying to tx (during RFKILL, we're not trying to tx).
2698 */
2699 } else
2700 _il_wr(il, HBUS_TARG_WRPTR, txq->q.write_ptr | (txq_id << 8));
2701 txq->need_update = 0;
2702 }
2703 EXPORT_SYMBOL(il_txq_update_write_ptr);
2704
2705 /**
2706 * il_tx_queue_unmap - Unmap any remaining DMA mappings and free skb's
2707 */
2708 void
2709 il_tx_queue_unmap(struct il_priv *il, int txq_id)
2710 {
2711 struct il_tx_queue *txq = &il->txq[txq_id];
2712 struct il_queue *q = &txq->q;
2713
2714 if (q->n_bd == 0)
2715 return;
2716
2717 while (q->write_ptr != q->read_ptr) {
2718 il->ops->txq_free_tfd(il, txq);
2719 q->read_ptr = il_queue_inc_wrap(q->read_ptr, q->n_bd);
2720 }
2721 }
2722 EXPORT_SYMBOL(il_tx_queue_unmap);
2723
2724 /**
2725 * il_tx_queue_free - Deallocate DMA queue.
2726 * @txq: Transmit queue to deallocate.
2727 *
2728 * Empty queue by removing and destroying all BD's.
2729 * Free all buffers.
2730 * 0-fill, but do not free "txq" descriptor structure.
2731 */
2732 void
2733 il_tx_queue_free(struct il_priv *il, int txq_id)
2734 {
2735 struct il_tx_queue *txq = &il->txq[txq_id];
2736 struct device *dev = &il->pci_dev->dev;
2737 int i;
2738
2739 il_tx_queue_unmap(il, txq_id);
2740
2741 /* De-alloc array of command/tx buffers */
2742 for (i = 0; i < TFD_TX_CMD_SLOTS; i++)
2743 kfree(txq->cmd[i]);
2744
2745 /* De-alloc circular buffer of TFDs */
2746 if (txq->q.n_bd)
2747 dma_free_coherent(dev, il->hw_params.tfd_size * txq->q.n_bd,
2748 txq->tfds, txq->q.dma_addr);
2749
2750 /* De-alloc array of per-TFD driver data */
2751 kfree(txq->skbs);
2752 txq->skbs = NULL;
2753
2754 /* deallocate arrays */
2755 kfree(txq->cmd);
2756 kfree(txq->meta);
2757 txq->cmd = NULL;
2758 txq->meta = NULL;
2759
2760 /* 0-fill queue descriptor structure */
2761 memset(txq, 0, sizeof(*txq));
2762 }
2763 EXPORT_SYMBOL(il_tx_queue_free);
2764
2765 /**
2766 * il_cmd_queue_unmap - Unmap any remaining DMA mappings from command queue
2767 */
2768 void
2769 il_cmd_queue_unmap(struct il_priv *il)
2770 {
2771 struct il_tx_queue *txq = &il->txq[il->cmd_queue];
2772 struct il_queue *q = &txq->q;
2773 int i;
2774
2775 if (q->n_bd == 0)
2776 return;
2777
2778 while (q->read_ptr != q->write_ptr) {
2779 i = il_get_cmd_idx(q, q->read_ptr, 0);
2780
2781 if (txq->meta[i].flags & CMD_MAPPED) {
2782 pci_unmap_single(il->pci_dev,
2783 dma_unmap_addr(&txq->meta[i], mapping),
2784 dma_unmap_len(&txq->meta[i], len),
2785 PCI_DMA_BIDIRECTIONAL);
2786 txq->meta[i].flags = 0;
2787 }
2788
2789 q->read_ptr = il_queue_inc_wrap(q->read_ptr, q->n_bd);
2790 }
2791
2792 i = q->n_win;
2793 if (txq->meta[i].flags & CMD_MAPPED) {
2794 pci_unmap_single(il->pci_dev,
2795 dma_unmap_addr(&txq->meta[i], mapping),
2796 dma_unmap_len(&txq->meta[i], len),
2797 PCI_DMA_BIDIRECTIONAL);
2798 txq->meta[i].flags = 0;
2799 }
2800 }
2801 EXPORT_SYMBOL(il_cmd_queue_unmap);
2802
2803 /**
2804 * il_cmd_queue_free - Deallocate DMA queue.
2805 * @txq: Transmit queue to deallocate.
2806 *
2807 * Empty queue by removing and destroying all BD's.
2808 * Free all buffers.
2809 * 0-fill, but do not free "txq" descriptor structure.
2810 */
2811 void
2812 il_cmd_queue_free(struct il_priv *il)
2813 {
2814 struct il_tx_queue *txq = &il->txq[il->cmd_queue];
2815 struct device *dev = &il->pci_dev->dev;
2816 int i;
2817
2818 il_cmd_queue_unmap(il);
2819
2820 /* De-alloc array of command/tx buffers */
2821 for (i = 0; i <= TFD_CMD_SLOTS; i++)
2822 kfree(txq->cmd[i]);
2823
2824 /* De-alloc circular buffer of TFDs */
2825 if (txq->q.n_bd)
2826 dma_free_coherent(dev, il->hw_params.tfd_size * txq->q.n_bd,
2827 txq->tfds, txq->q.dma_addr);
2828
2829 /* deallocate arrays */
2830 kfree(txq->cmd);
2831 kfree(txq->meta);
2832 txq->cmd = NULL;
2833 txq->meta = NULL;
2834
2835 /* 0-fill queue descriptor structure */
2836 memset(txq, 0, sizeof(*txq));
2837 }
2838 EXPORT_SYMBOL(il_cmd_queue_free);
2839
2840 /*************** DMA-QUEUE-GENERAL-FUNCTIONS *****
2841 * DMA services
2842 *
2843 * Theory of operation
2844 *
2845 * A Tx or Rx queue resides in host DRAM, and is comprised of a circular buffer
2846 * of buffer descriptors, each of which points to one or more data buffers for
2847 * the device to read from or fill. Driver and device exchange status of each
2848 * queue via "read" and "write" pointers. Driver keeps minimum of 2 empty
2849 * entries in each circular buffer, to protect against confusing empty and full
2850 * queue states.
2851 *
2852 * The device reads or writes the data in the queues via the device's several
2853 * DMA/FIFO channels. Each queue is mapped to a single DMA channel.
2854 *
2855 * For Tx queue, there are low mark and high mark limits. If, after queuing
2856 * the packet for Tx, free space become < low mark, Tx queue stopped. When
2857 * reclaiming packets (on 'tx done IRQ), if free space become > high mark,
2858 * Tx queue resumed.
2859 *
2860 * See more detailed info in 4965.h.
2861 ***************************************************/
2862
2863 int
2864 il_queue_space(const struct il_queue *q)
2865 {
2866 int s = q->read_ptr - q->write_ptr;
2867
2868 if (q->read_ptr > q->write_ptr)
2869 s -= q->n_bd;
2870
2871 if (s <= 0)
2872 s += q->n_win;
2873 /* keep some reserve to not confuse empty and full situations */
2874 s -= 2;
2875 if (s < 0)
2876 s = 0;
2877 return s;
2878 }
2879 EXPORT_SYMBOL(il_queue_space);
2880
2881
2882 /**
2883 * il_queue_init - Initialize queue's high/low-water and read/write idxes
2884 */
2885 static int
2886 il_queue_init(struct il_priv *il, struct il_queue *q, int slots, u32 id)
2887 {
2888 /*
2889 * TFD_QUEUE_SIZE_MAX must be power-of-two size, otherwise
2890 * il_queue_inc_wrap and il_queue_dec_wrap are broken.
2891 */
2892 BUILD_BUG_ON(TFD_QUEUE_SIZE_MAX & (TFD_QUEUE_SIZE_MAX - 1));
2893 /* FIXME: remove q->n_bd */
2894 q->n_bd = TFD_QUEUE_SIZE_MAX;
2895
2896 q->n_win = slots;
2897 q->id = id;
2898
2899 /* slots_must be power-of-two size, otherwise
2900 * il_get_cmd_idx is broken. */
2901 BUG_ON(!is_power_of_2(slots));
2902
2903 q->low_mark = q->n_win / 4;
2904 if (q->low_mark < 4)
2905 q->low_mark = 4;
2906
2907 q->high_mark = q->n_win / 8;
2908 if (q->high_mark < 2)
2909 q->high_mark = 2;
2910
2911 q->write_ptr = q->read_ptr = 0;
2912
2913 return 0;
2914 }
2915
2916 /**
2917 * il_tx_queue_alloc - Alloc driver data and TFD CB for one Tx/cmd queue
2918 */
2919 static int
2920 il_tx_queue_alloc(struct il_priv *il, struct il_tx_queue *txq, u32 id)
2921 {
2922 struct device *dev = &il->pci_dev->dev;
2923 size_t tfd_sz = il->hw_params.tfd_size * TFD_QUEUE_SIZE_MAX;
2924
2925 /* Driver ilate data, only for Tx (not command) queues,
2926 * not shared with device. */
2927 if (id != il->cmd_queue) {
2928 txq->skbs = kcalloc(TFD_QUEUE_SIZE_MAX, sizeof(struct skb *),
2929 GFP_KERNEL);
2930 if (!txq->skbs) {
2931 IL_ERR("Fail to alloc skbs\n");
2932 goto error;
2933 }
2934 } else
2935 txq->skbs = NULL;
2936
2937 /* Circular buffer of transmit frame descriptors (TFDs),
2938 * shared with device */
2939 txq->tfds =
2940 dma_alloc_coherent(dev, tfd_sz, &txq->q.dma_addr, GFP_KERNEL);
2941 if (!txq->tfds)
2942 goto error;
2943
2944 txq->q.id = id;
2945
2946 return 0;
2947
2948 error:
2949 kfree(txq->skbs);
2950 txq->skbs = NULL;
2951
2952 return -ENOMEM;
2953 }
2954
2955 /**
2956 * il_tx_queue_init - Allocate and initialize one tx/cmd queue
2957 */
2958 int
2959 il_tx_queue_init(struct il_priv *il, u32 txq_id)
2960 {
2961 int i, len, ret;
2962 int slots, actual_slots;
2963 struct il_tx_queue *txq = &il->txq[txq_id];
2964
2965 /*
2966 * Alloc buffer array for commands (Tx or other types of commands).
2967 * For the command queue (#4/#9), allocate command space + one big
2968 * command for scan, since scan command is very huge; the system will
2969 * not have two scans at the same time, so only one is needed.
2970 * For normal Tx queues (all other queues), no super-size command
2971 * space is needed.
2972 */
2973 if (txq_id == il->cmd_queue) {
2974 slots = TFD_CMD_SLOTS;
2975 actual_slots = slots + 1;
2976 } else {
2977 slots = TFD_TX_CMD_SLOTS;
2978 actual_slots = slots;
2979 }
2980
2981 txq->meta =
2982 kzalloc(sizeof(struct il_cmd_meta) * actual_slots, GFP_KERNEL);
2983 txq->cmd =
2984 kzalloc(sizeof(struct il_device_cmd *) * actual_slots, GFP_KERNEL);
2985
2986 if (!txq->meta || !txq->cmd)
2987 goto out_free_arrays;
2988
2989 len = sizeof(struct il_device_cmd);
2990 for (i = 0; i < actual_slots; i++) {
2991 /* only happens for cmd queue */
2992 if (i == slots)
2993 len = IL_MAX_CMD_SIZE;
2994
2995 txq->cmd[i] = kmalloc(len, GFP_KERNEL);
2996 if (!txq->cmd[i])
2997 goto err;
2998 }
2999
3000 /* Alloc driver data array and TFD circular buffer */
3001 ret = il_tx_queue_alloc(il, txq, txq_id);
3002 if (ret)
3003 goto err;
3004
3005 txq->need_update = 0;
3006
3007 /*
3008 * For the default queues 0-3, set up the swq_id
3009 * already -- all others need to get one later
3010 * (if they need one at all).
3011 */
3012 if (txq_id < 4)
3013 il_set_swq_id(txq, txq_id, txq_id);
3014
3015 /* Initialize queue's high/low-water marks, and head/tail idxes */
3016 il_queue_init(il, &txq->q, slots, txq_id);
3017
3018 /* Tell device where to find queue */
3019 il->ops->txq_init(il, txq);
3020
3021 return 0;
3022 err:
3023 for (i = 0; i < actual_slots; i++)
3024 kfree(txq->cmd[i]);
3025 out_free_arrays:
3026 kfree(txq->meta);
3027 kfree(txq->cmd);
3028
3029 return -ENOMEM;
3030 }
3031 EXPORT_SYMBOL(il_tx_queue_init);
3032
3033 void
3034 il_tx_queue_reset(struct il_priv *il, u32 txq_id)
3035 {
3036 int slots, actual_slots;
3037 struct il_tx_queue *txq = &il->txq[txq_id];
3038
3039 if (txq_id == il->cmd_queue) {
3040 slots = TFD_CMD_SLOTS;
3041 actual_slots = TFD_CMD_SLOTS + 1;
3042 } else {
3043 slots = TFD_TX_CMD_SLOTS;
3044 actual_slots = TFD_TX_CMD_SLOTS;
3045 }
3046
3047 memset(txq->meta, 0, sizeof(struct il_cmd_meta) * actual_slots);
3048 txq->need_update = 0;
3049
3050 /* Initialize queue's high/low-water marks, and head/tail idxes */
3051 il_queue_init(il, &txq->q, slots, txq_id);
3052
3053 /* Tell device where to find queue */
3054 il->ops->txq_init(il, txq);
3055 }
3056 EXPORT_SYMBOL(il_tx_queue_reset);
3057
3058 /*************** HOST COMMAND QUEUE FUNCTIONS *****/
3059
3060 /**
3061 * il_enqueue_hcmd - enqueue a uCode command
3062 * @il: device ilate data point
3063 * @cmd: a point to the ucode command structure
3064 *
3065 * The function returns < 0 values to indicate the operation is
3066 * failed. On success, it turns the idx (> 0) of command in the
3067 * command queue.
3068 */
3069 int
3070 il_enqueue_hcmd(struct il_priv *il, struct il_host_cmd *cmd)
3071 {
3072 struct il_tx_queue *txq = &il->txq[il->cmd_queue];
3073 struct il_queue *q = &txq->q;
3074 struct il_device_cmd *out_cmd;
3075 struct il_cmd_meta *out_meta;
3076 dma_addr_t phys_addr;
3077 unsigned long flags;
3078 int len;
3079 u32 idx;
3080 u16 fix_size;
3081
3082 cmd->len = il->ops->get_hcmd_size(cmd->id, cmd->len);
3083 fix_size = (u16) (cmd->len + sizeof(out_cmd->hdr));
3084
3085 /* If any of the command structures end up being larger than
3086 * the TFD_MAX_PAYLOAD_SIZE, and it sent as a 'small' command then
3087 * we will need to increase the size of the TFD entries
3088 * Also, check to see if command buffer should not exceed the size
3089 * of device_cmd and max_cmd_size. */
3090 BUG_ON((fix_size > TFD_MAX_PAYLOAD_SIZE) &&
3091 !(cmd->flags & CMD_SIZE_HUGE));
3092 BUG_ON(fix_size > IL_MAX_CMD_SIZE);
3093
3094 if (il_is_rfkill(il) || il_is_ctkill(il)) {
3095 IL_WARN("Not sending command - %s KILL\n",
3096 il_is_rfkill(il) ? "RF" : "CT");
3097 return -EIO;
3098 }
3099
3100 spin_lock_irqsave(&il->hcmd_lock, flags);
3101
3102 if (il_queue_space(q) < ((cmd->flags & CMD_ASYNC) ? 2 : 1)) {
3103 spin_unlock_irqrestore(&il->hcmd_lock, flags);
3104
3105 IL_ERR("Restarting adapter due to command queue full\n");
3106 queue_work(il->workqueue, &il->restart);
3107 return -ENOSPC;
3108 }
3109
3110 idx = il_get_cmd_idx(q, q->write_ptr, cmd->flags & CMD_SIZE_HUGE);
3111 out_cmd = txq->cmd[idx];
3112 out_meta = &txq->meta[idx];
3113
3114 if (WARN_ON(out_meta->flags & CMD_MAPPED)) {
3115 spin_unlock_irqrestore(&il->hcmd_lock, flags);
3116 return -ENOSPC;
3117 }
3118
3119 memset(out_meta, 0, sizeof(*out_meta)); /* re-initialize to NULL */
3120 out_meta->flags = cmd->flags | CMD_MAPPED;
3121 if (cmd->flags & CMD_WANT_SKB)
3122 out_meta->source = cmd;
3123 if (cmd->flags & CMD_ASYNC)
3124 out_meta->callback = cmd->callback;
3125
3126 out_cmd->hdr.cmd = cmd->id;
3127 memcpy(&out_cmd->cmd.payload, cmd->data, cmd->len);
3128
3129 /* At this point, the out_cmd now has all of the incoming cmd
3130 * information */
3131
3132 out_cmd->hdr.flags = 0;
3133 out_cmd->hdr.sequence =
3134 cpu_to_le16(QUEUE_TO_SEQ(il->cmd_queue) | IDX_TO_SEQ(q->write_ptr));
3135 if (cmd->flags & CMD_SIZE_HUGE)
3136 out_cmd->hdr.sequence |= SEQ_HUGE_FRAME;
3137 len = sizeof(struct il_device_cmd);
3138 if (idx == TFD_CMD_SLOTS)
3139 len = IL_MAX_CMD_SIZE;
3140
3141 #ifdef CONFIG_IWLEGACY_DEBUG
3142 switch (out_cmd->hdr.cmd) {
3143 case C_TX_LINK_QUALITY_CMD:
3144 case C_SENSITIVITY:
3145 D_HC_DUMP("Sending command %s (#%x), seq: 0x%04X, "
3146 "%d bytes at %d[%d]:%d\n",
3147 il_get_cmd_string(out_cmd->hdr.cmd), out_cmd->hdr.cmd,
3148 le16_to_cpu(out_cmd->hdr.sequence), fix_size,
3149 q->write_ptr, idx, il->cmd_queue);
3150 break;
3151 default:
3152 D_HC("Sending command %s (#%x), seq: 0x%04X, "
3153 "%d bytes at %d[%d]:%d\n",
3154 il_get_cmd_string(out_cmd->hdr.cmd), out_cmd->hdr.cmd,
3155 le16_to_cpu(out_cmd->hdr.sequence), fix_size, q->write_ptr,
3156 idx, il->cmd_queue);
3157 }
3158 #endif
3159
3160 phys_addr =
3161 pci_map_single(il->pci_dev, &out_cmd->hdr, fix_size,
3162 PCI_DMA_BIDIRECTIONAL);
3163 if (unlikely(pci_dma_mapping_error(il->pci_dev, phys_addr))) {
3164 idx = -ENOMEM;
3165 goto out;
3166 }
3167 dma_unmap_addr_set(out_meta, mapping, phys_addr);
3168 dma_unmap_len_set(out_meta, len, fix_size);
3169
3170 txq->need_update = 1;
3171
3172 if (il->ops->txq_update_byte_cnt_tbl)
3173 /* Set up entry in queue's byte count circular buffer */
3174 il->ops->txq_update_byte_cnt_tbl(il, txq, 0);
3175
3176 il->ops->txq_attach_buf_to_tfd(il, txq, phys_addr, fix_size, 1,
3177 U32_PAD(cmd->len));
3178
3179 /* Increment and update queue's write idx */
3180 q->write_ptr = il_queue_inc_wrap(q->write_ptr, q->n_bd);
3181 il_txq_update_write_ptr(il, txq);
3182
3183 out:
3184 spin_unlock_irqrestore(&il->hcmd_lock, flags);
3185 return idx;
3186 }
3187
3188 /**
3189 * il_hcmd_queue_reclaim - Reclaim TX command queue entries already Tx'd
3190 *
3191 * When FW advances 'R' idx, all entries between old and new 'R' idx
3192 * need to be reclaimed. As result, some free space forms. If there is
3193 * enough free space (> low mark), wake the stack that feeds us.
3194 */
3195 static void
3196 il_hcmd_queue_reclaim(struct il_priv *il, int txq_id, int idx, int cmd_idx)
3197 {
3198 struct il_tx_queue *txq = &il->txq[txq_id];
3199 struct il_queue *q = &txq->q;
3200 int nfreed = 0;
3201
3202 if (idx >= q->n_bd || il_queue_used(q, idx) == 0) {
3203 IL_ERR("Read idx for DMA queue txq id (%d), idx %d, "
3204 "is out of range [0-%d] %d %d.\n", txq_id, idx, q->n_bd,
3205 q->write_ptr, q->read_ptr);
3206 return;
3207 }
3208
3209 for (idx = il_queue_inc_wrap(idx, q->n_bd); q->read_ptr != idx;
3210 q->read_ptr = il_queue_inc_wrap(q->read_ptr, q->n_bd)) {
3211
3212 if (nfreed++ > 0) {
3213 IL_ERR("HCMD skipped: idx (%d) %d %d\n", idx,
3214 q->write_ptr, q->read_ptr);
3215 queue_work(il->workqueue, &il->restart);
3216 }
3217
3218 }
3219 }
3220
3221 /**
3222 * il_tx_cmd_complete - Pull unused buffers off the queue and reclaim them
3223 * @rxb: Rx buffer to reclaim
3224 *
3225 * If an Rx buffer has an async callback associated with it the callback
3226 * will be executed. The attached skb (if present) will only be freed
3227 * if the callback returns 1
3228 */
3229 void
3230 il_tx_cmd_complete(struct il_priv *il, struct il_rx_buf *rxb)
3231 {
3232 struct il_rx_pkt *pkt = rxb_addr(rxb);
3233 u16 sequence = le16_to_cpu(pkt->hdr.sequence);
3234 int txq_id = SEQ_TO_QUEUE(sequence);
3235 int idx = SEQ_TO_IDX(sequence);
3236 int cmd_idx;
3237 bool huge = !!(pkt->hdr.sequence & SEQ_HUGE_FRAME);
3238 struct il_device_cmd *cmd;
3239 struct il_cmd_meta *meta;
3240 struct il_tx_queue *txq = &il->txq[il->cmd_queue];
3241 unsigned long flags;
3242
3243 /* If a Tx command is being handled and it isn't in the actual
3244 * command queue then there a command routing bug has been introduced
3245 * in the queue management code. */
3246 if (WARN
3247 (txq_id != il->cmd_queue,
3248 "wrong command queue %d (should be %d), sequence 0x%X readp=%d writep=%d\n",
3249 txq_id, il->cmd_queue, sequence, il->txq[il->cmd_queue].q.read_ptr,
3250 il->txq[il->cmd_queue].q.write_ptr)) {
3251 il_print_hex_error(il, pkt, 32);
3252 return;
3253 }
3254
3255 cmd_idx = il_get_cmd_idx(&txq->q, idx, huge);
3256 cmd = txq->cmd[cmd_idx];
3257 meta = &txq->meta[cmd_idx];
3258
3259 txq->time_stamp = jiffies;
3260
3261 pci_unmap_single(il->pci_dev, dma_unmap_addr(meta, mapping),
3262 dma_unmap_len(meta, len), PCI_DMA_BIDIRECTIONAL);
3263
3264 /* Input error checking is done when commands are added to queue. */
3265 if (meta->flags & CMD_WANT_SKB) {
3266 meta->source->reply_page = (unsigned long)rxb_addr(rxb);
3267 rxb->page = NULL;
3268 } else if (meta->callback)
3269 meta->callback(il, cmd, pkt);
3270
3271 spin_lock_irqsave(&il->hcmd_lock, flags);
3272
3273 il_hcmd_queue_reclaim(il, txq_id, idx, cmd_idx);
3274
3275 if (!(meta->flags & CMD_ASYNC)) {
3276 clear_bit(S_HCMD_ACTIVE, &il->status);
3277 D_INFO("Clearing HCMD_ACTIVE for command %s\n",
3278 il_get_cmd_string(cmd->hdr.cmd));
3279 wake_up(&il->wait_command_queue);
3280 }
3281
3282 /* Mark as unmapped */
3283 meta->flags = 0;
3284
3285 spin_unlock_irqrestore(&il->hcmd_lock, flags);
3286 }
3287 EXPORT_SYMBOL(il_tx_cmd_complete);
3288
3289 MODULE_DESCRIPTION("iwl-legacy: common functions for 3945 and 4965");
3290 MODULE_VERSION(IWLWIFI_VERSION);
3291 MODULE_AUTHOR(DRV_COPYRIGHT " " DRV_AUTHOR);
3292 MODULE_LICENSE("GPL");
3293
3294 /*
3295 * set bt_coex_active to true, uCode will do kill/defer
3296 * every time the priority line is asserted (BT is sending signals on the
3297 * priority line in the PCIx).
3298 * set bt_coex_active to false, uCode will ignore the BT activity and
3299 * perform the normal operation
3300 *
3301 * User might experience transmit issue on some platform due to WiFi/BT
3302 * co-exist problem. The possible behaviors are:
3303 * Able to scan and finding all the available AP
3304 * Not able to associate with any AP
3305 * On those platforms, WiFi communication can be restored by set
3306 * "bt_coex_active" module parameter to "false"
3307 *
3308 * default: bt_coex_active = true (BT_COEX_ENABLE)
3309 */
3310 static bool bt_coex_active = true;
3311 module_param(bt_coex_active, bool, S_IRUGO);
3312 MODULE_PARM_DESC(bt_coex_active, "enable wifi/bluetooth co-exist");
3313
3314 u32 il_debug_level;
3315 EXPORT_SYMBOL(il_debug_level);
3316
3317 const u8 il_bcast_addr[ETH_ALEN] = { 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF };
3318 EXPORT_SYMBOL(il_bcast_addr);
3319
3320 #define MAX_BIT_RATE_40_MHZ 150 /* Mbps */
3321 #define MAX_BIT_RATE_20_MHZ 72 /* Mbps */
3322 static void
3323 il_init_ht_hw_capab(const struct il_priv *il,
3324 struct ieee80211_sta_ht_cap *ht_info,
3325 enum ieee80211_band band)
3326 {
3327 u16 max_bit_rate = 0;
3328 u8 rx_chains_num = il->hw_params.rx_chains_num;
3329 u8 tx_chains_num = il->hw_params.tx_chains_num;
3330
3331 ht_info->cap = 0;
3332 memset(&ht_info->mcs, 0, sizeof(ht_info->mcs));
3333
3334 ht_info->ht_supported = true;
3335
3336 ht_info->cap |= IEEE80211_HT_CAP_SGI_20;
3337 max_bit_rate = MAX_BIT_RATE_20_MHZ;
3338 if (il->hw_params.ht40_channel & BIT(band)) {
3339 ht_info->cap |= IEEE80211_HT_CAP_SUP_WIDTH_20_40;
3340 ht_info->cap |= IEEE80211_HT_CAP_SGI_40;
3341 ht_info->mcs.rx_mask[4] = 0x01;
3342 max_bit_rate = MAX_BIT_RATE_40_MHZ;
3343 }
3344
3345 if (il->cfg->mod_params->amsdu_size_8K)
3346 ht_info->cap |= IEEE80211_HT_CAP_MAX_AMSDU;
3347
3348 ht_info->ampdu_factor = CFG_HT_RX_AMPDU_FACTOR_DEF;
3349 ht_info->ampdu_density = CFG_HT_MPDU_DENSITY_DEF;
3350
3351 ht_info->mcs.rx_mask[0] = 0xFF;
3352 if (rx_chains_num >= 2)
3353 ht_info->mcs.rx_mask[1] = 0xFF;
3354 if (rx_chains_num >= 3)
3355 ht_info->mcs.rx_mask[2] = 0xFF;
3356
3357 /* Highest supported Rx data rate */
3358 max_bit_rate *= rx_chains_num;
3359 WARN_ON(max_bit_rate & ~IEEE80211_HT_MCS_RX_HIGHEST_MASK);
3360 ht_info->mcs.rx_highest = cpu_to_le16(max_bit_rate);
3361
3362 /* Tx MCS capabilities */
3363 ht_info->mcs.tx_params = IEEE80211_HT_MCS_TX_DEFINED;
3364 if (tx_chains_num != rx_chains_num) {
3365 ht_info->mcs.tx_params |= IEEE80211_HT_MCS_TX_RX_DIFF;
3366 ht_info->mcs.tx_params |=
3367 ((tx_chains_num -
3368 1) << IEEE80211_HT_MCS_TX_MAX_STREAMS_SHIFT);
3369 }
3370 }
3371
3372 /**
3373 * il_init_geos - Initialize mac80211's geo/channel info based from eeprom
3374 */
3375 int
3376 il_init_geos(struct il_priv *il)
3377 {
3378 struct il_channel_info *ch;
3379 struct ieee80211_supported_band *sband;
3380 struct ieee80211_channel *channels;
3381 struct ieee80211_channel *geo_ch;
3382 struct ieee80211_rate *rates;
3383 int i = 0;
3384 s8 max_tx_power = 0;
3385
3386 if (il->bands[IEEE80211_BAND_2GHZ].n_bitrates ||
3387 il->bands[IEEE80211_BAND_5GHZ].n_bitrates) {
3388 D_INFO("Geography modes already initialized.\n");
3389 set_bit(S_GEO_CONFIGURED, &il->status);
3390 return 0;
3391 }
3392
3393 channels =
3394 kzalloc(sizeof(struct ieee80211_channel) * il->channel_count,
3395 GFP_KERNEL);
3396 if (!channels)
3397 return -ENOMEM;
3398
3399 rates =
3400 kzalloc((sizeof(struct ieee80211_rate) * RATE_COUNT_LEGACY),
3401 GFP_KERNEL);
3402 if (!rates) {
3403 kfree(channels);
3404 return -ENOMEM;
3405 }
3406
3407 /* 5.2GHz channels start after the 2.4GHz channels */
3408 sband = &il->bands[IEEE80211_BAND_5GHZ];
3409 sband->channels = &channels[ARRAY_SIZE(il_eeprom_band_1)];
3410 /* just OFDM */
3411 sband->bitrates = &rates[IL_FIRST_OFDM_RATE];
3412 sband->n_bitrates = RATE_COUNT_LEGACY - IL_FIRST_OFDM_RATE;
3413
3414 if (il->cfg->sku & IL_SKU_N)
3415 il_init_ht_hw_capab(il, &sband->ht_cap, IEEE80211_BAND_5GHZ);
3416
3417 sband = &il->bands[IEEE80211_BAND_2GHZ];
3418 sband->channels = channels;
3419 /* OFDM & CCK */
3420 sband->bitrates = rates;
3421 sband->n_bitrates = RATE_COUNT_LEGACY;
3422
3423 if (il->cfg->sku & IL_SKU_N)
3424 il_init_ht_hw_capab(il, &sband->ht_cap, IEEE80211_BAND_2GHZ);
3425
3426 il->ieee_channels = channels;
3427 il->ieee_rates = rates;
3428
3429 for (i = 0; i < il->channel_count; i++) {
3430 ch = &il->channel_info[i];
3431
3432 if (!il_is_channel_valid(ch))
3433 continue;
3434
3435 sband = &il->bands[ch->band];
3436
3437 geo_ch = &sband->channels[sband->n_channels++];
3438
3439 geo_ch->center_freq =
3440 ieee80211_channel_to_frequency(ch->channel, ch->band);
3441 geo_ch->max_power = ch->max_power_avg;
3442 geo_ch->max_antenna_gain = 0xff;
3443 geo_ch->hw_value = ch->channel;
3444
3445 if (il_is_channel_valid(ch)) {
3446 if (!(ch->flags & EEPROM_CHANNEL_IBSS))
3447 geo_ch->flags |= IEEE80211_CHAN_NO_IR;
3448
3449 if (!(ch->flags & EEPROM_CHANNEL_ACTIVE))
3450 geo_ch->flags |= IEEE80211_CHAN_NO_IR;
3451
3452 if (ch->flags & EEPROM_CHANNEL_RADAR)
3453 geo_ch->flags |= IEEE80211_CHAN_RADAR;
3454
3455 geo_ch->flags |= ch->ht40_extension_channel;
3456
3457 if (ch->max_power_avg > max_tx_power)
3458 max_tx_power = ch->max_power_avg;
3459 } else {
3460 geo_ch->flags |= IEEE80211_CHAN_DISABLED;
3461 }
3462
3463 D_INFO("Channel %d Freq=%d[%sGHz] %s flag=0x%X\n", ch->channel,
3464 geo_ch->center_freq,
3465 il_is_channel_a_band(ch) ? "5.2" : "2.4",
3466 geo_ch->
3467 flags & IEEE80211_CHAN_DISABLED ? "restricted" : "valid",
3468 geo_ch->flags);
3469 }
3470
3471 il->tx_power_device_lmt = max_tx_power;
3472 il->tx_power_user_lmt = max_tx_power;
3473 il->tx_power_next = max_tx_power;
3474
3475 if (il->bands[IEEE80211_BAND_5GHZ].n_channels == 0 &&
3476 (il->cfg->sku & IL_SKU_A)) {
3477 IL_INFO("Incorrectly detected BG card as ABG. "
3478 "Please send your PCI ID 0x%04X:0x%04X to maintainer.\n",
3479 il->pci_dev->device, il->pci_dev->subsystem_device);
3480 il->cfg->sku &= ~IL_SKU_A;
3481 }
3482
3483 IL_INFO("Tunable channels: %d 802.11bg, %d 802.11a channels\n",
3484 il->bands[IEEE80211_BAND_2GHZ].n_channels,
3485 il->bands[IEEE80211_BAND_5GHZ].n_channels);
3486
3487 set_bit(S_GEO_CONFIGURED, &il->status);
3488
3489 return 0;
3490 }
3491 EXPORT_SYMBOL(il_init_geos);
3492
3493 /*
3494 * il_free_geos - undo allocations in il_init_geos
3495 */
3496 void
3497 il_free_geos(struct il_priv *il)
3498 {
3499 kfree(il->ieee_channels);
3500 kfree(il->ieee_rates);
3501 clear_bit(S_GEO_CONFIGURED, &il->status);
3502 }
3503 EXPORT_SYMBOL(il_free_geos);
3504
3505 static bool
3506 il_is_channel_extension(struct il_priv *il, enum ieee80211_band band,
3507 u16 channel, u8 extension_chan_offset)
3508 {
3509 const struct il_channel_info *ch_info;
3510
3511 ch_info = il_get_channel_info(il, band, channel);
3512 if (!il_is_channel_valid(ch_info))
3513 return false;
3514
3515 if (extension_chan_offset == IEEE80211_HT_PARAM_CHA_SEC_ABOVE)
3516 return !(ch_info->
3517 ht40_extension_channel & IEEE80211_CHAN_NO_HT40PLUS);
3518 else if (extension_chan_offset == IEEE80211_HT_PARAM_CHA_SEC_BELOW)
3519 return !(ch_info->
3520 ht40_extension_channel & IEEE80211_CHAN_NO_HT40MINUS);
3521
3522 return false;
3523 }
3524
3525 bool
3526 il_is_ht40_tx_allowed(struct il_priv *il, struct ieee80211_sta_ht_cap *ht_cap)
3527 {
3528 if (!il->ht.enabled || !il->ht.is_40mhz)
3529 return false;
3530
3531 /*
3532 * We do not check for IEEE80211_HT_CAP_SUP_WIDTH_20_40
3533 * the bit will not set if it is pure 40MHz case
3534 */
3535 if (ht_cap && !ht_cap->ht_supported)
3536 return false;
3537
3538 #ifdef CONFIG_IWLEGACY_DEBUGFS
3539 if (il->disable_ht40)
3540 return false;
3541 #endif
3542
3543 return il_is_channel_extension(il, il->band,
3544 le16_to_cpu(il->staging.channel),
3545 il->ht.extension_chan_offset);
3546 }
3547 EXPORT_SYMBOL(il_is_ht40_tx_allowed);
3548
3549 static u16
3550 il_adjust_beacon_interval(u16 beacon_val, u16 max_beacon_val)
3551 {
3552 u16 new_val;
3553 u16 beacon_factor;
3554
3555 /*
3556 * If mac80211 hasn't given us a beacon interval, program
3557 * the default into the device.
3558 */
3559 if (!beacon_val)
3560 return DEFAULT_BEACON_INTERVAL;
3561
3562 /*
3563 * If the beacon interval we obtained from the peer
3564 * is too large, we'll have to wake up more often
3565 * (and in IBSS case, we'll beacon too much)
3566 *
3567 * For example, if max_beacon_val is 4096, and the
3568 * requested beacon interval is 7000, we'll have to
3569 * use 3500 to be able to wake up on the beacons.
3570 *
3571 * This could badly influence beacon detection stats.
3572 */
3573
3574 beacon_factor = (beacon_val + max_beacon_val) / max_beacon_val;
3575 new_val = beacon_val / beacon_factor;
3576
3577 if (!new_val)
3578 new_val = max_beacon_val;
3579
3580 return new_val;
3581 }
3582
3583 int
3584 il_send_rxon_timing(struct il_priv *il)
3585 {
3586 u64 tsf;
3587 s32 interval_tm, rem;
3588 struct ieee80211_conf *conf = NULL;
3589 u16 beacon_int;
3590 struct ieee80211_vif *vif = il->vif;
3591
3592 conf = &il->hw->conf;
3593
3594 lockdep_assert_held(&il->mutex);
3595
3596 memset(&il->timing, 0, sizeof(struct il_rxon_time_cmd));
3597
3598 il->timing.timestamp = cpu_to_le64(il->timestamp);
3599 il->timing.listen_interval = cpu_to_le16(conf->listen_interval);
3600
3601 beacon_int = vif ? vif->bss_conf.beacon_int : 0;
3602
3603 /*
3604 * TODO: For IBSS we need to get atim_win from mac80211,
3605 * for now just always use 0
3606 */
3607 il->timing.atim_win = 0;
3608
3609 beacon_int =
3610 il_adjust_beacon_interval(beacon_int,
3611 il->hw_params.max_beacon_itrvl *
3612 TIME_UNIT);
3613 il->timing.beacon_interval = cpu_to_le16(beacon_int);
3614
3615 tsf = il->timestamp; /* tsf is modifed by do_div: copy it */
3616 interval_tm = beacon_int * TIME_UNIT;
3617 rem = do_div(tsf, interval_tm);
3618 il->timing.beacon_init_val = cpu_to_le32(interval_tm - rem);
3619
3620 il->timing.dtim_period = vif ? (vif->bss_conf.dtim_period ? : 1) : 1;
3621
3622 D_ASSOC("beacon interval %d beacon timer %d beacon tim %d\n",
3623 le16_to_cpu(il->timing.beacon_interval),
3624 le32_to_cpu(il->timing.beacon_init_val),
3625 le16_to_cpu(il->timing.atim_win));
3626
3627 return il_send_cmd_pdu(il, C_RXON_TIMING, sizeof(il->timing),
3628 &il->timing);
3629 }
3630 EXPORT_SYMBOL(il_send_rxon_timing);
3631
3632 void
3633 il_set_rxon_hwcrypto(struct il_priv *il, int hw_decrypt)
3634 {
3635 struct il_rxon_cmd *rxon = &il->staging;
3636
3637 if (hw_decrypt)
3638 rxon->filter_flags &= ~RXON_FILTER_DIS_DECRYPT_MSK;
3639 else
3640 rxon->filter_flags |= RXON_FILTER_DIS_DECRYPT_MSK;
3641
3642 }
3643 EXPORT_SYMBOL(il_set_rxon_hwcrypto);
3644
3645 /* validate RXON structure is valid */
3646 int
3647 il_check_rxon_cmd(struct il_priv *il)
3648 {
3649 struct il_rxon_cmd *rxon = &il->staging;
3650 bool error = false;
3651
3652 if (rxon->flags & RXON_FLG_BAND_24G_MSK) {
3653 if (rxon->flags & RXON_FLG_TGJ_NARROW_BAND_MSK) {
3654 IL_WARN("check 2.4G: wrong narrow\n");
3655 error = true;
3656 }
3657 if (rxon->flags & RXON_FLG_RADAR_DETECT_MSK) {
3658 IL_WARN("check 2.4G: wrong radar\n");
3659 error = true;
3660 }
3661 } else {
3662 if (!(rxon->flags & RXON_FLG_SHORT_SLOT_MSK)) {
3663 IL_WARN("check 5.2G: not short slot!\n");
3664 error = true;
3665 }
3666 if (rxon->flags & RXON_FLG_CCK_MSK) {
3667 IL_WARN("check 5.2G: CCK!\n");
3668 error = true;
3669 }
3670 }
3671 if ((rxon->node_addr[0] | rxon->bssid_addr[0]) & 0x1) {
3672 IL_WARN("mac/bssid mcast!\n");
3673 error = true;
3674 }
3675
3676 /* make sure basic rates 6Mbps and 1Mbps are supported */
3677 if ((rxon->ofdm_basic_rates & RATE_6M_MASK) == 0 &&
3678 (rxon->cck_basic_rates & RATE_1M_MASK) == 0) {
3679 IL_WARN("neither 1 nor 6 are basic\n");
3680 error = true;
3681 }
3682
3683 if (le16_to_cpu(rxon->assoc_id) > 2007) {
3684 IL_WARN("aid > 2007\n");
3685 error = true;
3686 }
3687
3688 if ((rxon->flags & (RXON_FLG_CCK_MSK | RXON_FLG_SHORT_SLOT_MSK)) ==
3689 (RXON_FLG_CCK_MSK | RXON_FLG_SHORT_SLOT_MSK)) {
3690 IL_WARN("CCK and short slot\n");
3691 error = true;
3692 }
3693
3694 if ((rxon->flags & (RXON_FLG_CCK_MSK | RXON_FLG_AUTO_DETECT_MSK)) ==
3695 (RXON_FLG_CCK_MSK | RXON_FLG_AUTO_DETECT_MSK)) {
3696 IL_WARN("CCK and auto detect");
3697 error = true;
3698 }
3699
3700 if ((rxon->
3701 flags & (RXON_FLG_AUTO_DETECT_MSK | RXON_FLG_TGG_PROTECT_MSK)) ==
3702 RXON_FLG_TGG_PROTECT_MSK) {
3703 IL_WARN("TGg but no auto-detect\n");
3704 error = true;
3705 }
3706
3707 if (error)
3708 IL_WARN("Tuning to channel %d\n", le16_to_cpu(rxon->channel));
3709
3710 if (error) {
3711 IL_ERR("Invalid RXON\n");
3712 return -EINVAL;
3713 }
3714 return 0;
3715 }
3716 EXPORT_SYMBOL(il_check_rxon_cmd);
3717
3718 /**
3719 * il_full_rxon_required - check if full RXON (vs RXON_ASSOC) cmd is needed
3720 * @il: staging_rxon is compared to active_rxon
3721 *
3722 * If the RXON structure is changing enough to require a new tune,
3723 * or is clearing the RXON_FILTER_ASSOC_MSK, then return 1 to indicate that
3724 * a new tune (full RXON command, rather than RXON_ASSOC cmd) is required.
3725 */
3726 int
3727 il_full_rxon_required(struct il_priv *il)
3728 {
3729 const struct il_rxon_cmd *staging = &il->staging;
3730 const struct il_rxon_cmd *active = &il->active;
3731
3732 #define CHK(cond) \
3733 if ((cond)) { \
3734 D_INFO("need full RXON - " #cond "\n"); \
3735 return 1; \
3736 }
3737
3738 #define CHK_NEQ(c1, c2) \
3739 if ((c1) != (c2)) { \
3740 D_INFO("need full RXON - " \
3741 #c1 " != " #c2 " - %d != %d\n", \
3742 (c1), (c2)); \
3743 return 1; \
3744 }
3745
3746 /* These items are only settable from the full RXON command */
3747 CHK(!il_is_associated(il));
3748 CHK(!ether_addr_equal_64bits(staging->bssid_addr, active->bssid_addr));
3749 CHK(!ether_addr_equal_64bits(staging->node_addr, active->node_addr));
3750 CHK(!ether_addr_equal_64bits(staging->wlap_bssid_addr,
3751 active->wlap_bssid_addr));
3752 CHK_NEQ(staging->dev_type, active->dev_type);
3753 CHK_NEQ(staging->channel, active->channel);
3754 CHK_NEQ(staging->air_propagation, active->air_propagation);
3755 CHK_NEQ(staging->ofdm_ht_single_stream_basic_rates,
3756 active->ofdm_ht_single_stream_basic_rates);
3757 CHK_NEQ(staging->ofdm_ht_dual_stream_basic_rates,
3758 active->ofdm_ht_dual_stream_basic_rates);
3759 CHK_NEQ(staging->assoc_id, active->assoc_id);
3760
3761 /* flags, filter_flags, ofdm_basic_rates, and cck_basic_rates can
3762 * be updated with the RXON_ASSOC command -- however only some
3763 * flag transitions are allowed using RXON_ASSOC */
3764
3765 /* Check if we are not switching bands */
3766 CHK_NEQ(staging->flags & RXON_FLG_BAND_24G_MSK,
3767 active->flags & RXON_FLG_BAND_24G_MSK);
3768
3769 /* Check if we are switching association toggle */
3770 CHK_NEQ(staging->filter_flags & RXON_FILTER_ASSOC_MSK,
3771 active->filter_flags & RXON_FILTER_ASSOC_MSK);
3772
3773 #undef CHK
3774 #undef CHK_NEQ
3775
3776 return 0;
3777 }
3778 EXPORT_SYMBOL(il_full_rxon_required);
3779
3780 u8
3781 il_get_lowest_plcp(struct il_priv *il)
3782 {
3783 /*
3784 * Assign the lowest rate -- should really get this from
3785 * the beacon skb from mac80211.
3786 */
3787 if (il->staging.flags & RXON_FLG_BAND_24G_MSK)
3788 return RATE_1M_PLCP;
3789 else
3790 return RATE_6M_PLCP;
3791 }
3792 EXPORT_SYMBOL(il_get_lowest_plcp);
3793
3794 static void
3795 _il_set_rxon_ht(struct il_priv *il, struct il_ht_config *ht_conf)
3796 {
3797 struct il_rxon_cmd *rxon = &il->staging;
3798
3799 if (!il->ht.enabled) {
3800 rxon->flags &=
3801 ~(RXON_FLG_CHANNEL_MODE_MSK |
3802 RXON_FLG_CTRL_CHANNEL_LOC_HI_MSK | RXON_FLG_HT40_PROT_MSK
3803 | RXON_FLG_HT_PROT_MSK);
3804 return;
3805 }
3806
3807 rxon->flags |=
3808 cpu_to_le32(il->ht.protection << RXON_FLG_HT_OPERATING_MODE_POS);
3809
3810 /* Set up channel bandwidth:
3811 * 20 MHz only, 20/40 mixed or pure 40 if ht40 ok */
3812 /* clear the HT channel mode before set the mode */
3813 rxon->flags &=
3814 ~(RXON_FLG_CHANNEL_MODE_MSK | RXON_FLG_CTRL_CHANNEL_LOC_HI_MSK);
3815 if (il_is_ht40_tx_allowed(il, NULL)) {
3816 /* pure ht40 */
3817 if (il->ht.protection == IEEE80211_HT_OP_MODE_PROTECTION_20MHZ) {
3818 rxon->flags |= RXON_FLG_CHANNEL_MODE_PURE_40;
3819 /* Note: control channel is opposite of extension channel */
3820 switch (il->ht.extension_chan_offset) {
3821 case IEEE80211_HT_PARAM_CHA_SEC_ABOVE:
3822 rxon->flags &=
3823 ~RXON_FLG_CTRL_CHANNEL_LOC_HI_MSK;
3824 break;
3825 case IEEE80211_HT_PARAM_CHA_SEC_BELOW:
3826 rxon->flags |= RXON_FLG_CTRL_CHANNEL_LOC_HI_MSK;
3827 break;
3828 }
3829 } else {
3830 /* Note: control channel is opposite of extension channel */
3831 switch (il->ht.extension_chan_offset) {
3832 case IEEE80211_HT_PARAM_CHA_SEC_ABOVE:
3833 rxon->flags &=
3834 ~(RXON_FLG_CTRL_CHANNEL_LOC_HI_MSK);
3835 rxon->flags |= RXON_FLG_CHANNEL_MODE_MIXED;
3836 break;
3837 case IEEE80211_HT_PARAM_CHA_SEC_BELOW:
3838 rxon->flags |= RXON_FLG_CTRL_CHANNEL_LOC_HI_MSK;
3839 rxon->flags |= RXON_FLG_CHANNEL_MODE_MIXED;
3840 break;
3841 case IEEE80211_HT_PARAM_CHA_SEC_NONE:
3842 default:
3843 /* channel location only valid if in Mixed mode */
3844 IL_ERR("invalid extension channel offset\n");
3845 break;
3846 }
3847 }
3848 } else {
3849 rxon->flags |= RXON_FLG_CHANNEL_MODE_LEGACY;
3850 }
3851
3852 if (il->ops->set_rxon_chain)
3853 il->ops->set_rxon_chain(il);
3854
3855 D_ASSOC("rxon flags 0x%X operation mode :0x%X "
3856 "extension channel offset 0x%x\n", le32_to_cpu(rxon->flags),
3857 il->ht.protection, il->ht.extension_chan_offset);
3858 }
3859
3860 void
3861 il_set_rxon_ht(struct il_priv *il, struct il_ht_config *ht_conf)
3862 {
3863 _il_set_rxon_ht(il, ht_conf);
3864 }
3865 EXPORT_SYMBOL(il_set_rxon_ht);
3866
3867 /* Return valid, unused, channel for a passive scan to reset the RF */
3868 u8
3869 il_get_single_channel_number(struct il_priv *il, enum ieee80211_band band)
3870 {
3871 const struct il_channel_info *ch_info;
3872 int i;
3873 u8 channel = 0;
3874 u8 min, max;
3875
3876 if (band == IEEE80211_BAND_5GHZ) {
3877 min = 14;
3878 max = il->channel_count;
3879 } else {
3880 min = 0;
3881 max = 14;
3882 }
3883
3884 for (i = min; i < max; i++) {
3885 channel = il->channel_info[i].channel;
3886 if (channel == le16_to_cpu(il->staging.channel))
3887 continue;
3888
3889 ch_info = il_get_channel_info(il, band, channel);
3890 if (il_is_channel_valid(ch_info))
3891 break;
3892 }
3893
3894 return channel;
3895 }
3896 EXPORT_SYMBOL(il_get_single_channel_number);
3897
3898 /**
3899 * il_set_rxon_channel - Set the band and channel values in staging RXON
3900 * @ch: requested channel as a pointer to struct ieee80211_channel
3901
3902 * NOTE: Does not commit to the hardware; it sets appropriate bit fields
3903 * in the staging RXON flag structure based on the ch->band
3904 */
3905 int
3906 il_set_rxon_channel(struct il_priv *il, struct ieee80211_channel *ch)
3907 {
3908 enum ieee80211_band band = ch->band;
3909 u16 channel = ch->hw_value;
3910
3911 if (le16_to_cpu(il->staging.channel) == channel && il->band == band)
3912 return 0;
3913
3914 il->staging.channel = cpu_to_le16(channel);
3915 if (band == IEEE80211_BAND_5GHZ)
3916 il->staging.flags &= ~RXON_FLG_BAND_24G_MSK;
3917 else
3918 il->staging.flags |= RXON_FLG_BAND_24G_MSK;
3919
3920 il->band = band;
3921
3922 D_INFO("Staging channel set to %d [%d]\n", channel, band);
3923
3924 return 0;
3925 }
3926 EXPORT_SYMBOL(il_set_rxon_channel);
3927
3928 void
3929 il_set_flags_for_band(struct il_priv *il, enum ieee80211_band band,
3930 struct ieee80211_vif *vif)
3931 {
3932 if (band == IEEE80211_BAND_5GHZ) {
3933 il->staging.flags &=
3934 ~(RXON_FLG_BAND_24G_MSK | RXON_FLG_AUTO_DETECT_MSK |
3935 RXON_FLG_CCK_MSK);
3936 il->staging.flags |= RXON_FLG_SHORT_SLOT_MSK;
3937 } else {
3938 /* Copied from il_post_associate() */
3939 if (vif && vif->bss_conf.use_short_slot)
3940 il->staging.flags |= RXON_FLG_SHORT_SLOT_MSK;
3941 else
3942 il->staging.flags &= ~RXON_FLG_SHORT_SLOT_MSK;
3943
3944 il->staging.flags |= RXON_FLG_BAND_24G_MSK;
3945 il->staging.flags |= RXON_FLG_AUTO_DETECT_MSK;
3946 il->staging.flags &= ~RXON_FLG_CCK_MSK;
3947 }
3948 }
3949 EXPORT_SYMBOL(il_set_flags_for_band);
3950
3951 /*
3952 * initialize rxon structure with default values from eeprom
3953 */
3954 void
3955 il_connection_init_rx_config(struct il_priv *il)
3956 {
3957 const struct il_channel_info *ch_info;
3958
3959 memset(&il->staging, 0, sizeof(il->staging));
3960
3961 switch (il->iw_mode) {
3962 case NL80211_IFTYPE_UNSPECIFIED:
3963 il->staging.dev_type = RXON_DEV_TYPE_ESS;
3964 break;
3965 case NL80211_IFTYPE_STATION:
3966 il->staging.dev_type = RXON_DEV_TYPE_ESS;
3967 il->staging.filter_flags = RXON_FILTER_ACCEPT_GRP_MSK;
3968 break;
3969 case NL80211_IFTYPE_ADHOC:
3970 il->staging.dev_type = RXON_DEV_TYPE_IBSS;
3971 il->staging.flags = RXON_FLG_SHORT_PREAMBLE_MSK;
3972 il->staging.filter_flags =
3973 RXON_FILTER_BCON_AWARE_MSK | RXON_FILTER_ACCEPT_GRP_MSK;
3974 break;
3975 default:
3976 IL_ERR("Unsupported interface type %d\n", il->vif->type);
3977 return;
3978 }
3979
3980 #if 0
3981 /* TODO: Figure out when short_preamble would be set and cache from
3982 * that */
3983 if (!hw_to_local(il->hw)->short_preamble)
3984 il->staging.flags &= ~RXON_FLG_SHORT_PREAMBLE_MSK;
3985 else
3986 il->staging.flags |= RXON_FLG_SHORT_PREAMBLE_MSK;
3987 #endif
3988
3989 ch_info =
3990 il_get_channel_info(il, il->band, le16_to_cpu(il->active.channel));
3991
3992 if (!ch_info)
3993 ch_info = &il->channel_info[0];
3994
3995 il->staging.channel = cpu_to_le16(ch_info->channel);
3996 il->band = ch_info->band;
3997
3998 il_set_flags_for_band(il, il->band, il->vif);
3999
4000 il->staging.ofdm_basic_rates =
4001 (IL_OFDM_RATES_MASK >> IL_FIRST_OFDM_RATE) & 0xFF;
4002 il->staging.cck_basic_rates =
4003 (IL_CCK_RATES_MASK >> IL_FIRST_CCK_RATE) & 0xF;
4004
4005 /* clear both MIX and PURE40 mode flag */
4006 il->staging.flags &=
4007 ~(RXON_FLG_CHANNEL_MODE_MIXED | RXON_FLG_CHANNEL_MODE_PURE_40);
4008 if (il->vif)
4009 memcpy(il->staging.node_addr, il->vif->addr, ETH_ALEN);
4010
4011 il->staging.ofdm_ht_single_stream_basic_rates = 0xff;
4012 il->staging.ofdm_ht_dual_stream_basic_rates = 0xff;
4013 }
4014 EXPORT_SYMBOL(il_connection_init_rx_config);
4015
4016 void
4017 il_set_rate(struct il_priv *il)
4018 {
4019 const struct ieee80211_supported_band *hw = NULL;
4020 struct ieee80211_rate *rate;
4021 int i;
4022
4023 hw = il_get_hw_mode(il, il->band);
4024 if (!hw) {
4025 IL_ERR("Failed to set rate: unable to get hw mode\n");
4026 return;
4027 }
4028
4029 il->active_rate = 0;
4030
4031 for (i = 0; i < hw->n_bitrates; i++) {
4032 rate = &(hw->bitrates[i]);
4033 if (rate->hw_value < RATE_COUNT_LEGACY)
4034 il->active_rate |= (1 << rate->hw_value);
4035 }
4036
4037 D_RATE("Set active_rate = %0x\n", il->active_rate);
4038
4039 il->staging.cck_basic_rates =
4040 (IL_CCK_BASIC_RATES_MASK >> IL_FIRST_CCK_RATE) & 0xF;
4041
4042 il->staging.ofdm_basic_rates =
4043 (IL_OFDM_BASIC_RATES_MASK >> IL_FIRST_OFDM_RATE) & 0xFF;
4044 }
4045 EXPORT_SYMBOL(il_set_rate);
4046
4047 void
4048 il_chswitch_done(struct il_priv *il, bool is_success)
4049 {
4050 if (test_bit(S_EXIT_PENDING, &il->status))
4051 return;
4052
4053 if (test_and_clear_bit(S_CHANNEL_SWITCH_PENDING, &il->status))
4054 ieee80211_chswitch_done(il->vif, is_success);
4055 }
4056 EXPORT_SYMBOL(il_chswitch_done);
4057
4058 void
4059 il_hdl_csa(struct il_priv *il, struct il_rx_buf *rxb)
4060 {
4061 struct il_rx_pkt *pkt = rxb_addr(rxb);
4062 struct il_csa_notification *csa = &(pkt->u.csa_notif);
4063 struct il_rxon_cmd *rxon = (void *)&il->active;
4064
4065 if (!test_bit(S_CHANNEL_SWITCH_PENDING, &il->status))
4066 return;
4067
4068 if (!le32_to_cpu(csa->status) && csa->channel == il->switch_channel) {
4069 rxon->channel = csa->channel;
4070 il->staging.channel = csa->channel;
4071 D_11H("CSA notif: channel %d\n", le16_to_cpu(csa->channel));
4072 il_chswitch_done(il, true);
4073 } else {
4074 IL_ERR("CSA notif (fail) : channel %d\n",
4075 le16_to_cpu(csa->channel));
4076 il_chswitch_done(il, false);
4077 }
4078 }
4079 EXPORT_SYMBOL(il_hdl_csa);
4080
4081 #ifdef CONFIG_IWLEGACY_DEBUG
4082 void
4083 il_print_rx_config_cmd(struct il_priv *il)
4084 {
4085 struct il_rxon_cmd *rxon = &il->staging;
4086
4087 D_RADIO("RX CONFIG:\n");
4088 il_print_hex_dump(il, IL_DL_RADIO, (u8 *) rxon, sizeof(*rxon));
4089 D_RADIO("u16 channel: 0x%x\n", le16_to_cpu(rxon->channel));
4090 D_RADIO("u32 flags: 0x%08X\n", le32_to_cpu(rxon->flags));
4091 D_RADIO("u32 filter_flags: 0x%08x\n", le32_to_cpu(rxon->filter_flags));
4092 D_RADIO("u8 dev_type: 0x%x\n", rxon->dev_type);
4093 D_RADIO("u8 ofdm_basic_rates: 0x%02x\n", rxon->ofdm_basic_rates);
4094 D_RADIO("u8 cck_basic_rates: 0x%02x\n", rxon->cck_basic_rates);
4095 D_RADIO("u8[6] node_addr: %pM\n", rxon->node_addr);
4096 D_RADIO("u8[6] bssid_addr: %pM\n", rxon->bssid_addr);
4097 D_RADIO("u16 assoc_id: 0x%x\n", le16_to_cpu(rxon->assoc_id));
4098 }
4099 EXPORT_SYMBOL(il_print_rx_config_cmd);
4100 #endif
4101 /**
4102 * il_irq_handle_error - called for HW or SW error interrupt from card
4103 */
4104 void
4105 il_irq_handle_error(struct il_priv *il)
4106 {
4107 /* Set the FW error flag -- cleared on il_down */
4108 set_bit(S_FW_ERROR, &il->status);
4109
4110 /* Cancel currently queued command. */
4111 clear_bit(S_HCMD_ACTIVE, &il->status);
4112
4113 IL_ERR("Loaded firmware version: %s\n", il->hw->wiphy->fw_version);
4114
4115 il->ops->dump_nic_error_log(il);
4116 if (il->ops->dump_fh)
4117 il->ops->dump_fh(il, NULL, false);
4118 #ifdef CONFIG_IWLEGACY_DEBUG
4119 if (il_get_debug_level(il) & IL_DL_FW_ERRORS)
4120 il_print_rx_config_cmd(il);
4121 #endif
4122
4123 wake_up(&il->wait_command_queue);
4124
4125 /* Keep the restart process from trying to send host
4126 * commands by clearing the INIT status bit */
4127 clear_bit(S_READY, &il->status);
4128
4129 if (!test_bit(S_EXIT_PENDING, &il->status)) {
4130 IL_DBG(IL_DL_FW_ERRORS,
4131 "Restarting adapter due to uCode error.\n");
4132
4133 if (il->cfg->mod_params->restart_fw)
4134 queue_work(il->workqueue, &il->restart);
4135 }
4136 }
4137 EXPORT_SYMBOL(il_irq_handle_error);
4138
4139 static int
4140 _il_apm_stop_master(struct il_priv *il)
4141 {
4142 int ret = 0;
4143
4144 /* stop device's busmaster DMA activity */
4145 _il_set_bit(il, CSR_RESET, CSR_RESET_REG_FLAG_STOP_MASTER);
4146
4147 ret =
4148 _il_poll_bit(il, CSR_RESET, CSR_RESET_REG_FLAG_MASTER_DISABLED,
4149 CSR_RESET_REG_FLAG_MASTER_DISABLED, 100);
4150 if (ret < 0)
4151 IL_WARN("Master Disable Timed Out, 100 usec\n");
4152
4153 D_INFO("stop master\n");
4154
4155 return ret;
4156 }
4157
4158 void
4159 _il_apm_stop(struct il_priv *il)
4160 {
4161 lockdep_assert_held(&il->reg_lock);
4162
4163 D_INFO("Stop card, put in low power state\n");
4164
4165 /* Stop device's DMA activity */
4166 _il_apm_stop_master(il);
4167
4168 /* Reset the entire device */
4169 _il_set_bit(il, CSR_RESET, CSR_RESET_REG_FLAG_SW_RESET);
4170
4171 udelay(10);
4172
4173 /*
4174 * Clear "initialization complete" bit to move adapter from
4175 * D0A* (powered-up Active) --> D0U* (Uninitialized) state.
4176 */
4177 _il_clear_bit(il, CSR_GP_CNTRL, CSR_GP_CNTRL_REG_FLAG_INIT_DONE);
4178 }
4179 EXPORT_SYMBOL(_il_apm_stop);
4180
4181 void
4182 il_apm_stop(struct il_priv *il)
4183 {
4184 unsigned long flags;
4185
4186 spin_lock_irqsave(&il->reg_lock, flags);
4187 _il_apm_stop(il);
4188 spin_unlock_irqrestore(&il->reg_lock, flags);
4189 }
4190 EXPORT_SYMBOL(il_apm_stop);
4191
4192 /*
4193 * Start up NIC's basic functionality after it has been reset
4194 * (e.g. after platform boot, or shutdown via il_apm_stop())
4195 * NOTE: This does not load uCode nor start the embedded processor
4196 */
4197 int
4198 il_apm_init(struct il_priv *il)
4199 {
4200 int ret = 0;
4201 u16 lctl;
4202
4203 D_INFO("Init card's basic functions\n");
4204
4205 /*
4206 * Use "set_bit" below rather than "write", to preserve any hardware
4207 * bits already set by default after reset.
4208 */
4209
4210 /* Disable L0S exit timer (platform NMI Work/Around) */
4211 il_set_bit(il, CSR_GIO_CHICKEN_BITS,
4212 CSR_GIO_CHICKEN_BITS_REG_BIT_DIS_L0S_EXIT_TIMER);
4213
4214 /*
4215 * Disable L0s without affecting L1;
4216 * don't wait for ICH L0s (ICH bug W/A)
4217 */
4218 il_set_bit(il, CSR_GIO_CHICKEN_BITS,
4219 CSR_GIO_CHICKEN_BITS_REG_BIT_L1A_NO_L0S_RX);
4220
4221 /* Set FH wait threshold to maximum (HW error during stress W/A) */
4222 il_set_bit(il, CSR_DBG_HPET_MEM_REG, CSR_DBG_HPET_MEM_REG_VAL);
4223
4224 /*
4225 * Enable HAP INTA (interrupt from management bus) to
4226 * wake device's PCI Express link L1a -> L0s
4227 * NOTE: This is no-op for 3945 (non-existent bit)
4228 */
4229 il_set_bit(il, CSR_HW_IF_CONFIG_REG,
4230 CSR_HW_IF_CONFIG_REG_BIT_HAP_WAKE_L1A);
4231
4232 /*
4233 * HW bug W/A for instability in PCIe bus L0->L0S->L1 transition.
4234 * Check if BIOS (or OS) enabled L1-ASPM on this device.
4235 * If so (likely), disable L0S, so device moves directly L0->L1;
4236 * costs negligible amount of power savings.
4237 * If not (unlikely), enable L0S, so there is at least some
4238 * power savings, even without L1.
4239 */
4240 if (il->cfg->set_l0s) {
4241 pcie_capability_read_word(il->pci_dev, PCI_EXP_LNKCTL, &lctl);
4242 if (lctl & PCI_EXP_LNKCTL_ASPM_L1) {
4243 /* L1-ASPM enabled; disable(!) L0S */
4244 il_set_bit(il, CSR_GIO_REG,
4245 CSR_GIO_REG_VAL_L0S_ENABLED);
4246 D_POWER("L1 Enabled; Disabling L0S\n");
4247 } else {
4248 /* L1-ASPM disabled; enable(!) L0S */
4249 il_clear_bit(il, CSR_GIO_REG,
4250 CSR_GIO_REG_VAL_L0S_ENABLED);
4251 D_POWER("L1 Disabled; Enabling L0S\n");
4252 }
4253 }
4254
4255 /* Configure analog phase-lock-loop before activating to D0A */
4256 if (il->cfg->pll_cfg_val)
4257 il_set_bit(il, CSR_ANA_PLL_CFG,
4258 il->cfg->pll_cfg_val);
4259
4260 /*
4261 * Set "initialization complete" bit to move adapter from
4262 * D0U* --> D0A* (powered-up active) state.
4263 */
4264 il_set_bit(il, CSR_GP_CNTRL, CSR_GP_CNTRL_REG_FLAG_INIT_DONE);
4265
4266 /*
4267 * Wait for clock stabilization; once stabilized, access to
4268 * device-internal resources is supported, e.g. il_wr_prph()
4269 * and accesses to uCode SRAM.
4270 */
4271 ret =
4272 _il_poll_bit(il, CSR_GP_CNTRL,
4273 CSR_GP_CNTRL_REG_FLAG_MAC_CLOCK_READY,
4274 CSR_GP_CNTRL_REG_FLAG_MAC_CLOCK_READY, 25000);
4275 if (ret < 0) {
4276 D_INFO("Failed to init the card\n");
4277 goto out;
4278 }
4279
4280 /*
4281 * Enable DMA and BSM (if used) clocks, wait for them to stabilize.
4282 * BSM (Boostrap State Machine) is only in 3945 and 4965.
4283 *
4284 * Write to "CLK_EN_REG"; "1" bits enable clocks, while "0" bits
4285 * do not disable clocks. This preserves any hardware bits already
4286 * set by default in "CLK_CTRL_REG" after reset.
4287 */
4288 if (il->cfg->use_bsm)
4289 il_wr_prph(il, APMG_CLK_EN_REG,
4290 APMG_CLK_VAL_DMA_CLK_RQT | APMG_CLK_VAL_BSM_CLK_RQT);
4291 else
4292 il_wr_prph(il, APMG_CLK_EN_REG, APMG_CLK_VAL_DMA_CLK_RQT);
4293 udelay(20);
4294
4295 /* Disable L1-Active */
4296 il_set_bits_prph(il, APMG_PCIDEV_STT_REG,
4297 APMG_PCIDEV_STT_VAL_L1_ACT_DIS);
4298
4299 out:
4300 return ret;
4301 }
4302 EXPORT_SYMBOL(il_apm_init);
4303
4304 int
4305 il_set_tx_power(struct il_priv *il, s8 tx_power, bool force)
4306 {
4307 int ret;
4308 s8 prev_tx_power;
4309 bool defer;
4310
4311 lockdep_assert_held(&il->mutex);
4312
4313 if (il->tx_power_user_lmt == tx_power && !force)
4314 return 0;
4315
4316 if (!il->ops->send_tx_power)
4317 return -EOPNOTSUPP;
4318
4319 /* 0 dBm mean 1 milliwatt */
4320 if (tx_power < 0) {
4321 IL_WARN("Requested user TXPOWER %d below 1 mW.\n", tx_power);
4322 return -EINVAL;
4323 }
4324
4325 if (tx_power > il->tx_power_device_lmt) {
4326 IL_WARN("Requested user TXPOWER %d above upper limit %d.\n",
4327 tx_power, il->tx_power_device_lmt);
4328 return -EINVAL;
4329 }
4330
4331 if (!il_is_ready_rf(il))
4332 return -EIO;
4333
4334 /* scan complete and commit_rxon use tx_power_next value,
4335 * it always need to be updated for newest request */
4336 il->tx_power_next = tx_power;
4337
4338 /* do not set tx power when scanning or channel changing */
4339 defer = test_bit(S_SCANNING, &il->status) ||
4340 memcmp(&il->active, &il->staging, sizeof(il->staging));
4341 if (defer && !force) {
4342 D_INFO("Deferring tx power set\n");
4343 return 0;
4344 }
4345
4346 prev_tx_power = il->tx_power_user_lmt;
4347 il->tx_power_user_lmt = tx_power;
4348
4349 ret = il->ops->send_tx_power(il);
4350
4351 /* if fail to set tx_power, restore the orig. tx power */
4352 if (ret) {
4353 il->tx_power_user_lmt = prev_tx_power;
4354 il->tx_power_next = prev_tx_power;
4355 }
4356 return ret;
4357 }
4358 EXPORT_SYMBOL(il_set_tx_power);
4359
4360 void
4361 il_send_bt_config(struct il_priv *il)
4362 {
4363 struct il_bt_cmd bt_cmd = {
4364 .lead_time = BT_LEAD_TIME_DEF,
4365 .max_kill = BT_MAX_KILL_DEF,
4366 .kill_ack_mask = 0,
4367 .kill_cts_mask = 0,
4368 };
4369
4370 if (!bt_coex_active)
4371 bt_cmd.flags = BT_COEX_DISABLE;
4372 else
4373 bt_cmd.flags = BT_COEX_ENABLE;
4374
4375 D_INFO("BT coex %s\n",
4376 (bt_cmd.flags == BT_COEX_DISABLE) ? "disable" : "active");
4377
4378 if (il_send_cmd_pdu(il, C_BT_CONFIG, sizeof(struct il_bt_cmd), &bt_cmd))
4379 IL_ERR("failed to send BT Coex Config\n");
4380 }
4381 EXPORT_SYMBOL(il_send_bt_config);
4382
4383 int
4384 il_send_stats_request(struct il_priv *il, u8 flags, bool clear)
4385 {
4386 struct il_stats_cmd stats_cmd = {
4387 .configuration_flags = clear ? IL_STATS_CONF_CLEAR_STATS : 0,
4388 };
4389
4390 if (flags & CMD_ASYNC)
4391 return il_send_cmd_pdu_async(il, C_STATS, sizeof(struct il_stats_cmd),
4392 &stats_cmd, NULL);
4393 else
4394 return il_send_cmd_pdu(il, C_STATS, sizeof(struct il_stats_cmd),
4395 &stats_cmd);
4396 }
4397 EXPORT_SYMBOL(il_send_stats_request);
4398
4399 void
4400 il_hdl_pm_sleep(struct il_priv *il, struct il_rx_buf *rxb)
4401 {
4402 #ifdef CONFIG_IWLEGACY_DEBUG
4403 struct il_rx_pkt *pkt = rxb_addr(rxb);
4404 struct il_sleep_notification *sleep = &(pkt->u.sleep_notif);
4405 D_RX("sleep mode: %d, src: %d\n",
4406 sleep->pm_sleep_mode, sleep->pm_wakeup_src);
4407 #endif
4408 }
4409 EXPORT_SYMBOL(il_hdl_pm_sleep);
4410
4411 void
4412 il_hdl_pm_debug_stats(struct il_priv *il, struct il_rx_buf *rxb)
4413 {
4414 struct il_rx_pkt *pkt = rxb_addr(rxb);
4415 u32 len = le32_to_cpu(pkt->len_n_flags) & IL_RX_FRAME_SIZE_MSK;
4416 D_RADIO("Dumping %d bytes of unhandled notification for %s:\n", len,
4417 il_get_cmd_string(pkt->hdr.cmd));
4418 il_print_hex_dump(il, IL_DL_RADIO, pkt->u.raw, len);
4419 }
4420 EXPORT_SYMBOL(il_hdl_pm_debug_stats);
4421
4422 void
4423 il_hdl_error(struct il_priv *il, struct il_rx_buf *rxb)
4424 {
4425 struct il_rx_pkt *pkt = rxb_addr(rxb);
4426
4427 IL_ERR("Error Reply type 0x%08X cmd %s (0x%02X) "
4428 "seq 0x%04X ser 0x%08X\n",
4429 le32_to_cpu(pkt->u.err_resp.error_type),
4430 il_get_cmd_string(pkt->u.err_resp.cmd_id),
4431 pkt->u.err_resp.cmd_id,
4432 le16_to_cpu(pkt->u.err_resp.bad_cmd_seq_num),
4433 le32_to_cpu(pkt->u.err_resp.error_info));
4434 }
4435 EXPORT_SYMBOL(il_hdl_error);
4436
4437 void
4438 il_clear_isr_stats(struct il_priv *il)
4439 {
4440 memset(&il->isr_stats, 0, sizeof(il->isr_stats));
4441 }
4442
4443 int
4444 il_mac_conf_tx(struct ieee80211_hw *hw, struct ieee80211_vif *vif, u16 queue,
4445 const struct ieee80211_tx_queue_params *params)
4446 {
4447 struct il_priv *il = hw->priv;
4448 unsigned long flags;
4449 int q;
4450
4451 D_MAC80211("enter\n");
4452
4453 if (!il_is_ready_rf(il)) {
4454 D_MAC80211("leave - RF not ready\n");
4455 return -EIO;
4456 }
4457
4458 if (queue >= AC_NUM) {
4459 D_MAC80211("leave - queue >= AC_NUM %d\n", queue);
4460 return 0;
4461 }
4462
4463 q = AC_NUM - 1 - queue;
4464
4465 spin_lock_irqsave(&il->lock, flags);
4466
4467 il->qos_data.def_qos_parm.ac[q].cw_min =
4468 cpu_to_le16(params->cw_min);
4469 il->qos_data.def_qos_parm.ac[q].cw_max =
4470 cpu_to_le16(params->cw_max);
4471 il->qos_data.def_qos_parm.ac[q].aifsn = params->aifs;
4472 il->qos_data.def_qos_parm.ac[q].edca_txop =
4473 cpu_to_le16((params->txop * 32));
4474
4475 il->qos_data.def_qos_parm.ac[q].reserved1 = 0;
4476
4477 spin_unlock_irqrestore(&il->lock, flags);
4478
4479 D_MAC80211("leave\n");
4480 return 0;
4481 }
4482 EXPORT_SYMBOL(il_mac_conf_tx);
4483
4484 int
4485 il_mac_tx_last_beacon(struct ieee80211_hw *hw)
4486 {
4487 struct il_priv *il = hw->priv;
4488 int ret;
4489
4490 D_MAC80211("enter\n");
4491
4492 ret = (il->ibss_manager == IL_IBSS_MANAGER);
4493
4494 D_MAC80211("leave ret %d\n", ret);
4495 return ret;
4496 }
4497 EXPORT_SYMBOL_GPL(il_mac_tx_last_beacon);
4498
4499 static int
4500 il_set_mode(struct il_priv *il)
4501 {
4502 il_connection_init_rx_config(il);
4503
4504 if (il->ops->set_rxon_chain)
4505 il->ops->set_rxon_chain(il);
4506
4507 return il_commit_rxon(il);
4508 }
4509
4510 int
4511 il_mac_add_interface(struct ieee80211_hw *hw, struct ieee80211_vif *vif)
4512 {
4513 struct il_priv *il = hw->priv;
4514 int err;
4515 bool reset;
4516
4517 mutex_lock(&il->mutex);
4518 D_MAC80211("enter: type %d, addr %pM\n", vif->type, vif->addr);
4519
4520 if (!il_is_ready_rf(il)) {
4521 IL_WARN("Try to add interface when device not ready\n");
4522 err = -EINVAL;
4523 goto out;
4524 }
4525
4526 /*
4527 * We do not support multiple virtual interfaces, but on hardware reset
4528 * we have to add the same interface again.
4529 */
4530 reset = (il->vif == vif);
4531 if (il->vif && !reset) {
4532 err = -EOPNOTSUPP;
4533 goto out;
4534 }
4535
4536 il->vif = vif;
4537 il->iw_mode = vif->type;
4538
4539 err = il_set_mode(il);
4540 if (err) {
4541 IL_WARN("Fail to set mode %d\n", vif->type);
4542 if (!reset) {
4543 il->vif = NULL;
4544 il->iw_mode = NL80211_IFTYPE_STATION;
4545 }
4546 }
4547
4548 out:
4549 D_MAC80211("leave err %d\n", err);
4550 mutex_unlock(&il->mutex);
4551
4552 return err;
4553 }
4554 EXPORT_SYMBOL(il_mac_add_interface);
4555
4556 static void
4557 il_teardown_interface(struct il_priv *il, struct ieee80211_vif *vif)
4558 {
4559 lockdep_assert_held(&il->mutex);
4560
4561 if (il->scan_vif == vif) {
4562 il_scan_cancel_timeout(il, 200);
4563 il_force_scan_end(il);
4564 }
4565
4566 il_set_mode(il);
4567 }
4568
4569 void
4570 il_mac_remove_interface(struct ieee80211_hw *hw, struct ieee80211_vif *vif)
4571 {
4572 struct il_priv *il = hw->priv;
4573
4574 mutex_lock(&il->mutex);
4575 D_MAC80211("enter: type %d, addr %pM\n", vif->type, vif->addr);
4576
4577 WARN_ON(il->vif != vif);
4578 il->vif = NULL;
4579 il->iw_mode = NL80211_IFTYPE_UNSPECIFIED;
4580 il_teardown_interface(il, vif);
4581 memset(il->bssid, 0, ETH_ALEN);
4582
4583 D_MAC80211("leave\n");
4584 mutex_unlock(&il->mutex);
4585 }
4586 EXPORT_SYMBOL(il_mac_remove_interface);
4587
4588 int
4589 il_alloc_txq_mem(struct il_priv *il)
4590 {
4591 if (!il->txq)
4592 il->txq =
4593 kzalloc(sizeof(struct il_tx_queue) *
4594 il->cfg->num_of_queues, GFP_KERNEL);
4595 if (!il->txq) {
4596 IL_ERR("Not enough memory for txq\n");
4597 return -ENOMEM;
4598 }
4599 return 0;
4600 }
4601 EXPORT_SYMBOL(il_alloc_txq_mem);
4602
4603 void
4604 il_free_txq_mem(struct il_priv *il)
4605 {
4606 kfree(il->txq);
4607 il->txq = NULL;
4608 }
4609 EXPORT_SYMBOL(il_free_txq_mem);
4610
4611 int
4612 il_force_reset(struct il_priv *il, bool external)
4613 {
4614 struct il_force_reset *force_reset;
4615
4616 if (test_bit(S_EXIT_PENDING, &il->status))
4617 return -EINVAL;
4618
4619 force_reset = &il->force_reset;
4620 force_reset->reset_request_count++;
4621 if (!external) {
4622 if (force_reset->last_force_reset_jiffies &&
4623 time_after(force_reset->last_force_reset_jiffies +
4624 force_reset->reset_duration, jiffies)) {
4625 D_INFO("force reset rejected\n");
4626 force_reset->reset_reject_count++;
4627 return -EAGAIN;
4628 }
4629 }
4630 force_reset->reset_success_count++;
4631 force_reset->last_force_reset_jiffies = jiffies;
4632
4633 /*
4634 * if the request is from external(ex: debugfs),
4635 * then always perform the request in regardless the module
4636 * parameter setting
4637 * if the request is from internal (uCode error or driver
4638 * detect failure), then fw_restart module parameter
4639 * need to be check before performing firmware reload
4640 */
4641
4642 if (!external && !il->cfg->mod_params->restart_fw) {
4643 D_INFO("Cancel firmware reload based on "
4644 "module parameter setting\n");
4645 return 0;
4646 }
4647
4648 IL_ERR("On demand firmware reload\n");
4649
4650 /* Set the FW error flag -- cleared on il_down */
4651 set_bit(S_FW_ERROR, &il->status);
4652 wake_up(&il->wait_command_queue);
4653 /*
4654 * Keep the restart process from trying to send host
4655 * commands by clearing the INIT status bit
4656 */
4657 clear_bit(S_READY, &il->status);
4658 queue_work(il->workqueue, &il->restart);
4659
4660 return 0;
4661 }
4662 EXPORT_SYMBOL(il_force_reset);
4663
4664 int
4665 il_mac_change_interface(struct ieee80211_hw *hw, struct ieee80211_vif *vif,
4666 enum nl80211_iftype newtype, bool newp2p)
4667 {
4668 struct il_priv *il = hw->priv;
4669 int err;
4670
4671 mutex_lock(&il->mutex);
4672 D_MAC80211("enter: type %d, addr %pM newtype %d newp2p %d\n",
4673 vif->type, vif->addr, newtype, newp2p);
4674
4675 if (newp2p) {
4676 err = -EOPNOTSUPP;
4677 goto out;
4678 }
4679
4680 if (!il->vif || !il_is_ready_rf(il)) {
4681 /*
4682 * Huh? But wait ... this can maybe happen when
4683 * we're in the middle of a firmware restart!
4684 */
4685 err = -EBUSY;
4686 goto out;
4687 }
4688
4689 /* success */
4690 vif->type = newtype;
4691 vif->p2p = false;
4692 il->iw_mode = newtype;
4693 il_teardown_interface(il, vif);
4694 err = 0;
4695
4696 out:
4697 D_MAC80211("leave err %d\n", err);
4698 mutex_unlock(&il->mutex);
4699
4700 return err;
4701 }
4702 EXPORT_SYMBOL(il_mac_change_interface);
4703
4704 void il_mac_flush(struct ieee80211_hw *hw, u32 queues, bool drop)
4705 {
4706 struct il_priv *il = hw->priv;
4707 unsigned long timeout = jiffies + msecs_to_jiffies(500);
4708 int i;
4709
4710 mutex_lock(&il->mutex);
4711 D_MAC80211("enter\n");
4712
4713 if (il->txq == NULL)
4714 goto out;
4715
4716 for (i = 0; i < il->hw_params.max_txq_num; i++) {
4717 struct il_queue *q;
4718
4719 if (i == il->cmd_queue)
4720 continue;
4721
4722 q = &il->txq[i].q;
4723 if (q->read_ptr == q->write_ptr)
4724 continue;
4725
4726 if (time_after(jiffies, timeout)) {
4727 IL_ERR("Failed to flush queue %d\n", q->id);
4728 break;
4729 }
4730
4731 msleep(20);
4732 }
4733 out:
4734 D_MAC80211("leave\n");
4735 mutex_unlock(&il->mutex);
4736 }
4737 EXPORT_SYMBOL(il_mac_flush);
4738
4739 /*
4740 * On every watchdog tick we check (latest) time stamp. If it does not
4741 * change during timeout period and queue is not empty we reset firmware.
4742 */
4743 static int
4744 il_check_stuck_queue(struct il_priv *il, int cnt)
4745 {
4746 struct il_tx_queue *txq = &il->txq[cnt];
4747 struct il_queue *q = &txq->q;
4748 unsigned long timeout;
4749 unsigned long now = jiffies;
4750 int ret;
4751
4752 if (q->read_ptr == q->write_ptr) {
4753 txq->time_stamp = now;
4754 return 0;
4755 }
4756
4757 timeout =
4758 txq->time_stamp +
4759 msecs_to_jiffies(il->cfg->wd_timeout);
4760
4761 if (time_after(now, timeout)) {
4762 IL_ERR("Queue %d stuck for %u ms.\n", q->id,
4763 jiffies_to_msecs(now - txq->time_stamp));
4764 ret = il_force_reset(il, false);
4765 return (ret == -EAGAIN) ? 0 : 1;
4766 }
4767
4768 return 0;
4769 }
4770
4771 /*
4772 * Making watchdog tick be a quarter of timeout assure we will
4773 * discover the queue hung between timeout and 1.25*timeout
4774 */
4775 #define IL_WD_TICK(timeout) ((timeout) / 4)
4776
4777 /*
4778 * Watchdog timer callback, we check each tx queue for stuck, if if hung
4779 * we reset the firmware. If everything is fine just rearm the timer.
4780 */
4781 void
4782 il_bg_watchdog(unsigned long data)
4783 {
4784 struct il_priv *il = (struct il_priv *)data;
4785 int cnt;
4786 unsigned long timeout;
4787
4788 if (test_bit(S_EXIT_PENDING, &il->status))
4789 return;
4790
4791 timeout = il->cfg->wd_timeout;
4792 if (timeout == 0)
4793 return;
4794
4795 /* monitor and check for stuck cmd queue */
4796 if (il_check_stuck_queue(il, il->cmd_queue))
4797 return;
4798
4799 /* monitor and check for other stuck queues */
4800 for (cnt = 0; cnt < il->hw_params.max_txq_num; cnt++) {
4801 /* skip as we already checked the command queue */
4802 if (cnt == il->cmd_queue)
4803 continue;
4804 if (il_check_stuck_queue(il, cnt))
4805 return;
4806 }
4807
4808 mod_timer(&il->watchdog,
4809 jiffies + msecs_to_jiffies(IL_WD_TICK(timeout)));
4810 }
4811 EXPORT_SYMBOL(il_bg_watchdog);
4812
4813 void
4814 il_setup_watchdog(struct il_priv *il)
4815 {
4816 unsigned int timeout = il->cfg->wd_timeout;
4817
4818 if (timeout)
4819 mod_timer(&il->watchdog,
4820 jiffies + msecs_to_jiffies(IL_WD_TICK(timeout)));
4821 else
4822 del_timer(&il->watchdog);
4823 }
4824 EXPORT_SYMBOL(il_setup_watchdog);
4825
4826 /*
4827 * extended beacon time format
4828 * time in usec will be changed into a 32-bit value in extended:internal format
4829 * the extended part is the beacon counts
4830 * the internal part is the time in usec within one beacon interval
4831 */
4832 u32
4833 il_usecs_to_beacons(struct il_priv *il, u32 usec, u32 beacon_interval)
4834 {
4835 u32 quot;
4836 u32 rem;
4837 u32 interval = beacon_interval * TIME_UNIT;
4838
4839 if (!interval || !usec)
4840 return 0;
4841
4842 quot =
4843 (usec /
4844 interval) & (il_beacon_time_mask_high(il,
4845 il->hw_params.
4846 beacon_time_tsf_bits) >> il->
4847 hw_params.beacon_time_tsf_bits);
4848 rem =
4849 (usec % interval) & il_beacon_time_mask_low(il,
4850 il->hw_params.
4851 beacon_time_tsf_bits);
4852
4853 return (quot << il->hw_params.beacon_time_tsf_bits) + rem;
4854 }
4855 EXPORT_SYMBOL(il_usecs_to_beacons);
4856
4857 /* base is usually what we get from ucode with each received frame,
4858 * the same as HW timer counter counting down
4859 */
4860 __le32
4861 il_add_beacon_time(struct il_priv *il, u32 base, u32 addon,
4862 u32 beacon_interval)
4863 {
4864 u32 base_low = base & il_beacon_time_mask_low(il,
4865 il->hw_params.
4866 beacon_time_tsf_bits);
4867 u32 addon_low = addon & il_beacon_time_mask_low(il,
4868 il->hw_params.
4869 beacon_time_tsf_bits);
4870 u32 interval = beacon_interval * TIME_UNIT;
4871 u32 res = (base & il_beacon_time_mask_high(il,
4872 il->hw_params.
4873 beacon_time_tsf_bits)) +
4874 (addon & il_beacon_time_mask_high(il,
4875 il->hw_params.
4876 beacon_time_tsf_bits));
4877
4878 if (base_low > addon_low)
4879 res += base_low - addon_low;
4880 else if (base_low < addon_low) {
4881 res += interval + base_low - addon_low;
4882 res += (1 << il->hw_params.beacon_time_tsf_bits);
4883 } else
4884 res += (1 << il->hw_params.beacon_time_tsf_bits);
4885
4886 return cpu_to_le32(res);
4887 }
4888 EXPORT_SYMBOL(il_add_beacon_time);
4889
4890 #ifdef CONFIG_PM_SLEEP
4891
4892 static int
4893 il_pci_suspend(struct device *device)
4894 {
4895 struct pci_dev *pdev = to_pci_dev(device);
4896 struct il_priv *il = pci_get_drvdata(pdev);
4897
4898 /*
4899 * This function is called when system goes into suspend state
4900 * mac80211 will call il_mac_stop() from the mac80211 suspend function
4901 * first but since il_mac_stop() has no knowledge of who the caller is,
4902 * it will not call apm_ops.stop() to stop the DMA operation.
4903 * Calling apm_ops.stop here to make sure we stop the DMA.
4904 */
4905 il_apm_stop(il);
4906
4907 return 0;
4908 }
4909
4910 static int
4911 il_pci_resume(struct device *device)
4912 {
4913 struct pci_dev *pdev = to_pci_dev(device);
4914 struct il_priv *il = pci_get_drvdata(pdev);
4915 bool hw_rfkill = false;
4916
4917 /*
4918 * We disable the RETRY_TIMEOUT register (0x41) to keep
4919 * PCI Tx retries from interfering with C3 CPU state.
4920 */
4921 pci_write_config_byte(pdev, PCI_CFG_RETRY_TIMEOUT, 0x00);
4922
4923 il_enable_interrupts(il);
4924
4925 if (!(_il_rd(il, CSR_GP_CNTRL) & CSR_GP_CNTRL_REG_FLAG_HW_RF_KILL_SW))
4926 hw_rfkill = true;
4927
4928 if (hw_rfkill)
4929 set_bit(S_RFKILL, &il->status);
4930 else
4931 clear_bit(S_RFKILL, &il->status);
4932
4933 wiphy_rfkill_set_hw_state(il->hw->wiphy, hw_rfkill);
4934
4935 return 0;
4936 }
4937
4938 SIMPLE_DEV_PM_OPS(il_pm_ops, il_pci_suspend, il_pci_resume);
4939 EXPORT_SYMBOL(il_pm_ops);
4940
4941 #endif /* CONFIG_PM_SLEEP */
4942
4943 static void
4944 il_update_qos(struct il_priv *il)
4945 {
4946 if (test_bit(S_EXIT_PENDING, &il->status))
4947 return;
4948
4949 il->qos_data.def_qos_parm.qos_flags = 0;
4950
4951 if (il->qos_data.qos_active)
4952 il->qos_data.def_qos_parm.qos_flags |=
4953 QOS_PARAM_FLG_UPDATE_EDCA_MSK;
4954
4955 if (il->ht.enabled)
4956 il->qos_data.def_qos_parm.qos_flags |= QOS_PARAM_FLG_TGN_MSK;
4957
4958 D_QOS("send QoS cmd with Qos active=%d FLAGS=0x%X\n",
4959 il->qos_data.qos_active, il->qos_data.def_qos_parm.qos_flags);
4960
4961 il_send_cmd_pdu_async(il, C_QOS_PARAM, sizeof(struct il_qosparam_cmd),
4962 &il->qos_data.def_qos_parm, NULL);
4963 }
4964
4965 /**
4966 * il_mac_config - mac80211 config callback
4967 */
4968 int
4969 il_mac_config(struct ieee80211_hw *hw, u32 changed)
4970 {
4971 struct il_priv *il = hw->priv;
4972 const struct il_channel_info *ch_info;
4973 struct ieee80211_conf *conf = &hw->conf;
4974 struct ieee80211_channel *channel = conf->chandef.chan;
4975 struct il_ht_config *ht_conf = &il->current_ht_config;
4976 unsigned long flags = 0;
4977 int ret = 0;
4978 u16 ch;
4979 int scan_active = 0;
4980 bool ht_changed = false;
4981
4982 mutex_lock(&il->mutex);
4983 D_MAC80211("enter: channel %d changed 0x%X\n", channel->hw_value,
4984 changed);
4985
4986 if (unlikely(test_bit(S_SCANNING, &il->status))) {
4987 scan_active = 1;
4988 D_MAC80211("scan active\n");
4989 }
4990
4991 if (changed &
4992 (IEEE80211_CONF_CHANGE_SMPS | IEEE80211_CONF_CHANGE_CHANNEL)) {
4993 /* mac80211 uses static for non-HT which is what we want */
4994 il->current_ht_config.smps = conf->smps_mode;
4995
4996 /*
4997 * Recalculate chain counts.
4998 *
4999 * If monitor mode is enabled then mac80211 will
5000 * set up the SM PS mode to OFF if an HT channel is
5001 * configured.
5002 */
5003 if (il->ops->set_rxon_chain)
5004 il->ops->set_rxon_chain(il);
5005 }
5006
5007 /* during scanning mac80211 will delay channel setting until
5008 * scan finish with changed = 0
5009 */
5010 if (!changed || (changed & IEEE80211_CONF_CHANGE_CHANNEL)) {
5011
5012 if (scan_active)
5013 goto set_ch_out;
5014
5015 ch = channel->hw_value;
5016 ch_info = il_get_channel_info(il, channel->band, ch);
5017 if (!il_is_channel_valid(ch_info)) {
5018 D_MAC80211("leave - invalid channel\n");
5019 ret = -EINVAL;
5020 goto set_ch_out;
5021 }
5022
5023 if (il->iw_mode == NL80211_IFTYPE_ADHOC &&
5024 !il_is_channel_ibss(ch_info)) {
5025 D_MAC80211("leave - not IBSS channel\n");
5026 ret = -EINVAL;
5027 goto set_ch_out;
5028 }
5029
5030 spin_lock_irqsave(&il->lock, flags);
5031
5032 /* Configure HT40 channels */
5033 if (il->ht.enabled != conf_is_ht(conf)) {
5034 il->ht.enabled = conf_is_ht(conf);
5035 ht_changed = true;
5036 }
5037 if (il->ht.enabled) {
5038 if (conf_is_ht40_minus(conf)) {
5039 il->ht.extension_chan_offset =
5040 IEEE80211_HT_PARAM_CHA_SEC_BELOW;
5041 il->ht.is_40mhz = true;
5042 } else if (conf_is_ht40_plus(conf)) {
5043 il->ht.extension_chan_offset =
5044 IEEE80211_HT_PARAM_CHA_SEC_ABOVE;
5045 il->ht.is_40mhz = true;
5046 } else {
5047 il->ht.extension_chan_offset =
5048 IEEE80211_HT_PARAM_CHA_SEC_NONE;
5049 il->ht.is_40mhz = false;
5050 }
5051 } else
5052 il->ht.is_40mhz = false;
5053
5054 /*
5055 * Default to no protection. Protection mode will
5056 * later be set from BSS config in il_ht_conf
5057 */
5058 il->ht.protection = IEEE80211_HT_OP_MODE_PROTECTION_NONE;
5059
5060 /* if we are switching from ht to 2.4 clear flags
5061 * from any ht related info since 2.4 does not
5062 * support ht */
5063 if ((le16_to_cpu(il->staging.channel) != ch))
5064 il->staging.flags = 0;
5065
5066 il_set_rxon_channel(il, channel);
5067 il_set_rxon_ht(il, ht_conf);
5068
5069 il_set_flags_for_band(il, channel->band, il->vif);
5070
5071 spin_unlock_irqrestore(&il->lock, flags);
5072
5073 if (il->ops->update_bcast_stations)
5074 ret = il->ops->update_bcast_stations(il);
5075
5076 set_ch_out:
5077 /* The list of supported rates and rate mask can be different
5078 * for each band; since the band may have changed, reset
5079 * the rate mask to what mac80211 lists */
5080 il_set_rate(il);
5081 }
5082
5083 if (changed & (IEEE80211_CONF_CHANGE_PS | IEEE80211_CONF_CHANGE_IDLE)) {
5084 ret = il_power_update_mode(il, false);
5085 if (ret)
5086 D_MAC80211("Error setting sleep level\n");
5087 }
5088
5089 if (changed & IEEE80211_CONF_CHANGE_POWER) {
5090 D_MAC80211("TX Power old=%d new=%d\n", il->tx_power_user_lmt,
5091 conf->power_level);
5092
5093 il_set_tx_power(il, conf->power_level, false);
5094 }
5095
5096 if (!il_is_ready(il)) {
5097 D_MAC80211("leave - not ready\n");
5098 goto out;
5099 }
5100
5101 if (scan_active)
5102 goto out;
5103
5104 if (memcmp(&il->active, &il->staging, sizeof(il->staging)))
5105 il_commit_rxon(il);
5106 else
5107 D_INFO("Not re-sending same RXON configuration.\n");
5108 if (ht_changed)
5109 il_update_qos(il);
5110
5111 out:
5112 D_MAC80211("leave ret %d\n", ret);
5113 mutex_unlock(&il->mutex);
5114
5115 return ret;
5116 }
5117 EXPORT_SYMBOL(il_mac_config);
5118
5119 void
5120 il_mac_reset_tsf(struct ieee80211_hw *hw, struct ieee80211_vif *vif)
5121 {
5122 struct il_priv *il = hw->priv;
5123 unsigned long flags;
5124
5125 mutex_lock(&il->mutex);
5126 D_MAC80211("enter: type %d, addr %pM\n", vif->type, vif->addr);
5127
5128 spin_lock_irqsave(&il->lock, flags);
5129
5130 memset(&il->current_ht_config, 0, sizeof(struct il_ht_config));
5131
5132 /* new association get rid of ibss beacon skb */
5133 if (il->beacon_skb)
5134 dev_kfree_skb(il->beacon_skb);
5135 il->beacon_skb = NULL;
5136 il->timestamp = 0;
5137
5138 spin_unlock_irqrestore(&il->lock, flags);
5139
5140 il_scan_cancel_timeout(il, 100);
5141 if (!il_is_ready_rf(il)) {
5142 D_MAC80211("leave - not ready\n");
5143 mutex_unlock(&il->mutex);
5144 return;
5145 }
5146
5147 /* we are restarting association process */
5148 il->staging.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
5149 il_commit_rxon(il);
5150
5151 il_set_rate(il);
5152
5153 D_MAC80211("leave\n");
5154 mutex_unlock(&il->mutex);
5155 }
5156 EXPORT_SYMBOL(il_mac_reset_tsf);
5157
5158 static void
5159 il_ht_conf(struct il_priv *il, struct ieee80211_vif *vif)
5160 {
5161 struct il_ht_config *ht_conf = &il->current_ht_config;
5162 struct ieee80211_sta *sta;
5163 struct ieee80211_bss_conf *bss_conf = &vif->bss_conf;
5164
5165 D_ASSOC("enter:\n");
5166
5167 if (!il->ht.enabled)
5168 return;
5169
5170 il->ht.protection =
5171 bss_conf->ht_operation_mode & IEEE80211_HT_OP_MODE_PROTECTION;
5172 il->ht.non_gf_sta_present =
5173 !!(bss_conf->
5174 ht_operation_mode & IEEE80211_HT_OP_MODE_NON_GF_STA_PRSNT);
5175
5176 ht_conf->single_chain_sufficient = false;
5177
5178 switch (vif->type) {
5179 case NL80211_IFTYPE_STATION:
5180 rcu_read_lock();
5181 sta = ieee80211_find_sta(vif, bss_conf->bssid);
5182 if (sta) {
5183 struct ieee80211_sta_ht_cap *ht_cap = &sta->ht_cap;
5184 int maxstreams;
5185
5186 maxstreams =
5187 (ht_cap->mcs.
5188 tx_params & IEEE80211_HT_MCS_TX_MAX_STREAMS_MASK)
5189 >> IEEE80211_HT_MCS_TX_MAX_STREAMS_SHIFT;
5190 maxstreams += 1;
5191
5192 if (ht_cap->mcs.rx_mask[1] == 0 &&
5193 ht_cap->mcs.rx_mask[2] == 0)
5194 ht_conf->single_chain_sufficient = true;
5195 if (maxstreams <= 1)
5196 ht_conf->single_chain_sufficient = true;
5197 } else {
5198 /*
5199 * If at all, this can only happen through a race
5200 * when the AP disconnects us while we're still
5201 * setting up the connection, in that case mac80211
5202 * will soon tell us about that.
5203 */
5204 ht_conf->single_chain_sufficient = true;
5205 }
5206 rcu_read_unlock();
5207 break;
5208 case NL80211_IFTYPE_ADHOC:
5209 ht_conf->single_chain_sufficient = true;
5210 break;
5211 default:
5212 break;
5213 }
5214
5215 D_ASSOC("leave\n");
5216 }
5217
5218 static inline void
5219 il_set_no_assoc(struct il_priv *il, struct ieee80211_vif *vif)
5220 {
5221 /*
5222 * inform the ucode that there is no longer an
5223 * association and that no more packets should be
5224 * sent
5225 */
5226 il->staging.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
5227 il->staging.assoc_id = 0;
5228 il_commit_rxon(il);
5229 }
5230
5231 static void
5232 il_beacon_update(struct ieee80211_hw *hw, struct ieee80211_vif *vif)
5233 {
5234 struct il_priv *il = hw->priv;
5235 unsigned long flags;
5236 __le64 timestamp;
5237 struct sk_buff *skb = ieee80211_beacon_get(hw, vif);
5238
5239 if (!skb)
5240 return;
5241
5242 D_MAC80211("enter\n");
5243
5244 lockdep_assert_held(&il->mutex);
5245
5246 if (!il->beacon_enabled) {
5247 IL_ERR("update beacon with no beaconing enabled\n");
5248 dev_kfree_skb(skb);
5249 return;
5250 }
5251
5252 spin_lock_irqsave(&il->lock, flags);
5253
5254 if (il->beacon_skb)
5255 dev_kfree_skb(il->beacon_skb);
5256
5257 il->beacon_skb = skb;
5258
5259 timestamp = ((struct ieee80211_mgmt *)skb->data)->u.beacon.timestamp;
5260 il->timestamp = le64_to_cpu(timestamp);
5261
5262 D_MAC80211("leave\n");
5263 spin_unlock_irqrestore(&il->lock, flags);
5264
5265 if (!il_is_ready_rf(il)) {
5266 D_MAC80211("leave - RF not ready\n");
5267 return;
5268 }
5269
5270 il->ops->post_associate(il);
5271 }
5272
5273 void
5274 il_mac_bss_info_changed(struct ieee80211_hw *hw, struct ieee80211_vif *vif,
5275 struct ieee80211_bss_conf *bss_conf, u32 changes)
5276 {
5277 struct il_priv *il = hw->priv;
5278 int ret;
5279
5280 mutex_lock(&il->mutex);
5281 D_MAC80211("enter: changes 0x%x\n", changes);
5282
5283 if (!il_is_alive(il)) {
5284 D_MAC80211("leave - not alive\n");
5285 mutex_unlock(&il->mutex);
5286 return;
5287 }
5288
5289 if (changes & BSS_CHANGED_QOS) {
5290 unsigned long flags;
5291
5292 spin_lock_irqsave(&il->lock, flags);
5293 il->qos_data.qos_active = bss_conf->qos;
5294 il_update_qos(il);
5295 spin_unlock_irqrestore(&il->lock, flags);
5296 }
5297
5298 if (changes & BSS_CHANGED_BEACON_ENABLED) {
5299 /* FIXME: can we remove beacon_enabled ? */
5300 if (vif->bss_conf.enable_beacon)
5301 il->beacon_enabled = true;
5302 else
5303 il->beacon_enabled = false;
5304 }
5305
5306 if (changes & BSS_CHANGED_BSSID) {
5307 D_MAC80211("BSSID %pM\n", bss_conf->bssid);
5308
5309 /*
5310 * On passive channel we wait with blocked queues to see if
5311 * there is traffic on that channel. If no frame will be
5312 * received (what is very unlikely since scan detects AP on
5313 * that channel, but theoretically possible), mac80211 associate
5314 * procedure will time out and mac80211 will call us with NULL
5315 * bssid. We have to unblock queues on such condition.
5316 */
5317 if (is_zero_ether_addr(bss_conf->bssid))
5318 il_wake_queues_by_reason(il, IL_STOP_REASON_PASSIVE);
5319
5320 /*
5321 * If there is currently a HW scan going on in the background,
5322 * then we need to cancel it, otherwise sometimes we are not
5323 * able to authenticate (FIXME: why ?)
5324 */
5325 if (il_scan_cancel_timeout(il, 100)) {
5326 D_MAC80211("leave - scan abort failed\n");
5327 mutex_unlock(&il->mutex);
5328 return;
5329 }
5330
5331 /* mac80211 only sets assoc when in STATION mode */
5332 memcpy(il->staging.bssid_addr, bss_conf->bssid, ETH_ALEN);
5333
5334 /* FIXME: currently needed in a few places */
5335 memcpy(il->bssid, bss_conf->bssid, ETH_ALEN);
5336 }
5337
5338 /*
5339 * This needs to be after setting the BSSID in case
5340 * mac80211 decides to do both changes at once because
5341 * it will invoke post_associate.
5342 */
5343 if (vif->type == NL80211_IFTYPE_ADHOC && (changes & BSS_CHANGED_BEACON))
5344 il_beacon_update(hw, vif);
5345
5346 if (changes & BSS_CHANGED_ERP_PREAMBLE) {
5347 D_MAC80211("ERP_PREAMBLE %d\n", bss_conf->use_short_preamble);
5348 if (bss_conf->use_short_preamble)
5349 il->staging.flags |= RXON_FLG_SHORT_PREAMBLE_MSK;
5350 else
5351 il->staging.flags &= ~RXON_FLG_SHORT_PREAMBLE_MSK;
5352 }
5353
5354 if (changes & BSS_CHANGED_ERP_CTS_PROT) {
5355 D_MAC80211("ERP_CTS %d\n", bss_conf->use_cts_prot);
5356 if (bss_conf->use_cts_prot && il->band != IEEE80211_BAND_5GHZ)
5357 il->staging.flags |= RXON_FLG_TGG_PROTECT_MSK;
5358 else
5359 il->staging.flags &= ~RXON_FLG_TGG_PROTECT_MSK;
5360 if (bss_conf->use_cts_prot)
5361 il->staging.flags |= RXON_FLG_SELF_CTS_EN;
5362 else
5363 il->staging.flags &= ~RXON_FLG_SELF_CTS_EN;
5364 }
5365
5366 if (changes & BSS_CHANGED_BASIC_RATES) {
5367 /* XXX use this information
5368 *
5369 * To do that, remove code from il_set_rate() and put something
5370 * like this here:
5371 *
5372 if (A-band)
5373 il->staging.ofdm_basic_rates =
5374 bss_conf->basic_rates;
5375 else
5376 il->staging.ofdm_basic_rates =
5377 bss_conf->basic_rates >> 4;
5378 il->staging.cck_basic_rates =
5379 bss_conf->basic_rates & 0xF;
5380 */
5381 }
5382
5383 if (changes & BSS_CHANGED_HT) {
5384 il_ht_conf(il, vif);
5385
5386 if (il->ops->set_rxon_chain)
5387 il->ops->set_rxon_chain(il);
5388 }
5389
5390 if (changes & BSS_CHANGED_ASSOC) {
5391 D_MAC80211("ASSOC %d\n", bss_conf->assoc);
5392 if (bss_conf->assoc) {
5393 il->timestamp = bss_conf->sync_tsf;
5394
5395 if (!il_is_rfkill(il))
5396 il->ops->post_associate(il);
5397 } else
5398 il_set_no_assoc(il, vif);
5399 }
5400
5401 if (changes && il_is_associated(il) && bss_conf->aid) {
5402 D_MAC80211("Changes (%#x) while associated\n", changes);
5403 ret = il_send_rxon_assoc(il);
5404 if (!ret) {
5405 /* Sync active_rxon with latest change. */
5406 memcpy((void *)&il->active, &il->staging,
5407 sizeof(struct il_rxon_cmd));
5408 }
5409 }
5410
5411 if (changes & BSS_CHANGED_BEACON_ENABLED) {
5412 if (vif->bss_conf.enable_beacon) {
5413 memcpy(il->staging.bssid_addr, bss_conf->bssid,
5414 ETH_ALEN);
5415 memcpy(il->bssid, bss_conf->bssid, ETH_ALEN);
5416 il->ops->config_ap(il);
5417 } else
5418 il_set_no_assoc(il, vif);
5419 }
5420
5421 if (changes & BSS_CHANGED_IBSS) {
5422 ret = il->ops->manage_ibss_station(il, vif,
5423 bss_conf->ibss_joined);
5424 if (ret)
5425 IL_ERR("failed to %s IBSS station %pM\n",
5426 bss_conf->ibss_joined ? "add" : "remove",
5427 bss_conf->bssid);
5428 }
5429
5430 D_MAC80211("leave\n");
5431 mutex_unlock(&il->mutex);
5432 }
5433 EXPORT_SYMBOL(il_mac_bss_info_changed);
5434
5435 irqreturn_t
5436 il_isr(int irq, void *data)
5437 {
5438 struct il_priv *il = data;
5439 u32 inta, inta_mask;
5440 u32 inta_fh;
5441 unsigned long flags;
5442 if (!il)
5443 return IRQ_NONE;
5444
5445 spin_lock_irqsave(&il->lock, flags);
5446
5447 /* Disable (but don't clear!) interrupts here to avoid
5448 * back-to-back ISRs and sporadic interrupts from our NIC.
5449 * If we have something to service, the tasklet will re-enable ints.
5450 * If we *don't* have something, we'll re-enable before leaving here. */
5451 inta_mask = _il_rd(il, CSR_INT_MASK); /* just for debug */
5452 _il_wr(il, CSR_INT_MASK, 0x00000000);
5453
5454 /* Discover which interrupts are active/pending */
5455 inta = _il_rd(il, CSR_INT);
5456 inta_fh = _il_rd(il, CSR_FH_INT_STATUS);
5457
5458 /* Ignore interrupt if there's nothing in NIC to service.
5459 * This may be due to IRQ shared with another device,
5460 * or due to sporadic interrupts thrown from our NIC. */
5461 if (!inta && !inta_fh) {
5462 D_ISR("Ignore interrupt, inta == 0, inta_fh == 0\n");
5463 goto none;
5464 }
5465
5466 if (inta == 0xFFFFFFFF || (inta & 0xFFFFFFF0) == 0xa5a5a5a0) {
5467 /* Hardware disappeared. It might have already raised
5468 * an interrupt */
5469 IL_WARN("HARDWARE GONE?? INTA == 0x%08x\n", inta);
5470 goto unplugged;
5471 }
5472
5473 D_ISR("ISR inta 0x%08x, enabled 0x%08x, fh 0x%08x\n", inta, inta_mask,
5474 inta_fh);
5475
5476 inta &= ~CSR_INT_BIT_SCD;
5477
5478 /* il_irq_tasklet() will service interrupts and re-enable them */
5479 if (likely(inta || inta_fh))
5480 tasklet_schedule(&il->irq_tasklet);
5481
5482 unplugged:
5483 spin_unlock_irqrestore(&il->lock, flags);
5484 return IRQ_HANDLED;
5485
5486 none:
5487 /* re-enable interrupts here since we don't have anything to service. */
5488 /* only Re-enable if disabled by irq */
5489 if (test_bit(S_INT_ENABLED, &il->status))
5490 il_enable_interrupts(il);
5491 spin_unlock_irqrestore(&il->lock, flags);
5492 return IRQ_NONE;
5493 }
5494 EXPORT_SYMBOL(il_isr);
5495
5496 /*
5497 * il_tx_cmd_protection: Set rts/cts. 3945 and 4965 only share this
5498 * function.
5499 */
5500 void
5501 il_tx_cmd_protection(struct il_priv *il, struct ieee80211_tx_info *info,
5502 __le16 fc, __le32 *tx_flags)
5503 {
5504 if (info->control.rates[0].flags & IEEE80211_TX_RC_USE_RTS_CTS) {
5505 *tx_flags |= TX_CMD_FLG_RTS_MSK;
5506 *tx_flags &= ~TX_CMD_FLG_CTS_MSK;
5507 *tx_flags |= TX_CMD_FLG_FULL_TXOP_PROT_MSK;
5508
5509 if (!ieee80211_is_mgmt(fc))
5510 return;
5511
5512 switch (fc & cpu_to_le16(IEEE80211_FCTL_STYPE)) {
5513 case cpu_to_le16(IEEE80211_STYPE_AUTH):
5514 case cpu_to_le16(IEEE80211_STYPE_DEAUTH):
5515 case cpu_to_le16(IEEE80211_STYPE_ASSOC_REQ):
5516 case cpu_to_le16(IEEE80211_STYPE_REASSOC_REQ):
5517 *tx_flags &= ~TX_CMD_FLG_RTS_MSK;
5518 *tx_flags |= TX_CMD_FLG_CTS_MSK;
5519 break;
5520 }
5521 } else if (info->control.rates[0].
5522 flags & IEEE80211_TX_RC_USE_CTS_PROTECT) {
5523 *tx_flags &= ~TX_CMD_FLG_RTS_MSK;
5524 *tx_flags |= TX_CMD_FLG_CTS_MSK;
5525 *tx_flags |= TX_CMD_FLG_FULL_TXOP_PROT_MSK;
5526 }
5527 }
5528 EXPORT_SYMBOL(il_tx_cmd_protection);
Linux with added FPC-III support