drivers/pci/pcie/aer/aerdrv.h

   1 /*
   2  * Copyright (C) 2006 Intel Corp.
   3  *      Tom Long Nguyen (tom.l.nguyen@intel.com)
   4  *      Zhang Yanmin (yanmin.zhang@intel.com)
   5  *
   6  */
   7
   8 #ifndef _AERDRV_H_
   9 #define _AERDRV_H_
  10
  11 #include <linux/workqueue.h>
  12 #include <linux/pcieport_if.h>
  13 #include <linux/aer.h>
  14 #include <linux/interrupt.h>
  15
  16 #define SYSTEM_ERROR_INTR_ON_MESG_MASK  (PCI_EXP_RTCTL_SECEE|   \
  17                                         PCI_EXP_RTCTL_SENFEE|   \
  18                                         PCI_EXP_RTCTL_SEFEE)
  19 #define ROOT_PORT_INTR_ON_MESG_MASK     (PCI_ERR_ROOT_CMD_COR_EN|       \
  20                                         PCI_ERR_ROOT_CMD_NONFATAL_EN|   \
  21                                         PCI_ERR_ROOT_CMD_FATAL_EN)
  22 #define ERR_COR_ID(d)                   (d & 0xffff)
  23 #define ERR_UNCOR_ID(d)                 (d >> 16)
  24
  25 #define AER_ERROR_SOURCES_MAX           100
  26
  27 #define AER_LOG_TLP_MASKS               (PCI_ERR_UNC_POISON_TLP|        \
  28                                         PCI_ERR_UNC_ECRC|               \
  29                                         PCI_ERR_UNC_UNSUP|              \
  30                                         PCI_ERR_UNC_COMP_ABORT|         \
  31                                         PCI_ERR_UNC_UNX_COMP|           \
  32                                         PCI_ERR_UNC_MALF_TLP)
  33
  34 #define AER_MAX_MULTI_ERR_DEVICES       5       /* Not likely to have more */
  35 struct aer_err_info {
  36         struct pci_dev *dev[AER_MAX_MULTI_ERR_DEVICES];
  37         int error_dev_num;
  38
  39         unsigned int id:16;
  40
  41         unsigned int severity:2;        /* 0:NONFATAL | 1:FATAL | 2:COR */
  42         unsigned int __pad1:5;
  43         unsigned int multi_error_valid:1;
  44
  45         unsigned int first_error:5;
  46         unsigned int __pad2:2;
  47         unsigned int tlp_header_valid:1;
  48
  49         unsigned int status;            /* COR/UNCOR Error Status */
  50         unsigned int mask;              /* COR/UNCOR Error Mask */
  51         struct aer_header_log_regs tlp; /* TLP Header */
  52 };
  53
  54 struct aer_err_source {
  55         unsigned int status;
  56         unsigned int id;
  57 };
  58
  59 struct aer_rpc {
  60         struct pcie_device *rpd;        /* Root Port device */
  61         struct work_struct dpc_handler;
  62         struct aer_err_source e_sources[AER_ERROR_SOURCES_MAX];
  63         unsigned short prod_idx;        /* Error Producer Index */
  64         unsigned short cons_idx;        /* Error Consumer Index */
  65         int isr;
  66         spinlock_t e_lock;              /*
  67                                          * Lock access to Error Status/ID Regs
  68                                          * and error producer/consumer index
  69                                          */
  70         struct mutex rpc_mutex;         /*
  71                                          * only one thread could do
  72                                          * recovery on the same
  73                                          * root port hierarchy
  74                                          */
  75         wait_queue_head_t wait_release;
  76 };
  77
  78 struct aer_broadcast_data {
  79         enum pci_channel_state state;
  80         enum pci_ers_result result;
  81 };
  82
  83 static inline pci_ers_result_t merge_result(enum pci_ers_result orig,
  84                 enum pci_ers_result new)
  85 {
  86         if (new == PCI_ERS_RESULT_NO_AER_DRIVER)
  87                 return PCI_ERS_RESULT_NO_AER_DRIVER;
  88
  89         if (new == PCI_ERS_RESULT_NONE)
  90                 return orig;
  91
  92         switch (orig) {
  93         case PCI_ERS_RESULT_CAN_RECOVER:
  94         case PCI_ERS_RESULT_RECOVERED:
  95                 orig = new;
  96                 break;
  97         case PCI_ERS_RESULT_DISCONNECT:
  98                 if (new == PCI_ERS_RESULT_NEED_RESET)
  99                         orig = PCI_ERS_RESULT_NEED_RESET;
 100                 break;
 101         default:
 102                 break;
 103         }
 104
 105         return orig;
 106 }
 107
 108 extern struct bus_type pcie_port_bus_type;
 109 int aer_init(struct pcie_device *dev);
 110 void aer_isr(struct work_struct *work);
 111 void aer_print_error(struct pci_dev *dev, struct aer_err_info *info);
 112 void aer_print_port_info(struct pci_dev *dev, struct aer_err_info *info);
 113 irqreturn_t aer_irq(int irq, void *context);
 114
 115 #ifdef CONFIG_ACPI_APEI
 116 int pcie_aer_get_firmware_first(struct pci_dev *pci_dev);
 117 #else
 118 static inline int pcie_aer_get_firmware_first(struct pci_dev *pci_dev)
 119 {
 120         if (pci_dev->__aer_firmware_first_valid)
 121                 return pci_dev->__aer_firmware_first;
 122         return 0;
 123 }
 124 #endif
 125
 126 static inline void pcie_aer_force_firmware_first(struct pci_dev *pci_dev,
 127                                                  int enable)
 128 {
 129         pci_dev->__aer_firmware_first = !!enable;
 130         pci_dev->__aer_firmware_first_valid = 1;
 131 }
 132 #endif /* _AERDRV_H_ */