drivers/pinctrl/sh-pfc/sh_pfc.h

   1 /*
   2  * SuperH Pin Function Controller Support
   3  *
   4  * Copyright (c) 2008 Magnus Damm
   5  *
   6  * This file is subject to the terms and conditions of the GNU General Public
   7  * License.  See the file "COPYING" in the main directory of this archive
   8  * for more details.
   9  */
  10
  11 #ifndef __SH_PFC_H
  12 #define __SH_PFC_H
  13
  14 #include <linux/bug.h>
  15 #include <linux/stringify.h>
  16
  17 enum {
  18         PINMUX_TYPE_NONE,
  19         PINMUX_TYPE_FUNCTION,
  20         PINMUX_TYPE_GPIO,
  21         PINMUX_TYPE_OUTPUT,
  22         PINMUX_TYPE_INPUT,
  23 };
  24
  25 #define SH_PFC_PIN_CFG_INPUT            (1 << 0)
  26 #define SH_PFC_PIN_CFG_OUTPUT           (1 << 1)
  27 #define SH_PFC_PIN_CFG_PULL_UP          (1 << 2)
  28 #define SH_PFC_PIN_CFG_PULL_DOWN        (1 << 3)
  29 #define SH_PFC_PIN_CFG_NO_GPIO          (1 << 31)
  30
  31 struct sh_pfc_pin {
  32         u16 pin;
  33         u16 enum_id;
  34         const char *name;
  35         unsigned int configs;
  36 };
  37
  38 #define SH_PFC_PIN_GROUP(n)                             \
  39         {                                               \
  40                 .name = #n,                             \
  41                 .pins = n##_pins,                       \
  42                 .mux = n##_mux,                         \
  43                 .nr_pins = ARRAY_SIZE(n##_pins),        \
  44         }
  45
  46 struct sh_pfc_pin_group {
  47         const char *name;
  48         const unsigned int *pins;
  49         const unsigned int *mux;
  50         unsigned int nr_pins;
  51 };
  52
  53 #define SH_PFC_FUNCTION(n)                              \
  54         {                                               \
  55                 .name = #n,                             \
  56                 .groups = n##_groups,                   \
  57                 .nr_groups = ARRAY_SIZE(n##_groups),    \
  58         }
  59
  60 struct sh_pfc_function {
  61         const char *name;
  62         const char * const *groups;
  63         unsigned int nr_groups;
  64 };
  65
  66 struct pinmux_func {
  67         u16 enum_id;
  68         const char *name;
  69 };
  70
  71 struct pinmux_cfg_reg {
  72         unsigned long reg, reg_width, field_width;
  73         const u16 *enum_ids;
  74         const unsigned long *var_field_width;
  75 };
  76
  77 #define PINMUX_CFG_REG(name, r, r_width, f_width) \
  78         .reg = r, .reg_width = r_width, .field_width = f_width,         \
  79         .enum_ids = (const u16 [(r_width / f_width) * (1 << f_width)])
  80
  81 #define PINMUX_CFG_REG_VAR(name, r, r_width, var_fw0, var_fwn...) \
  82         .reg = r, .reg_width = r_width, \
  83         .var_field_width = (const unsigned long [r_width]) \
  84                 { var_fw0, var_fwn, 0 }, \
  85         .enum_ids = (const u16 [])
  86
  87 struct pinmux_data_reg {
  88         unsigned long reg, reg_width;
  89         const u16 *enum_ids;
  90 };
  91
  92 #define PINMUX_DATA_REG(name, r, r_width) \
  93         .reg = r, .reg_width = r_width, \
  94         .enum_ids = (const u16 [r_width]) \
  95
  96 struct pinmux_irq {
  97         int irq;
  98         const short *gpios;
  99 };
 100
 101 #define PINMUX_IRQ(irq_nr, ids...)                         \
 102         { .irq = irq_nr, .gpios = (const short []) { ids, -1 } }
 103
 104 struct pinmux_range {
 105         u16 begin;
 106         u16 end;
 107         u16 force;
 108 };
 109
 110 struct sh_pfc;
 111
 112 struct sh_pfc_soc_operations {
 113         int (*init)(struct sh_pfc *pfc);
 114         void (*exit)(struct sh_pfc *pfc);
 115         unsigned int (*get_bias)(struct sh_pfc *pfc, unsigned int pin);
 116         void (*set_bias)(struct sh_pfc *pfc, unsigned int pin,
 117                          unsigned int bias);
 118 };
 119
 120 struct sh_pfc_soc_info {
 121         const char *name;
 122         const struct sh_pfc_soc_operations *ops;
 123
 124         struct pinmux_range input;
 125         struct pinmux_range output;
 126         struct pinmux_range function;
 127
 128         const struct sh_pfc_pin *pins;
 129         unsigned int nr_pins;
 130         const struct sh_pfc_pin_group *groups;
 131         unsigned int nr_groups;
 132         const struct sh_pfc_function *functions;
 133         unsigned int nr_functions;
 134
 135         const struct pinmux_func *func_gpios;
 136         unsigned int nr_func_gpios;
 137
 138         const struct pinmux_cfg_reg *cfg_regs;
 139         const struct pinmux_data_reg *data_regs;
 140
 141         const u16 *gpio_data;
 142         unsigned int gpio_data_size;
 143
 144         const struct pinmux_irq *gpio_irq;
 145         unsigned int gpio_irq_size;
 146
 147         unsigned long unlock_reg;
 148 };
 149
 150 /* -----------------------------------------------------------------------------
 151  * Helper macros to create pin and port lists
 152  */
 153
 154 /*
 155  * sh_pfc_soc_info gpio_data array macros
 156  */
 157
 158 #define PINMUX_DATA(data_or_mark, ids...)       data_or_mark, ids, 0
 159
 160 #define PINMUX_IPSR_NOGP(ispr, fn)                                      \
 161         PINMUX_DATA(fn##_MARK, FN_##fn)
 162 #define PINMUX_IPSR_DATA(ipsr, fn)                                      \
 163         PINMUX_DATA(fn##_MARK, FN_##fn, FN_##ipsr)
 164 #define PINMUX_IPSR_NOGM(ispr, fn, ms)                                  \
 165         PINMUX_DATA(fn##_MARK, FN_##fn, FN_##ms)
 166 #define PINMUX_IPSR_MSEL(ipsr, fn, ms)                                  \
 167         PINMUX_DATA(fn##_MARK, FN_##fn, FN_##ipsr, FN_##ms)
 168 #define PINMUX_IPSR_MODSEL_DATA(ipsr, fn, ms)                           \
 169         PINMUX_DATA(fn##_MARK, FN_##ms, FN_##ipsr, FN_##fn)
 170
 171 /*
 172  * GP port style (32 ports banks)
 173  */
 174
 175 #define PORT_GP_1(bank, pin, fn, sfx) fn(bank, pin, GP_##bank##_##pin, sfx)
 176
 177 #define PORT_GP_32(bank, fn, sfx)                                       \
 178         PORT_GP_1(bank, 0,  fn, sfx), PORT_GP_1(bank, 1,  fn, sfx),     \
 179         PORT_GP_1(bank, 2,  fn, sfx), PORT_GP_1(bank, 3,  fn, sfx),     \
 180         PORT_GP_1(bank, 4,  fn, sfx), PORT_GP_1(bank, 5,  fn, sfx),     \
 181         PORT_GP_1(bank, 6,  fn, sfx), PORT_GP_1(bank, 7,  fn, sfx),     \
 182         PORT_GP_1(bank, 8,  fn, sfx), PORT_GP_1(bank, 9,  fn, sfx),     \
 183         PORT_GP_1(bank, 10, fn, sfx), PORT_GP_1(bank, 11, fn, sfx),     \
 184         PORT_GP_1(bank, 12, fn, sfx), PORT_GP_1(bank, 13, fn, sfx),     \
 185         PORT_GP_1(bank, 14, fn, sfx), PORT_GP_1(bank, 15, fn, sfx),     \
 186         PORT_GP_1(bank, 16, fn, sfx), PORT_GP_1(bank, 17, fn, sfx),     \
 187         PORT_GP_1(bank, 18, fn, sfx), PORT_GP_1(bank, 19, fn, sfx),     \
 188         PORT_GP_1(bank, 20, fn, sfx), PORT_GP_1(bank, 21, fn, sfx),     \
 189         PORT_GP_1(bank, 22, fn, sfx), PORT_GP_1(bank, 23, fn, sfx),     \
 190         PORT_GP_1(bank, 24, fn, sfx), PORT_GP_1(bank, 25, fn, sfx),     \
 191         PORT_GP_1(bank, 26, fn, sfx), PORT_GP_1(bank, 27, fn, sfx),     \
 192         PORT_GP_1(bank, 28, fn, sfx), PORT_GP_1(bank, 29, fn, sfx),     \
 193         PORT_GP_1(bank, 30, fn, sfx), PORT_GP_1(bank, 31, fn, sfx)
 194
 195 #define PORT_GP_32_REV(bank, fn, sfx)                                   \
 196         PORT_GP_1(bank, 31, fn, sfx), PORT_GP_1(bank, 30, fn, sfx),     \
 197         PORT_GP_1(bank, 29, fn, sfx), PORT_GP_1(bank, 28, fn, sfx),     \
 198         PORT_GP_1(bank, 27, fn, sfx), PORT_GP_1(bank, 26, fn, sfx),     \
 199         PORT_GP_1(bank, 25, fn, sfx), PORT_GP_1(bank, 24, fn, sfx),     \
 200         PORT_GP_1(bank, 23, fn, sfx), PORT_GP_1(bank, 22, fn, sfx),     \
 201         PORT_GP_1(bank, 21, fn, sfx), PORT_GP_1(bank, 20, fn, sfx),     \
 202         PORT_GP_1(bank, 19, fn, sfx), PORT_GP_1(bank, 18, fn, sfx),     \
 203         PORT_GP_1(bank, 17, fn, sfx), PORT_GP_1(bank, 16, fn, sfx),     \
 204         PORT_GP_1(bank, 15, fn, sfx), PORT_GP_1(bank, 14, fn, sfx),     \
 205         PORT_GP_1(bank, 13, fn, sfx), PORT_GP_1(bank, 12, fn, sfx),     \
 206         PORT_GP_1(bank, 11, fn, sfx), PORT_GP_1(bank, 10, fn, sfx),     \
 207         PORT_GP_1(bank, 9,  fn, sfx), PORT_GP_1(bank, 8,  fn, sfx),     \
 208         PORT_GP_1(bank, 7,  fn, sfx), PORT_GP_1(bank, 6,  fn, sfx),     \
 209         PORT_GP_1(bank, 5,  fn, sfx), PORT_GP_1(bank, 4,  fn, sfx),     \
 210         PORT_GP_1(bank, 3,  fn, sfx), PORT_GP_1(bank, 2,  fn, sfx),     \
 211         PORT_GP_1(bank, 1,  fn, sfx), PORT_GP_1(bank, 0,  fn, sfx)
 212
 213 /* GP_ALL(suffix) - Expand to a list of GP_#_#_suffix */
 214 #define _GP_ALL(bank, pin, name, sfx)   name##_##sfx
 215 #define GP_ALL(str)                     CPU_ALL_PORT(_GP_ALL, str)
 216
 217 /* PINMUX_GPIO_GP_ALL - Expand to a list of sh_pfc_pin entries */
 218 #define _GP_GPIO(bank, _pin, _name, sfx)                                \
 219         [(bank * 32) + _pin] = {                                        \
 220                 .pin = (bank * 32) + _pin,                              \
 221                 .name = __stringify(_name),                             \
 222                 .enum_id = _name##_DATA,                                \
 223         }
 224 #define PINMUX_GPIO_GP_ALL()            CPU_ALL_PORT(_GP_GPIO, unused)
 225
 226 /* PINMUX_DATA_GP_ALL -  Expand to a list of name_DATA, name_FN marks */
 227 #define _GP_DATA(bank, pin, name, sfx)  PINMUX_DATA(name##_DATA, name##_FN)
 228 #define PINMUX_DATA_GP_ALL()            CPU_ALL_PORT(_GP_DATA, unused)
 229
 230 /*
 231  * PORT style (linear pin space)
 232  */
 233
 234 #define PORT_1(pn, fn, pfx, sfx) fn(pn, pfx, sfx)
 235
 236 #define PORT_10(pn, fn, pfx, sfx)                                         \
 237         PORT_1(pn,   fn, pfx##0, sfx), PORT_1(pn+1, fn, pfx##1, sfx),     \
 238         PORT_1(pn+2, fn, pfx##2, sfx), PORT_1(pn+3, fn, pfx##3, sfx),     \
 239         PORT_1(pn+4, fn, pfx##4, sfx), PORT_1(pn+5, fn, pfx##5, sfx),     \
 240         PORT_1(pn+6, fn, pfx##6, sfx), PORT_1(pn+7, fn, pfx##7, sfx),     \
 241         PORT_1(pn+8, fn, pfx##8, sfx), PORT_1(pn+9, fn, pfx##9, sfx)
 242
 243 #define PORT_90(pn, fn, pfx, sfx)                                         \
 244         PORT_10(pn+10, fn, pfx##1, sfx), PORT_10(pn+20, fn, pfx##2, sfx), \
 245         PORT_10(pn+30, fn, pfx##3, sfx), PORT_10(pn+40, fn, pfx##4, sfx), \
 246         PORT_10(pn+50, fn, pfx##5, sfx), PORT_10(pn+60, fn, pfx##6, sfx), \
 247         PORT_10(pn+70, fn, pfx##7, sfx), PORT_10(pn+80, fn, pfx##8, sfx), \
 248         PORT_10(pn+90, fn, pfx##9, sfx)
 249
 250 /* PORT_ALL(suffix) - Expand to a list of PORT_#_suffix */
 251 #define _PORT_ALL(pn, pfx, sfx)         pfx##_##sfx
 252 #define PORT_ALL(str)                   CPU_ALL_PORT(_PORT_ALL, PORT, str)
 253
 254 /* PINMUX_GPIO - Expand to a sh_pfc_pin entry */
 255 #define PINMUX_GPIO(_pin)                                               \
 256         [GPIO_##_pin] = {                                               \
 257                 .pin = (u16)-1,                                         \
 258                 .name = __stringify(GPIO_##_pin),                       \
 259                 .enum_id = _pin##_DATA,                                 \
 260         }
 261
 262 /* SH_PFC_PIN_CFG - Expand to a sh_pfc_pin entry (named PORT#) with config */
 263 #define SH_PFC_PIN_CFG(_pin, cfgs)                                      \
 264         {                                                               \
 265                 .pin = _pin,                                            \
 266                 .name = __stringify(PORT##_pin),                        \
 267                 .enum_id = PORT##_pin##_DATA,                           \
 268                 .configs = cfgs,                                        \
 269         }
 270
 271 /* SH_PFC_PIN_NAMED - Expand to a sh_pfc_pin entry with the given name */
 272 #define SH_PFC_PIN_NAMED(row, col, _name)                               \
 273         {                                                               \
 274                 .pin = PIN_NUMBER(row, col),                            \
 275                 .name = __stringify(PIN_##_name),                       \
 276                 .configs = SH_PFC_PIN_CFG_NO_GPIO,                      \
 277         }
 278
 279 /* PINMUX_DATA_ALL - Expand to a list of PORT_name_DATA, PORT_name_FN0,
 280  *                   PORT_name_OUT, PORT_name_IN marks
 281  */
 282 #define _PORT_DATA(pn, pfx, sfx)                                        \
 283         PINMUX_DATA(PORT##pfx##_DATA, PORT##pfx##_FN0,                  \
 284                     PORT##pfx##_OUT, PORT##pfx##_IN)
 285 #define PINMUX_DATA_ALL()               CPU_ALL_PORT(_PORT_DATA, , unused)
 286
 287 /* GPIO_FN(name) - Expand to a sh_pfc_pin entry for a function GPIO */
 288 #define PINMUX_GPIO_FN(gpio, base, data_or_mark)                        \
 289         [gpio - (base)] = {                                             \
 290                 .name = __stringify(gpio),                              \
 291                 .enum_id = data_or_mark,                                \
 292         }
 293 #define GPIO_FN(str)                                                    \
 294         PINMUX_GPIO_FN(GPIO_FN_##str, PINMUX_FN_BASE, str##_MARK)
 295
 296 /*
 297  * PORTnCR macro
 298  */
 299 #define _PCRH(in, in_pd, in_pu, out)    \
 300         0, (out), (in), 0,              \
 301         0, 0, 0, 0,                     \
 302         0, 0, (in_pd), 0,               \
 303         0, 0, (in_pu), 0
 304
 305 #define PORTCR(nr, reg)                                                 \
 306         {                                                               \
 307                 PINMUX_CFG_REG("PORT" nr "CR", reg, 8, 4) {             \
 308                         _PCRH(PORT##nr##_IN, 0, 0, PORT##nr##_OUT),     \
 309                                 PORT##nr##_FN0, PORT##nr##_FN1,         \
 310                                 PORT##nr##_FN2, PORT##nr##_FN3,         \
 311                                 PORT##nr##_FN4, PORT##nr##_FN5,         \
 312                                 PORT##nr##_FN6, PORT##nr##_FN7 }        \
 313         }
 314
 315 #endif /* __SH_PFC_H */