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PM / sleep: Asynchronous threads for suspend_noirq
[linux/fpc-iii.git] / drivers / regulator / s5m8767.c
blobd7164bb75d3e0bf2a88a61c1a82e6c79072cd8b5
1 /*
2 * s5m8767.c
3 *
4 * Copyright (c) 2011 Samsung Electronics Co., Ltd
5 * http://www.samsung.com
6 *
7 * This program is free software; you can redistribute it and/or modify it
8 * under the terms of the GNU General Public License as published by the
9 * Free Software Foundation; either version 2 of the License, or (at your
10 * option) any later version.
11 *
12 */
13
14 #include <linux/bug.h>
15 #include <linux/err.h>
16 #include <linux/gpio.h>
17 #include <linux/of_gpio.h>
18 #include <linux/slab.h>
19 #include <linux/module.h>
20 #include <linux/platform_device.h>
21 #include <linux/regulator/driver.h>
22 #include <linux/regulator/machine.h>
23 #include <linux/mfd/samsung/core.h>
24 #include <linux/mfd/samsung/s5m8767.h>
25 #include <linux/regulator/of_regulator.h>
26 #include <linux/regmap.h>
27
28 #define S5M8767_OPMODE_NORMAL_MODE 0x1
29
30 struct s5m8767_info {
31 struct device *dev;
32 struct sec_pmic_dev *iodev;
33 int num_regulators;
34 struct regulator_dev **rdev;
35 struct sec_opmode_data *opmode;
36
37 int ramp_delay;
38 bool buck2_ramp;
39 bool buck3_ramp;
40 bool buck4_ramp;
41
42 bool buck2_gpiodvs;
43 bool buck3_gpiodvs;
44 bool buck4_gpiodvs;
45 u8 buck2_vol[8];
46 u8 buck3_vol[8];
47 u8 buck4_vol[8];
48 int buck_gpios[3];
49 int buck_ds[3];
50 int buck_gpioindex;
51 };
52
53 struct sec_voltage_desc {
54 int max;
55 int min;
56 int step;
57 };
58
59 static const struct sec_voltage_desc buck_voltage_val1 = {
60 .max = 2225000,
61 .min = 650000,
62 .step = 6250,
63 };
64
65 static const struct sec_voltage_desc buck_voltage_val2 = {
66 .max = 1600000,
67 .min = 600000,
68 .step = 6250,
69 };
70
71 static const struct sec_voltage_desc buck_voltage_val3 = {
72 .max = 3000000,
73 .min = 750000,
74 .step = 12500,
75 };
76
77 static const struct sec_voltage_desc ldo_voltage_val1 = {
78 .max = 3950000,
79 .min = 800000,
80 .step = 50000,
81 };
82
83 static const struct sec_voltage_desc ldo_voltage_val2 = {
84 .max = 2375000,
85 .min = 800000,
86 .step = 25000,
87 };
88
89 static const struct sec_voltage_desc *reg_voltage_map[] = {
90 [S5M8767_LDO1] = &ldo_voltage_val2,
91 [S5M8767_LDO2] = &ldo_voltage_val2,
92 [S5M8767_LDO3] = &ldo_voltage_val1,
93 [S5M8767_LDO4] = &ldo_voltage_val1,
94 [S5M8767_LDO5] = &ldo_voltage_val1,
95 [S5M8767_LDO6] = &ldo_voltage_val2,
96 [S5M8767_LDO7] = &ldo_voltage_val2,
97 [S5M8767_LDO8] = &ldo_voltage_val2,
98 [S5M8767_LDO9] = &ldo_voltage_val1,
99 [S5M8767_LDO10] = &ldo_voltage_val1,
100 [S5M8767_LDO11] = &ldo_voltage_val1,
101 [S5M8767_LDO12] = &ldo_voltage_val1,
102 [S5M8767_LDO13] = &ldo_voltage_val1,
103 [S5M8767_LDO14] = &ldo_voltage_val1,
104 [S5M8767_LDO15] = &ldo_voltage_val2,
105 [S5M8767_LDO16] = &ldo_voltage_val1,
106 [S5M8767_LDO17] = &ldo_voltage_val1,
107 [S5M8767_LDO18] = &ldo_voltage_val1,
108 [S5M8767_LDO19] = &ldo_voltage_val1,
109 [S5M8767_LDO20] = &ldo_voltage_val1,
110 [S5M8767_LDO21] = &ldo_voltage_val1,
111 [S5M8767_LDO22] = &ldo_voltage_val1,
112 [S5M8767_LDO23] = &ldo_voltage_val1,
113 [S5M8767_LDO24] = &ldo_voltage_val1,
114 [S5M8767_LDO25] = &ldo_voltage_val1,
115 [S5M8767_LDO26] = &ldo_voltage_val1,
116 [S5M8767_LDO27] = &ldo_voltage_val1,
117 [S5M8767_LDO28] = &ldo_voltage_val1,
118 [S5M8767_BUCK1] = &buck_voltage_val1,
119 [S5M8767_BUCK2] = &buck_voltage_val2,
120 [S5M8767_BUCK3] = &buck_voltage_val2,
121 [S5M8767_BUCK4] = &buck_voltage_val2,
122 [S5M8767_BUCK5] = &buck_voltage_val1,
123 [S5M8767_BUCK6] = &buck_voltage_val1,
124 [S5M8767_BUCK7] = &buck_voltage_val3,
125 [S5M8767_BUCK8] = &buck_voltage_val3,
126 [S5M8767_BUCK9] = &buck_voltage_val3,
127 };
128
129 static unsigned int s5m8767_opmode_reg[][4] = {
130 /* {OFF, ON, LOWPOWER, SUSPEND} */
131 /* LDO1 ... LDO28 */
132 {0x0, 0x3, 0x2, 0x1}, /* LDO1 */
133 {0x0, 0x3, 0x2, 0x1},
134 {0x0, 0x3, 0x2, 0x1},
135 {0x0, 0x0, 0x0, 0x0},
136 {0x0, 0x3, 0x2, 0x1}, /* LDO5 */
137 {0x0, 0x3, 0x2, 0x1},
138 {0x0, 0x3, 0x2, 0x1},
139 {0x0, 0x3, 0x2, 0x1},
140 {0x0, 0x3, 0x2, 0x1},
141 {0x0, 0x3, 0x2, 0x1}, /* LDO10 */
142 {0x0, 0x3, 0x2, 0x1},
143 {0x0, 0x3, 0x2, 0x1},
144 {0x0, 0x3, 0x2, 0x1},
145 {0x0, 0x3, 0x2, 0x1},
146 {0x0, 0x3, 0x2, 0x1}, /* LDO15 */
147 {0x0, 0x3, 0x2, 0x1},
148 {0x0, 0x3, 0x2, 0x1},
149 {0x0, 0x0, 0x0, 0x0},
150 {0x0, 0x3, 0x2, 0x1},
151 {0x0, 0x3, 0x2, 0x1}, /* LDO20 */
152 {0x0, 0x3, 0x2, 0x1},
153 {0x0, 0x3, 0x2, 0x1},
154 {0x0, 0x0, 0x0, 0x0},
155 {0x0, 0x3, 0x2, 0x1},
156 {0x0, 0x3, 0x2, 0x1}, /* LDO25 */
157 {0x0, 0x3, 0x2, 0x1},
158 {0x0, 0x3, 0x2, 0x1},
159 {0x0, 0x3, 0x2, 0x1}, /* LDO28 */
160
161 /* BUCK1 ... BUCK9 */
162 {0x0, 0x3, 0x1, 0x1}, /* BUCK1 */
163 {0x0, 0x3, 0x1, 0x1},
164 {0x0, 0x3, 0x1, 0x1},
165 {0x0, 0x3, 0x1, 0x1},
166 {0x0, 0x3, 0x2, 0x1}, /* BUCK5 */
167 {0x0, 0x3, 0x1, 0x1},
168 {0x0, 0x3, 0x1, 0x1},
169 {0x0, 0x3, 0x1, 0x1},
170 {0x0, 0x3, 0x1, 0x1}, /* BUCK9 */
171 };
172
173 static int s5m8767_get_register(struct regulator_dev *rdev, int *reg,
174 int *enable_ctrl)
175 {
176 int i, reg_id = rdev_get_id(rdev);
177 unsigned int mode;
178 struct s5m8767_info *s5m8767 = rdev_get_drvdata(rdev);
179
180 switch (reg_id) {
181 case S5M8767_LDO1 ... S5M8767_LDO2:
182 *reg = S5M8767_REG_LDO1CTRL + (reg_id - S5M8767_LDO1);
183 break;
184 case S5M8767_LDO3 ... S5M8767_LDO28:
185 *reg = S5M8767_REG_LDO3CTRL + (reg_id - S5M8767_LDO3);
186 break;
187 case S5M8767_BUCK1:
188 *reg = S5M8767_REG_BUCK1CTRL1;
189 break;
190 case S5M8767_BUCK2 ... S5M8767_BUCK4:
191 *reg = S5M8767_REG_BUCK2CTRL + (reg_id - S5M8767_BUCK2) * 9;
192 break;
193 case S5M8767_BUCK5:
194 *reg = S5M8767_REG_BUCK5CTRL1;
195 break;
196 case S5M8767_BUCK6 ... S5M8767_BUCK9:
197 *reg = S5M8767_REG_BUCK6CTRL1 + (reg_id - S5M8767_BUCK6) * 2;
198 break;
199 default:
200 return -EINVAL;
201 }
202
203 for (i = 0; i < s5m8767->num_regulators; i++) {
204 if (s5m8767->opmode[i].id == reg_id) {
205 mode = s5m8767->opmode[i].mode;
206 break;
207 }
208 }
209
210 if (i < s5m8767->num_regulators)
211 *enable_ctrl =
212 s5m8767_opmode_reg[reg_id][mode] << S5M8767_ENCTRL_SHIFT;
213
214 return 0;
215 }
216
217 static int s5m8767_reg_is_enabled(struct regulator_dev *rdev)
218 {
219 struct s5m8767_info *s5m8767 = rdev_get_drvdata(rdev);
220 int ret, reg;
221 int enable_ctrl;
222 unsigned int val;
223
224 ret = s5m8767_get_register(rdev, &reg, &enable_ctrl);
225 if (ret == -EINVAL)
226 return 1;
227 else if (ret)
228 return ret;
229
230 ret = regmap_read(s5m8767->iodev->regmap_pmic, reg, &val);
231 if (ret)
232 return ret;
233
234 return (val & S5M8767_ENCTRL_MASK) == enable_ctrl;
235 }
236
237 static int s5m8767_reg_enable(struct regulator_dev *rdev)
238 {
239 struct s5m8767_info *s5m8767 = rdev_get_drvdata(rdev);
240 int ret, reg;
241 int enable_ctrl;
242
243 ret = s5m8767_get_register(rdev, &reg, &enable_ctrl);
244 if (ret)
245 return ret;
246
247 return regmap_update_bits(s5m8767->iodev->regmap_pmic, reg,
248 S5M8767_ENCTRL_MASK, enable_ctrl);
249 }
250
251 static int s5m8767_reg_disable(struct regulator_dev *rdev)
252 {
253 struct s5m8767_info *s5m8767 = rdev_get_drvdata(rdev);
254 int ret, reg, enable_ctrl;
255
256 ret = s5m8767_get_register(rdev, &reg, &enable_ctrl);
257 if (ret)
258 return ret;
259
260 return regmap_update_bits(s5m8767->iodev->regmap_pmic, reg,
261 S5M8767_ENCTRL_MASK, ~S5M8767_ENCTRL_MASK);
262 }
263
264 static int s5m8767_get_vsel_reg(int reg_id, struct s5m8767_info *s5m8767)
265 {
266 int reg;
267
268 switch (reg_id) {
269 case S5M8767_LDO1 ... S5M8767_LDO2:
270 reg = S5M8767_REG_LDO1CTRL + (reg_id - S5M8767_LDO1);
271 break;
272 case S5M8767_LDO3 ... S5M8767_LDO28:
273 reg = S5M8767_REG_LDO3CTRL + (reg_id - S5M8767_LDO3);
274 break;
275 case S5M8767_BUCK1:
276 reg = S5M8767_REG_BUCK1CTRL2;
277 break;
278 case S5M8767_BUCK2:
279 reg = S5M8767_REG_BUCK2DVS1;
280 if (s5m8767->buck2_gpiodvs)
281 reg += s5m8767->buck_gpioindex;
282 break;
283 case S5M8767_BUCK3:
284 reg = S5M8767_REG_BUCK3DVS1;
285 if (s5m8767->buck3_gpiodvs)
286 reg += s5m8767->buck_gpioindex;
287 break;
288 case S5M8767_BUCK4:
289 reg = S5M8767_REG_BUCK4DVS1;
290 if (s5m8767->buck4_gpiodvs)
291 reg += s5m8767->buck_gpioindex;
292 break;
293 case S5M8767_BUCK5:
294 reg = S5M8767_REG_BUCK5CTRL2;
295 break;
296 case S5M8767_BUCK6 ... S5M8767_BUCK9:
297 reg = S5M8767_REG_BUCK6CTRL2 + (reg_id - S5M8767_BUCK6) * 2;
298 break;
299 default:
300 return -EINVAL;
301 }
302
303 return reg;
304 }
305
306 static int s5m8767_convert_voltage_to_sel(const struct sec_voltage_desc *desc,
307 int min_vol)
308 {
309 int selector = 0;
310
311 if (desc == NULL)
312 return -EINVAL;
313
314 if (min_vol > desc->max)
315 return -EINVAL;
316
317 if (min_vol < desc->min)
318 min_vol = desc->min;
319
320 selector = DIV_ROUND_UP(min_vol - desc->min, desc->step);
321
322 if (desc->min + desc->step * selector > desc->max)
323 return -EINVAL;
324
325 return selector;
326 }
327
328 static inline int s5m8767_set_high(struct s5m8767_info *s5m8767)
329 {
330 int temp_index = s5m8767->buck_gpioindex;
331
332 gpio_set_value(s5m8767->buck_gpios[0], (temp_index >> 2) & 0x1);
333 gpio_set_value(s5m8767->buck_gpios[1], (temp_index >> 1) & 0x1);
334 gpio_set_value(s5m8767->buck_gpios[2], temp_index & 0x1);
335
336 return 0;
337 }
338
339 static inline int s5m8767_set_low(struct s5m8767_info *s5m8767)
340 {
341 int temp_index = s5m8767->buck_gpioindex;
342
343 gpio_set_value(s5m8767->buck_gpios[2], temp_index & 0x1);
344 gpio_set_value(s5m8767->buck_gpios[1], (temp_index >> 1) & 0x1);
345 gpio_set_value(s5m8767->buck_gpios[0], (temp_index >> 2) & 0x1);
346
347 return 0;
348 }
349
350 static int s5m8767_set_voltage_sel(struct regulator_dev *rdev,
351 unsigned selector)
352 {
353 struct s5m8767_info *s5m8767 = rdev_get_drvdata(rdev);
354 int reg_id = rdev_get_id(rdev);
355 int old_index, index = 0;
356 u8 *buck234_vol = NULL;
357
358 switch (reg_id) {
359 case S5M8767_LDO1 ... S5M8767_LDO28:
360 break;
361 case S5M8767_BUCK1 ... S5M8767_BUCK6:
362 if (reg_id == S5M8767_BUCK2 && s5m8767->buck2_gpiodvs)
363 buck234_vol = &s5m8767->buck2_vol[0];
364 else if (reg_id == S5M8767_BUCK3 && s5m8767->buck3_gpiodvs)
365 buck234_vol = &s5m8767->buck3_vol[0];
366 else if (reg_id == S5M8767_BUCK4 && s5m8767->buck4_gpiodvs)
367 buck234_vol = &s5m8767->buck4_vol[0];
368 break;
369 case S5M8767_BUCK7 ... S5M8767_BUCK8:
370 return -EINVAL;
371 case S5M8767_BUCK9:
372 break;
373 default:
374 return -EINVAL;
375 }
376
377 /* buck234_vol != NULL means to control buck234 voltage via DVS GPIO */
378 if (buck234_vol) {
379 while (*buck234_vol != selector) {
380 buck234_vol++;
381 index++;
382 }
383 old_index = s5m8767->buck_gpioindex;
384 s5m8767->buck_gpioindex = index;
385
386 if (index > old_index)
387 return s5m8767_set_high(s5m8767);
388 else
389 return s5m8767_set_low(s5m8767);
390 } else {
391 return regulator_set_voltage_sel_regmap(rdev, selector);
392 }
393 }
394
395 static int s5m8767_set_voltage_time_sel(struct regulator_dev *rdev,
396 unsigned int old_sel,
397 unsigned int new_sel)
398 {
399 struct s5m8767_info *s5m8767 = rdev_get_drvdata(rdev);
400 const struct sec_voltage_desc *desc;
401 int reg_id = rdev_get_id(rdev);
402
403 desc = reg_voltage_map[reg_id];
404
405 if ((old_sel < new_sel) && s5m8767->ramp_delay)
406 return DIV_ROUND_UP(desc->step * (new_sel - old_sel),
407 s5m8767->ramp_delay * 1000);
408 return 0;
409 }
410
411 static struct regulator_ops s5m8767_ops = {
412 .list_voltage = regulator_list_voltage_linear,
413 .is_enabled = s5m8767_reg_is_enabled,
414 .enable = s5m8767_reg_enable,
415 .disable = s5m8767_reg_disable,
416 .get_voltage_sel = regulator_get_voltage_sel_regmap,
417 .set_voltage_sel = s5m8767_set_voltage_sel,
418 .set_voltage_time_sel = s5m8767_set_voltage_time_sel,
419 };
420
421 static struct regulator_ops s5m8767_buck78_ops = {
422 .list_voltage = regulator_list_voltage_linear,
423 .is_enabled = s5m8767_reg_is_enabled,
424 .enable = s5m8767_reg_enable,
425 .disable = s5m8767_reg_disable,
426 .get_voltage_sel = regulator_get_voltage_sel_regmap,
427 .set_voltage_sel = regulator_set_voltage_sel_regmap,
428 };
429
430 #define s5m8767_regulator_desc(_name) { \
431 .name = #_name, \
432 .id = S5M8767_##_name, \
433 .ops = &s5m8767_ops, \
434 .type = REGULATOR_VOLTAGE, \
435 .owner = THIS_MODULE, \
436 }
437
438 #define s5m8767_regulator_buck78_desc(_name) { \
439 .name = #_name, \
440 .id = S5M8767_##_name, \
441 .ops = &s5m8767_buck78_ops, \
442 .type = REGULATOR_VOLTAGE, \
443 .owner = THIS_MODULE, \
444 }
445
446 static struct regulator_desc regulators[] = {
447 s5m8767_regulator_desc(LDO1),
448 s5m8767_regulator_desc(LDO2),
449 s5m8767_regulator_desc(LDO3),
450 s5m8767_regulator_desc(LDO4),
451 s5m8767_regulator_desc(LDO5),
452 s5m8767_regulator_desc(LDO6),
453 s5m8767_regulator_desc(LDO7),
454 s5m8767_regulator_desc(LDO8),
455 s5m8767_regulator_desc(LDO9),
456 s5m8767_regulator_desc(LDO10),
457 s5m8767_regulator_desc(LDO11),
458 s5m8767_regulator_desc(LDO12),
459 s5m8767_regulator_desc(LDO13),
460 s5m8767_regulator_desc(LDO14),
461 s5m8767_regulator_desc(LDO15),
462 s5m8767_regulator_desc(LDO16),
463 s5m8767_regulator_desc(LDO17),
464 s5m8767_regulator_desc(LDO18),
465 s5m8767_regulator_desc(LDO19),
466 s5m8767_regulator_desc(LDO20),
467 s5m8767_regulator_desc(LDO21),
468 s5m8767_regulator_desc(LDO22),
469 s5m8767_regulator_desc(LDO23),
470 s5m8767_regulator_desc(LDO24),
471 s5m8767_regulator_desc(LDO25),
472 s5m8767_regulator_desc(LDO26),
473 s5m8767_regulator_desc(LDO27),
474 s5m8767_regulator_desc(LDO28),
475 s5m8767_regulator_desc(BUCK1),
476 s5m8767_regulator_desc(BUCK2),
477 s5m8767_regulator_desc(BUCK3),
478 s5m8767_regulator_desc(BUCK4),
479 s5m8767_regulator_desc(BUCK5),
480 s5m8767_regulator_desc(BUCK6),
481 s5m8767_regulator_buck78_desc(BUCK7),
482 s5m8767_regulator_buck78_desc(BUCK8),
483 s5m8767_regulator_desc(BUCK9),
484 };
485
486 #ifdef CONFIG_OF
487 static int s5m8767_pmic_dt_parse_dvs_gpio(struct sec_pmic_dev *iodev,
488 struct sec_platform_data *pdata,
489 struct device_node *pmic_np)
490 {
491 int i, gpio;
492
493 for (i = 0; i < 3; i++) {
494 gpio = of_get_named_gpio(pmic_np,
495 "s5m8767,pmic-buck-dvs-gpios", i);
496 if (!gpio_is_valid(gpio)) {
497 dev_err(iodev->dev, "invalid gpio[%d]: %d\n", i, gpio);
498 return -EINVAL;
499 }
500 pdata->buck_gpios[i] = gpio;
501 }
502 return 0;
503 }
504
505 static int s5m8767_pmic_dt_parse_ds_gpio(struct sec_pmic_dev *iodev,
506 struct sec_platform_data *pdata,
507 struct device_node *pmic_np)
508 {
509 int i, gpio;
510
511 for (i = 0; i < 3; i++) {
512 gpio = of_get_named_gpio(pmic_np,
513 "s5m8767,pmic-buck-ds-gpios", i);
514 if (!gpio_is_valid(gpio)) {
515 dev_err(iodev->dev, "invalid gpio[%d]: %d\n", i, gpio);
516 return -EINVAL;
517 }
518 pdata->buck_ds[i] = gpio;
519 }
520 return 0;
521 }
522
523 static int s5m8767_pmic_dt_parse_pdata(struct platform_device *pdev,
524 struct sec_platform_data *pdata)
525 {
526 struct sec_pmic_dev *iodev = dev_get_drvdata(pdev->dev.parent);
527 struct device_node *pmic_np, *regulators_np, *reg_np;
528 struct sec_regulator_data *rdata;
529 struct sec_opmode_data *rmode;
530 unsigned int i, dvs_voltage_nr = 8, ret;
531
532 pmic_np = iodev->dev->of_node;
533 if (!pmic_np) {
534 dev_err(iodev->dev, "could not find pmic sub-node\n");
535 return -ENODEV;
536 }
537
538 regulators_np = of_find_node_by_name(pmic_np, "regulators");
539 if (!regulators_np) {
540 dev_err(iodev->dev, "could not find regulators sub-node\n");
541 return -EINVAL;
542 }
543
544 /* count the number of regulators to be supported in pmic */
545 pdata->num_regulators = of_get_child_count(regulators_np);
546
547 rdata = devm_kzalloc(&pdev->dev, sizeof(*rdata) *
548 pdata->num_regulators, GFP_KERNEL);
549 if (!rdata) {
550 dev_err(iodev->dev,
551 "could not allocate memory for regulator data\n");
552 return -ENOMEM;
553 }
554
555 rmode = devm_kzalloc(&pdev->dev, sizeof(*rmode) *
556 pdata->num_regulators, GFP_KERNEL);
557 if (!rmode) {
558 dev_err(iodev->dev,
559 "could not allocate memory for regulator mode\n");
560 return -ENOMEM;
561 }
562
563 pdata->regulators = rdata;
564 pdata->opmode = rmode;
565 for_each_child_of_node(regulators_np, reg_np) {
566 for (i = 0; i < ARRAY_SIZE(regulators); i++)
567 if (!of_node_cmp(reg_np->name, regulators[i].name))
568 break;
569
570 if (i == ARRAY_SIZE(regulators)) {
571 dev_warn(iodev->dev,
572 "don't know how to configure regulator %s\n",
573 reg_np->name);
574 continue;
575 }
576
577 rdata->id = i;
578 rdata->initdata = of_get_regulator_init_data(
579 &pdev->dev, reg_np);
580 rdata->reg_node = reg_np;
581 rdata++;
582 rmode->id = i;
583 if (of_property_read_u32(reg_np, "op_mode",
584 &rmode->mode)) {
585 dev_warn(iodev->dev,
586 "no op_mode property property at %s\n",
587 reg_np->full_name);
588
589 rmode->mode = S5M8767_OPMODE_NORMAL_MODE;
590 }
591 rmode++;
592 }
593
594 if (of_get_property(pmic_np, "s5m8767,pmic-buck2-uses-gpio-dvs", NULL)) {
595 pdata->buck2_gpiodvs = true;
596
597 if (of_property_read_u32_array(pmic_np,
598 "s5m8767,pmic-buck2-dvs-voltage",
599 pdata->buck2_voltage, dvs_voltage_nr)) {
600 dev_err(iodev->dev, "buck2 voltages not specified\n");
601 return -EINVAL;
602 }
603 }
604
605 if (of_get_property(pmic_np, "s5m8767,pmic-buck3-uses-gpio-dvs", NULL)) {
606 pdata->buck3_gpiodvs = true;
607
608 if (of_property_read_u32_array(pmic_np,
609 "s5m8767,pmic-buck3-dvs-voltage",
610 pdata->buck3_voltage, dvs_voltage_nr)) {
611 dev_err(iodev->dev, "buck3 voltages not specified\n");
612 return -EINVAL;
613 }
614 }
615
616 if (of_get_property(pmic_np, "s5m8767,pmic-buck4-uses-gpio-dvs", NULL)) {
617 pdata->buck4_gpiodvs = true;
618
619 if (of_property_read_u32_array(pmic_np,
620 "s5m8767,pmic-buck4-dvs-voltage",
621 pdata->buck4_voltage, dvs_voltage_nr)) {
622 dev_err(iodev->dev, "buck4 voltages not specified\n");
623 return -EINVAL;
624 }
625 }
626
627 if (pdata->buck2_gpiodvs || pdata->buck3_gpiodvs ||
628 pdata->buck4_gpiodvs) {
629 ret = s5m8767_pmic_dt_parse_dvs_gpio(iodev, pdata, pmic_np);
630 if (ret)
631 return -EINVAL;
632
633 if (of_property_read_u32(pmic_np,
634 "s5m8767,pmic-buck-default-dvs-idx",
635 &pdata->buck_default_idx)) {
636 pdata->buck_default_idx = 0;
637 } else {
638 if (pdata->buck_default_idx >= 8) {
639 pdata->buck_default_idx = 0;
640 dev_info(iodev->dev,
641 "invalid value for default dvs index, use 0\n");
642 }
643 }
644 }
645
646 ret = s5m8767_pmic_dt_parse_ds_gpio(iodev, pdata, pmic_np);
647 if (ret)
648 return -EINVAL;
649
650 if (of_get_property(pmic_np, "s5m8767,pmic-buck2-ramp-enable", NULL))
651 pdata->buck2_ramp_enable = true;
652
653 if (of_get_property(pmic_np, "s5m8767,pmic-buck3-ramp-enable", NULL))
654 pdata->buck3_ramp_enable = true;
655
656 if (of_get_property(pmic_np, "s5m8767,pmic-buck4-ramp-enable", NULL))
657 pdata->buck4_ramp_enable = true;
658
659 if (pdata->buck2_ramp_enable || pdata->buck3_ramp_enable
660 || pdata->buck4_ramp_enable) {
661 if (of_property_read_u32(pmic_np, "s5m8767,pmic-buck-ramp-delay",
662 &pdata->buck_ramp_delay))
663 pdata->buck_ramp_delay = 0;
664 }
665
666 return 0;
667 }
668 #else
669 static int s5m8767_pmic_dt_parse_pdata(struct platform_device *pdev,
670 struct sec_platform_data *pdata)
671 {
672 return 0;
673 }
674 #endif /* CONFIG_OF */
675
676 static int s5m8767_pmic_probe(struct platform_device *pdev)
677 {
678 struct sec_pmic_dev *iodev = dev_get_drvdata(pdev->dev.parent);
679 struct sec_platform_data *pdata = iodev->pdata;
680 struct regulator_config config = { };
681 struct regulator_dev **rdev;
682 struct s5m8767_info *s5m8767;
683 int i, ret, size, buck_init;
684
685 if (!pdata) {
686 dev_err(pdev->dev.parent, "Platform data not supplied\n");
687 return -ENODEV;
688 }
689
690 if (iodev->dev->of_node) {
691 ret = s5m8767_pmic_dt_parse_pdata(pdev, pdata);
692 if (ret)
693 return ret;
694 }
695
696 if (pdata->buck2_gpiodvs) {
697 if (pdata->buck3_gpiodvs || pdata->buck4_gpiodvs) {
698 dev_err(&pdev->dev, "S5M8767 GPIO DVS NOT VALID\n");
699 return -EINVAL;
700 }
701 }
702
703 if (pdata->buck3_gpiodvs) {
704 if (pdata->buck2_gpiodvs || pdata->buck4_gpiodvs) {
705 dev_err(&pdev->dev, "S5M8767 GPIO DVS NOT VALID\n");
706 return -EINVAL;
707 }
708 }
709
710 if (pdata->buck4_gpiodvs) {
711 if (pdata->buck2_gpiodvs || pdata->buck3_gpiodvs) {
712 dev_err(&pdev->dev, "S5M8767 GPIO DVS NOT VALID\n");
713 return -EINVAL;
714 }
715 }
716
717 s5m8767 = devm_kzalloc(&pdev->dev, sizeof(struct s5m8767_info),
718 GFP_KERNEL);
719 if (!s5m8767)
720 return -ENOMEM;
721
722 size = sizeof(struct regulator_dev *) * (S5M8767_REG_MAX - 2);
723 s5m8767->rdev = devm_kzalloc(&pdev->dev, size, GFP_KERNEL);
724 if (!s5m8767->rdev)
725 return -ENOMEM;
726
727 rdev = s5m8767->rdev;
728 s5m8767->dev = &pdev->dev;
729 s5m8767->iodev = iodev;
730 s5m8767->num_regulators = pdata->num_regulators;
731 platform_set_drvdata(pdev, s5m8767);
732
733 s5m8767->buck_gpioindex = pdata->buck_default_idx;
734 s5m8767->buck2_gpiodvs = pdata->buck2_gpiodvs;
735 s5m8767->buck3_gpiodvs = pdata->buck3_gpiodvs;
736 s5m8767->buck4_gpiodvs = pdata->buck4_gpiodvs;
737 s5m8767->buck_gpios[0] = pdata->buck_gpios[0];
738 s5m8767->buck_gpios[1] = pdata->buck_gpios[1];
739 s5m8767->buck_gpios[2] = pdata->buck_gpios[2];
740 s5m8767->buck_ds[0] = pdata->buck_ds[0];
741 s5m8767->buck_ds[1] = pdata->buck_ds[1];
742 s5m8767->buck_ds[2] = pdata->buck_ds[2];
743
744 s5m8767->ramp_delay = pdata->buck_ramp_delay;
745 s5m8767->buck2_ramp = pdata->buck2_ramp_enable;
746 s5m8767->buck3_ramp = pdata->buck3_ramp_enable;
747 s5m8767->buck4_ramp = pdata->buck4_ramp_enable;
748 s5m8767->opmode = pdata->opmode;
749
750 buck_init = s5m8767_convert_voltage_to_sel(&buck_voltage_val2,
751 pdata->buck2_init);
752
753 regmap_write(s5m8767->iodev->regmap_pmic, S5M8767_REG_BUCK2DVS2,
754 buck_init);
755
756 buck_init = s5m8767_convert_voltage_to_sel(&buck_voltage_val2,
757 pdata->buck3_init);
758
759 regmap_write(s5m8767->iodev->regmap_pmic, S5M8767_REG_BUCK3DVS2,
760 buck_init);
761
762 buck_init = s5m8767_convert_voltage_to_sel(&buck_voltage_val2,
763 pdata->buck4_init);
764
765 regmap_write(s5m8767->iodev->regmap_pmic, S5M8767_REG_BUCK4DVS2,
766 buck_init);
767
768 for (i = 0; i < 8; i++) {
769 if (s5m8767->buck2_gpiodvs) {
770 s5m8767->buck2_vol[i] =
771 s5m8767_convert_voltage_to_sel(
772 &buck_voltage_val2,
773 pdata->buck2_voltage[i]);
774 }
775
776 if (s5m8767->buck3_gpiodvs) {
777 s5m8767->buck3_vol[i] =
778 s5m8767_convert_voltage_to_sel(
779 &buck_voltage_val2,
780 pdata->buck3_voltage[i]);
781 }
782
783 if (s5m8767->buck4_gpiodvs) {
784 s5m8767->buck4_vol[i] =
785 s5m8767_convert_voltage_to_sel(
786 &buck_voltage_val2,
787 pdata->buck4_voltage[i]);
788 }
789 }
790
791 if (pdata->buck2_gpiodvs || pdata->buck3_gpiodvs ||
792 pdata->buck4_gpiodvs) {
793
794 if (!gpio_is_valid(pdata->buck_gpios[0]) ||
795 !gpio_is_valid(pdata->buck_gpios[1]) ||
796 !gpio_is_valid(pdata->buck_gpios[2])) {
797 dev_err(&pdev->dev, "GPIO NOT VALID\n");
798 return -EINVAL;
799 }
800
801 ret = devm_gpio_request(&pdev->dev, pdata->buck_gpios[0],
802 "S5M8767 SET1");
803 if (ret)
804 return ret;
805
806 ret = devm_gpio_request(&pdev->dev, pdata->buck_gpios[1],
807 "S5M8767 SET2");
808 if (ret)
809 return ret;
810
811 ret = devm_gpio_request(&pdev->dev, pdata->buck_gpios[2],
812 "S5M8767 SET3");
813 if (ret)
814 return ret;
815
816 /* SET1 GPIO */
817 gpio_direction_output(pdata->buck_gpios[0],
818 (s5m8767->buck_gpioindex >> 2) & 0x1);
819 /* SET2 GPIO */
820 gpio_direction_output(pdata->buck_gpios[1],
821 (s5m8767->buck_gpioindex >> 1) & 0x1);
822 /* SET3 GPIO */
823 gpio_direction_output(pdata->buck_gpios[2],
824 (s5m8767->buck_gpioindex >> 0) & 0x1);
825 }
826
827 ret = devm_gpio_request(&pdev->dev, pdata->buck_ds[0], "S5M8767 DS2");
828 if (ret)
829 return ret;
830
831 ret = devm_gpio_request(&pdev->dev, pdata->buck_ds[1], "S5M8767 DS3");
832 if (ret)
833 return ret;
834
835 ret = devm_gpio_request(&pdev->dev, pdata->buck_ds[2], "S5M8767 DS4");
836 if (ret)
837 return ret;
838
839 /* DS2 GPIO */
840 gpio_direction_output(pdata->buck_ds[0], 0x0);
841 /* DS3 GPIO */
842 gpio_direction_output(pdata->buck_ds[1], 0x0);
843 /* DS4 GPIO */
844 gpio_direction_output(pdata->buck_ds[2], 0x0);
845
846 if (pdata->buck2_gpiodvs || pdata->buck3_gpiodvs ||
847 pdata->buck4_gpiodvs) {
848 regmap_update_bits(s5m8767->iodev->regmap_pmic,
849 S5M8767_REG_BUCK2CTRL, 1 << 1,
850 (pdata->buck2_gpiodvs) ? (1 << 1) : (0 << 1));
851 regmap_update_bits(s5m8767->iodev->regmap_pmic,
852 S5M8767_REG_BUCK3CTRL, 1 << 1,
853 (pdata->buck3_gpiodvs) ? (1 << 1) : (0 << 1));
854 regmap_update_bits(s5m8767->iodev->regmap_pmic,
855 S5M8767_REG_BUCK4CTRL, 1 << 1,
856 (pdata->buck4_gpiodvs) ? (1 << 1) : (0 << 1));
857 }
858
859 /* Initialize GPIO DVS registers */
860 for (i = 0; i < 8; i++) {
861 if (s5m8767->buck2_gpiodvs) {
862 regmap_write(s5m8767->iodev->regmap_pmic,
863 S5M8767_REG_BUCK2DVS1 + i,
864 s5m8767->buck2_vol[i]);
865 }
866
867 if (s5m8767->buck3_gpiodvs) {
868 regmap_write(s5m8767->iodev->regmap_pmic,
869 S5M8767_REG_BUCK3DVS1 + i,
870 s5m8767->buck3_vol[i]);
871 }
872
873 if (s5m8767->buck4_gpiodvs) {
874 regmap_write(s5m8767->iodev->regmap_pmic,
875 S5M8767_REG_BUCK4DVS1 + i,
876 s5m8767->buck4_vol[i]);
877 }
878 }
879
880 if (s5m8767->buck2_ramp)
881 regmap_update_bits(s5m8767->iodev->regmap_pmic,
882 S5M8767_REG_DVSRAMP, 0x08, 0x08);
883
884 if (s5m8767->buck3_ramp)
885 regmap_update_bits(s5m8767->iodev->regmap_pmic,
886 S5M8767_REG_DVSRAMP, 0x04, 0x04);
887
888 if (s5m8767->buck4_ramp)
889 regmap_update_bits(s5m8767->iodev->regmap_pmic,
890 S5M8767_REG_DVSRAMP, 0x02, 0x02);
891
892 if (s5m8767->buck2_ramp || s5m8767->buck3_ramp
893 || s5m8767->buck4_ramp) {
894 unsigned int val;
895 switch (s5m8767->ramp_delay) {
896 case 5:
897 val = S5M8767_DVS_BUCK_RAMP_5;
898 break;
899 case 10:
900 val = S5M8767_DVS_BUCK_RAMP_10;
901 break;
902 case 25:
903 val = S5M8767_DVS_BUCK_RAMP_25;
904 break;
905 case 50:
906 val = S5M8767_DVS_BUCK_RAMP_50;
907 break;
908 case 100:
909 val = S5M8767_DVS_BUCK_RAMP_100;
910 break;
911 default:
912 val = S5M8767_DVS_BUCK_RAMP_10;
913 }
914 regmap_update_bits(s5m8767->iodev->regmap_pmic,
915 S5M8767_REG_DVSRAMP,
916 S5M8767_DVS_BUCK_RAMP_MASK,
917 val << S5M8767_DVS_BUCK_RAMP_SHIFT);
918 }
919
920 for (i = 0; i < pdata->num_regulators; i++) {
921 const struct sec_voltage_desc *desc;
922 int id = pdata->regulators[i].id;
923
924 desc = reg_voltage_map[id];
925 if (desc) {
926 regulators[id].n_voltages =
927 (desc->max - desc->min) / desc->step + 1;
928 regulators[id].min_uV = desc->min;
929 regulators[id].uV_step = desc->step;
930 regulators[id].vsel_reg =
931 s5m8767_get_vsel_reg(id, s5m8767);
932 if (id < S5M8767_BUCK1)
933 regulators[id].vsel_mask = 0x3f;
934 else
935 regulators[id].vsel_mask = 0xff;
936 }
937
938 config.dev = s5m8767->dev;
939 config.init_data = pdata->regulators[i].initdata;
940 config.driver_data = s5m8767;
941 config.regmap = iodev->regmap_pmic;
942 config.of_node = pdata->regulators[i].reg_node;
943
944 rdev[i] = devm_regulator_register(&pdev->dev, &regulators[id],
945 &config);
946 if (IS_ERR(rdev[i])) {
947 ret = PTR_ERR(rdev[i]);
948 dev_err(s5m8767->dev, "regulator init failed for %d\n",
949 id);
950 return ret;
951 }
952 }
953
954 return 0;
955 }
956
957 static const struct platform_device_id s5m8767_pmic_id[] = {
958 { "s5m8767-pmic", 0},
959 { },
960 };
961 MODULE_DEVICE_TABLE(platform, s5m8767_pmic_id);
962
963 static struct platform_driver s5m8767_pmic_driver = {
964 .driver = {
965 .name = "s5m8767-pmic",
966 .owner = THIS_MODULE,
967 },
968 .probe = s5m8767_pmic_probe,
969 .id_table = s5m8767_pmic_id,
970 };
971
972 static int __init s5m8767_pmic_init(void)
973 {
974 return platform_driver_register(&s5m8767_pmic_driver);
975 }
976 subsys_initcall(s5m8767_pmic_init);
977
978 static void __exit s5m8767_pmic_exit(void)
979 {
980 platform_driver_unregister(&s5m8767_pmic_driver);
981 }
982 module_exit(s5m8767_pmic_exit);
983
984 /* Module information */
985 MODULE_AUTHOR("Sangbeom Kim <sbkim73@samsung.com>");
986 MODULE_DESCRIPTION("SAMSUNG S5M8767 Regulator Driver");
987 MODULE_LICENSE("GPL");
Linux with added FPC-III support