2 * Copyright (c) 2009 Nuvoton technology.
3 * Wan ZongShun <mcuos.com@gmail.com>
5 * This program is free software; you can redistribute it and/or modify
6 * it under the terms of the GNU General Public License version 2 as
7 * published by the Free Software Foundation.
11 #include <linux/module.h>
12 #include <linux/init.h>
13 #include <linux/spinlock.h>
14 #include <linux/workqueue.h>
15 #include <linux/interrupt.h>
16 #include <linux/delay.h>
17 #include <linux/errno.h>
18 #include <linux/err.h>
19 #include <linux/clk.h>
20 #include <linux/device.h>
21 #include <linux/platform_device.h>
22 #include <linux/gpio.h>
24 #include <linux/slab.h>
26 #include <linux/spi/spi.h>
27 #include <linux/spi/spi_bitbang.h>
29 #include <linux/platform_data/spi-nuc900.h>
31 /* usi registers offset */
38 /* usi register bit */
39 #define ENINT (0x01 << 17)
40 #define ENFLG (0x01 << 16)
41 #define TXNUM (0x03 << 8)
42 #define TXNEG (0x01 << 2)
43 #define RXNEG (0x01 << 1)
44 #define LSB (0x01 << 10)
45 #define SELECTLEV (0x01 << 2)
46 #define SELECTPOL (0x01 << 31)
47 #define SELECTSLAVE 0x01
51 struct spi_bitbang bitbang
;
52 struct completion done
;
57 const unsigned char *tx
;
60 struct spi_master
*master
;
61 struct spi_device
*curdev
;
63 struct nuc900_spi_info
*pdata
;
68 static inline struct nuc900_spi
*to_hw(struct spi_device
*sdev
)
70 return spi_master_get_devdata(sdev
->master
);
73 static void nuc900_slave_select(struct spi_device
*spi
, unsigned int ssr
)
75 struct nuc900_spi
*hw
= to_hw(spi
);
77 unsigned int cs
= spi
->mode
& SPI_CS_HIGH
? 1 : 0;
78 unsigned int cpol
= spi
->mode
& SPI_CPOL
? 1 : 0;
81 spin_lock_irqsave(&hw
->lock
, flags
);
83 val
= __raw_readl(hw
->regs
+ USI_SSR
);
95 __raw_writel(val
, hw
->regs
+ USI_SSR
);
97 val
= __raw_readl(hw
->regs
+ USI_CNT
);
104 __raw_writel(val
, hw
->regs
+ USI_CNT
);
106 spin_unlock_irqrestore(&hw
->lock
, flags
);
109 static void nuc900_spi_chipsel(struct spi_device
*spi
, int value
)
112 case BITBANG_CS_INACTIVE
:
113 nuc900_slave_select(spi
, 0);
116 case BITBANG_CS_ACTIVE
:
117 nuc900_slave_select(spi
, 1);
122 static void nuc900_spi_setup_txnum(struct nuc900_spi
*hw
,
128 spin_lock_irqsave(&hw
->lock
, flags
);
130 val
= __raw_readl(hw
->regs
+ USI_CNT
);
135 val
|= txnum
<< 0x08;
137 __raw_writel(val
, hw
->regs
+ USI_CNT
);
139 spin_unlock_irqrestore(&hw
->lock
, flags
);
143 static void nuc900_spi_setup_txbitlen(struct nuc900_spi
*hw
,
144 unsigned int txbitlen
)
149 spin_lock_irqsave(&hw
->lock
, flags
);
151 val
= __raw_readl(hw
->regs
+ USI_CNT
);
153 val
|= (txbitlen
<< 0x03);
155 __raw_writel(val
, hw
->regs
+ USI_CNT
);
157 spin_unlock_irqrestore(&hw
->lock
, flags
);
160 static void nuc900_spi_gobusy(struct nuc900_spi
*hw
)
165 spin_lock_irqsave(&hw
->lock
, flags
);
167 val
= __raw_readl(hw
->regs
+ USI_CNT
);
171 __raw_writel(val
, hw
->regs
+ USI_CNT
);
173 spin_unlock_irqrestore(&hw
->lock
, flags
);
176 static inline unsigned int hw_txbyte(struct nuc900_spi
*hw
, int count
)
178 return hw
->tx
? hw
->tx
[count
] : 0;
181 static int nuc900_spi_txrx(struct spi_device
*spi
, struct spi_transfer
*t
)
183 struct nuc900_spi
*hw
= to_hw(spi
);
190 __raw_writel(hw_txbyte(hw
, 0x0), hw
->regs
+ USI_TX0
);
192 nuc900_spi_gobusy(hw
);
194 wait_for_completion(&hw
->done
);
199 static irqreturn_t
nuc900_spi_irq(int irq
, void *dev
)
201 struct nuc900_spi
*hw
= dev
;
203 unsigned int count
= hw
->count
;
205 status
= __raw_readl(hw
->regs
+ USI_CNT
);
206 __raw_writel(status
, hw
->regs
+ USI_CNT
);
208 if (status
& ENFLG
) {
212 hw
->rx
[count
] = __raw_readl(hw
->regs
+ USI_RX0
);
215 if (count
< hw
->len
) {
216 __raw_writel(hw_txbyte(hw
, count
), hw
->regs
+ USI_TX0
);
217 nuc900_spi_gobusy(hw
);
229 static void nuc900_tx_edge(struct nuc900_spi
*hw
, unsigned int edge
)
234 spin_lock_irqsave(&hw
->lock
, flags
);
236 val
= __raw_readl(hw
->regs
+ USI_CNT
);
242 __raw_writel(val
, hw
->regs
+ USI_CNT
);
244 spin_unlock_irqrestore(&hw
->lock
, flags
);
247 static void nuc900_rx_edge(struct nuc900_spi
*hw
, unsigned int edge
)
252 spin_lock_irqsave(&hw
->lock
, flags
);
254 val
= __raw_readl(hw
->regs
+ USI_CNT
);
260 __raw_writel(val
, hw
->regs
+ USI_CNT
);
262 spin_unlock_irqrestore(&hw
->lock
, flags
);
265 static void nuc900_send_first(struct nuc900_spi
*hw
, unsigned int lsb
)
270 spin_lock_irqsave(&hw
->lock
, flags
);
272 val
= __raw_readl(hw
->regs
+ USI_CNT
);
278 __raw_writel(val
, hw
->regs
+ USI_CNT
);
280 spin_unlock_irqrestore(&hw
->lock
, flags
);
283 static void nuc900_set_sleep(struct nuc900_spi
*hw
, unsigned int sleep
)
288 spin_lock_irqsave(&hw
->lock
, flags
);
290 val
= __raw_readl(hw
->regs
+ USI_CNT
);
293 val
|= (sleep
<< 12);
295 val
&= ~(0x0f << 12);
296 __raw_writel(val
, hw
->regs
+ USI_CNT
);
298 spin_unlock_irqrestore(&hw
->lock
, flags
);
301 static void nuc900_enable_int(struct nuc900_spi
*hw
)
306 spin_lock_irqsave(&hw
->lock
, flags
);
308 val
= __raw_readl(hw
->regs
+ USI_CNT
);
312 __raw_writel(val
, hw
->regs
+ USI_CNT
);
314 spin_unlock_irqrestore(&hw
->lock
, flags
);
317 static void nuc900_set_divider(struct nuc900_spi
*hw
)
319 __raw_writel(hw
->pdata
->divider
, hw
->regs
+ USI_DIV
);
322 static void nuc900_init_spi(struct nuc900_spi
*hw
)
325 spin_lock_init(&hw
->lock
);
327 nuc900_tx_edge(hw
, hw
->pdata
->txneg
);
328 nuc900_rx_edge(hw
, hw
->pdata
->rxneg
);
329 nuc900_send_first(hw
, hw
->pdata
->lsb
);
330 nuc900_set_sleep(hw
, hw
->pdata
->sleep
);
331 nuc900_spi_setup_txbitlen(hw
, hw
->pdata
->txbitlen
);
332 nuc900_spi_setup_txnum(hw
, hw
->pdata
->txnum
);
333 nuc900_set_divider(hw
);
334 nuc900_enable_int(hw
);
337 static int nuc900_spi_probe(struct platform_device
*pdev
)
339 struct nuc900_spi
*hw
;
340 struct spi_master
*master
;
343 master
= spi_alloc_master(&pdev
->dev
, sizeof(struct nuc900_spi
));
344 if (master
== NULL
) {
345 dev_err(&pdev
->dev
, "No memory for spi_master\n");
349 hw
= spi_master_get_devdata(master
);
351 hw
->pdata
= dev_get_platdata(&pdev
->dev
);
352 hw
->dev
= &pdev
->dev
;
354 if (hw
->pdata
== NULL
) {
355 dev_err(&pdev
->dev
, "No platform data supplied\n");
360 platform_set_drvdata(pdev
, hw
);
361 init_completion(&hw
->done
);
363 master
->mode_bits
= SPI_CPOL
| SPI_CPHA
| SPI_CS_HIGH
;
365 master
->mode_bits
|= SPI_LSB_FIRST
;
366 master
->num_chipselect
= hw
->pdata
->num_cs
;
367 master
->bus_num
= hw
->pdata
->bus_num
;
368 hw
->bitbang
.master
= hw
->master
;
369 hw
->bitbang
.chipselect
= nuc900_spi_chipsel
;
370 hw
->bitbang
.txrx_bufs
= nuc900_spi_txrx
;
372 hw
->res
= platform_get_resource(pdev
, IORESOURCE_MEM
, 0);
373 hw
->regs
= devm_ioremap_resource(&pdev
->dev
, hw
->res
);
374 if (IS_ERR(hw
->regs
)) {
375 err
= PTR_ERR(hw
->regs
);
379 hw
->irq
= platform_get_irq(pdev
, 0);
381 dev_err(&pdev
->dev
, "No IRQ specified\n");
386 err
= devm_request_irq(&pdev
->dev
, hw
->irq
, nuc900_spi_irq
, 0,
389 dev_err(&pdev
->dev
, "Cannot claim IRQ\n");
393 hw
->clk
= devm_clk_get(&pdev
->dev
, "spi");
394 if (IS_ERR(hw
->clk
)) {
395 dev_err(&pdev
->dev
, "No clock for device\n");
396 err
= PTR_ERR(hw
->clk
);
400 mfp_set_groupg(&pdev
->dev
, NULL
);
403 err
= spi_bitbang_start(&hw
->bitbang
);
405 dev_err(&pdev
->dev
, "Failed to register SPI master\n");
412 clk_disable(hw
->clk
);
414 spi_master_put(hw
->master
);
418 static int nuc900_spi_remove(struct platform_device
*dev
)
420 struct nuc900_spi
*hw
= platform_get_drvdata(dev
);
422 spi_bitbang_stop(&hw
->bitbang
);
423 clk_disable(hw
->clk
);
424 spi_master_put(hw
->master
);
428 static struct platform_driver nuc900_spi_driver
= {
429 .probe
= nuc900_spi_probe
,
430 .remove
= nuc900_spi_remove
,
432 .name
= "nuc900-spi",
433 .owner
= THIS_MODULE
,
436 module_platform_driver(nuc900_spi_driver
);
438 MODULE_AUTHOR("Wan ZongShun <mcuos.com@gmail.com>");
439 MODULE_DESCRIPTION("nuc900 spi driver!");
440 MODULE_LICENSE("GPL");
441 MODULE_ALIAS("platform:nuc900-spi");