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PM / sleep: Asynchronous threads for suspend_noirq
[linux/fpc-iii.git] / drivers / staging / slicoss / slicoss.c
blob1426ca49bfe824e16c7a8695c0738dd62212b0ea
1 /**************************************************************************
2 *
3 * Copyright 2000-2006 Alacritech, Inc. All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
7 * are met:
8 *
9 * 1. Redistributions of source code must retain the above copyright
10 * notice, this list of conditions and the following disclaimer.
11 * 2. Redistributions in binary form must reproduce the above
12 * copyright notice, this list of conditions and the following
13 * disclaimer in the documentation and/or other materials provided
14 * with the distribution.
15 *
16 * Alternatively, this software may be distributed under the terms of the
17 * GNU General Public License ("GPL") version 2 as published by the Free
18 * Software Foundation.
19 *
20 * THIS SOFTWARE IS PROVIDED BY ALACRITECH, INC. ``AS IS'' AND ANY
21 * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
22 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
23 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL ALACRITECH, INC. OR
24 * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
25 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
26 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
27 * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
28 * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
29 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT
30 * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
31 * SUCH DAMAGE.
32 *
33 * The views and conclusions contained in the software and documentation
34 * are those of the authors and should not be interpreted as representing
35 * official policies, either expressed or implied, of Alacritech, Inc.
36 *
37 **************************************************************************/
38
39 /*
40 * FILENAME: slicoss.c
41 *
42 * The SLICOSS driver for Alacritech's IS-NIC products.
43 *
44 * This driver is supposed to support:
45 *
46 * Mojave cards (single port PCI Gigabit) both copper and fiber
47 * Oasis cards (single and dual port PCI-x Gigabit) copper and fiber
48 * Kalahari cards (dual and quad port PCI-e Gigabit) copper and fiber
49 *
50 * The driver was actually tested on Oasis and Kalahari cards.
51 *
52 *
53 * NOTE: This is the standard, non-accelerated version of Alacritech's
54 * IS-NIC driver.
55 */
56
57
58 #define KLUDGE_FOR_4GB_BOUNDARY 1
59 #define DEBUG_MICROCODE 1
60 #define DBG 1
61 #define SLIC_INTERRUPT_PROCESS_LIMIT 1
62 #define SLIC_OFFLOAD_IP_CHECKSUM 1
63 #define STATS_TIMER_INTERVAL 2
64 #define PING_TIMER_INTERVAL 1
65 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
66
67 #include <linux/kernel.h>
68 #include <linux/string.h>
69 #include <linux/errno.h>
70 #include <linux/ioport.h>
71 #include <linux/slab.h>
72 #include <linux/interrupt.h>
73 #include <linux/timer.h>
74 #include <linux/pci.h>
75 #include <linux/spinlock.h>
76 #include <linux/init.h>
77 #include <linux/bitops.h>
78 #include <linux/io.h>
79 #include <linux/netdevice.h>
80 #include <linux/crc32.h>
81 #include <linux/etherdevice.h>
82 #include <linux/skbuff.h>
83 #include <linux/delay.h>
84 #include <linux/debugfs.h>
85 #include <linux/seq_file.h>
86 #include <linux/kthread.h>
87 #include <linux/module.h>
88 #include <linux/moduleparam.h>
89
90 #include <linux/firmware.h>
91 #include <linux/types.h>
92 #include <linux/dma-mapping.h>
93 #include <linux/mii.h>
94 #include <linux/if_vlan.h>
95 #include <asm/unaligned.h>
96
97 #include <linux/ethtool.h>
98 #include <linux/uaccess.h>
99 #include "slichw.h"
100 #include "slic.h"
101
102 static uint slic_first_init = 1;
103 static char *slic_banner = "Alacritech SLIC Technology(tm) Server "\
104 "and Storage Accelerator (Non-Accelerated)";
105
106 static char *slic_proc_version = "2.0.351 2006/07/14 12:26:00";
107 static char *slic_product_name = "SLIC Technology(tm) Server "\
108 "and Storage Accelerator (Non-Accelerated)";
109 static char *slic_vendor = "Alacritech, Inc.";
110
111 static int slic_debug = 1;
112 static int debug = -1;
113 static struct net_device *head_netdevice;
114
115 static struct base_driver slic_global = { {}, 0, 0, 0, 1, NULL, NULL };
116 static int intagg_delay = 100;
117 static u32 dynamic_intagg;
118 static unsigned int rcv_count;
119 static struct dentry *slic_debugfs;
120
121 #define DRV_NAME "slicoss"
122 #define DRV_VERSION "2.0.1"
123 #define DRV_AUTHOR "Alacritech, Inc. Engineering"
124 #define DRV_DESCRIPTION "Alacritech SLIC Techonology(tm) "\
125 "Non-Accelerated Driver"
126 #define DRV_COPYRIGHT "Copyright 2000-2006 Alacritech, Inc. "\
127 "All rights reserved."
128 #define PFX DRV_NAME " "
129
130 MODULE_AUTHOR(DRV_AUTHOR);
131 MODULE_DESCRIPTION(DRV_DESCRIPTION);
132 MODULE_LICENSE("Dual BSD/GPL");
133
134 module_param(dynamic_intagg, int, 0);
135 MODULE_PARM_DESC(dynamic_intagg, "Dynamic Interrupt Aggregation Setting");
136 module_param(intagg_delay, int, 0);
137 MODULE_PARM_DESC(intagg_delay, "uSec Interrupt Aggregation Delay");
138
139 static const struct pci_device_id slic_pci_tbl[] = {
140 { PCI_DEVICE(PCI_VENDOR_ID_ALACRITECH, SLIC_1GB_DEVICE_ID) },
141 { PCI_DEVICE(PCI_VENDOR_ID_ALACRITECH, SLIC_2GB_DEVICE_ID) },
142 { 0 }
143 };
144
145 MODULE_DEVICE_TABLE(pci, slic_pci_tbl);
146
147 #define SLIC_GET_SLIC_HANDLE(_adapter, _pslic_handle) \
148 { \
149 spin_lock_irqsave(&_adapter->handle_lock.lock, \
150 _adapter->handle_lock.flags); \
151 _pslic_handle = _adapter->pfree_slic_handles; \
152 if (_pslic_handle) { \
153 _adapter->pfree_slic_handles = _pslic_handle->next; \
154 } \
155 spin_unlock_irqrestore(&_adapter->handle_lock.lock, \
156 _adapter->handle_lock.flags); \
157 }
158
159 #define SLIC_FREE_SLIC_HANDLE(_adapter, _pslic_handle) \
160 { \
161 _pslic_handle->type = SLIC_HANDLE_FREE; \
162 spin_lock_irqsave(&_adapter->handle_lock.lock, \
163 _adapter->handle_lock.flags); \
164 _pslic_handle->next = _adapter->pfree_slic_handles; \
165 _adapter->pfree_slic_handles = _pslic_handle; \
166 spin_unlock_irqrestore(&_adapter->handle_lock.lock, \
167 _adapter->handle_lock.flags); \
168 }
169
170 static inline void slic_reg32_write(void __iomem *reg, u32 value, bool flush)
171 {
172 writel(value, reg);
173 if (flush)
174 mb();
175 }
176
177 static inline void slic_reg64_write(struct adapter *adapter, void __iomem *reg,
178 u32 value, void __iomem *regh, u32 paddrh,
179 bool flush)
180 {
181 spin_lock_irqsave(&adapter->bit64reglock.lock,
182 adapter->bit64reglock.flags);
183 if (paddrh != adapter->curaddrupper) {
184 adapter->curaddrupper = paddrh;
185 writel(paddrh, regh);
186 }
187 writel(value, reg);
188 if (flush)
189 mb();
190 spin_unlock_irqrestore(&adapter->bit64reglock.lock,
191 adapter->bit64reglock.flags);
192 }
193
194 static void slic_mcast_set_bit(struct adapter *adapter, char *address)
195 {
196 unsigned char crcpoly;
197
198 /* Get the CRC polynomial for the mac address */
199 /* we use bits 1-8 (lsb), bitwise reversed,
200 * msb (= lsb bit 0 before bitrev) is automatically discarded */
201 crcpoly = (ether_crc(ETH_ALEN, address)>>23);
202
203 /* We only have space on the SLIC for 64 entries. Lop
204 * off the top two bits. (2^6 = 64)
205 */
206 crcpoly &= 0x3F;
207
208 /* OR in the new bit into our 64 bit mask. */
209 adapter->mcastmask |= (u64) 1 << crcpoly;
210 }
211
212 static void slic_mcast_set_mask(struct adapter *adapter)
213 {
214 __iomem struct slic_regs *slic_regs = adapter->slic_regs;
215
216 if (adapter->macopts & (MAC_ALLMCAST | MAC_PROMISC)) {
217 /* Turn on all multicast addresses. We have to do this for
218 * promiscuous mode as well as ALLMCAST mode. It saves the
219 * Microcode from having to keep state about the MAC
220 * configuration.
221 */
222 slic_reg32_write(&slic_regs->slic_mcastlow, 0xFFFFFFFF, FLUSH);
223 slic_reg32_write(&slic_regs->slic_mcasthigh, 0xFFFFFFFF,
224 FLUSH);
225 } else {
226 /* Commit our multicast mast to the SLIC by writing to the
227 * multicast address mask registers
228 */
229 slic_reg32_write(&slic_regs->slic_mcastlow,
230 (u32)(adapter->mcastmask & 0xFFFFFFFF), FLUSH);
231 slic_reg32_write(&slic_regs->slic_mcasthigh,
232 (u32)((adapter->mcastmask >> 32) & 0xFFFFFFFF), FLUSH);
233 }
234 }
235
236 static void slic_timer_ping(ulong dev)
237 {
238 struct adapter *adapter;
239 struct sliccard *card;
240
241 adapter = netdev_priv((struct net_device *)dev);
242 card = adapter->card;
243
244 adapter->pingtimer.expires = jiffies + (PING_TIMER_INTERVAL * HZ);
245 add_timer(&adapter->pingtimer);
246 }
247
248 static void slic_unmap_mmio_space(struct adapter *adapter)
249 {
250 if (adapter->slic_regs)
251 iounmap(adapter->slic_regs);
252 adapter->slic_regs = NULL;
253 }
254
255 /*
256 * slic_link_config
257 *
258 * Write phy control to configure link duplex/speed
259 *
260 */
261 static void slic_link_config(struct adapter *adapter,
262 u32 linkspeed, u32 linkduplex)
263 {
264 u32 __iomem *wphy;
265 u32 speed;
266 u32 duplex;
267 u32 phy_config;
268 u32 phy_advreg;
269 u32 phy_gctlreg;
270
271 if (adapter->state != ADAPT_UP)
272 return;
273
274 if (linkspeed > LINK_1000MB)
275 linkspeed = LINK_AUTOSPEED;
276 if (linkduplex > LINK_AUTOD)
277 linkduplex = LINK_AUTOD;
278
279 wphy = &adapter->slic_regs->slic_wphy;
280
281 if ((linkspeed == LINK_AUTOSPEED) || (linkspeed == LINK_1000MB)) {
282 if (adapter->flags & ADAPT_FLAGS_FIBERMEDIA) {
283 /* We've got a fiber gigabit interface, and register
284 * 4 is different in fiber mode than in copper mode
285 */
286
287 /* advertise FD only @1000 Mb */
288 phy_advreg = (MIICR_REG_4 | (PAR_ADV1000XFD));
289 /* enable PAUSE frames */
290 phy_advreg |= PAR_ASYMPAUSE_FIBER;
291 slic_reg32_write(wphy, phy_advreg, FLUSH);
292
293 if (linkspeed == LINK_AUTOSPEED) {
294 /* reset phy, enable auto-neg */
295 phy_config =
296 (MIICR_REG_PCR |
297 (PCR_RESET | PCR_AUTONEG |
298 PCR_AUTONEG_RST));
299 slic_reg32_write(wphy, phy_config, FLUSH);
300 } else { /* forced 1000 Mb FD*/
301 /* power down phy to break link
302 this may not work) */
303 phy_config = (MIICR_REG_PCR | PCR_POWERDOWN);
304 slic_reg32_write(wphy, phy_config, FLUSH);
305 /* wait, Marvell says 1 sec,
306 try to get away with 10 ms */
307 mdelay(10);
308
309 /* disable auto-neg, set speed/duplex,
310 soft reset phy, powerup */
311 phy_config =
312 (MIICR_REG_PCR |
313 (PCR_RESET | PCR_SPEED_1000 |
314 PCR_DUPLEX_FULL));
315 slic_reg32_write(wphy, phy_config, FLUSH);
316 }
317 } else { /* copper gigabit */
318
319 /* Auto-Negotiate or 1000 Mb must be auto negotiated
320 * We've got a copper gigabit interface, and
321 * register 4 is different in copper mode than
322 * in fiber mode
323 */
324 if (linkspeed == LINK_AUTOSPEED) {
325 /* advertise 10/100 Mb modes */
326 phy_advreg =
327 (MIICR_REG_4 |
328 (PAR_ADV100FD | PAR_ADV100HD | PAR_ADV10FD
329 | PAR_ADV10HD));
330 } else {
331 /* linkspeed == LINK_1000MB -
332 don't advertise 10/100 Mb modes */
333 phy_advreg = MIICR_REG_4;
334 }
335 /* enable PAUSE frames */
336 phy_advreg |= PAR_ASYMPAUSE;
337 /* required by the Cicada PHY */
338 phy_advreg |= PAR_802_3;
339 slic_reg32_write(wphy, phy_advreg, FLUSH);
340 /* advertise FD only @1000 Mb */
341 phy_gctlreg = (MIICR_REG_9 | (PGC_ADV1000FD));
342 slic_reg32_write(wphy, phy_gctlreg, FLUSH);
343
344 if (adapter->subsysid != SLIC_1GB_CICADA_SUBSYS_ID) {
345 /* if a Marvell PHY
346 enable auto crossover */
347 phy_config =
348 (MIICR_REG_16 | (MRV_REG16_XOVERON));
349 slic_reg32_write(wphy, phy_config, FLUSH);
350
351 /* reset phy, enable auto-neg */
352 phy_config =
353 (MIICR_REG_PCR |
354 (PCR_RESET | PCR_AUTONEG |
355 PCR_AUTONEG_RST));
356 slic_reg32_write(wphy, phy_config, FLUSH);
357 } else { /* it's a Cicada PHY */
358 /* enable and restart auto-neg (don't reset) */
359 phy_config =
360 (MIICR_REG_PCR |
361 (PCR_AUTONEG | PCR_AUTONEG_RST));
362 slic_reg32_write(wphy, phy_config, FLUSH);
363 }
364 }
365 } else {
366 /* Forced 10/100 */
367 if (linkspeed == LINK_10MB)
368 speed = 0;
369 else
370 speed = PCR_SPEED_100;
371 if (linkduplex == LINK_HALFD)
372 duplex = 0;
373 else
374 duplex = PCR_DUPLEX_FULL;
375
376 if (adapter->subsysid != SLIC_1GB_CICADA_SUBSYS_ID) {
377 /* if a Marvell PHY
378 disable auto crossover */
379 phy_config = (MIICR_REG_16 | (MRV_REG16_XOVEROFF));
380 slic_reg32_write(wphy, phy_config, FLUSH);
381 }
382
383 /* power down phy to break link (this may not work) */
384 phy_config = (MIICR_REG_PCR | (PCR_POWERDOWN | speed | duplex));
385 slic_reg32_write(wphy, phy_config, FLUSH);
386
387 /* wait, Marvell says 1 sec, try to get away with 10 ms */
388 mdelay(10);
389
390 if (adapter->subsysid != SLIC_1GB_CICADA_SUBSYS_ID) {
391 /* if a Marvell PHY
392 disable auto-neg, set speed,
393 soft reset phy, powerup */
394 phy_config =
395 (MIICR_REG_PCR | (PCR_RESET | speed | duplex));
396 slic_reg32_write(wphy, phy_config, FLUSH);
397 } else { /* it's a Cicada PHY */
398 /* disable auto-neg, set speed, powerup */
399 phy_config = (MIICR_REG_PCR | (speed | duplex));
400 slic_reg32_write(wphy, phy_config, FLUSH);
401 }
402 }
403 }
404
405 static int slic_card_download_gbrcv(struct adapter *adapter)
406 {
407 const struct firmware *fw;
408 const char *file = "";
409 int ret;
410 __iomem struct slic_regs *slic_regs = adapter->slic_regs;
411 u32 codeaddr;
412 u32 instruction;
413 int index = 0;
414 u32 rcvucodelen = 0;
415
416 switch (adapter->devid) {
417 case SLIC_2GB_DEVICE_ID:
418 file = "slicoss/oasisrcvucode.sys";
419 break;
420 case SLIC_1GB_DEVICE_ID:
421 file = "slicoss/gbrcvucode.sys";
422 break;
423 default:
424 return -ENOENT;
425 }
426
427 ret = request_firmware(&fw, file, &adapter->pcidev->dev);
428 if (ret) {
429 dev_err(&adapter->pcidev->dev,
430 "SLICOSS: Failed to load firmware %s\n", file);
431 return ret;
432 }
433
434 rcvucodelen = *(u32 *)(fw->data + index);
435 index += 4;
436 switch (adapter->devid) {
437 case SLIC_2GB_DEVICE_ID:
438 if (rcvucodelen != OasisRcvUCodeLen) {
439 release_firmware(fw);
440 return -EINVAL;
441 }
442 break;
443 case SLIC_1GB_DEVICE_ID:
444 if (rcvucodelen != GBRcvUCodeLen) {
445 release_firmware(fw);
446 return -EINVAL;
447 }
448 break;
449 }
450 /* start download */
451 slic_reg32_write(&slic_regs->slic_rcv_wcs, SLIC_RCVWCS_BEGIN, FLUSH);
452 /* download the rcv sequencer ucode */
453 for (codeaddr = 0; codeaddr < rcvucodelen; codeaddr++) {
454 /* write out instruction address */
455 slic_reg32_write(&slic_regs->slic_rcv_wcs, codeaddr, FLUSH);
456
457 instruction = *(u32 *)(fw->data + index);
458 index += 4;
459 /* write out the instruction data low addr */
460 slic_reg32_write(&slic_regs->slic_rcv_wcs, instruction, FLUSH);
461
462 instruction = *(u8 *)(fw->data + index);
463 index++;
464 /* write out the instruction data high addr */
465 slic_reg32_write(&slic_regs->slic_rcv_wcs, (u8)instruction,
466 FLUSH);
467 }
468
469 /* download finished */
470 release_firmware(fw);
471 slic_reg32_write(&slic_regs->slic_rcv_wcs, SLIC_RCVWCS_FINISH, FLUSH);
472 return 0;
473 }
474
475 MODULE_FIRMWARE("slicoss/oasisrcvucode.sys");
476 MODULE_FIRMWARE("slicoss/gbrcvucode.sys");
477
478 static int slic_card_download(struct adapter *adapter)
479 {
480 const struct firmware *fw;
481 const char *file = "";
482 int ret;
483 u32 section;
484 int thissectionsize;
485 int codeaddr;
486 __iomem struct slic_regs *slic_regs = adapter->slic_regs;
487 u32 instruction;
488 u32 baseaddress;
489 u32 i;
490 u32 numsects = 0;
491 u32 sectsize[3];
492 u32 sectstart[3];
493 int ucode_start, index = 0;
494
495 switch (adapter->devid) {
496 case SLIC_2GB_DEVICE_ID:
497 file = "slicoss/oasisdownload.sys";
498 break;
499 case SLIC_1GB_DEVICE_ID:
500 file = "slicoss/gbdownload.sys";
501 break;
502 default:
503 return -ENOENT;
504 }
505 ret = request_firmware(&fw, file, &adapter->pcidev->dev);
506 if (ret) {
507 dev_err(&adapter->pcidev->dev,
508 "SLICOSS: Failed to load firmware %s\n", file);
509 return ret;
510 }
511 numsects = *(u32 *)(fw->data + index);
512 index += 4;
513 for (i = 0; i < numsects; i++) {
514 sectsize[i] = *(u32 *)(fw->data + index);
515 index += 4;
516 }
517 for (i = 0; i < numsects; i++) {
518 sectstart[i] = *(u32 *)(fw->data + index);
519 index += 4;
520 }
521 ucode_start = index;
522 instruction = *(u32 *)(fw->data + index);
523 index += 4;
524 for (section = 0; section < numsects; section++) {
525 baseaddress = sectstart[section];
526 thissectionsize = sectsize[section] >> 3;
527
528 for (codeaddr = 0; codeaddr < thissectionsize; codeaddr++) {
529 /* Write out instruction address */
530 slic_reg32_write(&slic_regs->slic_wcs,
531 baseaddress + codeaddr, FLUSH);
532 /* Write out instruction to low addr */
533 slic_reg32_write(&slic_regs->slic_wcs, instruction, FLUSH);
534 instruction = *(u32 *)(fw->data + index);
535 index += 4;
536
537 /* Write out instruction to high addr */
538 slic_reg32_write(&slic_regs->slic_wcs, instruction, FLUSH);
539 instruction = *(u32 *)(fw->data + index);
540 index += 4;
541 }
542 }
543 index = ucode_start;
544 for (section = 0; section < numsects; section++) {
545 instruction = *(u32 *)(fw->data + index);
546 baseaddress = sectstart[section];
547 if (baseaddress < 0x8000)
548 continue;
549 thissectionsize = sectsize[section] >> 3;
550
551 for (codeaddr = 0; codeaddr < thissectionsize; codeaddr++) {
552 /* Write out instruction address */
553 slic_reg32_write(&slic_regs->slic_wcs,
554 SLIC_WCS_COMPARE | (baseaddress + codeaddr),
555 FLUSH);
556 /* Write out instruction to low addr */
557 slic_reg32_write(&slic_regs->slic_wcs, instruction,
558 FLUSH);
559 instruction = *(u32 *)(fw->data + index);
560 index += 4;
561 /* Write out instruction to high addr */
562 slic_reg32_write(&slic_regs->slic_wcs, instruction,
563 FLUSH);
564 instruction = *(u32 *)(fw->data + index);
565 index += 4;
566
567 /* Check SRAM location zero. If it is non-zero. Abort.*/
568 /* failure = readl((u32 __iomem *)&slic_regs->slic_reset);
569 if (failure) {
570 release_firmware(fw);
571 return -EIO;
572 }*/
573 }
574 }
575 release_firmware(fw);
576 /* Everything OK, kick off the card */
577 mdelay(10);
578 slic_reg32_write(&slic_regs->slic_wcs, SLIC_WCS_START, FLUSH);
579
580 /* stall for 20 ms, long enough for ucode to init card
581 and reach mainloop */
582 mdelay(20);
583
584 return 0;
585 }
586
587 MODULE_FIRMWARE("slicoss/oasisdownload.sys");
588 MODULE_FIRMWARE("slicoss/gbdownload.sys");
589
590 static void slic_adapter_set_hwaddr(struct adapter *adapter)
591 {
592 struct sliccard *card = adapter->card;
593
594 if ((adapter->card) && (card->config_set)) {
595 memcpy(adapter->macaddr,
596 card->config.MacInfo[adapter->functionnumber].macaddrA,
597 sizeof(struct slic_config_mac));
598 if (is_zero_ether_addr(adapter->currmacaddr))
599 memcpy(adapter->currmacaddr, adapter->macaddr,
600 ETH_ALEN);
601 if (adapter->netdev)
602 memcpy(adapter->netdev->dev_addr, adapter->currmacaddr,
603 ETH_ALEN);
604 }
605 }
606
607 static void slic_intagg_set(struct adapter *adapter, u32 value)
608 {
609 slic_reg32_write(&adapter->slic_regs->slic_intagg, value, FLUSH);
610 adapter->card->loadlevel_current = value;
611 }
612
613 static void slic_soft_reset(struct adapter *adapter)
614 {
615 if (adapter->card->state == CARD_UP) {
616 slic_reg32_write(&adapter->slic_regs->slic_quiesce, 0, FLUSH);
617 mdelay(1);
618 }
619
620 slic_reg32_write(&adapter->slic_regs->slic_reset, SLIC_RESET_MAGIC,
621 FLUSH);
622 mdelay(1);
623 }
624
625 static void slic_mac_address_config(struct adapter *adapter)
626 {
627 u32 value;
628 u32 value2;
629 __iomem struct slic_regs *slic_regs = adapter->slic_regs;
630
631 value = *(u32 *) &adapter->currmacaddr[2];
632 value = ntohl(value);
633 slic_reg32_write(&slic_regs->slic_wraddral, value, FLUSH);
634 slic_reg32_write(&slic_regs->slic_wraddrbl, value, FLUSH);
635
636 value2 = (u32) ((adapter->currmacaddr[0] << 8 |
637 adapter->currmacaddr[1]) & 0xFFFF);
638
639 slic_reg32_write(&slic_regs->slic_wraddrah, value2, FLUSH);
640 slic_reg32_write(&slic_regs->slic_wraddrbh, value2, FLUSH);
641
642 /* Write our multicast mask out to the card. This is done */
643 /* here in addition to the slic_mcast_addr_set routine */
644 /* because ALL_MCAST may have been enabled or disabled */
645 slic_mcast_set_mask(adapter);
646 }
647
648 static void slic_mac_config(struct adapter *adapter)
649 {
650 u32 value;
651 __iomem struct slic_regs *slic_regs = adapter->slic_regs;
652
653 /* Setup GMAC gaps */
654 if (adapter->linkspeed == LINK_1000MB) {
655 value = ((GMCR_GAPBB_1000 << GMCR_GAPBB_SHIFT) |
656 (GMCR_GAPR1_1000 << GMCR_GAPR1_SHIFT) |
657 (GMCR_GAPR2_1000 << GMCR_GAPR2_SHIFT));
658 } else {
659 value = ((GMCR_GAPBB_100 << GMCR_GAPBB_SHIFT) |
660 (GMCR_GAPR1_100 << GMCR_GAPR1_SHIFT) |
661 (GMCR_GAPR2_100 << GMCR_GAPR2_SHIFT));
662 }
663
664 /* enable GMII */
665 if (adapter->linkspeed == LINK_1000MB)
666 value |= GMCR_GBIT;
667
668 /* enable fullduplex */
669 if ((adapter->linkduplex == LINK_FULLD)
670 || (adapter->macopts & MAC_LOOPBACK)) {
671 value |= GMCR_FULLD;
672 }
673
674 /* write mac config */
675 slic_reg32_write(&slic_regs->slic_wmcfg, value, FLUSH);
676
677 /* setup mac addresses */
678 slic_mac_address_config(adapter);
679 }
680
681 static void slic_config_set(struct adapter *adapter, bool linkchange)
682 {
683 u32 value;
684 u32 RcrReset;
685 __iomem struct slic_regs *slic_regs = adapter->slic_regs;
686
687 if (linkchange) {
688 /* Setup MAC */
689 slic_mac_config(adapter);
690 RcrReset = GRCR_RESET;
691 } else {
692 slic_mac_address_config(adapter);
693 RcrReset = 0;
694 }
695
696 if (adapter->linkduplex == LINK_FULLD) {
697 /* setup xmtcfg */
698 value = (GXCR_RESET | /* Always reset */
699 GXCR_XMTEN | /* Enable transmit */
700 GXCR_PAUSEEN); /* Enable pause */
701
702 slic_reg32_write(&slic_regs->slic_wxcfg, value, FLUSH);
703
704 /* Setup rcvcfg last */
705 value = (RcrReset | /* Reset, if linkchange */
706 GRCR_CTLEN | /* Enable CTL frames */
707 GRCR_ADDRAEN | /* Address A enable */
708 GRCR_RCVBAD | /* Rcv bad frames */
709 (GRCR_HASHSIZE << GRCR_HASHSIZE_SHIFT));
710 } else {
711 /* setup xmtcfg */
712 value = (GXCR_RESET | /* Always reset */
713 GXCR_XMTEN); /* Enable transmit */
714
715 slic_reg32_write(&slic_regs->slic_wxcfg, value, FLUSH);
716
717 /* Setup rcvcfg last */
718 value = (RcrReset | /* Reset, if linkchange */
719 GRCR_ADDRAEN | /* Address A enable */
720 GRCR_RCVBAD | /* Rcv bad frames */
721 (GRCR_HASHSIZE << GRCR_HASHSIZE_SHIFT));
722 }
723
724 if (adapter->state != ADAPT_DOWN) {
725 /* Only enable receive if we are restarting or running */
726 value |= GRCR_RCVEN;
727 }
728
729 if (adapter->macopts & MAC_PROMISC)
730 value |= GRCR_RCVALL;
731
732 slic_reg32_write(&slic_regs->slic_wrcfg, value, FLUSH);
733 }
734
735 /*
736 * Turn off RCV and XMT, power down PHY
737 */
738 static void slic_config_clear(struct adapter *adapter)
739 {
740 u32 value;
741 u32 phy_config;
742 __iomem struct slic_regs *slic_regs = adapter->slic_regs;
743
744 /* Setup xmtcfg */
745 value = (GXCR_RESET | /* Always reset */
746 GXCR_PAUSEEN); /* Enable pause */
747
748 slic_reg32_write(&slic_regs->slic_wxcfg, value, FLUSH);
749
750 value = (GRCR_RESET | /* Always reset */
751 GRCR_CTLEN | /* Enable CTL frames */
752 GRCR_ADDRAEN | /* Address A enable */
753 (GRCR_HASHSIZE << GRCR_HASHSIZE_SHIFT));
754
755 slic_reg32_write(&slic_regs->slic_wrcfg, value, FLUSH);
756
757 /* power down phy */
758 phy_config = (MIICR_REG_PCR | (PCR_POWERDOWN));
759 slic_reg32_write(&slic_regs->slic_wphy, phy_config, FLUSH);
760 }
761
762 static bool slic_mac_filter(struct adapter *adapter,
763 struct ether_header *ether_frame)
764 {
765 struct net_device *netdev = adapter->netdev;
766 u32 opts = adapter->macopts;
767
768 if (opts & MAC_PROMISC)
769 return true;
770
771 if (is_broadcast_ether_addr(ether_frame->ether_dhost)) {
772 if (opts & MAC_BCAST) {
773 adapter->rcv_broadcasts++;
774 return true;
775 } else {
776 return false;
777 }
778 }
779
780 if (is_multicast_ether_addr(ether_frame->ether_dhost)) {
781 if (opts & MAC_ALLMCAST) {
782 adapter->rcv_multicasts++;
783 netdev->stats.multicast++;
784 return true;
785 }
786 if (opts & MAC_MCAST) {
787 struct mcast_address *mcaddr = adapter->mcastaddrs;
788
789 while (mcaddr) {
790 if (ether_addr_equal(mcaddr->address,
791 ether_frame->ether_dhost)) {
792 adapter->rcv_multicasts++;
793 netdev->stats.multicast++;
794 return true;
795 }
796 mcaddr = mcaddr->next;
797 }
798 return false;
799 } else {
800 return false;
801 }
802 }
803 if (opts & MAC_DIRECTED) {
804 adapter->rcv_unicasts++;
805 return true;
806 }
807 return false;
808
809 }
810
811 static int slic_mac_set_address(struct net_device *dev, void *ptr)
812 {
813 struct adapter *adapter = netdev_priv(dev);
814 struct sockaddr *addr = ptr;
815
816 if (netif_running(dev))
817 return -EBUSY;
818 if (!adapter)
819 return -EBUSY;
820
821 if (!is_valid_ether_addr(addr->sa_data))
822 return -EINVAL;
823
824 memcpy(dev->dev_addr, addr->sa_data, dev->addr_len);
825 memcpy(adapter->currmacaddr, addr->sa_data, dev->addr_len);
826
827 slic_config_set(adapter, true);
828 return 0;
829 }
830
831 static void slic_timer_load_check(ulong cardaddr)
832 {
833 struct sliccard *card = (struct sliccard *)cardaddr;
834 struct adapter *adapter = card->master;
835 u32 __iomem *intagg;
836 u32 load = card->events;
837 u32 level = 0;
838
839 if ((adapter) && (adapter->state == ADAPT_UP) &&
840 (card->state == CARD_UP) && (slic_global.dynamic_intagg)) {
841 intagg = &adapter->slic_regs->slic_intagg;
842 if (adapter->devid == SLIC_1GB_DEVICE_ID) {
843 if (adapter->linkspeed == LINK_1000MB)
844 level = 100;
845 else {
846 if (load > SLIC_LOAD_5)
847 level = SLIC_INTAGG_5;
848 else if (load > SLIC_LOAD_4)
849 level = SLIC_INTAGG_4;
850 else if (load > SLIC_LOAD_3)
851 level = SLIC_INTAGG_3;
852 else if (load > SLIC_LOAD_2)
853 level = SLIC_INTAGG_2;
854 else if (load > SLIC_LOAD_1)
855 level = SLIC_INTAGG_1;
856 else
857 level = SLIC_INTAGG_0;
858 }
859 if (card->loadlevel_current != level) {
860 card->loadlevel_current = level;
861 slic_reg32_write(intagg, level, FLUSH);
862 }
863 } else {
864 if (load > SLIC_LOAD_5)
865 level = SLIC_INTAGG_5;
866 else if (load > SLIC_LOAD_4)
867 level = SLIC_INTAGG_4;
868 else if (load > SLIC_LOAD_3)
869 level = SLIC_INTAGG_3;
870 else if (load > SLIC_LOAD_2)
871 level = SLIC_INTAGG_2;
872 else if (load > SLIC_LOAD_1)
873 level = SLIC_INTAGG_1;
874 else
875 level = SLIC_INTAGG_0;
876 if (card->loadlevel_current != level) {
877 card->loadlevel_current = level;
878 slic_reg32_write(intagg, level, FLUSH);
879 }
880 }
881 }
882 card->events = 0;
883 card->loadtimer.expires = jiffies + (SLIC_LOADTIMER_PERIOD * HZ);
884 add_timer(&card->loadtimer);
885 }
886
887 static int slic_upr_queue_request(struct adapter *adapter,
888 u32 upr_request,
889 u32 upr_data,
890 u32 upr_data_h,
891 u32 upr_buffer, u32 upr_buffer_h)
892 {
893 struct slic_upr *upr;
894 struct slic_upr *uprqueue;
895
896 upr = kmalloc(sizeof(struct slic_upr), GFP_ATOMIC);
897 if (!upr)
898 return -ENOMEM;
899
900 upr->adapter = adapter->port;
901 upr->upr_request = upr_request;
902 upr->upr_data = upr_data;
903 upr->upr_buffer = upr_buffer;
904 upr->upr_data_h = upr_data_h;
905 upr->upr_buffer_h = upr_buffer_h;
906 upr->next = NULL;
907 if (adapter->upr_list) {
908 uprqueue = adapter->upr_list;
909
910 while (uprqueue->next)
911 uprqueue = uprqueue->next;
912 uprqueue->next = upr;
913 } else {
914 adapter->upr_list = upr;
915 }
916 return 0;
917 }
918
919 static void slic_upr_start(struct adapter *adapter)
920 {
921 struct slic_upr *upr;
922 __iomem struct slic_regs *slic_regs = adapter->slic_regs;
923 /*
924 char * ptr1;
925 char * ptr2;
926 uint cmdoffset;
927 */
928 upr = adapter->upr_list;
929 if (!upr)
930 return;
931 if (adapter->upr_busy)
932 return;
933 adapter->upr_busy = 1;
934
935 switch (upr->upr_request) {
936 case SLIC_UPR_STATS:
937 if (upr->upr_data_h == 0) {
938 slic_reg32_write(&slic_regs->slic_stats, upr->upr_data,
939 FLUSH);
940 } else {
941 slic_reg64_write(adapter, &slic_regs->slic_stats64,
942 upr->upr_data,
943 &slic_regs->slic_addr_upper,
944 upr->upr_data_h, FLUSH);
945 }
946 break;
947
948 case SLIC_UPR_RLSR:
949 slic_reg64_write(adapter, &slic_regs->slic_rlsr, upr->upr_data,
950 &slic_regs->slic_addr_upper, upr->upr_data_h,
951 FLUSH);
952 break;
953
954 case SLIC_UPR_RCONFIG:
955 slic_reg64_write(adapter, &slic_regs->slic_rconfig,
956 upr->upr_data, &slic_regs->slic_addr_upper,
957 upr->upr_data_h, FLUSH);
958 break;
959 case SLIC_UPR_PING:
960 slic_reg32_write(&slic_regs->slic_ping, 1, FLUSH);
961 break;
962 }
963 }
964
965 static int slic_upr_request(struct adapter *adapter,
966 u32 upr_request,
967 u32 upr_data,
968 u32 upr_data_h,
969 u32 upr_buffer, u32 upr_buffer_h)
970 {
971 int rc;
972
973 spin_lock_irqsave(&adapter->upr_lock.lock, adapter->upr_lock.flags);
974 rc = slic_upr_queue_request(adapter,
975 upr_request,
976 upr_data,
977 upr_data_h, upr_buffer, upr_buffer_h);
978 if (rc)
979 goto err_unlock_irq;
980
981 slic_upr_start(adapter);
982 err_unlock_irq:
983 spin_unlock_irqrestore(&adapter->upr_lock.lock,
984 adapter->upr_lock.flags);
985 return rc;
986 }
987
988 static void slic_link_upr_complete(struct adapter *adapter, u32 isr)
989 {
990 u32 linkstatus = adapter->pshmem->linkstatus;
991 uint linkup;
992 unsigned char linkspeed;
993 unsigned char linkduplex;
994
995 if ((isr & ISR_UPCERR) || (isr & ISR_UPCBSY)) {
996 struct slic_shmem *pshmem;
997
998 pshmem = (struct slic_shmem *)(unsigned long)
999 adapter->phys_shmem;
1000 #if BITS_PER_LONG == 64
1001 slic_upr_queue_request(adapter,
1002 SLIC_UPR_RLSR,
1003 SLIC_GET_ADDR_LOW(&pshmem->linkstatus),
1004 SLIC_GET_ADDR_HIGH(&pshmem->linkstatus),
1005 0, 0);
1006 #else
1007 slic_upr_queue_request(adapter,
1008 SLIC_UPR_RLSR,
1009 (u32) &pshmem->linkstatus,
1010 SLIC_GET_ADDR_HIGH(pshmem), 0, 0);
1011 #endif
1012 return;
1013 }
1014 if (adapter->state != ADAPT_UP)
1015 return;
1016
1017 linkup = linkstatus & GIG_LINKUP ? LINK_UP : LINK_DOWN;
1018 if (linkstatus & GIG_SPEED_1000)
1019 linkspeed = LINK_1000MB;
1020 else if (linkstatus & GIG_SPEED_100)
1021 linkspeed = LINK_100MB;
1022 else
1023 linkspeed = LINK_10MB;
1024
1025 if (linkstatus & GIG_FULLDUPLEX)
1026 linkduplex = LINK_FULLD;
1027 else
1028 linkduplex = LINK_HALFD;
1029
1030 if ((adapter->linkstate == LINK_DOWN) && (linkup == LINK_DOWN))
1031 return;
1032
1033 /* link up event, but nothing has changed */
1034 if ((adapter->linkstate == LINK_UP) &&
1035 (linkup == LINK_UP) &&
1036 (adapter->linkspeed == linkspeed) &&
1037 (adapter->linkduplex == linkduplex))
1038 return;
1039
1040 /* link has changed at this point */
1041
1042 /* link has gone from up to down */
1043 if (linkup == LINK_DOWN) {
1044 adapter->linkstate = LINK_DOWN;
1045 return;
1046 }
1047
1048 /* link has gone from down to up */
1049 adapter->linkspeed = linkspeed;
1050 adapter->linkduplex = linkduplex;
1051
1052 if (adapter->linkstate != LINK_UP) {
1053 /* setup the mac */
1054 slic_config_set(adapter, true);
1055 adapter->linkstate = LINK_UP;
1056 netif_start_queue(adapter->netdev);
1057 }
1058 }
1059
1060 static void slic_upr_request_complete(struct adapter *adapter, u32 isr)
1061 {
1062 struct sliccard *card = adapter->card;
1063 struct slic_upr *upr;
1064
1065 spin_lock_irqsave(&adapter->upr_lock.lock, adapter->upr_lock.flags);
1066 upr = adapter->upr_list;
1067 if (!upr) {
1068 spin_unlock_irqrestore(&adapter->upr_lock.lock,
1069 adapter->upr_lock.flags);
1070 return;
1071 }
1072 adapter->upr_list = upr->next;
1073 upr->next = NULL;
1074 adapter->upr_busy = 0;
1075 switch (upr->upr_request) {
1076 case SLIC_UPR_STATS:
1077 {
1078 struct slic_stats *slicstats =
1079 (struct slic_stats *) &adapter->pshmem->inicstats;
1080 struct slic_stats *newstats = slicstats;
1081 struct slic_stats *old = &adapter->inicstats_prev;
1082 struct slicnet_stats *stst = &adapter->slic_stats;
1083
1084 if (isr & ISR_UPCERR) {
1085 dev_err(&adapter->netdev->dev,
1086 "SLIC_UPR_STATS command failed isr[%x]\n",
1087 isr);
1088
1089 break;
1090 }
1091 UPDATE_STATS_GB(stst->tcp.xmit_tcp_segs,
1092 newstats->xmit_tcp_segs_gb,
1093 old->xmit_tcp_segs_gb);
1094
1095 UPDATE_STATS_GB(stst->tcp.xmit_tcp_bytes,
1096 newstats->xmit_tcp_bytes_gb,
1097 old->xmit_tcp_bytes_gb);
1098
1099 UPDATE_STATS_GB(stst->tcp.rcv_tcp_segs,
1100 newstats->rcv_tcp_segs_gb,
1101 old->rcv_tcp_segs_gb);
1102
1103 UPDATE_STATS_GB(stst->tcp.rcv_tcp_bytes,
1104 newstats->rcv_tcp_bytes_gb,
1105 old->rcv_tcp_bytes_gb);
1106
1107 UPDATE_STATS_GB(stst->iface.xmt_bytes,
1108 newstats->xmit_bytes_gb,
1109 old->xmit_bytes_gb);
1110
1111 UPDATE_STATS_GB(stst->iface.xmt_ucast,
1112 newstats->xmit_unicasts_gb,
1113 old->xmit_unicasts_gb);
1114
1115 UPDATE_STATS_GB(stst->iface.rcv_bytes,
1116 newstats->rcv_bytes_gb,
1117 old->rcv_bytes_gb);
1118
1119 UPDATE_STATS_GB(stst->iface.rcv_ucast,
1120 newstats->rcv_unicasts_gb,
1121 old->rcv_unicasts_gb);
1122
1123 UPDATE_STATS_GB(stst->iface.xmt_errors,
1124 newstats->xmit_collisions_gb,
1125 old->xmit_collisions_gb);
1126
1127 UPDATE_STATS_GB(stst->iface.xmt_errors,
1128 newstats->xmit_excess_collisions_gb,
1129 old->xmit_excess_collisions_gb);
1130
1131 UPDATE_STATS_GB(stst->iface.xmt_errors,
1132 newstats->xmit_other_error_gb,
1133 old->xmit_other_error_gb);
1134
1135 UPDATE_STATS_GB(stst->iface.rcv_errors,
1136 newstats->rcv_other_error_gb,
1137 old->rcv_other_error_gb);
1138
1139 UPDATE_STATS_GB(stst->iface.rcv_discards,
1140 newstats->rcv_drops_gb,
1141 old->rcv_drops_gb);
1142
1143 if (newstats->rcv_drops_gb > old->rcv_drops_gb) {
1144 adapter->rcv_drops +=
1145 (newstats->rcv_drops_gb -
1146 old->rcv_drops_gb);
1147 }
1148 memcpy(old, newstats, sizeof(struct slic_stats));
1149 break;
1150 }
1151 case SLIC_UPR_RLSR:
1152 slic_link_upr_complete(adapter, isr);
1153 break;
1154 case SLIC_UPR_RCONFIG:
1155 break;
1156 case SLIC_UPR_PING:
1157 card->pingstatus |= (isr & ISR_PINGDSMASK);
1158 break;
1159 }
1160 kfree(upr);
1161 slic_upr_start(adapter);
1162 spin_unlock_irqrestore(&adapter->upr_lock.lock,
1163 adapter->upr_lock.flags);
1164 }
1165
1166 static void slic_config_get(struct adapter *adapter, u32 config,
1167 u32 config_h)
1168 {
1169 int status;
1170
1171 status = slic_upr_request(adapter,
1172 SLIC_UPR_RCONFIG,
1173 (u32) config, (u32) config_h, 0, 0);
1174 }
1175
1176 /*
1177 * this is here to checksum the eeprom, there is some ucode bug
1178 * which prevens us from using the ucode result.
1179 * remove this once ucode is fixed.
1180 */
1181 static ushort slic_eeprom_cksum(char *m, int len)
1182 {
1183 #define ADDCARRY(x) (x > 65535 ? x -= 65535 : x)
1184 #define REDUCE {l_util.l = sum; sum = l_util.s[0] + l_util.s[1]; ADDCARRY(sum);\
1185 }
1186
1187 u16 *w;
1188 u32 sum = 0;
1189 u32 byte_swapped = 0;
1190 u32 w_int;
1191
1192 union {
1193 char c[2];
1194 ushort s;
1195 } s_util;
1196
1197 union {
1198 ushort s[2];
1199 int l;
1200 } l_util;
1201
1202 l_util.l = 0;
1203 s_util.s = 0;
1204
1205 w = (u16 *)m;
1206 #if BITS_PER_LONG == 64
1207 w_int = (u32) ((ulong) w & 0x00000000FFFFFFFF);
1208 #else
1209 w_int = (u32) (w);
1210 #endif
1211 if ((1 & w_int) && (len > 0)) {
1212 REDUCE;
1213 sum <<= 8;
1214 s_util.c[0] = *(unsigned char *)w;
1215 w = (u16 *)((char *)w + 1);
1216 len--;
1217 byte_swapped = 1;
1218 }
1219
1220 /* Unroll the loop to make overhead from branches &c small. */
1221 while ((len -= 32) >= 0) {
1222 sum += w[0];
1223 sum += w[1];
1224 sum += w[2];
1225 sum += w[3];
1226 sum += w[4];
1227 sum += w[5];
1228 sum += w[6];
1229 sum += w[7];
1230 sum += w[8];
1231 sum += w[9];
1232 sum += w[10];
1233 sum += w[11];
1234 sum += w[12];
1235 sum += w[13];
1236 sum += w[14];
1237 sum += w[15];
1238 w = (u16 *)((ulong) w + 16); /* verify */
1239 }
1240 len += 32;
1241 while ((len -= 8) >= 0) {
1242 sum += w[0];
1243 sum += w[1];
1244 sum += w[2];
1245 sum += w[3];
1246 w = (u16 *)((ulong) w + 4); /* verify */
1247 }
1248 len += 8;
1249 if (len != 0 || byte_swapped != 0) {
1250 REDUCE;
1251 while ((len -= 2) >= 0)
1252 sum += *w++; /* verify */
1253 if (byte_swapped) {
1254 REDUCE;
1255 sum <<= 8;
1256 byte_swapped = 0;
1257 if (len == -1) {
1258 s_util.c[1] = *(char *) w;
1259 sum += s_util.s;
1260 len = 0;
1261 } else {
1262 len = -1;
1263 }
1264
1265 } else if (len == -1) {
1266 s_util.c[0] = *(char *) w;
1267 }
1268
1269 if (len == -1) {
1270 s_util.c[1] = 0;
1271 sum += s_util.s;
1272 }
1273 }
1274 REDUCE;
1275 return (ushort) sum;
1276 }
1277
1278 static void slic_rspqueue_free(struct adapter *adapter)
1279 {
1280 int i;
1281 struct slic_rspqueue *rspq = &adapter->rspqueue;
1282
1283 for (i = 0; i < rspq->num_pages; i++) {
1284 if (rspq->vaddr[i]) {
1285 pci_free_consistent(adapter->pcidev, PAGE_SIZE,
1286 rspq->vaddr[i], rspq->paddr[i]);
1287 }
1288 rspq->vaddr[i] = NULL;
1289 rspq->paddr[i] = 0;
1290 }
1291 rspq->offset = 0;
1292 rspq->pageindex = 0;
1293 rspq->rspbuf = NULL;
1294 }
1295
1296 static int slic_rspqueue_init(struct adapter *adapter)
1297 {
1298 int i;
1299 struct slic_rspqueue *rspq = &adapter->rspqueue;
1300 __iomem struct slic_regs *slic_regs = adapter->slic_regs;
1301 u32 paddrh = 0;
1302
1303 memset(rspq, 0, sizeof(struct slic_rspqueue));
1304
1305 rspq->num_pages = SLIC_RSPQ_PAGES_GB;
1306
1307 for (i = 0; i < rspq->num_pages; i++) {
1308 rspq->vaddr[i] = pci_alloc_consistent(adapter->pcidev,
1309 PAGE_SIZE,
1310 &rspq->paddr[i]);
1311 if (!rspq->vaddr[i]) {
1312 dev_err(&adapter->pcidev->dev,
1313 "pci_alloc_consistent failed\n");
1314 slic_rspqueue_free(adapter);
1315 return -ENOMEM;
1316 }
1317 /* FIXME:
1318 * do we really need this assertions (4K PAGE_SIZE aligned addr)? */
1319 memset(rspq->vaddr[i], 0, PAGE_SIZE);
1320
1321 if (paddrh == 0) {
1322 slic_reg32_write(&slic_regs->slic_rbar,
1323 (rspq->paddr[i] | SLIC_RSPQ_BUFSINPAGE),
1324 DONT_FLUSH);
1325 } else {
1326 slic_reg64_write(adapter, &slic_regs->slic_rbar64,
1327 (rspq->paddr[i] | SLIC_RSPQ_BUFSINPAGE),
1328 &slic_regs->slic_addr_upper,
1329 paddrh, DONT_FLUSH);
1330 }
1331 }
1332 rspq->offset = 0;
1333 rspq->pageindex = 0;
1334 rspq->rspbuf = (struct slic_rspbuf *)rspq->vaddr[0];
1335 return 0;
1336 }
1337
1338 static struct slic_rspbuf *slic_rspqueue_getnext(struct adapter *adapter)
1339 {
1340 struct slic_rspqueue *rspq = &adapter->rspqueue;
1341 struct slic_rspbuf *buf;
1342
1343 if (!(rspq->rspbuf->status))
1344 return NULL;
1345
1346 buf = rspq->rspbuf;
1347 if (++rspq->offset < SLIC_RSPQ_BUFSINPAGE) {
1348 rspq->rspbuf++;
1349 } else {
1350 slic_reg64_write(adapter, &adapter->slic_regs->slic_rbar64,
1351 (rspq->paddr[rspq->pageindex] | SLIC_RSPQ_BUFSINPAGE),
1352 &adapter->slic_regs->slic_addr_upper, 0, DONT_FLUSH);
1353 rspq->pageindex = (rspq->pageindex + 1) % rspq->num_pages;
1354 rspq->offset = 0;
1355 rspq->rspbuf = (struct slic_rspbuf *)
1356 rspq->vaddr[rspq->pageindex];
1357 }
1358
1359 return buf;
1360 }
1361
1362 static void slic_cmdqmem_free(struct adapter *adapter)
1363 {
1364 struct slic_cmdqmem *cmdqmem = &adapter->cmdqmem;
1365 int i;
1366
1367 for (i = 0; i < SLIC_CMDQ_MAXPAGES; i++) {
1368 if (cmdqmem->pages[i]) {
1369 pci_free_consistent(adapter->pcidev,
1370 PAGE_SIZE,
1371 (void *) cmdqmem->pages[i],
1372 cmdqmem->dma_pages[i]);
1373 }
1374 }
1375 memset(cmdqmem, 0, sizeof(struct slic_cmdqmem));
1376 }
1377
1378 static u32 *slic_cmdqmem_addpage(struct adapter *adapter)
1379 {
1380 struct slic_cmdqmem *cmdqmem = &adapter->cmdqmem;
1381 u32 *pageaddr;
1382
1383 if (cmdqmem->pagecnt >= SLIC_CMDQ_MAXPAGES)
1384 return NULL;
1385 pageaddr = pci_alloc_consistent(adapter->pcidev,
1386 PAGE_SIZE,
1387 &cmdqmem->dma_pages[cmdqmem->pagecnt]);
1388 if (!pageaddr)
1389 return NULL;
1390
1391 cmdqmem->pages[cmdqmem->pagecnt] = pageaddr;
1392 cmdqmem->pagecnt++;
1393 return pageaddr;
1394 }
1395
1396 static void slic_cmdq_free(struct adapter *adapter)
1397 {
1398 struct slic_hostcmd *cmd;
1399
1400 cmd = adapter->cmdq_all.head;
1401 while (cmd) {
1402 if (cmd->busy) {
1403 struct sk_buff *tempskb;
1404
1405 tempskb = cmd->skb;
1406 if (tempskb) {
1407 cmd->skb = NULL;
1408 dev_kfree_skb_irq(tempskb);
1409 }
1410 }
1411 cmd = cmd->next_all;
1412 }
1413 memset(&adapter->cmdq_all, 0, sizeof(struct slic_cmdqueue));
1414 memset(&adapter->cmdq_free, 0, sizeof(struct slic_cmdqueue));
1415 memset(&adapter->cmdq_done, 0, sizeof(struct slic_cmdqueue));
1416 slic_cmdqmem_free(adapter);
1417 }
1418
1419 static void slic_cmdq_addcmdpage(struct adapter *adapter, u32 *page)
1420 {
1421 struct slic_hostcmd *cmd;
1422 struct slic_hostcmd *prev;
1423 struct slic_hostcmd *tail;
1424 struct slic_cmdqueue *cmdq;
1425 int cmdcnt;
1426 void *cmdaddr;
1427 ulong phys_addr;
1428 u32 phys_addrl;
1429 u32 phys_addrh;
1430 struct slic_handle *pslic_handle;
1431
1432 cmdaddr = page;
1433 cmd = (struct slic_hostcmd *)cmdaddr;
1434 cmdcnt = 0;
1435
1436 phys_addr = virt_to_bus((void *)page);
1437 phys_addrl = SLIC_GET_ADDR_LOW(phys_addr);
1438 phys_addrh = SLIC_GET_ADDR_HIGH(phys_addr);
1439
1440 prev = NULL;
1441 tail = cmd;
1442 while ((cmdcnt < SLIC_CMDQ_CMDSINPAGE) &&
1443 (adapter->slic_handle_ix < 256)) {
1444 /* Allocate and initialize a SLIC_HANDLE for this command */
1445 SLIC_GET_SLIC_HANDLE(adapter, pslic_handle);
1446 pslic_handle->type = SLIC_HANDLE_CMD;
1447 pslic_handle->address = (void *) cmd;
1448 pslic_handle->offset = (ushort) adapter->slic_handle_ix++;
1449 pslic_handle->other_handle = NULL;
1450 pslic_handle->next = NULL;
1451
1452 cmd->pslic_handle = pslic_handle;
1453 cmd->cmd64.hosthandle = pslic_handle->token.handle_token;
1454 cmd->busy = false;
1455 cmd->paddrl = phys_addrl;
1456 cmd->paddrh = phys_addrh;
1457 cmd->next_all = prev;
1458 cmd->next = prev;
1459 prev = cmd;
1460 phys_addrl += SLIC_HOSTCMD_SIZE;
1461 cmdaddr += SLIC_HOSTCMD_SIZE;
1462
1463 cmd = (struct slic_hostcmd *)cmdaddr;
1464 cmdcnt++;
1465 }
1466
1467 cmdq = &adapter->cmdq_all;
1468 cmdq->count += cmdcnt; /* SLIC_CMDQ_CMDSINPAGE; mooktodo */
1469 tail->next_all = cmdq->head;
1470 cmdq->head = prev;
1471 cmdq = &adapter->cmdq_free;
1472 spin_lock_irqsave(&cmdq->lock.lock, cmdq->lock.flags);
1473 cmdq->count += cmdcnt; /* SLIC_CMDQ_CMDSINPAGE; mooktodo */
1474 tail->next = cmdq->head;
1475 cmdq->head = prev;
1476 spin_unlock_irqrestore(&cmdq->lock.lock, cmdq->lock.flags);
1477 }
1478
1479 static int slic_cmdq_init(struct adapter *adapter)
1480 {
1481 int i;
1482 u32 *pageaddr;
1483
1484 memset(&adapter->cmdq_all, 0, sizeof(struct slic_cmdqueue));
1485 memset(&adapter->cmdq_free, 0, sizeof(struct slic_cmdqueue));
1486 memset(&adapter->cmdq_done, 0, sizeof(struct slic_cmdqueue));
1487 spin_lock_init(&adapter->cmdq_all.lock.lock);
1488 spin_lock_init(&adapter->cmdq_free.lock.lock);
1489 spin_lock_init(&adapter->cmdq_done.lock.lock);
1490 memset(&adapter->cmdqmem, 0, sizeof(struct slic_cmdqmem));
1491 adapter->slic_handle_ix = 1;
1492 for (i = 0; i < SLIC_CMDQ_INITPAGES; i++) {
1493 pageaddr = slic_cmdqmem_addpage(adapter);
1494 if (!pageaddr) {
1495 slic_cmdq_free(adapter);
1496 return -ENOMEM;
1497 }
1498 slic_cmdq_addcmdpage(adapter, pageaddr);
1499 }
1500 adapter->slic_handle_ix = 1;
1501
1502 return 0;
1503 }
1504
1505 static void slic_cmdq_reset(struct adapter *adapter)
1506 {
1507 struct slic_hostcmd *hcmd;
1508 struct sk_buff *skb;
1509 u32 outstanding;
1510
1511 spin_lock_irqsave(&adapter->cmdq_free.lock.lock,
1512 adapter->cmdq_free.lock.flags);
1513 spin_lock_irqsave(&adapter->cmdq_done.lock.lock,
1514 adapter->cmdq_done.lock.flags);
1515 outstanding = adapter->cmdq_all.count - adapter->cmdq_done.count;
1516 outstanding -= adapter->cmdq_free.count;
1517 hcmd = adapter->cmdq_all.head;
1518 while (hcmd) {
1519 if (hcmd->busy) {
1520 skb = hcmd->skb;
1521 hcmd->busy = 0;
1522 hcmd->skb = NULL;
1523 dev_kfree_skb_irq(skb);
1524 }
1525 hcmd = hcmd->next_all;
1526 }
1527 adapter->cmdq_free.count = 0;
1528 adapter->cmdq_free.head = NULL;
1529 adapter->cmdq_free.tail = NULL;
1530 adapter->cmdq_done.count = 0;
1531 adapter->cmdq_done.head = NULL;
1532 adapter->cmdq_done.tail = NULL;
1533 adapter->cmdq_free.head = adapter->cmdq_all.head;
1534 hcmd = adapter->cmdq_all.head;
1535 while (hcmd) {
1536 adapter->cmdq_free.count++;
1537 hcmd->next = hcmd->next_all;
1538 hcmd = hcmd->next_all;
1539 }
1540 if (adapter->cmdq_free.count != adapter->cmdq_all.count) {
1541 dev_err(&adapter->netdev->dev,
1542 "free_count %d != all count %d\n",
1543 adapter->cmdq_free.count, adapter->cmdq_all.count);
1544 }
1545 spin_unlock_irqrestore(&adapter->cmdq_done.lock.lock,
1546 adapter->cmdq_done.lock.flags);
1547 spin_unlock_irqrestore(&adapter->cmdq_free.lock.lock,
1548 adapter->cmdq_free.lock.flags);
1549 }
1550
1551 static void slic_cmdq_getdone(struct adapter *adapter)
1552 {
1553 struct slic_cmdqueue *done_cmdq = &adapter->cmdq_done;
1554 struct slic_cmdqueue *free_cmdq = &adapter->cmdq_free;
1555
1556 spin_lock_irqsave(&done_cmdq->lock.lock, done_cmdq->lock.flags);
1557
1558 free_cmdq->head = done_cmdq->head;
1559 free_cmdq->count = done_cmdq->count;
1560 done_cmdq->head = NULL;
1561 done_cmdq->tail = NULL;
1562 done_cmdq->count = 0;
1563 spin_unlock_irqrestore(&done_cmdq->lock.lock, done_cmdq->lock.flags);
1564 }
1565
1566 static struct slic_hostcmd *slic_cmdq_getfree(struct adapter *adapter)
1567 {
1568 struct slic_cmdqueue *cmdq = &adapter->cmdq_free;
1569 struct slic_hostcmd *cmd = NULL;
1570
1571 lock_and_retry:
1572 spin_lock_irqsave(&cmdq->lock.lock, cmdq->lock.flags);
1573 retry:
1574 cmd = cmdq->head;
1575 if (cmd) {
1576 cmdq->head = cmd->next;
1577 cmdq->count--;
1578 spin_unlock_irqrestore(&cmdq->lock.lock, cmdq->lock.flags);
1579 } else {
1580 slic_cmdq_getdone(adapter);
1581 cmd = cmdq->head;
1582 if (cmd) {
1583 goto retry;
1584 } else {
1585 u32 *pageaddr;
1586
1587 spin_unlock_irqrestore(&cmdq->lock.lock,
1588 cmdq->lock.flags);
1589 pageaddr = slic_cmdqmem_addpage(adapter);
1590 if (pageaddr) {
1591 slic_cmdq_addcmdpage(adapter, pageaddr);
1592 goto lock_and_retry;
1593 }
1594 }
1595 }
1596 return cmd;
1597 }
1598
1599 static void slic_cmdq_putdone_irq(struct adapter *adapter,
1600 struct slic_hostcmd *cmd)
1601 {
1602 struct slic_cmdqueue *cmdq = &adapter->cmdq_done;
1603
1604 spin_lock(&cmdq->lock.lock);
1605 cmd->busy = 0;
1606 cmd->next = cmdq->head;
1607 cmdq->head = cmd;
1608 cmdq->count++;
1609 if ((adapter->xmitq_full) && (cmdq->count > 10))
1610 netif_wake_queue(adapter->netdev);
1611 spin_unlock(&cmdq->lock.lock);
1612 }
1613
1614 static int slic_rcvqueue_fill(struct adapter *adapter)
1615 {
1616 void *paddr;
1617 u32 paddrl;
1618 u32 paddrh;
1619 struct slic_rcvqueue *rcvq = &adapter->rcvqueue;
1620 int i = 0;
1621 struct device *dev = &adapter->netdev->dev;
1622
1623 while (i < SLIC_RCVQ_FILLENTRIES) {
1624 struct slic_rcvbuf *rcvbuf;
1625 struct sk_buff *skb;
1626 #ifdef KLUDGE_FOR_4GB_BOUNDARY
1627 retry_rcvqfill:
1628 #endif
1629 skb = alloc_skb(SLIC_RCVQ_RCVBUFSIZE, GFP_ATOMIC);
1630 if (skb) {
1631 paddr = (void *)(unsigned long)
1632 pci_map_single(adapter->pcidev,
1633 skb->data,
1634 SLIC_RCVQ_RCVBUFSIZE,
1635 PCI_DMA_FROMDEVICE);
1636 paddrl = SLIC_GET_ADDR_LOW(paddr);
1637 paddrh = SLIC_GET_ADDR_HIGH(paddr);
1638
1639 skb->len = SLIC_RCVBUF_HEADSIZE;
1640 rcvbuf = (struct slic_rcvbuf *)skb->head;
1641 rcvbuf->status = 0;
1642 skb->next = NULL;
1643 #ifdef KLUDGE_FOR_4GB_BOUNDARY
1644 if (paddrl == 0) {
1645 dev_err(dev, "%s: LOW 32bits PHYSICAL ADDRESS == 0\n",
1646 __func__);
1647 dev_err(dev, "skb[%p] PROBLEM\n", skb);
1648 dev_err(dev, " skbdata[%p]\n", skb->data);
1649 dev_err(dev, " skblen[%x]\n", skb->len);
1650 dev_err(dev, " paddr[%p]\n", paddr);
1651 dev_err(dev, " paddrl[%x]\n", paddrl);
1652 dev_err(dev, " paddrh[%x]\n", paddrh);
1653 dev_err(dev, " rcvq->head[%p]\n", rcvq->head);
1654 dev_err(dev, " rcvq->tail[%p]\n", rcvq->tail);
1655 dev_err(dev, " rcvq->count[%x]\n", rcvq->count);
1656 dev_err(dev, "SKIP THIS SKB!!!!!!!!\n");
1657 goto retry_rcvqfill;
1658 }
1659 #else
1660 if (paddrl == 0) {
1661 dev_err(dev, "%s: LOW 32bits PHYSICAL ADDRESS == 0\n",
1662 __func__);
1663 dev_err(dev, "skb[%p] PROBLEM\n", skb);
1664 dev_err(dev, " skbdata[%p]\n", skb->data);
1665 dev_err(dev, " skblen[%x]\n", skb->len);
1666 dev_err(dev, " paddr[%p]\n", paddr);
1667 dev_err(dev, " paddrl[%x]\n", paddrl);
1668 dev_err(dev, " paddrh[%x]\n", paddrh);
1669 dev_err(dev, " rcvq->head[%p]\n", rcvq->head);
1670 dev_err(dev, " rcvq->tail[%p]\n", rcvq->tail);
1671 dev_err(dev, " rcvq->count[%x]\n", rcvq->count);
1672 dev_err(dev, "GIVE TO CARD ANYWAY\n");
1673 }
1674 #endif
1675 if (paddrh == 0) {
1676 slic_reg32_write(&adapter->slic_regs->slic_hbar,
1677 (u32)paddrl, DONT_FLUSH);
1678 } else {
1679 slic_reg64_write(adapter,
1680 &adapter->slic_regs->slic_hbar64,
1681 paddrl,
1682 &adapter->slic_regs->slic_addr_upper,
1683 paddrh, DONT_FLUSH);
1684 }
1685 if (rcvq->head)
1686 rcvq->tail->next = skb;
1687 else
1688 rcvq->head = skb;
1689 rcvq->tail = skb;
1690 rcvq->count++;
1691 i++;
1692 } else {
1693 dev_err(&adapter->netdev->dev,
1694 "slic_rcvqueue_fill could only get [%d] skbuffs\n",
1695 i);
1696 break;
1697 }
1698 }
1699 return i;
1700 }
1701
1702 static void slic_rcvqueue_free(struct adapter *adapter)
1703 {
1704 struct slic_rcvqueue *rcvq = &adapter->rcvqueue;
1705 struct sk_buff *skb;
1706
1707 while (rcvq->head) {
1708 skb = rcvq->head;
1709 rcvq->head = rcvq->head->next;
1710 dev_kfree_skb(skb);
1711 }
1712 rcvq->tail = NULL;
1713 rcvq->head = NULL;
1714 rcvq->count = 0;
1715 }
1716
1717 static int slic_rcvqueue_init(struct adapter *adapter)
1718 {
1719 int i, count;
1720 struct slic_rcvqueue *rcvq = &adapter->rcvqueue;
1721
1722 rcvq->tail = NULL;
1723 rcvq->head = NULL;
1724 rcvq->size = SLIC_RCVQ_ENTRIES;
1725 rcvq->errors = 0;
1726 rcvq->count = 0;
1727 i = (SLIC_RCVQ_ENTRIES / SLIC_RCVQ_FILLENTRIES);
1728 count = 0;
1729 while (i) {
1730 count += slic_rcvqueue_fill(adapter);
1731 i--;
1732 }
1733 if (rcvq->count < SLIC_RCVQ_MINENTRIES) {
1734 slic_rcvqueue_free(adapter);
1735 return -ENOMEM;
1736 }
1737 return 0;
1738 }
1739
1740 static struct sk_buff *slic_rcvqueue_getnext(struct adapter *adapter)
1741 {
1742 struct slic_rcvqueue *rcvq = &adapter->rcvqueue;
1743 struct sk_buff *skb;
1744 struct slic_rcvbuf *rcvbuf;
1745 int count;
1746
1747 if (rcvq->count) {
1748 skb = rcvq->head;
1749 rcvbuf = (struct slic_rcvbuf *)skb->head;
1750
1751 if (rcvbuf->status & IRHDDR_SVALID) {
1752 rcvq->head = rcvq->head->next;
1753 skb->next = NULL;
1754 rcvq->count--;
1755 } else {
1756 skb = NULL;
1757 }
1758 } else {
1759 dev_err(&adapter->netdev->dev,
1760 "RcvQ Empty!! rcvq[%p] count[%x]\n", rcvq, rcvq->count);
1761 skb = NULL;
1762 }
1763 while (rcvq->count < SLIC_RCVQ_FILLTHRESH) {
1764 count = slic_rcvqueue_fill(adapter);
1765 if (!count)
1766 break;
1767 }
1768 if (skb)
1769 rcvq->errors = 0;
1770 return skb;
1771 }
1772
1773 static u32 slic_rcvqueue_reinsert(struct adapter *adapter, struct sk_buff *skb)
1774 {
1775 struct slic_rcvqueue *rcvq = &adapter->rcvqueue;
1776 void *paddr;
1777 u32 paddrl;
1778 u32 paddrh;
1779 struct slic_rcvbuf *rcvbuf = (struct slic_rcvbuf *)skb->head;
1780 struct device *dev;
1781
1782 paddr = (void *)(unsigned long)
1783 pci_map_single(adapter->pcidev, skb->head,
1784 SLIC_RCVQ_RCVBUFSIZE, PCI_DMA_FROMDEVICE);
1785 rcvbuf->status = 0;
1786 skb->next = NULL;
1787
1788 paddrl = SLIC_GET_ADDR_LOW(paddr);
1789 paddrh = SLIC_GET_ADDR_HIGH(paddr);
1790
1791 if (paddrl == 0) {
1792 dev = &adapter->netdev->dev;
1793 dev_err(dev, "%s: LOW 32bits PHYSICAL ADDRESS == 0\n",
1794 __func__);
1795 dev_err(dev, "skb[%p] PROBLEM\n", skb);
1796 dev_err(dev, " skbdata[%p]\n", skb->data);
1797 dev_err(dev, " skblen[%x]\n", skb->len);
1798 dev_err(dev, " paddr[%p]\n", paddr);
1799 dev_err(dev, " paddrl[%x]\n", paddrl);
1800 dev_err(dev, " paddrh[%x]\n", paddrh);
1801 dev_err(dev, " rcvq->head[%p]\n", rcvq->head);
1802 dev_err(dev, " rcvq->tail[%p]\n", rcvq->tail);
1803 dev_err(dev, " rcvq->count[%x]\n", rcvq->count);
1804 }
1805 if (paddrh == 0) {
1806 slic_reg32_write(&adapter->slic_regs->slic_hbar, (u32)paddrl,
1807 DONT_FLUSH);
1808 } else {
1809 slic_reg64_write(adapter, &adapter->slic_regs->slic_hbar64,
1810 paddrl, &adapter->slic_regs->slic_addr_upper,
1811 paddrh, DONT_FLUSH);
1812 }
1813 if (rcvq->head)
1814 rcvq->tail->next = skb;
1815 else
1816 rcvq->head = skb;
1817 rcvq->tail = skb;
1818 rcvq->count++;
1819 return rcvq->count;
1820 }
1821
1822 static int slic_debug_card_show(struct seq_file *seq, void *v)
1823 {
1824 #ifdef MOOKTODO
1825 int i;
1826 struct sliccard *card = seq->private;
1827 struct slic_config *config = &card->config;
1828 unsigned char *fru = (unsigned char *)(&card->config.atk_fru);
1829 unsigned char *oemfru = (unsigned char *)(&card->config.OemFru);
1830 #endif
1831
1832 seq_printf(seq, "driver_version : %s\n", slic_proc_version);
1833 seq_puts(seq, "Microcode versions: \n");
1834 seq_printf(seq, " Gigabit (gb) : %s %s\n",
1835 MOJAVE_UCODE_VERS_STRING, MOJAVE_UCODE_VERS_DATE);
1836 seq_printf(seq, " Gigabit Receiver : %s %s\n",
1837 GB_RCVUCODE_VERS_STRING, GB_RCVUCODE_VERS_DATE);
1838 seq_printf(seq, "Vendor : %s\n", slic_vendor);
1839 seq_printf(seq, "Product Name : %s\n", slic_product_name);
1840 #ifdef MOOKTODO
1841 seq_printf(seq, "VendorId : %4.4X\n",
1842 config->VendorId);
1843 seq_printf(seq, "DeviceId : %4.4X\n",
1844 config->DeviceId);
1845 seq_printf(seq, "RevisionId : %2.2x\n",
1846 config->RevisionId);
1847 seq_printf(seq, "Bus # : %d\n", card->busnumber);
1848 seq_printf(seq, "Device # : %d\n", card->slotnumber);
1849 seq_printf(seq, "Interfaces : %d\n", card->card_size);
1850 seq_printf(seq, " Initialized : %d\n",
1851 card->adapters_activated);
1852 seq_printf(seq, " Allocated : %d\n",
1853 card->adapters_allocated);
1854 for (i = 0; i < card->card_size; i++) {
1855 seq_printf(seq,
1856 " MAC%d : %2.2X %2.2X %2.2X %2.2X %2.2X %2.2X\n",
1857 i, config->macinfo[i].macaddrA[0],
1858 config->macinfo[i].macaddrA[1],
1859 config->macinfo[i].macaddrA[2],
1860 config->macinfo[i].macaddrA[3],
1861 config->macinfo[i].macaddrA[4],
1862 config->macinfo[i].macaddrA[5]);
1863 }
1864 seq_puts(seq, " IF Init State Duplex/Speed irq\n");
1865 seq_puts(seq, " -------------------------------\n");
1866 for (i = 0; i < card->adapters_allocated; i++) {
1867 struct adapter *adapter;
1868
1869 adapter = card->adapter[i];
1870 if (adapter) {
1871 seq_printf(seq,
1872 " %d %d %s %s %s 0x%X\n",
1873 adapter->physport, adapter->state,
1874 SLIC_LINKSTATE(adapter->linkstate),
1875 SLIC_DUPLEX(adapter->linkduplex),
1876 SLIC_SPEED(adapter->linkspeed),
1877 (uint) adapter->irq);
1878 }
1879 }
1880 seq_printf(seq, "Generation # : %4.4X\n", card->gennumber);
1881 seq_printf(seq, "RcvQ max entries : %4.4X\n",
1882 SLIC_RCVQ_ENTRIES);
1883 seq_printf(seq, "Ping Status : %8.8X\n",
1884 card->pingstatus);
1885 seq_printf(seq, "Minimum grant : %2.2x\n",
1886 config->MinGrant);
1887 seq_printf(seq, "Maximum Latency : %2.2x\n", config->MaxLat);
1888 seq_printf(seq, "PciStatus : %4.4x\n",
1889 config->Pcistatus);
1890 seq_printf(seq, "Debug Device Id : %4.4x\n",
1891 config->DbgDevId);
1892 seq_printf(seq, "DRAM ROM Function : %4.4x\n",
1893 config->DramRomFn);
1894 seq_printf(seq, "Network interface Pin 1 : %2.2x\n",
1895 config->NetIntPin1);
1896 seq_printf(seq, "Network interface Pin 2 : %2.2x\n",
1897 config->NetIntPin1);
1898 seq_printf(seq, "Network interface Pin 3 : %2.2x\n",
1899 config->NetIntPin1);
1900 seq_printf(seq, "PM capabilities : %4.4X\n",
1901 config->PMECapab);
1902 seq_printf(seq, "Network Clock Controls : %4.4X\n",
1903 config->NwClkCtrls);
1904
1905 switch (config->FruFormat) {
1906 case ATK_FRU_FORMAT:
1907 {
1908 seq_puts(seq,
1909 "Vendor : Alacritech, Inc.\n");
1910 seq_printf(seq,
1911 "Assembly # : %c%c%c%c%c%c\n",
1912 fru[0], fru[1], fru[2], fru[3], fru[4],
1913 fru[5]);
1914 seq_printf(seq,
1915 "Revision # : %c%c\n",
1916 fru[6], fru[7]);
1917
1918 if (config->OEMFruFormat == VENDOR4_FRU_FORMAT) {
1919 seq_printf(seq,
1920 "Serial # : "
1921 "%c%c%c%c%c%c%c%c%c%c%c%c\n",
1922 fru[8], fru[9], fru[10],
1923 fru[11], fru[12], fru[13],
1924 fru[16], fru[17], fru[18],
1925 fru[19], fru[20], fru[21]);
1926 } else {
1927 seq_printf(seq,
1928 "Serial # : "
1929 "%c%c%c%c%c%c%c%c%c%c%c%c%c%c\n",
1930 fru[8], fru[9], fru[10],
1931 fru[11], fru[12], fru[13],
1932 fru[14], fru[15], fru[16],
1933 fru[17], fru[18], fru[19],
1934 fru[20], fru[21]);
1935 }
1936 break;
1937 }
1938
1939 default:
1940 {
1941 seq_puts(seq,
1942 "Vendor : Alacritech, Inc.\n");
1943 seq_puts(seq,
1944 "Serial # : Empty FRU\n");
1945 break;
1946 }
1947 }
1948
1949 switch (config->OEMFruFormat) {
1950 case VENDOR1_FRU_FORMAT:
1951 {
1952 seq_puts(seq, "FRU Information:\n");
1953 seq_printf(seq, " Commodity # : %c\n",
1954 oemfru[0]);
1955 seq_printf(seq,
1956 " Assembly # : %c%c%c%c\n",
1957 oemfru[1], oemfru[2], oemfru[3], oemfru[4]);
1958 seq_printf(seq,
1959 " Revision # : %c%c\n",
1960 oemfru[5], oemfru[6]);
1961 seq_printf(seq,
1962 " Supplier # : %c%c\n",
1963 oemfru[7], oemfru[8]);
1964 seq_printf(seq,
1965 " Date : %c%c\n",
1966 oemfru[9], oemfru[10]);
1967 seq_sprintf(seq,
1968 " Sequence # : %c%c%c\n",
1969 oemfru[11], oemfru[12], oemfru[13]);
1970 break;
1971 }
1972
1973 case VENDOR2_FRU_FORMAT:
1974 {
1975 seq_puts(seq, "FRU Information:\n");
1976 seq_printf(seq,
1977 " Part # : "
1978 "%c%c%c%c%c%c%c%c\n",
1979 oemfru[0], oemfru[1], oemfru[2],
1980 oemfru[3], oemfru[4], oemfru[5],
1981 oemfru[6], oemfru[7]);
1982 seq_printf(seq,
1983 " Supplier # : %c%c%c%c%c\n",
1984 oemfru[8], oemfru[9], oemfru[10],
1985 oemfru[11], oemfru[12]);
1986 seq_printf(seq,
1987 " Date : %c%c%c\n",
1988 oemfru[13], oemfru[14], oemfru[15]);
1989 seq_sprintf(seq,
1990 " Sequence # : %c%c%c%c\n",
1991 oemfru[16], oemfru[17], oemfru[18],
1992 oemfru[19]);
1993 break;
1994 }
1995
1996 case VENDOR3_FRU_FORMAT:
1997 {
1998 seq_puts(seq, "FRU Information:\n");
1999 }
2000
2001 case VENDOR4_FRU_FORMAT:
2002 {
2003 seq_puts(seq, "FRU Information:\n");
2004 seq_printf(seq,
2005 " FRU Number : "
2006 "%c%c%c%c%c%c%c%c\n",
2007 oemfru[0], oemfru[1], oemfru[2],
2008 oemfru[3], oemfru[4], oemfru[5],
2009 oemfru[6], oemfru[7]);
2010 seq_sprintf(seq,
2011 " Part Number : "
2012 "%c%c%c%c%c%c%c%c\n",
2013 oemfru[8], oemfru[9], oemfru[10],
2014 oemfru[11], oemfru[12], oemfru[13],
2015 oemfru[14], oemfru[15]);
2016 seq_printf(seq,
2017 " EC Level : "
2018 "%c%c%c%c%c%c%c%c\n",
2019 oemfru[16], oemfru[17], oemfru[18],
2020 oemfru[19], oemfru[20], oemfru[21],
2021 oemfru[22], oemfru[23]);
2022 break;
2023 }
2024
2025 default:
2026 break;
2027 }
2028 #endif
2029
2030 return 0;
2031 }
2032
2033 static int slic_debug_adapter_show(struct seq_file *seq, void *v)
2034 {
2035 struct adapter *adapter = seq->private;
2036 struct net_device *netdev = adapter->netdev;
2037
2038 seq_printf(seq, "info: interface : %s\n",
2039 adapter->netdev->name);
2040 seq_printf(seq, "info: status : %s\n",
2041 SLIC_LINKSTATE(adapter->linkstate));
2042 seq_printf(seq, "info: port : %d\n",
2043 adapter->physport);
2044 seq_printf(seq, "info: speed : %s\n",
2045 SLIC_SPEED(adapter->linkspeed));
2046 seq_printf(seq, "info: duplex : %s\n",
2047 SLIC_DUPLEX(adapter->linkduplex));
2048 seq_printf(seq, "info: irq : 0x%X\n",
2049 (uint) adapter->irq);
2050 seq_printf(seq, "info: Interrupt Agg Delay: %d usec\n",
2051 adapter->card->loadlevel_current);
2052 seq_printf(seq, "info: RcvQ max entries : %4.4X\n",
2053 SLIC_RCVQ_ENTRIES);
2054 seq_printf(seq, "info: RcvQ current : %4.4X\n",
2055 adapter->rcvqueue.count);
2056 seq_printf(seq, "rx stats: packets : %8.8lX\n",
2057 netdev->stats.rx_packets);
2058 seq_printf(seq, "rx stats: bytes : %8.8lX\n",
2059 netdev->stats.rx_bytes);
2060 seq_printf(seq, "rx stats: broadcasts : %8.8X\n",
2061 adapter->rcv_broadcasts);
2062 seq_printf(seq, "rx stats: multicasts : %8.8X\n",
2063 adapter->rcv_multicasts);
2064 seq_printf(seq, "rx stats: unicasts : %8.8X\n",
2065 adapter->rcv_unicasts);
2066 seq_printf(seq, "rx stats: errors : %8.8X\n",
2067 (u32) adapter->slic_stats.iface.rcv_errors);
2068 seq_printf(seq, "rx stats: Missed errors : %8.8X\n",
2069 (u32) adapter->slic_stats.iface.rcv_discards);
2070 seq_printf(seq, "rx stats: drops : %8.8X\n",
2071 (u32) adapter->rcv_drops);
2072 seq_printf(seq, "tx stats: packets : %8.8lX\n",
2073 netdev->stats.tx_packets);
2074 seq_printf(seq, "tx stats: bytes : %8.8lX\n",
2075 netdev->stats.tx_bytes);
2076 seq_printf(seq, "tx stats: errors : %8.8X\n",
2077 (u32) adapter->slic_stats.iface.xmt_errors);
2078 seq_printf(seq, "rx stats: multicasts : %8.8lX\n",
2079 netdev->stats.multicast);
2080 seq_printf(seq, "tx stats: collision errors : %8.8X\n",
2081 (u32) adapter->slic_stats.iface.xmit_collisions);
2082 seq_printf(seq, "perf: Max rcv frames/isr : %8.8X\n",
2083 adapter->max_isr_rcvs);
2084 seq_printf(seq, "perf: Rcv interrupt yields : %8.8X\n",
2085 adapter->rcv_interrupt_yields);
2086 seq_printf(seq, "perf: Max xmit complete/isr : %8.8X\n",
2087 adapter->max_isr_xmits);
2088 seq_printf(seq, "perf: error interrupts : %8.8X\n",
2089 adapter->error_interrupts);
2090 seq_printf(seq, "perf: error rmiss interrupts : %8.8X\n",
2091 adapter->error_rmiss_interrupts);
2092 seq_printf(seq, "perf: rcv interrupts : %8.8X\n",
2093 adapter->rcv_interrupts);
2094 seq_printf(seq, "perf: xmit interrupts : %8.8X\n",
2095 adapter->xmit_interrupts);
2096 seq_printf(seq, "perf: link event interrupts : %8.8X\n",
2097 adapter->linkevent_interrupts);
2098 seq_printf(seq, "perf: UPR interrupts : %8.8X\n",
2099 adapter->upr_interrupts);
2100 seq_printf(seq, "perf: interrupt count : %8.8X\n",
2101 adapter->num_isrs);
2102 seq_printf(seq, "perf: false interrupts : %8.8X\n",
2103 adapter->false_interrupts);
2104 seq_printf(seq, "perf: All register writes : %8.8X\n",
2105 adapter->all_reg_writes);
2106 seq_printf(seq, "perf: ICR register writes : %8.8X\n",
2107 adapter->icr_reg_writes);
2108 seq_printf(seq, "perf: ISR register writes : %8.8X\n",
2109 adapter->isr_reg_writes);
2110 seq_printf(seq, "ifevents: overflow 802 errors : %8.8X\n",
2111 adapter->if_events.oflow802);
2112 seq_printf(seq, "ifevents: transport overflow errors: %8.8X\n",
2113 adapter->if_events.Tprtoflow);
2114 seq_printf(seq, "ifevents: underflow errors : %8.8X\n",
2115 adapter->if_events.uflow802);
2116 seq_printf(seq, "ifevents: receive early : %8.8X\n",
2117 adapter->if_events.rcvearly);
2118 seq_printf(seq, "ifevents: buffer overflows : %8.8X\n",
2119 adapter->if_events.Bufov);
2120 seq_printf(seq, "ifevents: carrier errors : %8.8X\n",
2121 adapter->if_events.Carre);
2122 seq_printf(seq, "ifevents: Long : %8.8X\n",
2123 adapter->if_events.Longe);
2124 seq_printf(seq, "ifevents: invalid preambles : %8.8X\n",
2125 adapter->if_events.Invp);
2126 seq_printf(seq, "ifevents: CRC errors : %8.8X\n",
2127 adapter->if_events.Crc);
2128 seq_printf(seq, "ifevents: dribble nibbles : %8.8X\n",
2129 adapter->if_events.Drbl);
2130 seq_printf(seq, "ifevents: Code violations : %8.8X\n",
2131 adapter->if_events.Code);
2132 seq_printf(seq, "ifevents: TCP checksum errors : %8.8X\n",
2133 adapter->if_events.TpCsum);
2134 seq_printf(seq, "ifevents: TCP header short errors : %8.8X\n",
2135 adapter->if_events.TpHlen);
2136 seq_printf(seq, "ifevents: IP checksum errors : %8.8X\n",
2137 adapter->if_events.IpCsum);
2138 seq_printf(seq, "ifevents: IP frame incompletes : %8.8X\n",
2139 adapter->if_events.IpLen);
2140 seq_printf(seq, "ifevents: IP headers shorts : %8.8X\n",
2141 adapter->if_events.IpHlen);
2142
2143 return 0;
2144 }
2145 static int slic_debug_adapter_open(struct inode *inode, struct file *file)
2146 {
2147 return single_open(file, slic_debug_adapter_show, inode->i_private);
2148 }
2149
2150 static int slic_debug_card_open(struct inode *inode, struct file *file)
2151 {
2152 return single_open(file, slic_debug_card_show, inode->i_private);
2153 }
2154
2155 static const struct file_operations slic_debug_adapter_fops = {
2156 .owner = THIS_MODULE,
2157 .open = slic_debug_adapter_open,
2158 .read = seq_read,
2159 .llseek = seq_lseek,
2160 .release = single_release,
2161 };
2162
2163 static const struct file_operations slic_debug_card_fops = {
2164 .owner = THIS_MODULE,
2165 .open = slic_debug_card_open,
2166 .read = seq_read,
2167 .llseek = seq_lseek,
2168 .release = single_release,
2169 };
2170
2171 static void slic_debug_adapter_create(struct adapter *adapter)
2172 {
2173 struct dentry *d;
2174 char name[7];
2175 struct sliccard *card = adapter->card;
2176
2177 if (!card->debugfs_dir)
2178 return;
2179
2180 sprintf(name, "port%d", adapter->port);
2181 d = debugfs_create_file(name, S_IRUGO,
2182 card->debugfs_dir, adapter,
2183 &slic_debug_adapter_fops);
2184 if (!d || IS_ERR(d))
2185 pr_info(PFX "%s: debugfs create failed\n", name);
2186 else
2187 adapter->debugfs_entry = d;
2188 }
2189
2190 static void slic_debug_adapter_destroy(struct adapter *adapter)
2191 {
2192 debugfs_remove(adapter->debugfs_entry);
2193 adapter->debugfs_entry = NULL;
2194 }
2195
2196 static void slic_debug_card_create(struct sliccard *card)
2197 {
2198 struct dentry *d;
2199 char name[IFNAMSIZ];
2200
2201 snprintf(name, sizeof(name), "slic%d", card->cardnum);
2202 d = debugfs_create_dir(name, slic_debugfs);
2203 if (!d || IS_ERR(d))
2204 pr_info(PFX "%s: debugfs create dir failed\n",
2205 name);
2206 else {
2207 card->debugfs_dir = d;
2208 d = debugfs_create_file("cardinfo", S_IRUGO,
2209 slic_debugfs, card,
2210 &slic_debug_card_fops);
2211 if (!d || IS_ERR(d))
2212 pr_info(PFX "%s: debugfs create failed\n",
2213 name);
2214 else
2215 card->debugfs_cardinfo = d;
2216 }
2217 }
2218
2219 static void slic_debug_card_destroy(struct sliccard *card)
2220 {
2221 int i;
2222
2223 for (i = 0; i < card->card_size; i++) {
2224 struct adapter *adapter;
2225
2226 adapter = card->adapter[i];
2227 if (adapter)
2228 slic_debug_adapter_destroy(adapter);
2229 }
2230 debugfs_remove(card->debugfs_cardinfo);
2231 debugfs_remove(card->debugfs_dir);
2232 }
2233
2234 static void slic_debug_init(void)
2235 {
2236 struct dentry *ent;
2237
2238 ent = debugfs_create_dir("slic", NULL);
2239 if (!ent || IS_ERR(ent)) {
2240 pr_info(PFX "debugfs create directory failed\n");
2241 return;
2242 }
2243
2244 slic_debugfs = ent;
2245 }
2246
2247 static void slic_debug_cleanup(void)
2248 {
2249 debugfs_remove(slic_debugfs);
2250 }
2251
2252 /*
2253 * slic_link_event_handler -
2254 *
2255 * Initiate a link configuration sequence. The link configuration begins
2256 * by issuing a READ_LINK_STATUS command to the Utility Processor on the
2257 * SLIC. Since the command finishes asynchronously, the slic_upr_comlete
2258 * routine will follow it up witha UP configuration write command, which
2259 * will also complete asynchronously.
2260 *
2261 */
2262 static void slic_link_event_handler(struct adapter *adapter)
2263 {
2264 int status;
2265 struct slic_shmem *pshmem;
2266
2267 if (adapter->state != ADAPT_UP) {
2268 /* Adapter is not operational. Ignore. */
2269 return;
2270 }
2271
2272 pshmem = (struct slic_shmem *)(unsigned long)adapter->phys_shmem;
2273
2274 #if BITS_PER_LONG == 64
2275 status = slic_upr_request(adapter,
2276 SLIC_UPR_RLSR,
2277 SLIC_GET_ADDR_LOW(&pshmem->linkstatus),
2278 SLIC_GET_ADDR_HIGH(&pshmem->linkstatus),
2279 0, 0);
2280 #else
2281 status = slic_upr_request(adapter, SLIC_UPR_RLSR,
2282 (u32) &pshmem->linkstatus, /* no 4GB wrap guaranteed */
2283 0, 0, 0);
2284 #endif
2285 }
2286
2287 static void slic_init_cleanup(struct adapter *adapter)
2288 {
2289 if (adapter->intrregistered) {
2290 adapter->intrregistered = 0;
2291 free_irq(adapter->netdev->irq, adapter->netdev);
2292
2293 }
2294 if (adapter->pshmem) {
2295 pci_free_consistent(adapter->pcidev,
2296 sizeof(struct slic_shmem),
2297 adapter->pshmem, adapter->phys_shmem);
2298 adapter->pshmem = NULL;
2299 adapter->phys_shmem = (dma_addr_t)(unsigned long)NULL;
2300 }
2301
2302 if (adapter->pingtimerset) {
2303 adapter->pingtimerset = 0;
2304 del_timer(&adapter->pingtimer);
2305 }
2306
2307 slic_rspqueue_free(adapter);
2308 slic_cmdq_free(adapter);
2309 slic_rcvqueue_free(adapter);
2310 }
2311
2312 /*
2313 * Allocate a mcast_address structure to hold the multicast address.
2314 * Link it in.
2315 */
2316 static int slic_mcast_add_list(struct adapter *adapter, char *address)
2317 {
2318 struct mcast_address *mcaddr, *mlist;
2319
2320 /* Check to see if it already exists */
2321 mlist = adapter->mcastaddrs;
2322 while (mlist) {
2323 if (ether_addr_equal(mlist->address, address))
2324 return 0;
2325 mlist = mlist->next;
2326 }
2327
2328 /* Doesn't already exist. Allocate a structure to hold it */
2329 mcaddr = kmalloc(sizeof(struct mcast_address), GFP_ATOMIC);
2330 if (mcaddr == NULL)
2331 return 1;
2332
2333 memcpy(mcaddr->address, address, ETH_ALEN);
2334
2335 mcaddr->next = adapter->mcastaddrs;
2336 adapter->mcastaddrs = mcaddr;
2337
2338 return 0;
2339 }
2340
2341 static void slic_mcast_set_list(struct net_device *dev)
2342 {
2343 struct adapter *adapter = netdev_priv(dev);
2344 int status = 0;
2345 char *addresses;
2346 struct netdev_hw_addr *ha;
2347
2348 netdev_for_each_mc_addr(ha, dev) {
2349 addresses = (char *) &ha->addr;
2350 status = slic_mcast_add_list(adapter, addresses);
2351 if (status != 0)
2352 break;
2353 slic_mcast_set_bit(adapter, addresses);
2354 }
2355
2356 if (adapter->devflags_prev != dev->flags) {
2357 adapter->macopts = MAC_DIRECTED;
2358 if (dev->flags) {
2359 if (dev->flags & IFF_BROADCAST)
2360 adapter->macopts |= MAC_BCAST;
2361 if (dev->flags & IFF_PROMISC)
2362 adapter->macopts |= MAC_PROMISC;
2363 if (dev->flags & IFF_ALLMULTI)
2364 adapter->macopts |= MAC_ALLMCAST;
2365 if (dev->flags & IFF_MULTICAST)
2366 adapter->macopts |= MAC_MCAST;
2367 }
2368 adapter->devflags_prev = dev->flags;
2369 slic_config_set(adapter, true);
2370 } else {
2371 if (status == 0)
2372 slic_mcast_set_mask(adapter);
2373 }
2374 }
2375
2376 #define XMIT_FAIL_LINK_STATE 1
2377 #define XMIT_FAIL_ZERO_LENGTH 2
2378 #define XMIT_FAIL_HOSTCMD_FAIL 3
2379
2380 static void slic_xmit_build_request(struct adapter *adapter,
2381 struct slic_hostcmd *hcmd, struct sk_buff *skb)
2382 {
2383 struct slic_host64_cmd *ihcmd;
2384 ulong phys_addr;
2385
2386 ihcmd = &hcmd->cmd64;
2387
2388 ihcmd->flags = (adapter->port << IHFLG_IFSHFT);
2389 ihcmd->command = IHCMD_XMT_REQ;
2390 ihcmd->u.slic_buffers.totlen = skb->len;
2391 phys_addr = pci_map_single(adapter->pcidev, skb->data, skb->len,
2392 PCI_DMA_TODEVICE);
2393 ihcmd->u.slic_buffers.bufs[0].paddrl = SLIC_GET_ADDR_LOW(phys_addr);
2394 ihcmd->u.slic_buffers.bufs[0].paddrh = SLIC_GET_ADDR_HIGH(phys_addr);
2395 ihcmd->u.slic_buffers.bufs[0].length = skb->len;
2396 #if BITS_PER_LONG == 64
2397 hcmd->cmdsize = (u32) ((((u64)&ihcmd->u.slic_buffers.bufs[1] -
2398 (u64) hcmd) + 31) >> 5);
2399 #else
2400 hcmd->cmdsize = ((((u32) &ihcmd->u.slic_buffers.bufs[1] -
2401 (u32) hcmd) + 31) >> 5);
2402 #endif
2403 }
2404
2405 static void slic_xmit_fail(struct adapter *adapter,
2406 struct sk_buff *skb,
2407 void *cmd, u32 skbtype, u32 status)
2408 {
2409 if (adapter->xmitq_full)
2410 netif_stop_queue(adapter->netdev);
2411 if ((cmd == NULL) && (status <= XMIT_FAIL_HOSTCMD_FAIL)) {
2412 switch (status) {
2413 case XMIT_FAIL_LINK_STATE:
2414 dev_err(&adapter->netdev->dev,
2415 "reject xmit skb[%p: %x] linkstate[%s] "
2416 "adapter[%s:%d] card[%s:%d]\n",
2417 skb, skb->pkt_type,
2418 SLIC_LINKSTATE(adapter->linkstate),
2419 SLIC_ADAPTER_STATE(adapter->state),
2420 adapter->state,
2421 SLIC_CARD_STATE(adapter->card->state),
2422 adapter->card->state);
2423 break;
2424 case XMIT_FAIL_ZERO_LENGTH:
2425 dev_err(&adapter->netdev->dev,
2426 "xmit_start skb->len == 0 skb[%p] type[%x]\n",
2427 skb, skb->pkt_type);
2428 break;
2429 case XMIT_FAIL_HOSTCMD_FAIL:
2430 dev_err(&adapter->netdev->dev,
2431 "xmit_start skb[%p] type[%x] No host commands "
2432 "available\n", skb, skb->pkt_type);
2433 break;
2434 }
2435 }
2436 dev_kfree_skb(skb);
2437 adapter->netdev->stats.tx_dropped++;
2438 }
2439
2440 static void slic_rcv_handle_error(struct adapter *adapter,
2441 struct slic_rcvbuf *rcvbuf)
2442 {
2443 struct slic_hddr_wds *hdr = (struct slic_hddr_wds *)rcvbuf->data;
2444 struct net_device *netdev = adapter->netdev;
2445
2446 if (adapter->devid != SLIC_1GB_DEVICE_ID) {
2447 if (hdr->frame_status14 & VRHSTAT_802OE)
2448 adapter->if_events.oflow802++;
2449 if (hdr->frame_status14 & VRHSTAT_TPOFLO)
2450 adapter->if_events.Tprtoflow++;
2451 if (hdr->frame_status_b14 & VRHSTATB_802UE)
2452 adapter->if_events.uflow802++;
2453 if (hdr->frame_status_b14 & VRHSTATB_RCVE) {
2454 adapter->if_events.rcvearly++;
2455 netdev->stats.rx_fifo_errors++;
2456 }
2457 if (hdr->frame_status_b14 & VRHSTATB_BUFF) {
2458 adapter->if_events.Bufov++;
2459 netdev->stats.rx_over_errors++;
2460 }
2461 if (hdr->frame_status_b14 & VRHSTATB_CARRE) {
2462 adapter->if_events.Carre++;
2463 netdev->stats.tx_carrier_errors++;
2464 }
2465 if (hdr->frame_status_b14 & VRHSTATB_LONGE)
2466 adapter->if_events.Longe++;
2467 if (hdr->frame_status_b14 & VRHSTATB_PREA)
2468 adapter->if_events.Invp++;
2469 if (hdr->frame_status_b14 & VRHSTATB_CRC) {
2470 adapter->if_events.Crc++;
2471 netdev->stats.rx_crc_errors++;
2472 }
2473 if (hdr->frame_status_b14 & VRHSTATB_DRBL)
2474 adapter->if_events.Drbl++;
2475 if (hdr->frame_status_b14 & VRHSTATB_CODE)
2476 adapter->if_events.Code++;
2477 if (hdr->frame_status_b14 & VRHSTATB_TPCSUM)
2478 adapter->if_events.TpCsum++;
2479 if (hdr->frame_status_b14 & VRHSTATB_TPHLEN)
2480 adapter->if_events.TpHlen++;
2481 if (hdr->frame_status_b14 & VRHSTATB_IPCSUM)
2482 adapter->if_events.IpCsum++;
2483 if (hdr->frame_status_b14 & VRHSTATB_IPLERR)
2484 adapter->if_events.IpLen++;
2485 if (hdr->frame_status_b14 & VRHSTATB_IPHERR)
2486 adapter->if_events.IpHlen++;
2487 } else {
2488 if (hdr->frame_statusGB & VGBSTAT_XPERR) {
2489 u32 xerr = hdr->frame_statusGB >> VGBSTAT_XERRSHFT;
2490
2491 if (xerr == VGBSTAT_XCSERR)
2492 adapter->if_events.TpCsum++;
2493 if (xerr == VGBSTAT_XUFLOW)
2494 adapter->if_events.Tprtoflow++;
2495 if (xerr == VGBSTAT_XHLEN)
2496 adapter->if_events.TpHlen++;
2497 }
2498 if (hdr->frame_statusGB & VGBSTAT_NETERR) {
2499 u32 nerr =
2500 (hdr->
2501 frame_statusGB >> VGBSTAT_NERRSHFT) &
2502 VGBSTAT_NERRMSK;
2503 if (nerr == VGBSTAT_NCSERR)
2504 adapter->if_events.IpCsum++;
2505 if (nerr == VGBSTAT_NUFLOW)
2506 adapter->if_events.IpLen++;
2507 if (nerr == VGBSTAT_NHLEN)
2508 adapter->if_events.IpHlen++;
2509 }
2510 if (hdr->frame_statusGB & VGBSTAT_LNKERR) {
2511 u32 lerr = hdr->frame_statusGB & VGBSTAT_LERRMSK;
2512
2513 if (lerr == VGBSTAT_LDEARLY)
2514 adapter->if_events.rcvearly++;
2515 if (lerr == VGBSTAT_LBOFLO)
2516 adapter->if_events.Bufov++;
2517 if (lerr == VGBSTAT_LCODERR)
2518 adapter->if_events.Code++;
2519 if (lerr == VGBSTAT_LDBLNBL)
2520 adapter->if_events.Drbl++;
2521 if (lerr == VGBSTAT_LCRCERR)
2522 adapter->if_events.Crc++;
2523 if (lerr == VGBSTAT_LOFLO)
2524 adapter->if_events.oflow802++;
2525 if (lerr == VGBSTAT_LUFLO)
2526 adapter->if_events.uflow802++;
2527 }
2528 }
2529 return;
2530 }
2531
2532 #define TCP_OFFLOAD_FRAME_PUSHFLAG 0x10000000
2533 #define M_FAST_PATH 0x0040
2534
2535 static void slic_rcv_handler(struct adapter *adapter)
2536 {
2537 struct net_device *netdev = adapter->netdev;
2538 struct sk_buff *skb;
2539 struct slic_rcvbuf *rcvbuf;
2540 u32 frames = 0;
2541
2542 while ((skb = slic_rcvqueue_getnext(adapter))) {
2543 u32 rx_bytes;
2544
2545 rcvbuf = (struct slic_rcvbuf *)skb->head;
2546 adapter->card->events++;
2547 if (rcvbuf->status & IRHDDR_ERR) {
2548 adapter->rx_errors++;
2549 slic_rcv_handle_error(adapter, rcvbuf);
2550 slic_rcvqueue_reinsert(adapter, skb);
2551 continue;
2552 }
2553
2554 if (!slic_mac_filter(adapter, (struct ether_header *)
2555 rcvbuf->data)) {
2556 slic_rcvqueue_reinsert(adapter, skb);
2557 continue;
2558 }
2559 skb_pull(skb, SLIC_RCVBUF_HEADSIZE);
2560 rx_bytes = (rcvbuf->length & IRHDDR_FLEN_MSK);
2561 skb_put(skb, rx_bytes);
2562 netdev->stats.rx_packets++;
2563 netdev->stats.rx_bytes += rx_bytes;
2564 #if SLIC_OFFLOAD_IP_CHECKSUM
2565 skb->ip_summed = CHECKSUM_UNNECESSARY;
2566 #endif
2567
2568 skb->dev = adapter->netdev;
2569 skb->protocol = eth_type_trans(skb, skb->dev);
2570 netif_rx(skb);
2571
2572 ++frames;
2573 #if SLIC_INTERRUPT_PROCESS_LIMIT
2574 if (frames >= SLIC_RCVQ_MAX_PROCESS_ISR) {
2575 adapter->rcv_interrupt_yields++;
2576 break;
2577 }
2578 #endif
2579 }
2580 adapter->max_isr_rcvs = max(adapter->max_isr_rcvs, frames);
2581 }
2582
2583 static void slic_xmit_complete(struct adapter *adapter)
2584 {
2585 struct slic_hostcmd *hcmd;
2586 struct slic_rspbuf *rspbuf;
2587 u32 frames = 0;
2588 struct slic_handle_word slic_handle_word;
2589
2590 do {
2591 rspbuf = slic_rspqueue_getnext(adapter);
2592 if (!rspbuf)
2593 break;
2594 adapter->xmit_completes++;
2595 adapter->card->events++;
2596 /*
2597 Get the complete host command buffer
2598 */
2599 slic_handle_word.handle_token = rspbuf->hosthandle;
2600 hcmd =
2601 (struct slic_hostcmd *)
2602 adapter->slic_handles[slic_handle_word.handle_index].
2603 address;
2604 /* hcmd = (struct slic_hostcmd *) rspbuf->hosthandle; */
2605 if (hcmd->type == SLIC_CMD_DUMB) {
2606 if (hcmd->skb)
2607 dev_kfree_skb_irq(hcmd->skb);
2608 slic_cmdq_putdone_irq(adapter, hcmd);
2609 }
2610 rspbuf->status = 0;
2611 rspbuf->hosthandle = 0;
2612 frames++;
2613 } while (1);
2614 adapter->max_isr_xmits = max(adapter->max_isr_xmits, frames);
2615 }
2616
2617 static void slic_interrupt_card_up(u32 isr, struct adapter *adapter,
2618 struct net_device *dev)
2619 {
2620 if (isr & ~ISR_IO) {
2621 if (isr & ISR_ERR) {
2622 adapter->error_interrupts++;
2623 if (isr & ISR_RMISS) {
2624 int count;
2625 int pre_count;
2626 int errors;
2627
2628 struct slic_rcvqueue *rcvq =
2629 &adapter->rcvqueue;
2630
2631 adapter->error_rmiss_interrupts++;
2632
2633 if (!rcvq->errors)
2634 rcv_count = rcvq->count;
2635 pre_count = rcvq->count;
2636 errors = rcvq->errors;
2637
2638 while (rcvq->count < SLIC_RCVQ_FILLTHRESH) {
2639 count = slic_rcvqueue_fill(adapter);
2640 if (!count)
2641 break;
2642 }
2643 } else if (isr & ISR_XDROP) {
2644 dev_err(&dev->dev,
2645 "isr & ISR_ERR [%x] "
2646 "ISR_XDROP \n", isr);
2647 } else {
2648 dev_err(&dev->dev,
2649 "isr & ISR_ERR [%x]\n",
2650 isr);
2651 }
2652 }
2653
2654 if (isr & ISR_LEVENT) {
2655 adapter->linkevent_interrupts++;
2656 slic_link_event_handler(adapter);
2657 }
2658
2659 if ((isr & ISR_UPC) || (isr & ISR_UPCERR) ||
2660 (isr & ISR_UPCBSY)) {
2661 adapter->upr_interrupts++;
2662 slic_upr_request_complete(adapter, isr);
2663 }
2664 }
2665
2666 if (isr & ISR_RCV) {
2667 adapter->rcv_interrupts++;
2668 slic_rcv_handler(adapter);
2669 }
2670
2671 if (isr & ISR_CMD) {
2672 adapter->xmit_interrupts++;
2673 slic_xmit_complete(adapter);
2674 }
2675 }
2676
2677
2678 static irqreturn_t slic_interrupt(int irq, void *dev_id)
2679 {
2680 struct net_device *dev = (struct net_device *)dev_id;
2681 struct adapter *adapter = netdev_priv(dev);
2682 u32 isr;
2683
2684 if ((adapter->pshmem) && (adapter->pshmem->isr)) {
2685 slic_reg32_write(&adapter->slic_regs->slic_icr,
2686 ICR_INT_MASK, FLUSH);
2687 isr = adapter->isrcopy = adapter->pshmem->isr;
2688 adapter->pshmem->isr = 0;
2689 adapter->num_isrs++;
2690 switch (adapter->card->state) {
2691 case CARD_UP:
2692 slic_interrupt_card_up(isr, adapter, dev);
2693 break;
2694
2695 case CARD_DOWN:
2696 if ((isr & ISR_UPC) ||
2697 (isr & ISR_UPCERR) || (isr & ISR_UPCBSY)) {
2698 adapter->upr_interrupts++;
2699 slic_upr_request_complete(adapter, isr);
2700 }
2701 break;
2702 }
2703
2704 adapter->isrcopy = 0;
2705 adapter->all_reg_writes += 2;
2706 adapter->isr_reg_writes++;
2707 slic_reg32_write(&adapter->slic_regs->slic_isr, 0, FLUSH);
2708 } else {
2709 adapter->false_interrupts++;
2710 }
2711 return IRQ_HANDLED;
2712 }
2713
2714 #define NORMAL_ETHFRAME 0
2715
2716 static netdev_tx_t slic_xmit_start(struct sk_buff *skb, struct net_device *dev)
2717 {
2718 struct sliccard *card;
2719 struct adapter *adapter = netdev_priv(dev);
2720 struct slic_hostcmd *hcmd = NULL;
2721 u32 status = 0;
2722 void *offloadcmd = NULL;
2723
2724 card = adapter->card;
2725 if ((adapter->linkstate != LINK_UP) ||
2726 (adapter->state != ADAPT_UP) || (card->state != CARD_UP)) {
2727 status = XMIT_FAIL_LINK_STATE;
2728 goto xmit_fail;
2729
2730 } else if (skb->len == 0) {
2731 status = XMIT_FAIL_ZERO_LENGTH;
2732 goto xmit_fail;
2733 }
2734
2735 hcmd = slic_cmdq_getfree(adapter);
2736 if (!hcmd) {
2737 adapter->xmitq_full = 1;
2738 status = XMIT_FAIL_HOSTCMD_FAIL;
2739 goto xmit_fail;
2740 }
2741 hcmd->skb = skb;
2742 hcmd->busy = 1;
2743 hcmd->type = SLIC_CMD_DUMB;
2744 slic_xmit_build_request(adapter, hcmd, skb);
2745 dev->stats.tx_packets++;
2746 dev->stats.tx_bytes += skb->len;
2747
2748 #ifdef DEBUG_DUMP
2749 if (adapter->kill_card) {
2750 struct slic_host64_cmd ihcmd;
2751
2752 ihcmd = &hcmd->cmd64;
2753
2754 ihcmd->flags |= 0x40;
2755 adapter->kill_card = 0; /* only do this once */
2756 }
2757 #endif
2758 if (hcmd->paddrh == 0) {
2759 slic_reg32_write(&adapter->slic_regs->slic_cbar,
2760 (hcmd->paddrl | hcmd->cmdsize), DONT_FLUSH);
2761 } else {
2762 slic_reg64_write(adapter, &adapter->slic_regs->slic_cbar64,
2763 (hcmd->paddrl | hcmd->cmdsize),
2764 &adapter->slic_regs->slic_addr_upper,
2765 hcmd->paddrh, DONT_FLUSH);
2766 }
2767 xmit_done:
2768 return NETDEV_TX_OK;
2769 xmit_fail:
2770 slic_xmit_fail(adapter, skb, offloadcmd, NORMAL_ETHFRAME, status);
2771 goto xmit_done;
2772 }
2773
2774
2775 static void slic_adapter_freeresources(struct adapter *adapter)
2776 {
2777 slic_init_cleanup(adapter);
2778 adapter->error_interrupts = 0;
2779 adapter->rcv_interrupts = 0;
2780 adapter->xmit_interrupts = 0;
2781 adapter->linkevent_interrupts = 0;
2782 adapter->upr_interrupts = 0;
2783 adapter->num_isrs = 0;
2784 adapter->xmit_completes = 0;
2785 adapter->rcv_broadcasts = 0;
2786 adapter->rcv_multicasts = 0;
2787 adapter->rcv_unicasts = 0;
2788 }
2789
2790 static int slic_adapter_allocresources(struct adapter *adapter)
2791 {
2792 if (!adapter->intrregistered) {
2793 int retval;
2794
2795 spin_unlock_irqrestore(&slic_global.driver_lock.lock,
2796 slic_global.driver_lock.flags);
2797
2798 retval = request_irq(adapter->netdev->irq,
2799 &slic_interrupt,
2800 IRQF_SHARED,
2801 adapter->netdev->name, adapter->netdev);
2802
2803 spin_lock_irqsave(&slic_global.driver_lock.lock,
2804 slic_global.driver_lock.flags);
2805
2806 if (retval) {
2807 dev_err(&adapter->netdev->dev,
2808 "request_irq (%s) FAILED [%x]\n",
2809 adapter->netdev->name, retval);
2810 return retval;
2811 }
2812 adapter->intrregistered = 1;
2813 }
2814 return 0;
2815 }
2816
2817 /*
2818 * slic_if_init
2819 *
2820 * Perform initialization of our slic interface.
2821 *
2822 */
2823 static int slic_if_init(struct adapter *adapter)
2824 {
2825 struct sliccard *card = adapter->card;
2826 struct net_device *dev = adapter->netdev;
2827 __iomem struct slic_regs *slic_regs = adapter->slic_regs;
2828 struct slic_shmem *pshmem;
2829 int rc;
2830
2831 /* adapter should be down at this point */
2832 if (adapter->state != ADAPT_DOWN) {
2833 dev_err(&dev->dev, "%s: adapter->state != ADAPT_DOWN\n",
2834 __func__);
2835 rc = -EIO;
2836 goto err;
2837 }
2838
2839 adapter->devflags_prev = dev->flags;
2840 adapter->macopts = MAC_DIRECTED;
2841 if (dev->flags) {
2842 if (dev->flags & IFF_BROADCAST)
2843 adapter->macopts |= MAC_BCAST;
2844 if (dev->flags & IFF_PROMISC)
2845 adapter->macopts |= MAC_PROMISC;
2846 if (dev->flags & IFF_ALLMULTI)
2847 adapter->macopts |= MAC_ALLMCAST;
2848 if (dev->flags & IFF_MULTICAST)
2849 adapter->macopts |= MAC_MCAST;
2850 }
2851 rc = slic_adapter_allocresources(adapter);
2852 if (rc) {
2853 dev_err(&dev->dev,
2854 "%s: slic_adapter_allocresources FAILED %x\n",
2855 __func__, rc);
2856 slic_adapter_freeresources(adapter);
2857 goto err;
2858 }
2859
2860 if (!adapter->queues_initialized) {
2861 rc = slic_rspqueue_init(adapter);
2862 if (rc)
2863 goto err;
2864 rc = slic_cmdq_init(adapter);
2865 if (rc)
2866 goto err;
2867 rc = slic_rcvqueue_init(adapter);
2868 if (rc)
2869 goto err;
2870 adapter->queues_initialized = 1;
2871 }
2872
2873 slic_reg32_write(&slic_regs->slic_icr, ICR_INT_OFF, FLUSH);
2874 mdelay(1);
2875
2876 if (!adapter->isp_initialized) {
2877 pshmem = (struct slic_shmem *)(unsigned long)
2878 adapter->phys_shmem;
2879
2880 spin_lock_irqsave(&adapter->bit64reglock.lock,
2881 adapter->bit64reglock.flags);
2882
2883 #if BITS_PER_LONG == 64
2884 slic_reg32_write(&slic_regs->slic_addr_upper,
2885 SLIC_GET_ADDR_HIGH(&pshmem->isr), DONT_FLUSH);
2886 slic_reg32_write(&slic_regs->slic_isp,
2887 SLIC_GET_ADDR_LOW(&pshmem->isr), FLUSH);
2888 #else
2889 slic_reg32_write(&slic_regs->slic_addr_upper, 0, DONT_FLUSH);
2890 slic_reg32_write(&slic_regs->slic_isp, (u32)&pshmem->isr, FLUSH);
2891 #endif
2892 spin_unlock_irqrestore(&adapter->bit64reglock.lock,
2893 adapter->bit64reglock.flags);
2894 adapter->isp_initialized = 1;
2895 }
2896
2897 adapter->state = ADAPT_UP;
2898 if (!card->loadtimerset) {
2899 init_timer(&card->loadtimer);
2900 card->loadtimer.expires =
2901 jiffies + (SLIC_LOADTIMER_PERIOD * HZ);
2902 card->loadtimer.data = (ulong) card;
2903 card->loadtimer.function = &slic_timer_load_check;
2904 add_timer(&card->loadtimer);
2905
2906 card->loadtimerset = 1;
2907 }
2908
2909 if (!adapter->pingtimerset) {
2910 init_timer(&adapter->pingtimer);
2911 adapter->pingtimer.expires =
2912 jiffies + (PING_TIMER_INTERVAL * HZ);
2913 adapter->pingtimer.data = (ulong) dev;
2914 adapter->pingtimer.function = &slic_timer_ping;
2915 add_timer(&adapter->pingtimer);
2916 adapter->pingtimerset = 1;
2917 adapter->card->pingstatus = ISR_PINGMASK;
2918 }
2919
2920 /*
2921 * clear any pending events, then enable interrupts
2922 */
2923 adapter->isrcopy = 0;
2924 adapter->pshmem->isr = 0;
2925 slic_reg32_write(&slic_regs->slic_isr, 0, FLUSH);
2926 slic_reg32_write(&slic_regs->slic_icr, ICR_INT_ON, FLUSH);
2927
2928 slic_link_config(adapter, LINK_AUTOSPEED, LINK_AUTOD);
2929 slic_link_event_handler(adapter);
2930
2931 err:
2932 return rc;
2933 }
2934
2935 static int slic_entry_open(struct net_device *dev)
2936 {
2937 struct adapter *adapter = netdev_priv(dev);
2938 struct sliccard *card = adapter->card;
2939 int status;
2940
2941 netif_stop_queue(adapter->netdev);
2942
2943 spin_lock_irqsave(&slic_global.driver_lock.lock,
2944 slic_global.driver_lock.flags);
2945 if (!adapter->activated) {
2946 card->adapters_activated++;
2947 slic_global.num_slic_ports_active++;
2948 adapter->activated = 1;
2949 }
2950 status = slic_if_init(adapter);
2951
2952 if (status != 0) {
2953 if (adapter->activated) {
2954 card->adapters_activated--;
2955 slic_global.num_slic_ports_active--;
2956 adapter->activated = 0;
2957 }
2958 goto spin_unlock;
2959 }
2960 if (!card->master)
2961 card->master = adapter;
2962
2963 spin_unlock:
2964 spin_unlock_irqrestore(&slic_global.driver_lock.lock,
2965 slic_global.driver_lock.flags);
2966 return status;
2967 }
2968
2969 static void slic_card_cleanup(struct sliccard *card)
2970 {
2971 if (card->loadtimerset) {
2972 card->loadtimerset = 0;
2973 del_timer(&card->loadtimer);
2974 }
2975
2976 slic_debug_card_destroy(card);
2977
2978 kfree(card);
2979 }
2980
2981 static void slic_entry_remove(struct pci_dev *pcidev)
2982 {
2983 struct net_device *dev = pci_get_drvdata(pcidev);
2984 u32 mmio_start = 0;
2985 uint mmio_len = 0;
2986 struct adapter *adapter = netdev_priv(dev);
2987 struct sliccard *card;
2988 struct mcast_address *mcaddr, *mlist;
2989
2990 slic_adapter_freeresources(adapter);
2991 slic_unmap_mmio_space(adapter);
2992 unregister_netdev(dev);
2993
2994 mmio_start = pci_resource_start(pcidev, 0);
2995 mmio_len = pci_resource_len(pcidev, 0);
2996
2997 release_mem_region(mmio_start, mmio_len);
2998
2999 iounmap((void __iomem *)dev->base_addr);
3000 /* free multicast addresses */
3001 mlist = adapter->mcastaddrs;
3002 while (mlist) {
3003 mcaddr = mlist;
3004 mlist = mlist->next;
3005 kfree(mcaddr);
3006 }
3007 card = adapter->card;
3008 card->adapters_allocated--;
3009 adapter->allocated = 0;
3010 if (!card->adapters_allocated) {
3011 struct sliccard *curr_card = slic_global.slic_card;
3012 if (curr_card == card) {
3013 slic_global.slic_card = card->next;
3014 } else {
3015 while (curr_card->next != card)
3016 curr_card = curr_card->next;
3017 curr_card->next = card->next;
3018 }
3019 slic_global.num_slic_cards--;
3020 slic_card_cleanup(card);
3021 }
3022 free_netdev(dev);
3023 pci_release_regions(pcidev);
3024 pci_disable_device(pcidev);
3025 }
3026
3027 static int slic_entry_halt(struct net_device *dev)
3028 {
3029 struct adapter *adapter = netdev_priv(dev);
3030 struct sliccard *card = adapter->card;
3031 __iomem struct slic_regs *slic_regs = adapter->slic_regs;
3032
3033 spin_lock_irqsave(&slic_global.driver_lock.lock,
3034 slic_global.driver_lock.flags);
3035 netif_stop_queue(adapter->netdev);
3036 adapter->state = ADAPT_DOWN;
3037 adapter->linkstate = LINK_DOWN;
3038 adapter->upr_list = NULL;
3039 adapter->upr_busy = 0;
3040 adapter->devflags_prev = 0;
3041 slic_reg32_write(&slic_regs->slic_icr, ICR_INT_OFF, FLUSH);
3042 adapter->all_reg_writes++;
3043 adapter->icr_reg_writes++;
3044 slic_config_clear(adapter);
3045 if (adapter->activated) {
3046 card->adapters_activated--;
3047 slic_global.num_slic_ports_active--;
3048 adapter->activated = 0;
3049 }
3050 #ifdef AUTOMATIC_RESET
3051 slic_reg32_write(&slic_regs->slic_reset_iface, 0, FLUSH);
3052 #endif
3053 /*
3054 * Reset the adapter's cmd queues
3055 */
3056 slic_cmdq_reset(adapter);
3057
3058 #ifdef AUTOMATIC_RESET
3059 if (!card->adapters_activated)
3060 slic_card_init(card, adapter);
3061 #endif
3062
3063 spin_unlock_irqrestore(&slic_global.driver_lock.lock,
3064 slic_global.driver_lock.flags);
3065 return 0;
3066 }
3067
3068 static struct net_device_stats *slic_get_stats(struct net_device *dev)
3069 {
3070 struct adapter *adapter = netdev_priv(dev);
3071
3072 dev->stats.collisions = adapter->slic_stats.iface.xmit_collisions;
3073 dev->stats.rx_errors = adapter->slic_stats.iface.rcv_errors;
3074 dev->stats.tx_errors = adapter->slic_stats.iface.xmt_errors;
3075 dev->stats.rx_missed_errors = adapter->slic_stats.iface.rcv_discards;
3076 dev->stats.tx_heartbeat_errors = 0;
3077 dev->stats.tx_aborted_errors = 0;
3078 dev->stats.tx_window_errors = 0;
3079 dev->stats.tx_fifo_errors = 0;
3080 dev->stats.rx_frame_errors = 0;
3081 dev->stats.rx_length_errors = 0;
3082
3083 return &dev->stats;
3084 }
3085
3086 static int slic_ioctl(struct net_device *dev, struct ifreq *rq, int cmd)
3087 {
3088 struct adapter *adapter = netdev_priv(dev);
3089 struct ethtool_cmd edata;
3090 struct ethtool_cmd ecmd;
3091 u32 data[7];
3092 u32 intagg;
3093
3094 switch (cmd) {
3095 case SIOCSLICSETINTAGG:
3096 if (copy_from_user(data, rq->ifr_data, 28))
3097 return -EFAULT;
3098 intagg = data[0];
3099 dev_err(&dev->dev, "%s: set interrupt aggregation to %d\n",
3100 __func__, intagg);
3101 slic_intagg_set(adapter, intagg);
3102 return 0;
3103
3104 #ifdef SLIC_TRACE_DUMP_ENABLED
3105 case SIOCSLICTRACEDUMP:
3106 {
3107 u32 value;
3108 DBG_IOCTL("slic_ioctl SIOCSLIC_TRACE_DUMP\n");
3109
3110 if (copy_from_user(data, rq->ifr_data, 28)) {
3111 PRINT_ERROR
3112 ("slic: copy_from_user FAILED getting initial simba param\n");
3113 return -EFAULT;
3114 }
3115
3116 value = data[0];
3117 if (tracemon_request == SLIC_DUMP_DONE) {
3118 PRINT_ERROR
3119 ("ATK Diagnostic Trace Dump Requested\n");
3120 tracemon_request = SLIC_DUMP_REQUESTED;
3121 tracemon_request_type = value;
3122 tracemon_timestamp = jiffies;
3123 } else if ((tracemon_request == SLIC_DUMP_REQUESTED) ||
3124 (tracemon_request ==
3125 SLIC_DUMP_IN_PROGRESS)) {
3126 PRINT_ERROR
3127 ("ATK Diagnostic Trace Dump Requested but already in progress... ignore\n");
3128 } else {
3129 PRINT_ERROR
3130 ("ATK Diagnostic Trace Dump Requested\n");
3131 tracemon_request = SLIC_DUMP_REQUESTED;
3132 tracemon_request_type = value;
3133 tracemon_timestamp = jiffies;
3134 }
3135 return 0;
3136 }
3137 #endif
3138 case SIOCETHTOOL:
3139 if (copy_from_user(&ecmd, rq->ifr_data, sizeof(ecmd)))
3140 return -EFAULT;
3141
3142 if (ecmd.cmd == ETHTOOL_GSET) {
3143 memset(&edata, 0, sizeof(edata));
3144 edata.supported = (SUPPORTED_10baseT_Half |
3145 SUPPORTED_10baseT_Full |
3146 SUPPORTED_100baseT_Half |
3147 SUPPORTED_100baseT_Full |
3148 SUPPORTED_Autoneg | SUPPORTED_MII);
3149 edata.port = PORT_MII;
3150 edata.transceiver = XCVR_INTERNAL;
3151 edata.phy_address = 0;
3152 if (adapter->linkspeed == LINK_100MB)
3153 edata.speed = SPEED_100;
3154 else if (adapter->linkspeed == LINK_10MB)
3155 edata.speed = SPEED_10;
3156 else
3157 edata.speed = 0;
3158
3159 if (adapter->linkduplex == LINK_FULLD)
3160 edata.duplex = DUPLEX_FULL;
3161 else
3162 edata.duplex = DUPLEX_HALF;
3163
3164 edata.autoneg = AUTONEG_ENABLE;
3165 edata.maxtxpkt = 1;
3166 edata.maxrxpkt = 1;
3167 if (copy_to_user(rq->ifr_data, &edata, sizeof(edata)))
3168 return -EFAULT;
3169
3170 } else if (ecmd.cmd == ETHTOOL_SSET) {
3171 if (!capable(CAP_NET_ADMIN))
3172 return -EPERM;
3173
3174 if (adapter->linkspeed == LINK_100MB)
3175 edata.speed = SPEED_100;
3176 else if (adapter->linkspeed == LINK_10MB)
3177 edata.speed = SPEED_10;
3178 else
3179 edata.speed = 0;
3180
3181 if (adapter->linkduplex == LINK_FULLD)
3182 edata.duplex = DUPLEX_FULL;
3183 else
3184 edata.duplex = DUPLEX_HALF;
3185
3186 edata.autoneg = AUTONEG_ENABLE;
3187 edata.maxtxpkt = 1;
3188 edata.maxrxpkt = 1;
3189 if ((ecmd.speed != edata.speed) ||
3190 (ecmd.duplex != edata.duplex)) {
3191 u32 speed;
3192 u32 duplex;
3193
3194 if (ecmd.speed == SPEED_10)
3195 speed = 0;
3196 else
3197 speed = PCR_SPEED_100;
3198 if (ecmd.duplex == DUPLEX_FULL)
3199 duplex = PCR_DUPLEX_FULL;
3200 else
3201 duplex = 0;
3202 slic_link_config(adapter, speed, duplex);
3203 slic_link_event_handler(adapter);
3204 }
3205 }
3206 return 0;
3207 default:
3208 return -EOPNOTSUPP;
3209 }
3210 }
3211
3212 static void slic_config_pci(struct pci_dev *pcidev)
3213 {
3214 u16 pci_command;
3215 u16 new_command;
3216
3217 pci_read_config_word(pcidev, PCI_COMMAND, &pci_command);
3218
3219 new_command = pci_command | PCI_COMMAND_MASTER
3220 | PCI_COMMAND_MEMORY
3221 | PCI_COMMAND_INVALIDATE
3222 | PCI_COMMAND_PARITY | PCI_COMMAND_SERR | PCI_COMMAND_FAST_BACK;
3223 if (pci_command != new_command)
3224 pci_write_config_word(pcidev, PCI_COMMAND, new_command);
3225 }
3226
3227 static int slic_card_init(struct sliccard *card, struct adapter *adapter)
3228 {
3229 __iomem struct slic_regs *slic_regs = adapter->slic_regs;
3230 struct slic_eeprom *peeprom;
3231 struct oslic_eeprom *pOeeprom;
3232 dma_addr_t phys_config;
3233 u32 phys_configh;
3234 u32 phys_configl;
3235 u32 i = 0;
3236 struct slic_shmem *pshmem;
3237 int status;
3238 uint macaddrs = card->card_size;
3239 ushort eecodesize;
3240 ushort dramsize;
3241 ushort ee_chksum;
3242 ushort calc_chksum;
3243 struct slic_config_mac *pmac;
3244 unsigned char fruformat;
3245 unsigned char oemfruformat;
3246 struct atk_fru *patkfru;
3247 union oemfru *poemfru;
3248
3249 /* Reset everything except PCI configuration space */
3250 slic_soft_reset(adapter);
3251
3252 /* Download the microcode */
3253 status = slic_card_download(adapter);
3254
3255 if (status != 0) {
3256 dev_err(&adapter->pcidev->dev,
3257 "download failed bus %d slot %d\n",
3258 adapter->busnumber, adapter->slotnumber);
3259 return status;
3260 }
3261
3262 if (!card->config_set) {
3263 peeprom = pci_alloc_consistent(adapter->pcidev,
3264 sizeof(struct slic_eeprom),
3265 &phys_config);
3266
3267 phys_configl = SLIC_GET_ADDR_LOW(phys_config);
3268 phys_configh = SLIC_GET_ADDR_HIGH(phys_config);
3269
3270 if (!peeprom) {
3271 dev_err(&adapter->pcidev->dev,
3272 "eeprom read failed to get memory "
3273 "bus %d slot %d\n", adapter->busnumber,
3274 adapter->slotnumber);
3275 return -ENOMEM;
3276 } else {
3277 memset(peeprom, 0, sizeof(struct slic_eeprom));
3278 }
3279 slic_reg32_write(&slic_regs->slic_icr, ICR_INT_OFF, FLUSH);
3280 mdelay(1);
3281 pshmem = (struct slic_shmem *)(unsigned long)
3282 adapter->phys_shmem;
3283
3284 spin_lock_irqsave(&adapter->bit64reglock.lock,
3285 adapter->bit64reglock.flags);
3286 slic_reg32_write(&slic_regs->slic_addr_upper, 0, DONT_FLUSH);
3287 slic_reg32_write(&slic_regs->slic_isp,
3288 SLIC_GET_ADDR_LOW(&pshmem->isr), FLUSH);
3289 spin_unlock_irqrestore(&adapter->bit64reglock.lock,
3290 adapter->bit64reglock.flags);
3291
3292 slic_config_get(adapter, phys_configl, phys_configh);
3293
3294 for (;;) {
3295 if (adapter->pshmem->isr) {
3296 if (adapter->pshmem->isr & ISR_UPC) {
3297 adapter->pshmem->isr = 0;
3298 slic_reg64_write(adapter,
3299 &slic_regs->slic_isp, 0,
3300 &slic_regs->slic_addr_upper,
3301 0, FLUSH);
3302 slic_reg32_write(&slic_regs->slic_isr,
3303 0, FLUSH);
3304
3305 slic_upr_request_complete(adapter, 0);
3306 break;
3307 } else {
3308 adapter->pshmem->isr = 0;
3309 slic_reg32_write(&slic_regs->slic_isr,
3310 0, FLUSH);
3311 }
3312 } else {
3313 mdelay(1);
3314 i++;
3315 if (i > 5000) {
3316 dev_err(&adapter->pcidev->dev,
3317 "%d config data fetch timed out!\n",
3318 adapter->port);
3319 slic_reg64_write(adapter,
3320 &slic_regs->slic_isp, 0,
3321 &slic_regs->slic_addr_upper,
3322 0, FLUSH);
3323 return -EINVAL;
3324 }
3325 }
3326 }
3327
3328 switch (adapter->devid) {
3329 /* Oasis card */
3330 case SLIC_2GB_DEVICE_ID:
3331 /* extract EEPROM data and pointers to EEPROM data */
3332 pOeeprom = (struct oslic_eeprom *) peeprom;
3333 eecodesize = pOeeprom->EecodeSize;
3334 dramsize = pOeeprom->DramSize;
3335 pmac = pOeeprom->MacInfo;
3336 fruformat = pOeeprom->FruFormat;
3337 patkfru = &pOeeprom->AtkFru;
3338 oemfruformat = pOeeprom->OemFruFormat;
3339 poemfru = &pOeeprom->OemFru;
3340 macaddrs = 2;
3341 /* Minor kludge for Oasis card
3342 get 2 MAC addresses from the
3343 EEPROM to ensure that function 1
3344 gets the Port 1 MAC address */
3345 break;
3346 default:
3347 /* extract EEPROM data and pointers to EEPROM data */
3348 eecodesize = peeprom->EecodeSize;
3349 dramsize = peeprom->DramSize;
3350 pmac = peeprom->u2.mac.MacInfo;
3351 fruformat = peeprom->FruFormat;
3352 patkfru = &peeprom->AtkFru;
3353 oemfruformat = peeprom->OemFruFormat;
3354 poemfru = &peeprom->OemFru;
3355 break;
3356 }
3357
3358 card->config.EepromValid = false;
3359
3360 /* see if the EEPROM is valid by checking it's checksum */
3361 if ((eecodesize <= MAX_EECODE_SIZE) &&
3362 (eecodesize >= MIN_EECODE_SIZE)) {
3363
3364 ee_chksum =
3365 *(u16 *) ((char *) peeprom + (eecodesize - 2));
3366 /*
3367 calculate the EEPROM checksum
3368 */
3369 calc_chksum =
3370 ~slic_eeprom_cksum((char *) peeprom,
3371 (eecodesize - 2));
3372 /*
3373 if the ucdoe chksum flag bit worked,
3374 we wouldn't need this
3375 */
3376 if (ee_chksum == calc_chksum)
3377 card->config.EepromValid = true;
3378 }
3379 /* copy in the DRAM size */
3380 card->config.DramSize = dramsize;
3381
3382 /* copy in the MAC address(es) */
3383 for (i = 0; i < macaddrs; i++) {
3384 memcpy(&card->config.MacInfo[i],
3385 &pmac[i], sizeof(struct slic_config_mac));
3386 }
3387
3388 /* copy the Alacritech FRU information */
3389 card->config.FruFormat = fruformat;
3390 memcpy(&card->config.AtkFru, patkfru,
3391 sizeof(struct atk_fru));
3392
3393 pci_free_consistent(adapter->pcidev,
3394 sizeof(struct slic_eeprom),
3395 peeprom, phys_config);
3396
3397 if ((!card->config.EepromValid) &&
3398 (adapter->reg_params.fail_on_bad_eeprom)) {
3399 slic_reg64_write(adapter, &slic_regs->slic_isp, 0,
3400 &slic_regs->slic_addr_upper,
3401 0, FLUSH);
3402 dev_err(&adapter->pcidev->dev,
3403 "unsupported CONFIGURATION EEPROM invalid\n");
3404 return -EINVAL;
3405 }
3406
3407 card->config_set = 1;
3408 }
3409
3410 if (slic_card_download_gbrcv(adapter)) {
3411 dev_err(&adapter->pcidev->dev,
3412 "unable to download GB receive microcode\n");
3413 return -EINVAL;
3414 }
3415
3416 if (slic_global.dynamic_intagg)
3417 slic_intagg_set(adapter, 0);
3418 else
3419 slic_intagg_set(adapter, intagg_delay);
3420
3421 /*
3422 * Initialize ping status to "ok"
3423 */
3424 card->pingstatus = ISR_PINGMASK;
3425
3426 /*
3427 * Lastly, mark our card state as up and return success
3428 */
3429 card->state = CARD_UP;
3430 card->reset_in_progress = 0;
3431
3432 return 0;
3433 }
3434
3435 static void slic_init_driver(void)
3436 {
3437 if (slic_first_init) {
3438 slic_first_init = 0;
3439 spin_lock_init(&slic_global.driver_lock.lock);
3440 slic_debug_init();
3441 }
3442 }
3443
3444 static void slic_init_adapter(struct net_device *netdev,
3445 struct pci_dev *pcidev,
3446 const struct pci_device_id *pci_tbl_entry,
3447 void __iomem *memaddr, int chip_idx)
3448 {
3449 ushort index;
3450 struct slic_handle *pslic_handle;
3451 struct adapter *adapter = netdev_priv(netdev);
3452
3453 /* adapter->pcidev = pcidev;*/
3454 adapter->vendid = pci_tbl_entry->vendor;
3455 adapter->devid = pci_tbl_entry->device;
3456 adapter->subsysid = pci_tbl_entry->subdevice;
3457 adapter->busnumber = pcidev->bus->number;
3458 adapter->slotnumber = ((pcidev->devfn >> 3) & 0x1F);
3459 adapter->functionnumber = (pcidev->devfn & 0x7);
3460 adapter->memorylength = pci_resource_len(pcidev, 0);
3461 adapter->slic_regs = (__iomem struct slic_regs *)memaddr;
3462 adapter->irq = pcidev->irq;
3463 /* adapter->netdev = netdev;*/
3464 adapter->next_netdevice = head_netdevice;
3465 head_netdevice = netdev;
3466 adapter->chipid = chip_idx;
3467 adapter->port = 0; /*adapter->functionnumber;*/
3468 adapter->cardindex = adapter->port;
3469 adapter->memorybase = memaddr;
3470 spin_lock_init(&adapter->upr_lock.lock);
3471 spin_lock_init(&adapter->bit64reglock.lock);
3472 spin_lock_init(&adapter->adapter_lock.lock);
3473 spin_lock_init(&adapter->reset_lock.lock);
3474 spin_lock_init(&adapter->handle_lock.lock);
3475
3476 adapter->card_size = 1;
3477 /*
3478 Initialize slic_handle array
3479 */
3480 /*
3481 Start with 1. 0 is an invalid host handle.
3482 */
3483 for (index = 1, pslic_handle = &adapter->slic_handles[1];
3484 index < SLIC_CMDQ_MAXCMDS; index++, pslic_handle++) {
3485
3486 pslic_handle->token.handle_index = index;
3487 pslic_handle->type = SLIC_HANDLE_FREE;
3488 pslic_handle->next = adapter->pfree_slic_handles;
3489 adapter->pfree_slic_handles = pslic_handle;
3490 }
3491 adapter->pshmem = (struct slic_shmem *)
3492 pci_alloc_consistent(adapter->pcidev,
3493 sizeof(struct slic_shmem),
3494 &adapter->
3495 phys_shmem);
3496 if (adapter->pshmem)
3497 memset(adapter->pshmem, 0, sizeof(struct slic_shmem));
3498 }
3499
3500 static const struct net_device_ops slic_netdev_ops = {
3501 .ndo_open = slic_entry_open,
3502 .ndo_stop = slic_entry_halt,
3503 .ndo_start_xmit = slic_xmit_start,
3504 .ndo_do_ioctl = slic_ioctl,
3505 .ndo_set_mac_address = slic_mac_set_address,
3506 .ndo_get_stats = slic_get_stats,
3507 .ndo_set_rx_mode = slic_mcast_set_list,
3508 .ndo_validate_addr = eth_validate_addr,
3509 .ndo_change_mtu = eth_change_mtu,
3510 };
3511
3512 static u32 slic_card_locate(struct adapter *adapter)
3513 {
3514 struct sliccard *card = slic_global.slic_card;
3515 struct physcard *physcard = slic_global.phys_card;
3516 ushort card_hostid;
3517 u16 __iomem *hostid_reg;
3518 uint i;
3519 uint rdhostid_offset = 0;
3520
3521 switch (adapter->devid) {
3522 case SLIC_2GB_DEVICE_ID:
3523 rdhostid_offset = SLIC_RDHOSTID_2GB;
3524 break;
3525 case SLIC_1GB_DEVICE_ID:
3526 rdhostid_offset = SLIC_RDHOSTID_1GB;
3527 break;
3528 default:
3529 return -ENODEV;
3530 }
3531
3532 hostid_reg =
3533 (u16 __iomem *) (((u8 __iomem *) (adapter->slic_regs)) +
3534 rdhostid_offset);
3535
3536 /* read the 16 bit hostid from SRAM */
3537 card_hostid = (ushort) readw(hostid_reg);
3538
3539 /* Initialize a new card structure if need be */
3540 if (card_hostid == SLIC_HOSTID_DEFAULT) {
3541 card = kzalloc(sizeof(struct sliccard), GFP_KERNEL);
3542 if (card == NULL)
3543 return -ENOMEM;
3544
3545 card->next = slic_global.slic_card;
3546 slic_global.slic_card = card;
3547 card->busnumber = adapter->busnumber;
3548 card->slotnumber = adapter->slotnumber;
3549
3550 /* Find an available cardnum */
3551 for (i = 0; i < SLIC_MAX_CARDS; i++) {
3552 if (slic_global.cardnuminuse[i] == 0) {
3553 slic_global.cardnuminuse[i] = 1;
3554 card->cardnum = i;
3555 break;
3556 }
3557 }
3558 slic_global.num_slic_cards++;
3559
3560 slic_debug_card_create(card);
3561 } else {
3562 /* Card exists, find the card this adapter belongs to */
3563 while (card) {
3564 if (card->cardnum == card_hostid)
3565 break;
3566 card = card->next;
3567 }
3568 }
3569
3570 if (!card)
3571 return -ENXIO;
3572 /* Put the adapter in the card's adapter list */
3573 if (!card->adapter[adapter->port]) {
3574 card->adapter[adapter->port] = adapter;
3575 adapter->card = card;
3576 }
3577
3578 card->card_size = 1; /* one port per *logical* card */
3579
3580 while (physcard) {
3581 for (i = 0; i < SLIC_MAX_PORTS; i++) {
3582 if (physcard->adapter[i])
3583 break;
3584 }
3585 if (i == SLIC_MAX_PORTS)
3586 break;
3587
3588 if (physcard->adapter[i]->slotnumber == adapter->slotnumber)
3589 break;
3590 physcard = physcard->next;
3591 }
3592 if (!physcard) {
3593 /* no structure allocated for this physical card yet */
3594 physcard = kzalloc(sizeof(struct physcard), GFP_ATOMIC);
3595 if (!physcard) {
3596 if (card_hostid == SLIC_HOSTID_DEFAULT)
3597 kfree(card);
3598 return -ENOMEM;
3599 }
3600
3601 physcard->next = slic_global.phys_card;
3602 slic_global.phys_card = physcard;
3603 physcard->adapters_allocd = 1;
3604 } else {
3605 physcard->adapters_allocd++;
3606 }
3607 /* Note - this is ZERO relative */
3608 adapter->physport = physcard->adapters_allocd - 1;
3609
3610 physcard->adapter[adapter->physport] = adapter;
3611 adapter->physcard = physcard;
3612
3613 return 0;
3614 }
3615
3616 static int slic_entry_probe(struct pci_dev *pcidev,
3617 const struct pci_device_id *pci_tbl_entry)
3618 {
3619 static int cards_found;
3620 static int did_version;
3621 int err = -ENODEV;
3622 struct net_device *netdev;
3623 struct adapter *adapter;
3624 void __iomem *memmapped_ioaddr = NULL;
3625 u32 status = 0;
3626 ulong mmio_start = 0;
3627 ulong mmio_len = 0;
3628 struct sliccard *card = NULL;
3629 int pci_using_dac = 0;
3630
3631 slic_global.dynamic_intagg = dynamic_intagg;
3632
3633 err = pci_enable_device(pcidev);
3634
3635 if (err)
3636 return err;
3637
3638 if (slic_debug > 0 && did_version++ == 0) {
3639 dev_dbg(&pcidev->dev, "%s\n", slic_banner);
3640 dev_dbg(&pcidev->dev, "%s\n", slic_proc_version);
3641 }
3642
3643 if (!pci_set_dma_mask(pcidev, DMA_BIT_MASK(64))) {
3644 pci_using_dac = 1;
3645 err = pci_set_consistent_dma_mask(pcidev, DMA_BIT_MASK(64));
3646 if (err) {
3647 dev_err(&pcidev->dev, "unable to obtain 64-bit DMA for consistent allocations\n");
3648 goto err_out_disable_pci;
3649 }
3650 } else {
3651 err = pci_set_dma_mask(pcidev, DMA_BIT_MASK(32));
3652 if (err) {
3653 dev_err(&pcidev->dev, "no usable DMA configuration\n");
3654 goto err_out_disable_pci;
3655 }
3656 pci_using_dac = 0;
3657 pci_set_consistent_dma_mask(pcidev, DMA_BIT_MASK(32));
3658 }
3659
3660 err = pci_request_regions(pcidev, DRV_NAME);
3661 if (err) {
3662 dev_err(&pcidev->dev, "can't obtain PCI resources\n");
3663 goto err_out_disable_pci;
3664 }
3665
3666 pci_set_master(pcidev);
3667
3668 netdev = alloc_etherdev(sizeof(struct adapter));
3669 if (!netdev) {
3670 err = -ENOMEM;
3671 goto err_out_exit_slic_probe;
3672 }
3673
3674 SET_NETDEV_DEV(netdev, &pcidev->dev);
3675
3676 pci_set_drvdata(pcidev, netdev);
3677 adapter = netdev_priv(netdev);
3678 adapter->netdev = netdev;
3679 adapter->pcidev = pcidev;
3680 if (pci_using_dac)
3681 netdev->features |= NETIF_F_HIGHDMA;
3682
3683 mmio_start = pci_resource_start(pcidev, 0);
3684 mmio_len = pci_resource_len(pcidev, 0);
3685
3686
3687 /* memmapped_ioaddr = (u32)ioremap_nocache(mmio_start, mmio_len);*/
3688 memmapped_ioaddr = ioremap(mmio_start, mmio_len);
3689 if (!memmapped_ioaddr) {
3690 dev_err(&pcidev->dev, "cannot remap MMIO region %lx @ %lx\n",
3691 mmio_len, mmio_start);
3692 err = -ENOMEM;
3693 goto err_out_free_netdev;
3694 }
3695
3696 slic_config_pci(pcidev);
3697
3698 slic_init_driver();
3699
3700 slic_init_adapter(netdev,
3701 pcidev, pci_tbl_entry, memmapped_ioaddr, cards_found);
3702
3703 err = slic_card_locate(adapter);
3704 if (err) {
3705 dev_err(&pcidev->dev, "cannot locate card\n");
3706 goto err_out_free_mmio_region;
3707 }
3708
3709 card = adapter->card;
3710
3711 if (!adapter->allocated) {
3712 card->adapters_allocated++;
3713 adapter->allocated = 1;
3714 }
3715
3716 status = slic_card_init(card, adapter);
3717
3718 if (status != 0) {
3719 card->state = CARD_FAIL;
3720 adapter->state = ADAPT_FAIL;
3721 adapter->linkstate = LINK_DOWN;
3722 dev_err(&pcidev->dev, "FAILED status[%x]\n", status);
3723 } else {
3724 slic_adapter_set_hwaddr(adapter);
3725 }
3726
3727 netdev->base_addr = (unsigned long)adapter->memorybase;
3728 netdev->irq = adapter->irq;
3729 netdev->netdev_ops = &slic_netdev_ops;
3730
3731 slic_debug_adapter_create(adapter);
3732
3733 strcpy(netdev->name, "eth%d");
3734 err = register_netdev(netdev);
3735 if (err) {
3736 dev_err(&pcidev->dev, "Cannot register net device, aborting.\n");
3737 goto err_out_unmap;
3738 }
3739
3740 cards_found++;
3741
3742 return status;
3743
3744 err_out_unmap:
3745 iounmap(memmapped_ioaddr);
3746 err_out_free_mmio_region:
3747 release_mem_region(mmio_start, mmio_len);
3748 err_out_free_netdev:
3749 free_netdev(netdev);
3750 err_out_exit_slic_probe:
3751 pci_release_regions(pcidev);
3752 err_out_disable_pci:
3753 pci_disable_device(pcidev);
3754 return err;
3755 }
3756
3757 static struct pci_driver slic_driver = {
3758 .name = DRV_NAME,
3759 .id_table = slic_pci_tbl,
3760 .probe = slic_entry_probe,
3761 .remove = slic_entry_remove,
3762 };
3763
3764 static int __init slic_module_init(void)
3765 {
3766 slic_init_driver();
3767
3768 if (debug >= 0 && slic_debug != debug)
3769 pr_debug("debug level is %d.\n", debug);
3770 if (debug >= 0)
3771 slic_debug = debug;
3772
3773 return pci_register_driver(&slic_driver);
3774 }
3775
3776 static void __exit slic_module_cleanup(void)
3777 {
3778 pci_unregister_driver(&slic_driver);
3779 slic_debug_cleanup();
3780 }
3781
3782 module_init(slic_module_init);
3783 module_exit(slic_module_cleanup);
Linux with added FPC-III support