2 * Intel_SCU 0.2: An Intel SCU IOH Based Watchdog Device
6 * Copyright (C) 2009-2010 Intel Corporation. All rights reserved.
8 * This program is free software; you can redistribute it and/or
9 * modify it under the terms of version 2 of the GNU General
10 * Public License as published by the Free Software Foundation.
12 * This program is distributed in the hope that it will be
13 * useful, but WITHOUT ANY WARRANTY; without even the implied
14 * warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR
15 * PURPOSE. See the GNU General Public License for more details.
16 * You should have received a copy of the GNU General Public
17 * License along with this program; if not, write to the Free
18 * Software Foundation, Inc., 59 Temple Place - Suite 330,
19 * Boston, MA 02111-1307, USA.
20 * The full GNU General Public License is included in this
21 * distribution in the file called COPYING.
25 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
27 #include <linux/compiler.h>
28 #include <linux/module.h>
29 #include <linux/kernel.h>
30 #include <linux/moduleparam.h>
31 #include <linux/types.h>
32 #include <linux/miscdevice.h>
33 #include <linux/watchdog.h>
35 #include <linux/notifier.h>
36 #include <linux/reboot.h>
37 #include <linux/init.h>
38 #include <linux/jiffies.h>
39 #include <linux/uaccess.h>
40 #include <linux/slab.h>
42 #include <linux/interrupt.h>
43 #include <linux/delay.h>
44 #include <linux/sched.h>
45 #include <linux/signal.h>
46 #include <linux/sfi.h>
48 #include <linux/atomic.h>
49 #include <asm/intel_scu_ipc.h>
50 #include <asm/apb_timer.h>
51 #include <asm/intel-mid.h>
53 #include "intel_scu_watchdog.h"
55 /* Bounds number of times we will retry loading time count */
56 /* This retry is a work around for a silicon bug. */
59 #define IPC_SET_WATCHDOG_TIMER 0xF8
61 static int timer_margin
= DEFAULT_SOFT_TO_HARD_MARGIN
;
62 module_param(timer_margin
, int, 0);
63 MODULE_PARM_DESC(timer_margin
,
64 "Watchdog timer margin"
65 "Time between interrupt and resetting the system"
66 "The range is from 1 to 160"
67 "This is the time for all keep alives to arrive");
69 static int timer_set
= DEFAULT_TIME
;
70 module_param(timer_set
, int, 0);
71 MODULE_PARM_DESC(timer_set
,
72 "Default Watchdog timer setting"
74 "The range is from 1 to 170"
75 "This is the time for all keep alives to arrive");
77 /* After watchdog device is closed, check force_boot. If:
78 * force_boot == 0, then force boot on next watchdog interrupt after close,
79 * force_boot == 1, then force boot immediately when device is closed.
81 static int force_boot
;
82 module_param(force_boot
, int, 0);
83 MODULE_PARM_DESC(force_boot
,
84 "A value of 1 means that the driver will reboot"
85 "the system immediately if the /dev/watchdog device is closed"
86 "A value of 0 means that when /dev/watchdog device is closed"
87 "the watchdog timer will be refreshed for one more interval"
88 "of length: timer_set. At the end of this interval, the"
89 "watchdog timer will reset the system."
92 /* there is only one device in the system now; this can be made into
93 * an array in the future if we have more than one device */
95 static struct intel_scu_watchdog_dev watchdog_device
;
97 /* Forces restart, if force_reboot is set */
98 static void watchdog_fire(void)
101 pr_crit("Initiating system reboot\n");
103 pr_crit("Reboot didn't ?????\n");
107 pr_crit("Immediate Reboot Disabled\n");
108 pr_crit("System will reset when watchdog timer times out!\n");
112 static int check_timer_margin(int new_margin
)
114 if ((new_margin
< MIN_TIME_CYCLE
) ||
115 (new_margin
> MAX_TIME
- timer_set
)) {
116 pr_debug("value of new_margin %d is out of the range %d to %d\n",
117 new_margin
, MIN_TIME_CYCLE
, MAX_TIME
- timer_set
);
126 static int watchdog_set_ipc(int soft_threshold
, int threshold
)
129 u8 cbuf
[16] = { '\0' };
132 ipc_wbuf
= (u32
*)&cbuf
;
133 ipc_wbuf
[0] = soft_threshold
;
134 ipc_wbuf
[1] = threshold
;
136 ipc_ret
= intel_scu_ipc_command(
137 IPC_SET_WATCHDOG_TIMER
,
145 pr_err("Error setting SCU watchdog timer: %x\n", ipc_ret
);
151 * Intel_SCU operations
154 /* timer interrupt handler */
155 static irqreturn_t
watchdog_timer_interrupt(int irq
, void *dev_id
)
158 int_status
= ioread32(watchdog_device
.timer_interrupt_status_addr
);
160 pr_debug("irq, int_status: %x\n", int_status
);
165 /* has the timer been started? If not, then this is spurious */
166 if (watchdog_device
.timer_started
== 0) {
167 pr_debug("spurious interrupt received\n");
171 /* temporarily disable the timer */
172 iowrite32(0x00000002, watchdog_device
.timer_control_addr
);
174 /* set the timer to the threshold */
175 iowrite32(watchdog_device
.threshold
,
176 watchdog_device
.timer_load_count_addr
);
178 /* allow the timer to run */
179 iowrite32(0x00000003, watchdog_device
.timer_control_addr
);
184 static int intel_scu_keepalive(void)
187 /* read eoi register - clears interrupt */
188 ioread32(watchdog_device
.timer_clear_interrupt_addr
);
190 /* temporarily disable the timer */
191 iowrite32(0x00000002, watchdog_device
.timer_control_addr
);
193 /* set the timer to the soft_threshold */
194 iowrite32(watchdog_device
.soft_threshold
,
195 watchdog_device
.timer_load_count_addr
);
197 /* allow the timer to run */
198 iowrite32(0x00000003, watchdog_device
.timer_control_addr
);
203 static int intel_scu_stop(void)
205 iowrite32(0, watchdog_device
.timer_control_addr
);
209 static int intel_scu_set_heartbeat(u32 t
)
217 watchdog_device
.timer_set
= t
;
218 watchdog_device
.threshold
=
219 timer_margin
* watchdog_device
.timer_tbl_ptr
->freq_hz
;
220 watchdog_device
.soft_threshold
=
221 (watchdog_device
.timer_set
- timer_margin
)
222 * watchdog_device
.timer_tbl_ptr
->freq_hz
;
224 pr_debug("set_heartbeat: timer freq is %d\n",
225 watchdog_device
.timer_tbl_ptr
->freq_hz
);
226 pr_debug("set_heartbeat: timer_set is %x (hex)\n",
227 watchdog_device
.timer_set
);
228 pr_debug("set_hearbeat: timer_margin is %x (hex)\n", timer_margin
);
229 pr_debug("set_heartbeat: threshold is %x (hex)\n",
230 watchdog_device
.threshold
);
231 pr_debug("set_heartbeat: soft_threshold is %x (hex)\n",
232 watchdog_device
.soft_threshold
);
234 /* Adjust thresholds by FREQ_ADJUSTMENT factor, to make the */
235 /* watchdog timing come out right. */
236 watchdog_device
.threshold
=
237 watchdog_device
.threshold
/ FREQ_ADJUSTMENT
;
238 watchdog_device
.soft_threshold
=
239 watchdog_device
.soft_threshold
/ FREQ_ADJUSTMENT
;
241 /* temporarily disable the timer */
242 iowrite32(0x00000002, watchdog_device
.timer_control_addr
);
244 /* send the threshold and soft_threshold via IPC to the processor */
245 ipc_ret
= watchdog_set_ipc(watchdog_device
.soft_threshold
,
246 watchdog_device
.threshold
);
249 /* Make sure the watchdog timer is stopped */
254 /* Soft Threshold set loop. Early versions of silicon did */
255 /* not always set this count correctly. This loop checks */
256 /* the value and retries if it was not set correctly. */
259 soft_value
= watchdog_device
.soft_threshold
& 0xFFFF0000;
262 /* Make sure timer is stopped */
265 if (MAX_RETRY
< retry_count
++) {
266 /* Unable to set timer value */
267 pr_err("Unable to set timer\n");
271 /* set the timer to the soft threshold */
272 iowrite32(watchdog_device
.soft_threshold
,
273 watchdog_device
.timer_load_count_addr
);
275 /* read count value before starting timer */
276 hw_pre_value
= ioread32(watchdog_device
.timer_load_count_addr
);
277 hw_pre_value
= hw_pre_value
& 0xFFFF0000;
279 /* Start the timer */
280 iowrite32(0x00000003, watchdog_device
.timer_control_addr
);
282 /* read the value the time loaded into its count reg */
283 hw_value
= ioread32(watchdog_device
.timer_load_count_addr
);
284 hw_value
= hw_value
& 0xFFFF0000;
287 } while (soft_value
!= hw_value
);
289 watchdog_device
.timer_started
= 1;
295 * /dev/watchdog handling
298 static int intel_scu_open(struct inode
*inode
, struct file
*file
)
301 /* Set flag to indicate that watchdog device is open */
302 if (test_and_set_bit(0, &watchdog_device
.driver_open
))
305 /* Check for reopen of driver. Reopens are not allowed */
306 if (watchdog_device
.driver_closed
)
309 return nonseekable_open(inode
, file
);
312 static int intel_scu_release(struct inode
*inode
, struct file
*file
)
315 * This watchdog should not be closed, after the timer
316 * is started with the WDIPC_SETTIMEOUT ioctl
317 * If force_boot is set watchdog_fire() will cause an
318 * immediate reset. If force_boot is not set, the watchdog
319 * timer is refreshed for one more interval. At the end
320 * of that interval, the watchdog timer will reset the system.
323 if (!test_and_clear_bit(0, &watchdog_device
.driver_open
)) {
324 pr_debug("intel_scu_release, without open\n");
328 if (!watchdog_device
.timer_started
) {
329 /* Just close, since timer has not been started */
330 pr_debug("closed, without starting timer\n");
334 pr_crit("Unexpected close of /dev/watchdog!\n");
336 /* Since the timer was started, prevent future reopens */
337 watchdog_device
.driver_closed
= 1;
339 /* Refresh the timer for one more interval */
340 intel_scu_keepalive();
342 /* Reboot system (if force_boot is set) */
345 /* We should only reach this point if force_boot is not set */
349 static ssize_t
intel_scu_write(struct file
*file
,
355 if (watchdog_device
.timer_started
)
356 /* Watchdog already started, keep it alive */
357 intel_scu_keepalive();
359 /* Start watchdog with timer value set by init */
360 intel_scu_set_heartbeat(watchdog_device
.timer_set
);
365 static long intel_scu_ioctl(struct file
*file
,
369 void __user
*argp
= (void __user
*)arg
;
370 u32 __user
*p
= argp
;
374 static const struct watchdog_info ident
= {
375 .options
= WDIOF_SETTIMEOUT
376 | WDIOF_KEEPALIVEPING
,
377 .firmware_version
= 0, /* @todo Get from SCU via
378 ipc_get_scu_fw_version()? */
379 .identity
= "Intel_SCU IOH Watchdog" /* len < 32 */
383 case WDIOC_GETSUPPORT
:
384 return copy_to_user(argp
,
386 sizeof(ident
)) ? -EFAULT
: 0;
387 case WDIOC_GETSTATUS
:
388 case WDIOC_GETBOOTSTATUS
:
389 return put_user(0, p
);
390 case WDIOC_KEEPALIVE
:
391 intel_scu_keepalive();
394 case WDIOC_SETTIMEOUT
:
395 if (get_user(new_margin
, p
))
398 if (check_timer_margin(new_margin
))
401 if (intel_scu_set_heartbeat(new_margin
))
404 case WDIOC_GETTIMEOUT
:
405 return put_user(watchdog_device
.soft_threshold
, p
);
413 * Notifier for system down
415 static int intel_scu_notify_sys(struct notifier_block
*this,
417 void *another_unused
)
419 if (code
== SYS_DOWN
|| code
== SYS_HALT
)
420 /* Turn off the watchdog timer. */
428 static const struct file_operations intel_scu_fops
= {
429 .owner
= THIS_MODULE
,
431 .write
= intel_scu_write
,
432 .unlocked_ioctl
= intel_scu_ioctl
,
433 .open
= intel_scu_open
,
434 .release
= intel_scu_release
,
437 static int __init
intel_scu_watchdog_init(void)
440 u32 __iomem
*tmp_addr
;
443 * We don't really need to check this as the SFI timer get will fail
444 * but if we do so we can exit with a clearer reason and no noise.
446 * If it isn't an intel MID device then it doesn't have this watchdog
448 if (!intel_mid_identify_cpu())
451 /* Check boot parameters to verify that their initial values */
453 /* Check value of timer_set boot parameter */
454 if ((timer_set
< MIN_TIME_CYCLE
) ||
455 (timer_set
> MAX_TIME
- MIN_TIME_CYCLE
)) {
456 pr_err("value of timer_set %x (hex) is out of range from %x to %x (hex)\n",
457 timer_set
, MIN_TIME_CYCLE
, MAX_TIME
- MIN_TIME_CYCLE
);
461 /* Check value of timer_margin boot parameter */
462 if (check_timer_margin(timer_margin
))
465 watchdog_device
.timer_tbl_ptr
= sfi_get_mtmr(sfi_mtimer_num
-1);
467 if (watchdog_device
.timer_tbl_ptr
== NULL
) {
468 pr_debug("timer is not available\n");
471 /* make sure the timer exists */
472 if (watchdog_device
.timer_tbl_ptr
->phys_addr
== 0) {
473 pr_debug("timer %d does not have valid physical memory\n",
478 if (watchdog_device
.timer_tbl_ptr
->irq
== 0) {
479 pr_debug("timer %d invalid irq\n", sfi_mtimer_num
);
483 tmp_addr
= ioremap_nocache(watchdog_device
.timer_tbl_ptr
->phys_addr
,
486 if (tmp_addr
== NULL
) {
487 pr_debug("timer unable to ioremap\n");
491 watchdog_device
.timer_load_count_addr
= tmp_addr
++;
492 watchdog_device
.timer_current_value_addr
= tmp_addr
++;
493 watchdog_device
.timer_control_addr
= tmp_addr
++;
494 watchdog_device
.timer_clear_interrupt_addr
= tmp_addr
++;
495 watchdog_device
.timer_interrupt_status_addr
= tmp_addr
++;
497 /* Set the default time values in device structure */
499 watchdog_device
.timer_set
= timer_set
;
500 watchdog_device
.threshold
=
501 timer_margin
* watchdog_device
.timer_tbl_ptr
->freq_hz
;
502 watchdog_device
.soft_threshold
=
503 (watchdog_device
.timer_set
- timer_margin
)
504 * watchdog_device
.timer_tbl_ptr
->freq_hz
;
507 watchdog_device
.intel_scu_notifier
.notifier_call
=
508 intel_scu_notify_sys
;
510 ret
= register_reboot_notifier(&watchdog_device
.intel_scu_notifier
);
512 pr_err("cannot register notifier %d)\n", ret
);
513 goto register_reboot_error
;
516 watchdog_device
.miscdev
.minor
= WATCHDOG_MINOR
;
517 watchdog_device
.miscdev
.name
= "watchdog";
518 watchdog_device
.miscdev
.fops
= &intel_scu_fops
;
520 ret
= misc_register(&watchdog_device
.miscdev
);
522 pr_err("cannot register miscdev %d err =%d\n",
523 WATCHDOG_MINOR
, ret
);
524 goto misc_register_error
;
527 ret
= request_irq((unsigned int)watchdog_device
.timer_tbl_ptr
->irq
,
528 watchdog_timer_interrupt
,
529 IRQF_SHARED
, "watchdog",
530 &watchdog_device
.timer_load_count_addr
);
532 pr_err("error requesting irq %d\n", ret
);
533 goto request_irq_error
;
535 /* Make sure timer is disabled before returning */
542 misc_deregister(&watchdog_device
.miscdev
);
544 unregister_reboot_notifier(&watchdog_device
.intel_scu_notifier
);
545 register_reboot_error
:
547 iounmap(watchdog_device
.timer_load_count_addr
);
551 static void __exit
intel_scu_watchdog_exit(void)
554 misc_deregister(&watchdog_device
.miscdev
);
555 unregister_reboot_notifier(&watchdog_device
.intel_scu_notifier
);
556 /* disable the timer */
557 iowrite32(0x00000002, watchdog_device
.timer_control_addr
);
558 iounmap(watchdog_device
.timer_load_count_addr
);
561 late_initcall(intel_scu_watchdog_init
);
562 module_exit(intel_scu_watchdog_exit
);
564 MODULE_AUTHOR("Intel Corporation");
565 MODULE_DESCRIPTION("Intel SCU Watchdog Device Driver");
566 MODULE_LICENSE("GPL");
567 MODULE_VERSION(WDT_VER
);