net: dsa: mt7530: set CPU port to fallback mode
[linux/fpc-iii.git] / sound / pci / oxygen / wm8766.h
blobbe83ad49dbb1359c89633fe1d51fbaa33e8b39e0
1 /* SPDX-License-Identifier: GPL-2.0 */
2 #ifndef WM8766_H_INCLUDED
3 #define WM8766_H_INCLUDED
5 #define WM8766_LDA1 0x00
6 #define WM8766_RDA1 0x01
7 #define WM8766_DAC_CTRL 0x02
8 #define WM8766_INT_CTRL 0x03
9 #define WM8766_LDA2 0x04
10 #define WM8766_RDA2 0x05
11 #define WM8766_LDA3 0x06
12 #define WM8766_RDA3 0x07
13 #define WM8766_MASTDA 0x08
14 #define WM8766_DAC_CTRL2 0x09
15 #define WM8766_DAC_CTRL3 0x0a
16 #define WM8766_MUTE1 0x0c
17 #define WM8766_MUTE2 0x0f
18 #define WM8766_RESET 0x1f
20 /* LDAx/RDAx/MASTDA */
21 #define WM8766_ATT_MASK 0x0ff
22 #define WM8766_UPDATE 0x100
23 /* DAC_CTRL */
24 #define WM8766_MUTEALL 0x001
25 #define WM8766_DEEMPALL 0x002
26 #define WM8766_PWDN 0x004
27 #define WM8766_ATC 0x008
28 #define WM8766_IZD 0x010
29 #define WM8766_PL_LEFT_MASK 0x060
30 #define WM8766_PL_LEFT_MUTE 0x000
31 #define WM8766_PL_LEFT_LEFT 0x020
32 #define WM8766_PL_LEFT_RIGHT 0x040
33 #define WM8766_PL_LEFT_LRMIX 0x060
34 #define WM8766_PL_RIGHT_MASK 0x180
35 #define WM8766_PL_RIGHT_MUTE 0x000
36 #define WM8766_PL_RIGHT_LEFT 0x080
37 #define WM8766_PL_RIGHT_RIGHT 0x100
38 #define WM8766_PL_RIGHT_LRMIX 0x180
39 /* INT_CTRL */
40 #define WM8766_FMT_MASK 0x003
41 #define WM8766_FMT_RJUST 0x000
42 #define WM8766_FMT_LJUST 0x001
43 #define WM8766_FMT_I2S 0x002
44 #define WM8766_FMT_DSP 0x003
45 #define WM8766_LRP 0x004
46 #define WM8766_BCP 0x008
47 #define WM8766_IWL_MASK 0x030
48 #define WM8766_IWL_16 0x000
49 #define WM8766_IWL_20 0x010
50 #define WM8766_IWL_24 0x020
51 #define WM8766_IWL_32 0x030
52 #define WM8766_PHASE_MASK 0x1c0
53 /* DAC_CTRL2 */
54 #define WM8766_ZCD 0x001
55 #define WM8766_DZFM_MASK 0x006
56 #define WM8766_DMUTE_MASK 0x038
57 #define WM8766_DEEMP_MASK 0x1c0
58 /* DAC_CTRL3 */
59 #define WM8766_DACPD_MASK 0x00e
60 #define WM8766_PWRDNALL 0x010
61 #define WM8766_MS 0x020
62 #define WM8766_RATE_MASK 0x1c0
63 #define WM8766_RATE_128 0x000
64 #define WM8766_RATE_192 0x040
65 #define WM8766_RATE_256 0x080
66 #define WM8766_RATE_384 0x0c0
67 #define WM8766_RATE_512 0x100
68 #define WM8766_RATE_768 0x140
69 /* MUTE1 */
70 #define WM8766_MPD1 0x040
71 /* MUTE2 */
72 #define WM8766_MPD2 0x020
74 #endif