2 * FCI FC2580 silicon tuner driver
4 * Copyright (C) 2012 Antti Palosaari <crope@iki.fi>
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
16 * You should have received a copy of the GNU General Public License along
17 * with this program; if not, write to the Free Software Foundation, Inc.,
18 * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
21 #include "fc2580_priv.h"
23 /* Max transfer size done by I2C transfer functions */
24 #define MAX_XFER_SIZE 64
28 * I2C write and read works only for one single register. Multiple registers
29 * could not be accessed using normal register address auto-increment.
30 * There could be (very likely) register to change that behavior....
32 * Due to that limitation functions:
35 * could not be used for accessing more than one register at once.
38 * Currently it blind writes bunch of static registers from the
39 * fc2580_freq_regs_lut[] when fc2580_set_params() is called. Add some
40 * logic to reduce unneeded register writes.
43 /* write multiple registers */
44 static int fc2580_wr_regs(struct fc2580_priv
*priv
, u8 reg
, u8
*val
, int len
)
47 u8 buf
[MAX_XFER_SIZE
];
48 struct i2c_msg msg
[1] = {
50 .addr
= priv
->cfg
->i2c_addr
,
57 if (1 + len
> sizeof(buf
)) {
58 dev_warn(&priv
->i2c
->dev
,
59 "%s: i2c wr reg=%04x: len=%d is too big!\n",
60 KBUILD_MODNAME
, reg
, len
);
65 memcpy(&buf
[1], val
, len
);
67 ret
= i2c_transfer(priv
->i2c
, msg
, 1);
71 dev_warn(&priv
->i2c
->dev
, "%s: i2c wr failed=%d reg=%02x " \
72 "len=%d\n", KBUILD_MODNAME
, ret
, reg
, len
);
78 /* read multiple registers */
79 static int fc2580_rd_regs(struct fc2580_priv
*priv
, u8 reg
, u8
*val
, int len
)
82 u8 buf
[MAX_XFER_SIZE
];
83 struct i2c_msg msg
[2] = {
85 .addr
= priv
->cfg
->i2c_addr
,
90 .addr
= priv
->cfg
->i2c_addr
,
97 if (len
> sizeof(buf
)) {
98 dev_warn(&priv
->i2c
->dev
,
99 "%s: i2c rd reg=%04x: len=%d is too big!\n",
100 KBUILD_MODNAME
, reg
, len
);
104 ret
= i2c_transfer(priv
->i2c
, msg
, 2);
106 memcpy(val
, buf
, len
);
109 dev_warn(&priv
->i2c
->dev
, "%s: i2c rd failed=%d reg=%02x " \
110 "len=%d\n", KBUILD_MODNAME
, ret
, reg
, len
);
117 /* write single register */
118 static int fc2580_wr_reg(struct fc2580_priv
*priv
, u8 reg
, u8 val
)
120 return fc2580_wr_regs(priv
, reg
, &val
, 1);
123 /* read single register */
124 static int fc2580_rd_reg(struct fc2580_priv
*priv
, u8 reg
, u8
*val
)
126 return fc2580_rd_regs(priv
, reg
, val
, 1);
129 /* write single register conditionally only when value differs from 0xff
130 * XXX: This is special routine meant only for writing fc2580_freq_regs_lut[]
131 * values. Do not use for the other purposes. */
132 static int fc2580_wr_reg_ff(struct fc2580_priv
*priv
, u8 reg
, u8 val
)
137 return fc2580_wr_regs(priv
, reg
, &val
, 1);
140 static int fc2580_set_params(struct dvb_frontend
*fe
)
142 struct fc2580_priv
*priv
= fe
->tuner_priv
;
143 struct dtv_frontend_properties
*c
= &fe
->dtv_property_cache
;
145 unsigned int r_val
, n_val
, k_val
, k_val_reg
, f_ref
;
150 * Fractional-N synthesizer/PLL.
151 * Most likely all those PLL calculations are not correct. I am not
152 * sure, but it looks like it is divider based Fractional-N synthesizer.
153 * There is divider for reference clock too?
154 * Anyhow, synthesizer calculation results seems to be quite correct.
157 dev_dbg(&priv
->i2c
->dev
, "%s: delivery_system=%d frequency=%d " \
158 "bandwidth_hz=%d\n", __func__
,
159 c
->delivery_system
, c
->frequency
, c
->bandwidth_hz
);
161 if (fe
->ops
.i2c_gate_ctrl
)
162 fe
->ops
.i2c_gate_ctrl(fe
, 1);
165 for (i
= 0; i
< ARRAY_SIZE(fc2580_pll_lut
); i
++) {
166 if (c
->frequency
<= fc2580_pll_lut
[i
].freq
)
170 if (i
== ARRAY_SIZE(fc2580_pll_lut
))
173 f_vco
= c
->frequency
;
174 f_vco
*= fc2580_pll_lut
[i
].div
;
176 if (f_vco
>= 2600000000UL)
177 tmp_val
= 0x0e | fc2580_pll_lut
[i
].band
;
179 tmp_val
= 0x06 | fc2580_pll_lut
[i
].band
;
181 ret
= fc2580_wr_reg(priv
, 0x02, tmp_val
);
185 if (f_vco
>= 2UL * 76 * priv
->cfg
->clock
) {
188 } else if (f_vco
>= 1UL * 76 * priv
->cfg
->clock
) {
196 f_ref
= 2UL * priv
->cfg
->clock
/ r_val
;
197 n_val
= div_u64_rem(f_vco
, f_ref
, &k_val
);
198 k_val_reg
= div_u64(1ULL * k_val
* (1 << 20), f_ref
);
200 ret
= fc2580_wr_reg(priv
, 0x18, r18_val
| ((k_val_reg
>> 16) & 0xff));
204 ret
= fc2580_wr_reg(priv
, 0x1a, (k_val_reg
>> 8) & 0xff);
208 ret
= fc2580_wr_reg(priv
, 0x1b, (k_val_reg
>> 0) & 0xff);
212 ret
= fc2580_wr_reg(priv
, 0x1c, n_val
);
216 if (priv
->cfg
->clock
>= 28000000) {
217 ret
= fc2580_wr_reg(priv
, 0x4b, 0x22);
222 if (fc2580_pll_lut
[i
].band
== 0x00) {
223 if (c
->frequency
<= 794000000)
228 ret
= fc2580_wr_reg(priv
, 0x2d, tmp_val
);
234 for (i
= 0; i
< ARRAY_SIZE(fc2580_freq_regs_lut
); i
++) {
235 if (c
->frequency
<= fc2580_freq_regs_lut
[i
].freq
)
239 if (i
== ARRAY_SIZE(fc2580_freq_regs_lut
))
242 ret
= fc2580_wr_reg_ff(priv
, 0x25, fc2580_freq_regs_lut
[i
].r25_val
);
246 ret
= fc2580_wr_reg_ff(priv
, 0x27, fc2580_freq_regs_lut
[i
].r27_val
);
250 ret
= fc2580_wr_reg_ff(priv
, 0x28, fc2580_freq_regs_lut
[i
].r28_val
);
254 ret
= fc2580_wr_reg_ff(priv
, 0x29, fc2580_freq_regs_lut
[i
].r29_val
);
258 ret
= fc2580_wr_reg_ff(priv
, 0x2b, fc2580_freq_regs_lut
[i
].r2b_val
);
262 ret
= fc2580_wr_reg_ff(priv
, 0x2c, fc2580_freq_regs_lut
[i
].r2c_val
);
266 ret
= fc2580_wr_reg_ff(priv
, 0x2d, fc2580_freq_regs_lut
[i
].r2d_val
);
270 ret
= fc2580_wr_reg_ff(priv
, 0x30, fc2580_freq_regs_lut
[i
].r30_val
);
274 ret
= fc2580_wr_reg_ff(priv
, 0x44, fc2580_freq_regs_lut
[i
].r44_val
);
278 ret
= fc2580_wr_reg_ff(priv
, 0x50, fc2580_freq_regs_lut
[i
].r50_val
);
282 ret
= fc2580_wr_reg_ff(priv
, 0x53, fc2580_freq_regs_lut
[i
].r53_val
);
286 ret
= fc2580_wr_reg_ff(priv
, 0x5f, fc2580_freq_regs_lut
[i
].r5f_val
);
290 ret
= fc2580_wr_reg_ff(priv
, 0x61, fc2580_freq_regs_lut
[i
].r61_val
);
294 ret
= fc2580_wr_reg_ff(priv
, 0x62, fc2580_freq_regs_lut
[i
].r62_val
);
298 ret
= fc2580_wr_reg_ff(priv
, 0x63, fc2580_freq_regs_lut
[i
].r63_val
);
302 ret
= fc2580_wr_reg_ff(priv
, 0x67, fc2580_freq_regs_lut
[i
].r67_val
);
306 ret
= fc2580_wr_reg_ff(priv
, 0x68, fc2580_freq_regs_lut
[i
].r68_val
);
310 ret
= fc2580_wr_reg_ff(priv
, 0x69, fc2580_freq_regs_lut
[i
].r69_val
);
314 ret
= fc2580_wr_reg_ff(priv
, 0x6a, fc2580_freq_regs_lut
[i
].r6a_val
);
318 ret
= fc2580_wr_reg_ff(priv
, 0x6b, fc2580_freq_regs_lut
[i
].r6b_val
);
322 ret
= fc2580_wr_reg_ff(priv
, 0x6c, fc2580_freq_regs_lut
[i
].r6c_val
);
326 ret
= fc2580_wr_reg_ff(priv
, 0x6d, fc2580_freq_regs_lut
[i
].r6d_val
);
330 ret
= fc2580_wr_reg_ff(priv
, 0x6e, fc2580_freq_regs_lut
[i
].r6e_val
);
334 ret
= fc2580_wr_reg_ff(priv
, 0x6f, fc2580_freq_regs_lut
[i
].r6f_val
);
339 for (i
= 0; i
< ARRAY_SIZE(fc2580_if_filter_lut
); i
++) {
340 if (c
->bandwidth_hz
<= fc2580_if_filter_lut
[i
].freq
)
344 if (i
== ARRAY_SIZE(fc2580_if_filter_lut
))
347 ret
= fc2580_wr_reg(priv
, 0x36, fc2580_if_filter_lut
[i
].r36_val
);
351 ret
= fc2580_wr_reg(priv
, 0x37, div_u64(1ULL * priv
->cfg
->clock
*
352 fc2580_if_filter_lut
[i
].mul
, 1000000000));
356 ret
= fc2580_wr_reg(priv
, 0x39, fc2580_if_filter_lut
[i
].r39_val
);
361 ret
= fc2580_wr_reg(priv
, 0x2e, 0x09);
365 for (i
= 0; i
< 5; i
++) {
366 ret
= fc2580_rd_reg(priv
, 0x2f, &tmp_val
);
370 /* done when [7:6] are set */
371 if ((tmp_val
& 0xc0) == 0xc0)
374 ret
= fc2580_wr_reg(priv
, 0x2e, 0x01);
378 ret
= fc2580_wr_reg(priv
, 0x2e, 0x09);
382 usleep_range(5000, 25000);
385 dev_dbg(&priv
->i2c
->dev
, "%s: loop=%i\n", __func__
, i
);
387 ret
= fc2580_wr_reg(priv
, 0x2e, 0x01);
391 if (fe
->ops
.i2c_gate_ctrl
)
392 fe
->ops
.i2c_gate_ctrl(fe
, 0);
396 if (fe
->ops
.i2c_gate_ctrl
)
397 fe
->ops
.i2c_gate_ctrl(fe
, 0);
399 dev_dbg(&priv
->i2c
->dev
, "%s: failed=%d\n", __func__
, ret
);
403 static int fc2580_init(struct dvb_frontend
*fe
)
405 struct fc2580_priv
*priv
= fe
->tuner_priv
;
408 dev_dbg(&priv
->i2c
->dev
, "%s:\n", __func__
);
410 if (fe
->ops
.i2c_gate_ctrl
)
411 fe
->ops
.i2c_gate_ctrl(fe
, 1);
413 for (i
= 0; i
< ARRAY_SIZE(fc2580_init_reg_vals
); i
++) {
414 ret
= fc2580_wr_reg(priv
, fc2580_init_reg_vals
[i
].reg
,
415 fc2580_init_reg_vals
[i
].val
);
420 if (fe
->ops
.i2c_gate_ctrl
)
421 fe
->ops
.i2c_gate_ctrl(fe
, 0);
425 if (fe
->ops
.i2c_gate_ctrl
)
426 fe
->ops
.i2c_gate_ctrl(fe
, 0);
428 dev_dbg(&priv
->i2c
->dev
, "%s: failed=%d\n", __func__
, ret
);
432 static int fc2580_sleep(struct dvb_frontend
*fe
)
434 struct fc2580_priv
*priv
= fe
->tuner_priv
;
437 dev_dbg(&priv
->i2c
->dev
, "%s:\n", __func__
);
439 if (fe
->ops
.i2c_gate_ctrl
)
440 fe
->ops
.i2c_gate_ctrl(fe
, 1);
442 ret
= fc2580_wr_reg(priv
, 0x02, 0x0a);
446 if (fe
->ops
.i2c_gate_ctrl
)
447 fe
->ops
.i2c_gate_ctrl(fe
, 0);
451 if (fe
->ops
.i2c_gate_ctrl
)
452 fe
->ops
.i2c_gate_ctrl(fe
, 0);
454 dev_dbg(&priv
->i2c
->dev
, "%s: failed=%d\n", __func__
, ret
);
458 static int fc2580_get_if_frequency(struct dvb_frontend
*fe
, u32
*frequency
)
460 struct fc2580_priv
*priv
= fe
->tuner_priv
;
462 dev_dbg(&priv
->i2c
->dev
, "%s:\n", __func__
);
464 *frequency
= 0; /* Zero-IF */
469 static int fc2580_release(struct dvb_frontend
*fe
)
471 struct fc2580_priv
*priv
= fe
->tuner_priv
;
473 dev_dbg(&priv
->i2c
->dev
, "%s:\n", __func__
);
475 kfree(fe
->tuner_priv
);
480 static const struct dvb_tuner_ops fc2580_tuner_ops
= {
482 .name
= "FCI FC2580",
483 .frequency_min
= 174000000,
484 .frequency_max
= 862000000,
487 .release
= fc2580_release
,
490 .sleep
= fc2580_sleep
,
491 .set_params
= fc2580_set_params
,
493 .get_if_frequency
= fc2580_get_if_frequency
,
496 struct dvb_frontend
*fc2580_attach(struct dvb_frontend
*fe
,
497 struct i2c_adapter
*i2c
, const struct fc2580_config
*cfg
)
499 struct fc2580_priv
*priv
;
503 if (fe
->ops
.i2c_gate_ctrl
)
504 fe
->ops
.i2c_gate_ctrl(fe
, 1);
506 priv
= kzalloc(sizeof(struct fc2580_priv
), GFP_KERNEL
);
509 dev_err(&i2c
->dev
, "%s: kzalloc() failed\n", KBUILD_MODNAME
);
516 /* check if the tuner is there */
517 ret
= fc2580_rd_reg(priv
, 0x01, &chip_id
);
521 dev_dbg(&priv
->i2c
->dev
, "%s: chip_id=%02x\n", __func__
, chip_id
);
531 dev_info(&priv
->i2c
->dev
,
532 "%s: FCI FC2580 successfully identified\n",
535 fe
->tuner_priv
= priv
;
536 memcpy(&fe
->ops
.tuner_ops
, &fc2580_tuner_ops
,
537 sizeof(struct dvb_tuner_ops
));
539 if (fe
->ops
.i2c_gate_ctrl
)
540 fe
->ops
.i2c_gate_ctrl(fe
, 0);
544 if (fe
->ops
.i2c_gate_ctrl
)
545 fe
->ops
.i2c_gate_ctrl(fe
, 0);
547 dev_dbg(&i2c
->dev
, "%s: failed=%d\n", __func__
, ret
);
551 EXPORT_SYMBOL(fc2580_attach
);
553 MODULE_DESCRIPTION("FCI FC2580 silicon tuner driver");
554 MODULE_AUTHOR("Antti Palosaari <crope@iki.fi>");
555 MODULE_LICENSE("GPL");