2 * Renesas USB DMA Controller Driver
4 * Copyright (C) 2015 Renesas Electronics Corporation
7 * Copyright (C) 2014 Renesas Electronics Inc.
8 * Author: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
10 * This is free software; you can redistribute it and/or modify
11 * it under the terms of version 2 of the GNU General Public License as
12 * published by the Free Software Foundation.
15 #include <linux/delay.h>
16 #include <linux/dma-mapping.h>
17 #include <linux/dmaengine.h>
18 #include <linux/interrupt.h>
19 #include <linux/list.h>
20 #include <linux/module.h>
22 #include <linux/of_dma.h>
23 #include <linux/of_platform.h>
24 #include <linux/platform_device.h>
25 #include <linux/pm_runtime.h>
26 #include <linux/slab.h>
27 #include <linux/spinlock.h>
29 #include "../dmaengine.h"
30 #include "../virt-dma.h"
33 * struct usb_dmac_sg - Descriptor for a hardware transfer
34 * @mem_addr: memory address
35 * @size: transfer size in bytes
43 * struct usb_dmac_desc - USB DMA Transfer Descriptor
44 * @vd: base virtual channel DMA transaction descriptor
45 * @direction: direction of the DMA transfer
46 * @sg_allocated_len: length of allocated sg
47 * @sg_len: length of sg
48 * @sg_index: index of sg
49 * @residue: residue after the DMAC completed a transfer
50 * @node: node for desc_got and desc_freed
51 * @done_cookie: cookie after the DMAC completed a transfer
52 * @sg: information for the transfer
54 struct usb_dmac_desc
{
55 struct virt_dma_desc vd
;
56 enum dma_transfer_direction direction
;
57 unsigned int sg_allocated_len
;
59 unsigned int sg_index
;
61 struct list_head node
;
62 dma_cookie_t done_cookie
;
63 struct usb_dmac_sg sg
[0];
66 #define to_usb_dmac_desc(vd) container_of(vd, struct usb_dmac_desc, vd)
69 * struct usb_dmac_chan - USB DMA Controller Channel
70 * @vc: base virtual DMA channel object
71 * @iomem: channel I/O memory base
72 * @index: index of this channel in the controller
73 * @irq: irq number of this channel
74 * @desc: the current descriptor
75 * @descs_allocated: number of descriptors allocated
76 * @desc_got: got descriptors
77 * @desc_freed: freed descriptors after the DMAC completed a transfer
79 struct usb_dmac_chan
{
80 struct virt_dma_chan vc
;
84 struct usb_dmac_desc
*desc
;
86 struct list_head desc_got
;
87 struct list_head desc_freed
;
90 #define to_usb_dmac_chan(c) container_of(c, struct usb_dmac_chan, vc.chan)
93 * struct usb_dmac - USB DMA Controller
94 * @engine: base DMA engine object
95 * @dev: the hardware device
96 * @iomem: remapped I/O memory base
97 * @n_channels: number of available channels
98 * @channels: array of DMAC channels
101 struct dma_device engine
;
105 unsigned int n_channels
;
106 struct usb_dmac_chan
*channels
;
109 #define to_usb_dmac(d) container_of(d, struct usb_dmac, engine)
111 /* -----------------------------------------------------------------------------
115 #define USB_DMAC_CHAN_OFFSET(i) (0x20 + 0x20 * (i))
117 #define USB_DMASWR 0x0008
118 #define USB_DMASWR_SWR (1 << 0)
119 #define USB_DMAOR 0x0060
120 #define USB_DMAOR_AE (1 << 2)
121 #define USB_DMAOR_DME (1 << 0)
123 #define USB_DMASAR 0x0000
124 #define USB_DMADAR 0x0004
125 #define USB_DMATCR 0x0008
126 #define USB_DMATCR_MASK 0x00ffffff
127 #define USB_DMACHCR 0x0014
128 #define USB_DMACHCR_FTE (1 << 24)
129 #define USB_DMACHCR_NULLE (1 << 16)
130 #define USB_DMACHCR_NULL (1 << 12)
131 #define USB_DMACHCR_TS_8B ((0 << 7) | (0 << 6))
132 #define USB_DMACHCR_TS_16B ((0 << 7) | (1 << 6))
133 #define USB_DMACHCR_TS_32B ((1 << 7) | (0 << 6))
134 #define USB_DMACHCR_IE (1 << 5)
135 #define USB_DMACHCR_SP (1 << 2)
136 #define USB_DMACHCR_TE (1 << 1)
137 #define USB_DMACHCR_DE (1 << 0)
138 #define USB_DMATEND 0x0018
140 /* Hardcode the xfer_shift to 5 (32bytes) */
141 #define USB_DMAC_XFER_SHIFT 5
142 #define USB_DMAC_XFER_SIZE (1 << USB_DMAC_XFER_SHIFT)
143 #define USB_DMAC_CHCR_TS USB_DMACHCR_TS_32B
144 #define USB_DMAC_SLAVE_BUSWIDTH DMA_SLAVE_BUSWIDTH_32_BYTES
146 /* for descriptors */
147 #define USB_DMAC_INITIAL_NR_DESC 16
148 #define USB_DMAC_INITIAL_NR_SG 8
150 /* -----------------------------------------------------------------------------
154 static void usb_dmac_write(struct usb_dmac
*dmac
, u32 reg
, u32 data
)
156 writel(data
, dmac
->iomem
+ reg
);
159 static u32
usb_dmac_read(struct usb_dmac
*dmac
, u32 reg
)
161 return readl(dmac
->iomem
+ reg
);
164 static u32
usb_dmac_chan_read(struct usb_dmac_chan
*chan
, u32 reg
)
166 return readl(chan
->iomem
+ reg
);
169 static void usb_dmac_chan_write(struct usb_dmac_chan
*chan
, u32 reg
, u32 data
)
171 writel(data
, chan
->iomem
+ reg
);
174 /* -----------------------------------------------------------------------------
175 * Initialization and configuration
178 static bool usb_dmac_chan_is_busy(struct usb_dmac_chan
*chan
)
180 u32 chcr
= usb_dmac_chan_read(chan
, USB_DMACHCR
);
182 return (chcr
& (USB_DMACHCR_DE
| USB_DMACHCR_TE
)) == USB_DMACHCR_DE
;
185 static u32
usb_dmac_calc_tend(u32 size
)
188 * Please refer to the Figure "Example of Final Transaction Valid
189 * Data Transfer Enable (EDTEN) Setting" in the data sheet.
191 return 0xffffffff << (32 - (size
% USB_DMAC_XFER_SIZE
? :
192 USB_DMAC_XFER_SIZE
));
195 /* This function is already held by vc.lock */
196 static void usb_dmac_chan_start_sg(struct usb_dmac_chan
*chan
,
199 struct usb_dmac_desc
*desc
= chan
->desc
;
200 struct usb_dmac_sg
*sg
= desc
->sg
+ index
;
201 dma_addr_t src_addr
= 0, dst_addr
= 0;
203 WARN_ON_ONCE(usb_dmac_chan_is_busy(chan
));
205 if (desc
->direction
== DMA_DEV_TO_MEM
)
206 dst_addr
= sg
->mem_addr
;
208 src_addr
= sg
->mem_addr
;
210 dev_dbg(chan
->vc
.chan
.device
->dev
,
211 "chan%u: queue sg %p: %u@%pad -> %pad\n",
212 chan
->index
, sg
, sg
->size
, &src_addr
, &dst_addr
);
214 usb_dmac_chan_write(chan
, USB_DMASAR
, src_addr
& 0xffffffff);
215 usb_dmac_chan_write(chan
, USB_DMADAR
, dst_addr
& 0xffffffff);
216 usb_dmac_chan_write(chan
, USB_DMATCR
,
217 DIV_ROUND_UP(sg
->size
, USB_DMAC_XFER_SIZE
));
218 usb_dmac_chan_write(chan
, USB_DMATEND
, usb_dmac_calc_tend(sg
->size
));
220 usb_dmac_chan_write(chan
, USB_DMACHCR
, USB_DMAC_CHCR_TS
|
221 USB_DMACHCR_NULLE
| USB_DMACHCR_IE
| USB_DMACHCR_DE
);
224 /* This function is already held by vc.lock */
225 static void usb_dmac_chan_start_desc(struct usb_dmac_chan
*chan
)
227 struct virt_dma_desc
*vd
;
229 vd
= vchan_next_desc(&chan
->vc
);
236 * Remove this request from vc->desc_issued. Otherwise, this driver
237 * will get the previous value from vchan_next_desc() after a transfer
242 chan
->desc
= to_usb_dmac_desc(vd
);
243 chan
->desc
->sg_index
= 0;
244 usb_dmac_chan_start_sg(chan
, 0);
247 static int usb_dmac_init(struct usb_dmac
*dmac
)
251 /* Clear all channels and enable the DMAC globally. */
252 usb_dmac_write(dmac
, USB_DMAOR
, USB_DMAOR_DME
);
254 dmaor
= usb_dmac_read(dmac
, USB_DMAOR
);
255 if ((dmaor
& (USB_DMAOR_AE
| USB_DMAOR_DME
)) != USB_DMAOR_DME
) {
256 dev_warn(dmac
->dev
, "DMAOR initialization failed.\n");
263 /* -----------------------------------------------------------------------------
264 * Descriptors allocation and free
266 static int usb_dmac_desc_alloc(struct usb_dmac_chan
*chan
, unsigned int sg_len
,
269 struct usb_dmac_desc
*desc
;
272 desc
= kzalloc(sizeof(*desc
) + sg_len
* sizeof(desc
->sg
[0]), gfp
);
276 desc
->sg_allocated_len
= sg_len
;
277 INIT_LIST_HEAD(&desc
->node
);
279 spin_lock_irqsave(&chan
->vc
.lock
, flags
);
280 list_add_tail(&desc
->node
, &chan
->desc_freed
);
281 spin_unlock_irqrestore(&chan
->vc
.lock
, flags
);
286 static void usb_dmac_desc_free(struct usb_dmac_chan
*chan
)
288 struct usb_dmac_desc
*desc
, *_desc
;
291 list_splice_init(&chan
->desc_freed
, &list
);
292 list_splice_init(&chan
->desc_got
, &list
);
294 list_for_each_entry_safe(desc
, _desc
, &list
, node
) {
295 list_del(&desc
->node
);
298 chan
->descs_allocated
= 0;
301 static struct usb_dmac_desc
*usb_dmac_desc_get(struct usb_dmac_chan
*chan
,
302 unsigned int sg_len
, gfp_t gfp
)
304 struct usb_dmac_desc
*desc
= NULL
;
307 /* Get a freed descritpor */
308 spin_lock_irqsave(&chan
->vc
.lock
, flags
);
309 list_for_each_entry(desc
, &chan
->desc_freed
, node
) {
310 if (sg_len
<= desc
->sg_allocated_len
) {
311 list_move_tail(&desc
->node
, &chan
->desc_got
);
312 spin_unlock_irqrestore(&chan
->vc
.lock
, flags
);
316 spin_unlock_irqrestore(&chan
->vc
.lock
, flags
);
318 /* Allocate a new descriptor */
319 if (!usb_dmac_desc_alloc(chan
, sg_len
, gfp
)) {
320 /* If allocated the desc, it was added to tail of the list */
321 spin_lock_irqsave(&chan
->vc
.lock
, flags
);
322 desc
= list_last_entry(&chan
->desc_freed
, struct usb_dmac_desc
,
324 list_move_tail(&desc
->node
, &chan
->desc_got
);
325 spin_unlock_irqrestore(&chan
->vc
.lock
, flags
);
332 static void usb_dmac_desc_put(struct usb_dmac_chan
*chan
,
333 struct usb_dmac_desc
*desc
)
337 spin_lock_irqsave(&chan
->vc
.lock
, flags
);
338 list_move_tail(&desc
->node
, &chan
->desc_freed
);
339 spin_unlock_irqrestore(&chan
->vc
.lock
, flags
);
342 /* -----------------------------------------------------------------------------
346 static void usb_dmac_soft_reset(struct usb_dmac_chan
*uchan
)
348 struct dma_chan
*chan
= &uchan
->vc
.chan
;
349 struct usb_dmac
*dmac
= to_usb_dmac(chan
->device
);
352 /* Don't issue soft reset if any one of channels is busy */
353 for (i
= 0; i
< dmac
->n_channels
; ++i
) {
354 if (usb_dmac_chan_is_busy(uchan
))
358 usb_dmac_write(dmac
, USB_DMAOR
, 0);
359 usb_dmac_write(dmac
, USB_DMASWR
, USB_DMASWR_SWR
);
361 usb_dmac_write(dmac
, USB_DMASWR
, 0);
362 usb_dmac_write(dmac
, USB_DMAOR
, 1);
365 static void usb_dmac_chan_halt(struct usb_dmac_chan
*chan
)
367 u32 chcr
= usb_dmac_chan_read(chan
, USB_DMACHCR
);
369 chcr
&= ~(USB_DMACHCR_IE
| USB_DMACHCR_TE
| USB_DMACHCR_DE
);
370 usb_dmac_chan_write(chan
, USB_DMACHCR
, chcr
);
372 usb_dmac_soft_reset(chan
);
375 static void usb_dmac_stop(struct usb_dmac
*dmac
)
377 usb_dmac_write(dmac
, USB_DMAOR
, 0);
380 /* -----------------------------------------------------------------------------
381 * DMA engine operations
384 static int usb_dmac_alloc_chan_resources(struct dma_chan
*chan
)
386 struct usb_dmac_chan
*uchan
= to_usb_dmac_chan(chan
);
389 while (uchan
->descs_allocated
< USB_DMAC_INITIAL_NR_DESC
) {
390 ret
= usb_dmac_desc_alloc(uchan
, USB_DMAC_INITIAL_NR_SG
,
393 usb_dmac_desc_free(uchan
);
396 uchan
->descs_allocated
++;
399 return pm_runtime_get_sync(chan
->device
->dev
);
402 static void usb_dmac_free_chan_resources(struct dma_chan
*chan
)
404 struct usb_dmac_chan
*uchan
= to_usb_dmac_chan(chan
);
407 /* Protect against ISR */
408 spin_lock_irqsave(&uchan
->vc
.lock
, flags
);
409 usb_dmac_chan_halt(uchan
);
410 spin_unlock_irqrestore(&uchan
->vc
.lock
, flags
);
412 usb_dmac_desc_free(uchan
);
413 vchan_free_chan_resources(&uchan
->vc
);
415 pm_runtime_put(chan
->device
->dev
);
418 static struct dma_async_tx_descriptor
*
419 usb_dmac_prep_slave_sg(struct dma_chan
*chan
, struct scatterlist
*sgl
,
420 unsigned int sg_len
, enum dma_transfer_direction dir
,
421 unsigned long dma_flags
, void *context
)
423 struct usb_dmac_chan
*uchan
= to_usb_dmac_chan(chan
);
424 struct usb_dmac_desc
*desc
;
425 struct scatterlist
*sg
;
429 dev_warn(chan
->device
->dev
,
430 "%s: bad parameter: len=%d\n", __func__
, sg_len
);
434 desc
= usb_dmac_desc_get(uchan
, sg_len
, GFP_NOWAIT
);
438 desc
->direction
= dir
;
439 desc
->sg_len
= sg_len
;
440 for_each_sg(sgl
, sg
, sg_len
, i
) {
441 desc
->sg
[i
].mem_addr
= sg_dma_address(sg
);
442 desc
->sg
[i
].size
= sg_dma_len(sg
);
445 return vchan_tx_prep(&uchan
->vc
, &desc
->vd
, dma_flags
);
448 static int usb_dmac_chan_terminate_all(struct dma_chan
*chan
)
450 struct usb_dmac_chan
*uchan
= to_usb_dmac_chan(chan
);
451 struct usb_dmac_desc
*desc
;
456 spin_lock_irqsave(&uchan
->vc
.lock
, flags
);
457 usb_dmac_chan_halt(uchan
);
458 vchan_get_all_descriptors(&uchan
->vc
, &head
);
461 list_splice_init(&uchan
->desc_got
, &list
);
462 list_for_each_entry(desc
, &list
, node
)
463 list_move_tail(&desc
->node
, &uchan
->desc_freed
);
464 spin_unlock_irqrestore(&uchan
->vc
.lock
, flags
);
465 vchan_dma_desc_free_list(&uchan
->vc
, &head
);
470 static unsigned int usb_dmac_get_current_residue(struct usb_dmac_chan
*chan
,
471 struct usb_dmac_desc
*desc
,
474 struct usb_dmac_sg
*sg
= desc
->sg
+ sg_index
;
475 u32 mem_addr
= sg
->mem_addr
& 0xffffffff;
476 unsigned int residue
= sg
->size
;
479 * We cannot use USB_DMATCR to calculate residue because USB_DMATCR
480 * has unsuited value to calculate.
482 if (desc
->direction
== DMA_DEV_TO_MEM
)
483 residue
-= usb_dmac_chan_read(chan
, USB_DMADAR
) - mem_addr
;
485 residue
-= usb_dmac_chan_read(chan
, USB_DMASAR
) - mem_addr
;
490 static u32
usb_dmac_chan_get_residue_if_complete(struct usb_dmac_chan
*chan
,
493 struct usb_dmac_desc
*desc
;
496 list_for_each_entry_reverse(desc
, &chan
->desc_freed
, node
) {
497 if (desc
->done_cookie
== cookie
) {
498 residue
= desc
->residue
;
506 static u32
usb_dmac_chan_get_residue(struct usb_dmac_chan
*chan
,
510 struct virt_dma_desc
*vd
;
511 struct usb_dmac_desc
*desc
= chan
->desc
;
515 vd
= vchan_find_desc(&chan
->vc
, cookie
);
518 desc
= to_usb_dmac_desc(vd
);
521 /* Compute the size of all usb_dmac_sg still to be transferred */
522 for (i
= desc
->sg_index
+ 1; i
< desc
->sg_len
; i
++)
523 residue
+= desc
->sg
[i
].size
;
525 /* Add the residue for the current sg */
526 residue
+= usb_dmac_get_current_residue(chan
, desc
, desc
->sg_index
);
531 static enum dma_status
usb_dmac_tx_status(struct dma_chan
*chan
,
533 struct dma_tx_state
*txstate
)
535 struct usb_dmac_chan
*uchan
= to_usb_dmac_chan(chan
);
536 enum dma_status status
;
537 unsigned int residue
= 0;
540 status
= dma_cookie_status(chan
, cookie
, txstate
);
541 /* a client driver will get residue after DMA_COMPLETE */
545 spin_lock_irqsave(&uchan
->vc
.lock
, flags
);
546 if (status
== DMA_COMPLETE
)
547 residue
= usb_dmac_chan_get_residue_if_complete(uchan
, cookie
);
549 residue
= usb_dmac_chan_get_residue(uchan
, cookie
);
550 spin_unlock_irqrestore(&uchan
->vc
.lock
, flags
);
552 dma_set_residue(txstate
, residue
);
557 static void usb_dmac_issue_pending(struct dma_chan
*chan
)
559 struct usb_dmac_chan
*uchan
= to_usb_dmac_chan(chan
);
562 spin_lock_irqsave(&uchan
->vc
.lock
, flags
);
563 if (vchan_issue_pending(&uchan
->vc
) && !uchan
->desc
)
564 usb_dmac_chan_start_desc(uchan
);
565 spin_unlock_irqrestore(&uchan
->vc
.lock
, flags
);
568 static void usb_dmac_virt_desc_free(struct virt_dma_desc
*vd
)
570 struct usb_dmac_desc
*desc
= to_usb_dmac_desc(vd
);
571 struct usb_dmac_chan
*chan
= to_usb_dmac_chan(vd
->tx
.chan
);
573 usb_dmac_desc_put(chan
, desc
);
576 /* -----------------------------------------------------------------------------
580 static void usb_dmac_isr_transfer_end(struct usb_dmac_chan
*chan
)
582 struct usb_dmac_desc
*desc
= chan
->desc
;
586 if (++desc
->sg_index
< desc
->sg_len
) {
587 usb_dmac_chan_start_sg(chan
, desc
->sg_index
);
589 desc
->residue
= usb_dmac_get_current_residue(chan
, desc
,
591 desc
->done_cookie
= desc
->vd
.tx
.cookie
;
592 vchan_cookie_complete(&desc
->vd
);
594 /* Restart the next transfer if this driver has a next desc */
595 usb_dmac_chan_start_desc(chan
);
599 static irqreturn_t
usb_dmac_isr_channel(int irq
, void *dev
)
601 struct usb_dmac_chan
*chan
= dev
;
602 irqreturn_t ret
= IRQ_NONE
;
603 u32 mask
= USB_DMACHCR_TE
;
604 u32 check_bits
= USB_DMACHCR_TE
| USB_DMACHCR_SP
;
607 spin_lock(&chan
->vc
.lock
);
609 chcr
= usb_dmac_chan_read(chan
, USB_DMACHCR
);
610 if (chcr
& check_bits
)
611 mask
|= USB_DMACHCR_DE
| check_bits
;
612 if (chcr
& USB_DMACHCR_NULL
) {
613 /* An interruption of TE will happen after we set FTE */
614 mask
|= USB_DMACHCR_NULL
;
615 chcr
|= USB_DMACHCR_FTE
;
618 usb_dmac_chan_write(chan
, USB_DMACHCR
, chcr
& ~mask
);
620 if (chcr
& check_bits
) {
621 usb_dmac_isr_transfer_end(chan
);
625 spin_unlock(&chan
->vc
.lock
);
630 /* -----------------------------------------------------------------------------
631 * OF xlate and channel filter
634 static bool usb_dmac_chan_filter(struct dma_chan
*chan
, void *arg
)
636 struct usb_dmac_chan
*uchan
= to_usb_dmac_chan(chan
);
637 struct of_phandle_args
*dma_spec
= arg
;
639 if (dma_spec
->np
!= chan
->device
->dev
->of_node
)
642 /* USB-DMAC should be used with fixed usb controller's FIFO */
643 if (uchan
->index
!= dma_spec
->args
[0])
649 static struct dma_chan
*usb_dmac_of_xlate(struct of_phandle_args
*dma_spec
,
650 struct of_dma
*ofdma
)
652 struct usb_dmac_chan
*uchan
;
653 struct dma_chan
*chan
;
656 if (dma_spec
->args_count
!= 1)
659 /* Only slave DMA channels can be allocated via DT */
661 dma_cap_set(DMA_SLAVE
, mask
);
663 chan
= dma_request_channel(mask
, usb_dmac_chan_filter
, dma_spec
);
667 uchan
= to_usb_dmac_chan(chan
);
672 /* -----------------------------------------------------------------------------
677 static int usb_dmac_runtime_suspend(struct device
*dev
)
679 struct usb_dmac
*dmac
= dev_get_drvdata(dev
);
682 for (i
= 0; i
< dmac
->n_channels
; ++i
)
683 usb_dmac_chan_halt(&dmac
->channels
[i
]);
688 static int usb_dmac_runtime_resume(struct device
*dev
)
690 struct usb_dmac
*dmac
= dev_get_drvdata(dev
);
692 return usb_dmac_init(dmac
);
694 #endif /* CONFIG_PM */
696 static const struct dev_pm_ops usb_dmac_pm
= {
697 SET_RUNTIME_PM_OPS(usb_dmac_runtime_suspend
, usb_dmac_runtime_resume
,
701 /* -----------------------------------------------------------------------------
705 static int usb_dmac_chan_probe(struct usb_dmac
*dmac
,
706 struct usb_dmac_chan
*uchan
,
709 struct platform_device
*pdev
= to_platform_device(dmac
->dev
);
710 char pdev_irqname
[5];
714 uchan
->index
= index
;
715 uchan
->iomem
= dmac
->iomem
+ USB_DMAC_CHAN_OFFSET(index
);
717 /* Request the channel interrupt. */
718 sprintf(pdev_irqname
, "ch%u", index
);
719 uchan
->irq
= platform_get_irq_byname(pdev
, pdev_irqname
);
720 if (uchan
->irq
< 0) {
721 dev_err(dmac
->dev
, "no IRQ specified for channel %u\n", index
);
725 irqname
= devm_kasprintf(dmac
->dev
, GFP_KERNEL
, "%s:%u",
726 dev_name(dmac
->dev
), index
);
730 ret
= devm_request_irq(dmac
->dev
, uchan
->irq
, usb_dmac_isr_channel
,
731 IRQF_SHARED
, irqname
, uchan
);
733 dev_err(dmac
->dev
, "failed to request IRQ %u (%d)\n",
738 uchan
->vc
.desc_free
= usb_dmac_virt_desc_free
;
739 vchan_init(&uchan
->vc
, &dmac
->engine
);
740 INIT_LIST_HEAD(&uchan
->desc_freed
);
741 INIT_LIST_HEAD(&uchan
->desc_got
);
746 static int usb_dmac_parse_of(struct device
*dev
, struct usb_dmac
*dmac
)
748 struct device_node
*np
= dev
->of_node
;
751 ret
= of_property_read_u32(np
, "dma-channels", &dmac
->n_channels
);
753 dev_err(dev
, "unable to read dma-channels property\n");
757 if (dmac
->n_channels
<= 0 || dmac
->n_channels
>= 100) {
758 dev_err(dev
, "invalid number of channels %u\n",
766 static int usb_dmac_probe(struct platform_device
*pdev
)
768 const enum dma_slave_buswidth widths
= USB_DMAC_SLAVE_BUSWIDTH
;
769 struct dma_device
*engine
;
770 struct usb_dmac
*dmac
;
771 struct resource
*mem
;
775 dmac
= devm_kzalloc(&pdev
->dev
, sizeof(*dmac
), GFP_KERNEL
);
779 dmac
->dev
= &pdev
->dev
;
780 platform_set_drvdata(pdev
, dmac
);
782 ret
= usb_dmac_parse_of(&pdev
->dev
, dmac
);
786 dmac
->channels
= devm_kcalloc(&pdev
->dev
, dmac
->n_channels
,
787 sizeof(*dmac
->channels
), GFP_KERNEL
);
791 /* Request resources. */
792 mem
= platform_get_resource(pdev
, IORESOURCE_MEM
, 0);
793 dmac
->iomem
= devm_ioremap_resource(&pdev
->dev
, mem
);
794 if (IS_ERR(dmac
->iomem
))
795 return PTR_ERR(dmac
->iomem
);
797 /* Enable runtime PM and initialize the device. */
798 pm_runtime_enable(&pdev
->dev
);
799 ret
= pm_runtime_get_sync(&pdev
->dev
);
801 dev_err(&pdev
->dev
, "runtime PM get sync failed (%d)\n", ret
);
805 ret
= usb_dmac_init(dmac
);
806 pm_runtime_put(&pdev
->dev
);
809 dev_err(&pdev
->dev
, "failed to reset device\n");
813 /* Initialize the channels. */
814 INIT_LIST_HEAD(&dmac
->engine
.channels
);
816 for (i
= 0; i
< dmac
->n_channels
; ++i
) {
817 ret
= usb_dmac_chan_probe(dmac
, &dmac
->channels
[i
], i
);
822 /* Register the DMAC as a DMA provider for DT. */
823 ret
= of_dma_controller_register(pdev
->dev
.of_node
, usb_dmac_of_xlate
,
829 * Register the DMA engine device.
831 * Default transfer size of 32 bytes requires 32-byte alignment.
833 engine
= &dmac
->engine
;
834 dma_cap_set(DMA_SLAVE
, engine
->cap_mask
);
836 engine
->dev
= &pdev
->dev
;
838 engine
->src_addr_widths
= widths
;
839 engine
->dst_addr_widths
= widths
;
840 engine
->directions
= BIT(DMA_MEM_TO_DEV
) | BIT(DMA_DEV_TO_MEM
);
841 engine
->residue_granularity
= DMA_RESIDUE_GRANULARITY_BURST
;
843 engine
->device_alloc_chan_resources
= usb_dmac_alloc_chan_resources
;
844 engine
->device_free_chan_resources
= usb_dmac_free_chan_resources
;
845 engine
->device_prep_slave_sg
= usb_dmac_prep_slave_sg
;
846 engine
->device_terminate_all
= usb_dmac_chan_terminate_all
;
847 engine
->device_tx_status
= usb_dmac_tx_status
;
848 engine
->device_issue_pending
= usb_dmac_issue_pending
;
850 ret
= dma_async_device_register(engine
);
857 of_dma_controller_free(pdev
->dev
.of_node
);
858 pm_runtime_disable(&pdev
->dev
);
862 static void usb_dmac_chan_remove(struct usb_dmac
*dmac
,
863 struct usb_dmac_chan
*uchan
)
865 usb_dmac_chan_halt(uchan
);
866 devm_free_irq(dmac
->dev
, uchan
->irq
, uchan
);
869 static int usb_dmac_remove(struct platform_device
*pdev
)
871 struct usb_dmac
*dmac
= platform_get_drvdata(pdev
);
874 for (i
= 0; i
< dmac
->n_channels
; ++i
)
875 usb_dmac_chan_remove(dmac
, &dmac
->channels
[i
]);
876 of_dma_controller_free(pdev
->dev
.of_node
);
877 dma_async_device_unregister(&dmac
->engine
);
879 pm_runtime_disable(&pdev
->dev
);
884 static void usb_dmac_shutdown(struct platform_device
*pdev
)
886 struct usb_dmac
*dmac
= platform_get_drvdata(pdev
);
891 static const struct of_device_id usb_dmac_of_ids
[] = {
892 { .compatible
= "renesas,usb-dmac", },
895 MODULE_DEVICE_TABLE(of
, usb_dmac_of_ids
);
897 static struct platform_driver usb_dmac_driver
= {
901 .of_match_table
= usb_dmac_of_ids
,
903 .probe
= usb_dmac_probe
,
904 .remove
= usb_dmac_remove
,
905 .shutdown
= usb_dmac_shutdown
,
908 module_platform_driver(usb_dmac_driver
);
910 MODULE_DESCRIPTION("Renesas USB DMA Controller Driver");
911 MODULE_AUTHOR("Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>");
912 MODULE_LICENSE("GPL v2");