2 * This file is subject to the terms and conditions of the GNU General Public
3 * License. See the file "COPYING" in the main directory of this archive
6 * Copyright (C) 2005-2006 Silicon Graphics, Inc. All Rights Reserved.
9 /* This file contains the master driver module for use by SGI IOC4 subdrivers.
11 * It allocates any resources shared between multiple subdevices, and
12 * provides accessor functions (where needed) and the like for those
13 * resources. It also provides a mechanism for the subdevice modules
14 * to support loading and unloading.
16 * Non-shared resources (e.g. external interrupt A_INT_OUT register page
17 * alias, serial port and UART registers) are handled by the subdevice
20 * This is all necessary because IOC4 is not implemented as a multi-function
21 * PCI device, but an amalgamation of disparate registers for several
22 * types of device (ATA, serial, external interrupts). The normal
23 * resource management in the kernel doesn't have quite the right interfaces
24 * to handle this situation (e.g. multiple modules can't claim the same
25 * PCI ID), thus this IOC4 master module.
28 #include <linux/errno.h>
29 #include <linux/module.h>
30 #include <linux/pci.h>
31 #include <linux/ioc4.h>
32 #include <linux/ktime.h>
33 #include <linux/slab.h>
34 #include <linux/mutex.h>
35 #include <linux/time.h>
42 /* Tweakable values */
44 /* PCI bus speed detection/calibration */
45 #define IOC4_CALIBRATE_COUNT 63 /* Calibration cycle period */
46 #define IOC4_CALIBRATE_CYCLES 256 /* Average over this many cycles */
47 #define IOC4_CALIBRATE_DISCARD 2 /* Discard first few cycles */
48 #define IOC4_CALIBRATE_LOW_MHZ 25 /* Lower bound on bus speed sanity */
49 #define IOC4_CALIBRATE_HIGH_MHZ 75 /* Upper bound on bus speed sanity */
50 #define IOC4_CALIBRATE_DEFAULT_MHZ 66 /* Assumed if sanity check fails */
52 /************************
53 * Submodule management *
54 ************************/
56 static DEFINE_MUTEX(ioc4_mutex
);
58 static LIST_HEAD(ioc4_devices
);
59 static LIST_HEAD(ioc4_submodules
);
61 /* Register an IOC4 submodule */
63 ioc4_register_submodule(struct ioc4_submodule
*is
)
65 struct ioc4_driver_data
*idd
;
67 mutex_lock(&ioc4_mutex
);
68 list_add(&is
->is_list
, &ioc4_submodules
);
70 /* Initialize submodule for each IOC4 */
74 list_for_each_entry(idd
, &ioc4_devices
, idd_list
) {
75 if (is
->is_probe(idd
)) {
77 "%s: IOC4 submodule %s probe failed "
79 __func__
, module_name(is
->is_owner
),
80 pci_name(idd
->idd_pdev
));
84 mutex_unlock(&ioc4_mutex
);
88 /* Unregister an IOC4 submodule */
90 ioc4_unregister_submodule(struct ioc4_submodule
*is
)
92 struct ioc4_driver_data
*idd
;
94 mutex_lock(&ioc4_mutex
);
95 list_del(&is
->is_list
);
97 /* Remove submodule for each IOC4 */
101 list_for_each_entry(idd
, &ioc4_devices
, idd_list
) {
102 if (is
->is_remove(idd
)) {
104 "%s: IOC4 submodule %s remove failed "
106 __func__
, module_name(is
->is_owner
),
107 pci_name(idd
->idd_pdev
));
111 mutex_unlock(&ioc4_mutex
);
114 /*********************
115 * Device management *
116 *********************/
118 #define IOC4_CALIBRATE_LOW_LIMIT \
119 (1000*IOC4_EXTINT_COUNT_DIVISOR/IOC4_CALIBRATE_LOW_MHZ)
120 #define IOC4_CALIBRATE_HIGH_LIMIT \
121 (1000*IOC4_EXTINT_COUNT_DIVISOR/IOC4_CALIBRATE_HIGH_MHZ)
122 #define IOC4_CALIBRATE_DEFAULT \
123 (1000*IOC4_EXTINT_COUNT_DIVISOR/IOC4_CALIBRATE_DEFAULT_MHZ)
125 #define IOC4_CALIBRATE_END \
126 (IOC4_CALIBRATE_CYCLES + IOC4_CALIBRATE_DISCARD)
128 #define IOC4_INT_OUT_MODE_TOGGLE 0x7 /* Toggle INT_OUT every COUNT+1 ticks */
130 /* Determines external interrupt output clock period of the PCI bus an
131 * IOC4 is attached to. This value can be used to determine the PCI
134 * IOC4 has a design feature that various internal timers are derived from
135 * the PCI bus clock. This causes IOC4 device drivers to need to take the
136 * bus speed into account when setting various register values (e.g. INT_OUT
137 * register COUNT field, UART divisors, etc). Since this information is
138 * needed by several subdrivers, it is determined by the main IOC4 driver,
139 * even though the following code utilizes external interrupt registers
140 * to perform the speed calculation.
143 ioc4_clock_calibrate(struct ioc4_driver_data
*idd
)
145 union ioc4_int_out int_out
;
146 union ioc4_gpcr gpcr
;
147 unsigned int state
, last_state
;
148 uint64_t start
, end
, period
;
153 gpcr
.fields
.dir
= IOC4_GPCR_DIR_0
;
154 gpcr
.fields
.int_out_en
= 1;
155 writel(gpcr
.raw
, &idd
->idd_misc_regs
->gpcr_s
.raw
);
157 /* Reset to power-on state */
158 writel(0, &idd
->idd_misc_regs
->int_out
.raw
);
161 /* Set up square wave */
163 int_out
.fields
.count
= IOC4_CALIBRATE_COUNT
;
164 int_out
.fields
.mode
= IOC4_INT_OUT_MODE_TOGGLE
;
165 int_out
.fields
.diag
= 0;
166 writel(int_out
.raw
, &idd
->idd_misc_regs
->int_out
.raw
);
169 /* Check square wave period averaged over some number of cycles */
170 start
= ktime_get_ns();
171 state
= 1; /* make sure the first read isn't a rising edge */
172 for (count
= 0; count
<= IOC4_CALIBRATE_END
; count
++) {
173 do { /* wait for a rising edge */
175 int_out
.raw
= readl(&idd
->idd_misc_regs
->int_out
.raw
);
176 state
= int_out
.fields
.int_out
;
177 } while (last_state
|| !state
);
179 /* discard the first few cycles */
180 if (count
== IOC4_CALIBRATE_DISCARD
)
181 start
= ktime_get_ns();
183 end
= ktime_get_ns();
185 /* Calculation rearranged to preserve intermediate precision.
187 * 1. "end - start" gives us the measurement period over all
188 * the square wave cycles.
189 * 2. Divide by number of square wave cycles to get the period
190 * of a square wave cycle.
191 * 3. Divide by 2*(int_out.fields.count+1), which is the formula
192 * by which the IOC4 generates the square wave, to get the
193 * period of an IOC4 INT_OUT count.
195 period
= (end
- start
) /
196 (IOC4_CALIBRATE_CYCLES
* 2 * (IOC4_CALIBRATE_COUNT
+ 1));
198 /* Bounds check the result. */
199 if (period
> IOC4_CALIBRATE_LOW_LIMIT
||
200 period
< IOC4_CALIBRATE_HIGH_LIMIT
) {
202 "IOC4 %s: Clock calibration failed. Assuming"
203 "PCI clock is %d ns.\n",
204 pci_name(idd
->idd_pdev
),
205 IOC4_CALIBRATE_DEFAULT
/ IOC4_EXTINT_COUNT_DIVISOR
);
206 period
= IOC4_CALIBRATE_DEFAULT
;
210 do_div(ns
, IOC4_EXTINT_COUNT_DIVISOR
);
212 "IOC4 %s: PCI clock is %llu ns.\n",
213 pci_name(idd
->idd_pdev
), (unsigned long long)ns
);
216 /* Remember results. We store the extint clock period rather
217 * than the PCI clock period so that greater precision is
218 * retained. Divide by IOC4_EXTINT_COUNT_DIVISOR to get
221 idd
->count_period
= period
;
224 /* There are three variants of IOC4 cards: IO9, IO10, and PCI-RT.
225 * Each brings out different combinations of IOC4 signals, thus.
226 * the IOC4 subdrivers need to know to which we're attached.
228 * We look for the presence of a SCSI (IO9) or SATA (IO10) controller
229 * on the same PCI bus at slot number 3 to differentiate IO9 from IO10.
230 * If neither is present, it's a PCI-RT.
233 ioc4_variant(struct ioc4_driver_data
*idd
)
235 struct pci_dev
*pdev
= NULL
;
238 /* IO9: Look for a QLogic ISP 12160 at the same bus and slot 3. */
240 pdev
= pci_get_device(PCI_VENDOR_ID_QLOGIC
,
241 PCI_DEVICE_ID_QLOGIC_ISP12160
, pdev
);
243 idd
->idd_pdev
->bus
->number
== pdev
->bus
->number
&&
244 3 == PCI_SLOT(pdev
->devfn
))
246 } while (pdev
&& !found
);
249 return IOC4_VARIANT_IO9
;
252 /* IO10: Look for a Vitesse VSC 7174 at the same bus and slot 3. */
255 pdev
= pci_get_device(PCI_VENDOR_ID_VITESSE
,
256 PCI_DEVICE_ID_VITESSE_VSC7174
, pdev
);
258 idd
->idd_pdev
->bus
->number
== pdev
->bus
->number
&&
259 3 == PCI_SLOT(pdev
->devfn
))
261 } while (pdev
&& !found
);
264 return IOC4_VARIANT_IO10
;
267 /* PCI-RT: No SCSI/SATA controller will be present */
268 return IOC4_VARIANT_PCI_RT
;
272 ioc4_load_modules(struct work_struct
*work
)
274 request_module("sgiioc4");
277 static DECLARE_WORK(ioc4_load_modules_work
, ioc4_load_modules
);
279 /* Adds a new instance of an IOC4 card */
281 ioc4_probe(struct pci_dev
*pdev
, const struct pci_device_id
*pci_id
)
283 struct ioc4_driver_data
*idd
;
284 struct ioc4_submodule
*is
;
288 /* Enable IOC4 and take ownership of it */
289 if ((ret
= pci_enable_device(pdev
))) {
291 "%s: Failed to enable IOC4 device for pci_dev %s.\n",
292 __func__
, pci_name(pdev
));
295 pci_set_master(pdev
);
297 /* Set up per-IOC4 data */
298 idd
= kmalloc(sizeof(struct ioc4_driver_data
), GFP_KERNEL
);
301 "%s: Failed to allocate IOC4 data for pci_dev %s.\n",
302 __func__
, pci_name(pdev
));
306 idd
->idd_pdev
= pdev
;
307 idd
->idd_pci_id
= pci_id
;
309 /* Map IOC4 misc registers. These are shared between subdevices
310 * so the main IOC4 module manages them.
312 idd
->idd_bar0
= pci_resource_start(idd
->idd_pdev
, 0);
313 if (!idd
->idd_bar0
) {
315 "%s: Unable to find IOC4 misc resource "
317 __func__
, pci_name(idd
->idd_pdev
));
321 if (!request_mem_region(idd
->idd_bar0
, sizeof(struct ioc4_misc_regs
),
324 "%s: Unable to request IOC4 misc region "
326 __func__
, pci_name(idd
->idd_pdev
));
330 idd
->idd_misc_regs
= ioremap(idd
->idd_bar0
,
331 sizeof(struct ioc4_misc_regs
));
332 if (!idd
->idd_misc_regs
) {
334 "%s: Unable to remap IOC4 misc region "
336 __func__
, pci_name(idd
->idd_pdev
));
338 goto out_misc_region
;
341 /* Failsafe portion of per-IOC4 initialization */
343 /* Detect card variant */
344 idd
->idd_variant
= ioc4_variant(idd
);
345 printk(KERN_INFO
"IOC4 %s: %s card detected.\n", pci_name(pdev
),
346 idd
->idd_variant
== IOC4_VARIANT_IO9
? "IO9" :
347 idd
->idd_variant
== IOC4_VARIANT_PCI_RT
? "PCI-RT" :
348 idd
->idd_variant
== IOC4_VARIANT_IO10
? "IO10" : "unknown");
350 /* Initialize IOC4 */
351 pci_read_config_dword(idd
->idd_pdev
, PCI_COMMAND
, &pcmd
);
352 pci_write_config_dword(idd
->idd_pdev
, PCI_COMMAND
,
353 pcmd
| PCI_COMMAND_PARITY
| PCI_COMMAND_SERR
);
355 /* Determine PCI clock */
356 ioc4_clock_calibrate(idd
);
358 /* Disable/clear all interrupts. Need to do this here lest
359 * one submodule request the shared IOC4 IRQ, but interrupt
360 * is generated by a different subdevice.
363 writel(~0, &idd
->idd_misc_regs
->other_iec
.raw
);
364 writel(~0, &idd
->idd_misc_regs
->sio_iec
);
365 /* Clear (i.e. acknowledge) */
366 writel(~0, &idd
->idd_misc_regs
->other_ir
.raw
);
367 writel(~0, &idd
->idd_misc_regs
->sio_ir
);
369 /* Track PCI-device specific data */
370 idd
->idd_serial_data
= NULL
;
371 pci_set_drvdata(idd
->idd_pdev
, idd
);
373 mutex_lock(&ioc4_mutex
);
374 list_add_tail(&idd
->idd_list
, &ioc4_devices
);
376 /* Add this IOC4 to all submodules */
377 list_for_each_entry(is
, &ioc4_submodules
, is_list
) {
378 if (is
->is_probe
&& is
->is_probe(idd
)) {
380 "%s: IOC4 submodule 0x%s probe failed "
382 __func__
, module_name(is
->is_owner
),
383 pci_name(idd
->idd_pdev
));
386 mutex_unlock(&ioc4_mutex
);
388 /* Request sgiioc4 IDE driver on boards that bring that functionality
389 * off of IOC4. The root filesystem may be hosted on a drive connected
390 * to IOC4, so we need to make sure the sgiioc4 driver is loaded as it
391 * won't be picked up by modprobes due to the ioc4 module owning the
394 if (idd
->idd_variant
!= IOC4_VARIANT_PCI_RT
) {
395 /* Request the module from a work procedure as the modprobe
396 * goes out to a userland helper and that will hang if done
397 * directly from ioc4_probe().
399 printk(KERN_INFO
"IOC4 loading sgiioc4 submodule\n");
400 schedule_work(&ioc4_load_modules_work
);
406 release_mem_region(idd
->idd_bar0
, sizeof(struct ioc4_misc_regs
));
410 pci_disable_device(pdev
);
415 /* Removes a particular instance of an IOC4 card. */
417 ioc4_remove(struct pci_dev
*pdev
)
419 struct ioc4_submodule
*is
;
420 struct ioc4_driver_data
*idd
;
422 idd
= pci_get_drvdata(pdev
);
424 /* Remove this IOC4 from all submodules */
425 mutex_lock(&ioc4_mutex
);
426 list_for_each_entry(is
, &ioc4_submodules
, is_list
) {
427 if (is
->is_remove
&& is
->is_remove(idd
)) {
429 "%s: IOC4 submodule 0x%s remove failed "
431 __func__
, module_name(is
->is_owner
),
432 pci_name(idd
->idd_pdev
));
435 mutex_unlock(&ioc4_mutex
);
437 /* Release resources */
438 iounmap(idd
->idd_misc_regs
);
439 if (!idd
->idd_bar0
) {
441 "%s: Unable to get IOC4 misc mapping for pci_dev %s. "
442 "Device removal may be incomplete.\n",
443 __func__
, pci_name(idd
->idd_pdev
));
445 release_mem_region(idd
->idd_bar0
, sizeof(struct ioc4_misc_regs
));
447 /* Disable IOC4 and relinquish */
448 pci_disable_device(pdev
);
450 /* Remove and free driver data */
451 mutex_lock(&ioc4_mutex
);
452 list_del(&idd
->idd_list
);
453 mutex_unlock(&ioc4_mutex
);
457 static struct pci_device_id ioc4_id_table
[] = {
458 {PCI_VENDOR_ID_SGI
, PCI_DEVICE_ID_SGI_IOC4
, PCI_ANY_ID
,
459 PCI_ANY_ID
, 0x0b4000, 0xFFFFFF},
463 static struct pci_driver ioc4_driver
= {
465 .id_table
= ioc4_id_table
,
467 .remove
= ioc4_remove
,
470 MODULE_DEVICE_TABLE(pci
, ioc4_id_table
);
472 /*********************
473 * Module management *
474 *********************/
480 return pci_register_driver(&ioc4_driver
);
487 /* Ensure ioc4_load_modules() has completed before exiting */
488 flush_work(&ioc4_load_modules_work
);
489 pci_unregister_driver(&ioc4_driver
);
492 module_init(ioc4_init
);
493 module_exit(ioc4_exit
);
495 MODULE_AUTHOR("Brent Casavant - Silicon Graphics, Inc. <bcasavan@sgi.com>");
496 MODULE_DESCRIPTION("PCI driver master module for SGI IOC4 Base-IO Card");
497 MODULE_LICENSE("GPL");
499 EXPORT_SYMBOL(ioc4_register_submodule
);
500 EXPORT_SYMBOL(ioc4_unregister_submodule
);