ALSA: hda - Constify fixup and other array data in patch_sigmatel.c
[linux/fpc-iii.git] / arch / m68k / platform / 68328 / timers.c
blob309f725995bf4900bb1423a64ad21f0353acd697
1 /***************************************************************************/
3 /*
4 * linux/arch/m68knommu/platform/68328/timers.c
6 * Copyright (C) 1993 Hamish Macdonald
7 * Copyright (C) 1999 D. Jeff Dionne
8 * Copyright (C) 2001 Georges Menie, Ken Desmet
10 * This file is subject to the terms and conditions of the GNU General Public
11 * License. See the file COPYING in the main directory of this archive
12 * for more details.
15 /***************************************************************************/
17 #include <linux/types.h>
18 #include <linux/kernel.h>
19 #include <linux/mm.h>
20 #include <linux/interrupt.h>
21 #include <linux/irq.h>
22 #include <linux/clocksource.h>
23 #include <asm/setup.h>
24 #include <asm/system.h>
25 #include <asm/pgtable.h>
26 #include <asm/machdep.h>
27 #include <asm/MC68VZ328.h>
29 /***************************************************************************/
31 #if defined(CONFIG_DRAGEN2)
32 /* with a 33.16 MHz clock, this will give usec resolution to the time functions */
33 #define CLOCK_SOURCE TCTL_CLKSOURCE_SYSCLK
34 #define CLOCK_PRE 7
35 #define TICKS_PER_JIFFY 41450
37 #elif defined(CONFIG_XCOPILOT_BUGS)
39 * The only thing I know is that CLK32 is not available on Xcopilot
40 * I have little idea about what frequency SYSCLK has on Xcopilot.
41 * The values for prescaler and compare registers were simply
42 * taken from the original source
44 #define CLOCK_SOURCE TCTL_CLKSOURCE_SYSCLK
45 #define CLOCK_PRE 2
46 #define TICKS_PER_JIFFY 0xd7e4
48 #else
49 /* default to using the 32Khz clock */
50 #define CLOCK_SOURCE TCTL_CLKSOURCE_32KHZ
51 #define CLOCK_PRE 31
52 #define TICKS_PER_JIFFY 10
53 #endif
55 static u32 m68328_tick_cnt;
57 /***************************************************************************/
59 static irqreturn_t hw_tick(int irq, void *dummy)
61 /* Reset Timer1 */
62 TSTAT &= 0;
64 m68328_tick_cnt += TICKS_PER_JIFFY;
65 return arch_timer_interrupt(irq, dummy);
68 /***************************************************************************/
70 static struct irqaction m68328_timer_irq = {
71 .name = "timer",
72 .flags = IRQF_DISABLED | IRQF_TIMER,
73 .handler = hw_tick,
76 /***************************************************************************/
78 static cycle_t m68328_read_clk(struct clocksource *cs)
80 unsigned long flags;
81 u32 cycles;
83 local_irq_save(flags);
84 cycles = m68328_tick_cnt + TCN;
85 local_irq_restore(flags);
87 return cycles;
90 /***************************************************************************/
92 static struct clocksource m68328_clk = {
93 .name = "timer",
94 .rating = 250,
95 .read = m68328_read_clk,
96 .shift = 20,
97 .mask = CLOCKSOURCE_MASK(32),
98 .flags = CLOCK_SOURCE_IS_CONTINUOUS,
101 /***************************************************************************/
103 void hw_timer_init(void)
105 /* disable timer 1 */
106 TCTL = 0;
108 /* set ISR */
109 setup_irq(TMR_IRQ_NUM, &m68328_timer_irq);
111 /* Restart mode, Enable int, Set clock source */
112 TCTL = TCTL_OM | TCTL_IRQEN | CLOCK_SOURCE;
113 TPRER = CLOCK_PRE;
114 TCMP = TICKS_PER_JIFFY;
116 /* Enable timer 1 */
117 TCTL |= TCTL_TEN;
118 m68328_clk.mult = clocksource_hz2mult(TICKS_PER_JIFFY*HZ, m68328_clk.shift);
119 clocksource_register(&m68328_clk);
122 /***************************************************************************/
124 void m68328_timer_gettod(int *year, int *mon, int *day, int *hour, int *min, int *sec)
126 long now = RTCTIME;
128 *year = *mon = *day = 1;
129 *hour = (now >> 24) % 24;
130 *min = (now >> 16) % 60;
131 *sec = now % 60;
134 /***************************************************************************/