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md/raid: only permit hot-add of compatible integrity profiles
[linux/fpc-iii.git] / drivers / char / pcmcia / synclink_cs.c
blob45df4bf914f89fc6ec1fb2398c272f1b6f0444b9
1 /*
2 * linux/drivers/char/pcmcia/synclink_cs.c
3 *
4 * $Id: synclink_cs.c,v 4.34 2005/09/08 13:20:54 paulkf Exp $
5 *
6 * Device driver for Microgate SyncLink PC Card
7 * multiprotocol serial adapter.
8 *
9 * written by Paul Fulghum for Microgate Corporation
10 * paulkf@microgate.com
11 *
12 * Microgate and SyncLink are trademarks of Microgate Corporation
13 *
14 * This code is released under the GNU General Public License (GPL)
15 *
16 * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
17 * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
18 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
19 * DISCLAIMED. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT,
20 * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
21 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
22 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
23 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
24 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
25 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
26 * OF THE POSSIBILITY OF SUCH DAMAGE.
27 */
28
29 #define VERSION(ver,rel,seq) (((ver)<<16) | ((rel)<<8) | (seq))
30 #if defined(__i386__)
31 # define BREAKPOINT() asm(" int $3");
32 #else
33 # define BREAKPOINT() { }
34 #endif
35
36 #define MAX_DEVICE_COUNT 4
37
38 #include <linux/module.h>
39 #include <linux/errno.h>
40 #include <linux/signal.h>
41 #include <linux/sched.h>
42 #include <linux/timer.h>
43 #include <linux/time.h>
44 #include <linux/interrupt.h>
45 #include <linux/tty.h>
46 #include <linux/tty_flip.h>
47 #include <linux/serial.h>
48 #include <linux/major.h>
49 #include <linux/string.h>
50 #include <linux/fcntl.h>
51 #include <linux/ptrace.h>
52 #include <linux/ioport.h>
53 #include <linux/mm.h>
54 #include <linux/seq_file.h>
55 #include <linux/slab.h>
56 #include <linux/netdevice.h>
57 #include <linux/vmalloc.h>
58 #include <linux/init.h>
59 #include <linux/delay.h>
60 #include <linux/ioctl.h>
61 #include <linux/synclink.h>
62
63 #include <asm/io.h>
64 #include <asm/irq.h>
65 #include <asm/dma.h>
66 #include <linux/bitops.h>
67 #include <asm/types.h>
68 #include <linux/termios.h>
69 #include <linux/workqueue.h>
70 #include <linux/hdlc.h>
71
72 #include <pcmcia/cistpl.h>
73 #include <pcmcia/cisreg.h>
74 #include <pcmcia/ds.h>
75
76 #if defined(CONFIG_HDLC) || (defined(CONFIG_HDLC_MODULE) && defined(CONFIG_SYNCLINK_CS_MODULE))
77 #define SYNCLINK_GENERIC_HDLC 1
78 #else
79 #define SYNCLINK_GENERIC_HDLC 0
80 #endif
81
82 #define GET_USER(error,value,addr) error = get_user(value,addr)
83 #define COPY_FROM_USER(error,dest,src,size) error = copy_from_user(dest,src,size) ? -EFAULT : 0
84 #define PUT_USER(error,value,addr) error = put_user(value,addr)
85 #define COPY_TO_USER(error,dest,src,size) error = copy_to_user(dest,src,size) ? -EFAULT : 0
86
87 #include <asm/uaccess.h>
88
89 static MGSL_PARAMS default_params = {
90 MGSL_MODE_HDLC, /* unsigned long mode */
91 0, /* unsigned char loopback; */
92 HDLC_FLAG_UNDERRUN_ABORT15, /* unsigned short flags; */
93 HDLC_ENCODING_NRZI_SPACE, /* unsigned char encoding; */
94 0, /* unsigned long clock_speed; */
95 0xff, /* unsigned char addr_filter; */
96 HDLC_CRC_16_CCITT, /* unsigned short crc_type; */
97 HDLC_PREAMBLE_LENGTH_8BITS, /* unsigned char preamble_length; */
98 HDLC_PREAMBLE_PATTERN_NONE, /* unsigned char preamble; */
99 9600, /* unsigned long data_rate; */
100 8, /* unsigned char data_bits; */
101 1, /* unsigned char stop_bits; */
102 ASYNC_PARITY_NONE /* unsigned char parity; */
103 };
104
105 typedef struct {
106 int count;
107 unsigned char status;
108 char data[1];
109 } RXBUF;
110
111 /* The queue of BH actions to be performed */
112
113 #define BH_RECEIVE 1
114 #define BH_TRANSMIT 2
115 #define BH_STATUS 4
116
117 #define IO_PIN_SHUTDOWN_LIMIT 100
118
119 #define RELEVANT_IFLAG(iflag) (iflag & (IGNBRK|BRKINT|IGNPAR|PARMRK|INPCK))
120
121 struct _input_signal_events {
122 int ri_up;
123 int ri_down;
124 int dsr_up;
125 int dsr_down;
126 int dcd_up;
127 int dcd_down;
128 int cts_up;
129 int cts_down;
130 };
131
132
133 /*
134 * Device instance data structure
135 */
136
137 typedef struct _mgslpc_info {
138 struct tty_port port;
139 void *if_ptr; /* General purpose pointer (used by SPPP) */
140 int magic;
141 int line;
142
143 struct mgsl_icount icount;
144
145 int timeout;
146 int x_char; /* xon/xoff character */
147 unsigned char read_status_mask;
148 unsigned char ignore_status_mask;
149
150 unsigned char *tx_buf;
151 int tx_put;
152 int tx_get;
153 int tx_count;
154
155 /* circular list of fixed length rx buffers */
156
157 unsigned char *rx_buf; /* memory allocated for all rx buffers */
158 int rx_buf_total_size; /* size of memory allocated for rx buffers */
159 int rx_put; /* index of next empty rx buffer */
160 int rx_get; /* index of next full rx buffer */
161 int rx_buf_size; /* size in bytes of single rx buffer */
162 int rx_buf_count; /* total number of rx buffers */
163 int rx_frame_count; /* number of full rx buffers */
164
165 wait_queue_head_t status_event_wait_q;
166 wait_queue_head_t event_wait_q;
167 struct timer_list tx_timer; /* HDLC transmit timeout timer */
168 struct _mgslpc_info *next_device; /* device list link */
169
170 unsigned short imra_value;
171 unsigned short imrb_value;
172 unsigned char pim_value;
173
174 spinlock_t lock;
175 struct work_struct task; /* task structure for scheduling bh */
176
177 u32 max_frame_size;
178
179 u32 pending_bh;
180
181 bool bh_running;
182 bool bh_requested;
183
184 int dcd_chkcount; /* check counts to prevent */
185 int cts_chkcount; /* too many IRQs if a signal */
186 int dsr_chkcount; /* is floating */
187 int ri_chkcount;
188
189 bool rx_enabled;
190 bool rx_overflow;
191
192 bool tx_enabled;
193 bool tx_active;
194 bool tx_aborting;
195 u32 idle_mode;
196
197 int if_mode; /* serial interface selection (RS-232, v.35 etc) */
198
199 char device_name[25]; /* device instance name */
200
201 unsigned int io_base; /* base I/O address of adapter */
202 unsigned int irq_level;
203
204 MGSL_PARAMS params; /* communications parameters */
205
206 unsigned char serial_signals; /* current serial signal states */
207
208 bool irq_occurred; /* for diagnostics use */
209 char testing_irq;
210 unsigned int init_error; /* startup error (DIAGS) */
211
212 char *flag_buf;
213 bool drop_rts_on_tx_done;
214
215 struct _input_signal_events input_signal_events;
216
217 /* PCMCIA support */
218 struct pcmcia_device *p_dev;
219 int stop;
220
221 /* SPPP/Cisco HDLC device parts */
222 int netcount;
223 spinlock_t netlock;
224
225 #if SYNCLINK_GENERIC_HDLC
226 struct net_device *netdev;
227 #endif
228
229 } MGSLPC_INFO;
230
231 #define MGSLPC_MAGIC 0x5402
232
233 /*
234 * The size of the serial xmit buffer is 1 page, or 4096 bytes
235 */
236 #define TXBUFSIZE 4096
237
238
239 #define CHA 0x00 /* channel A offset */
240 #define CHB 0x40 /* channel B offset */
241
242 /*
243 * FIXME: PPC has PVR defined in asm/reg.h. For now we just undef it.
244 */
245 #undef PVR
246
247 #define RXFIFO 0
248 #define TXFIFO 0
249 #define STAR 0x20
250 #define CMDR 0x20
251 #define RSTA 0x21
252 #define PRE 0x21
253 #define MODE 0x22
254 #define TIMR 0x23
255 #define XAD1 0x24
256 #define XAD2 0x25
257 #define RAH1 0x26
258 #define RAH2 0x27
259 #define DAFO 0x27
260 #define RAL1 0x28
261 #define RFC 0x28
262 #define RHCR 0x29
263 #define RAL2 0x29
264 #define RBCL 0x2a
265 #define XBCL 0x2a
266 #define RBCH 0x2b
267 #define XBCH 0x2b
268 #define CCR0 0x2c
269 #define CCR1 0x2d
270 #define CCR2 0x2e
271 #define CCR3 0x2f
272 #define VSTR 0x34
273 #define BGR 0x34
274 #define RLCR 0x35
275 #define AML 0x36
276 #define AMH 0x37
277 #define GIS 0x38
278 #define IVA 0x38
279 #define IPC 0x39
280 #define ISR 0x3a
281 #define IMR 0x3a
282 #define PVR 0x3c
283 #define PIS 0x3d
284 #define PIM 0x3d
285 #define PCR 0x3e
286 #define CCR4 0x3f
287
288 // IMR/ISR
289
290 #define IRQ_BREAK_ON BIT15 // rx break detected
291 #define IRQ_DATAOVERRUN BIT14 // receive data overflow
292 #define IRQ_ALLSENT BIT13 // all sent
293 #define IRQ_UNDERRUN BIT12 // transmit data underrun
294 #define IRQ_TIMER BIT11 // timer interrupt
295 #define IRQ_CTS BIT10 // CTS status change
296 #define IRQ_TXREPEAT BIT9 // tx message repeat
297 #define IRQ_TXFIFO BIT8 // transmit pool ready
298 #define IRQ_RXEOM BIT7 // receive message end
299 #define IRQ_EXITHUNT BIT6 // receive frame start
300 #define IRQ_RXTIME BIT6 // rx char timeout
301 #define IRQ_DCD BIT2 // carrier detect status change
302 #define IRQ_OVERRUN BIT1 // receive frame overflow
303 #define IRQ_RXFIFO BIT0 // receive pool full
304
305 // STAR
306
307 #define XFW BIT6 // transmit FIFO write enable
308 #define CEC BIT2 // command executing
309 #define CTS BIT1 // CTS state
310
311 #define PVR_DTR BIT0
312 #define PVR_DSR BIT1
313 #define PVR_RI BIT2
314 #define PVR_AUTOCTS BIT3
315 #define PVR_RS232 0x20 /* 0010b */
316 #define PVR_V35 0xe0 /* 1110b */
317 #define PVR_RS422 0x40 /* 0100b */
318
319 /* Register access functions */
320
321 #define write_reg(info, reg, val) outb((val),(info)->io_base + (reg))
322 #define read_reg(info, reg) inb((info)->io_base + (reg))
323
324 #define read_reg16(info, reg) inw((info)->io_base + (reg))
325 #define write_reg16(info, reg, val) outw((val), (info)->io_base + (reg))
326
327 #define set_reg_bits(info, reg, mask) \
328 write_reg(info, (reg), \
329 (unsigned char) (read_reg(info, (reg)) | (mask)))
330 #define clear_reg_bits(info, reg, mask) \
331 write_reg(info, (reg), \
332 (unsigned char) (read_reg(info, (reg)) & ~(mask)))
333 /*
334 * interrupt enable/disable routines
335 */
336 static void irq_disable(MGSLPC_INFO *info, unsigned char channel, unsigned short mask)
337 {
338 if (channel == CHA) {
339 info->imra_value |= mask;
340 write_reg16(info, CHA + IMR, info->imra_value);
341 } else {
342 info->imrb_value |= mask;
343 write_reg16(info, CHB + IMR, info->imrb_value);
344 }
345 }
346 static void irq_enable(MGSLPC_INFO *info, unsigned char channel, unsigned short mask)
347 {
348 if (channel == CHA) {
349 info->imra_value &= ~mask;
350 write_reg16(info, CHA + IMR, info->imra_value);
351 } else {
352 info->imrb_value &= ~mask;
353 write_reg16(info, CHB + IMR, info->imrb_value);
354 }
355 }
356
357 #define port_irq_disable(info, mask) \
358 { info->pim_value |= (mask); write_reg(info, PIM, info->pim_value); }
359
360 #define port_irq_enable(info, mask) \
361 { info->pim_value &= ~(mask); write_reg(info, PIM, info->pim_value); }
362
363 static void rx_start(MGSLPC_INFO *info);
364 static void rx_stop(MGSLPC_INFO *info);
365
366 static void tx_start(MGSLPC_INFO *info, struct tty_struct *tty);
367 static void tx_stop(MGSLPC_INFO *info);
368 static void tx_set_idle(MGSLPC_INFO *info);
369
370 static void get_signals(MGSLPC_INFO *info);
371 static void set_signals(MGSLPC_INFO *info);
372
373 static void reset_device(MGSLPC_INFO *info);
374
375 static void hdlc_mode(MGSLPC_INFO *info);
376 static void async_mode(MGSLPC_INFO *info);
377
378 static void tx_timeout(unsigned long context);
379
380 static int carrier_raised(struct tty_port *port);
381 static void dtr_rts(struct tty_port *port, int onoff);
382
383 #if SYNCLINK_GENERIC_HDLC
384 #define dev_to_port(D) (dev_to_hdlc(D)->priv)
385 static void hdlcdev_tx_done(MGSLPC_INFO *info);
386 static void hdlcdev_rx(MGSLPC_INFO *info, char *buf, int size);
387 static int hdlcdev_init(MGSLPC_INFO *info);
388 static void hdlcdev_exit(MGSLPC_INFO *info);
389 #endif
390
391 static void trace_block(MGSLPC_INFO *info,const char* data, int count, int xmit);
392
393 static bool register_test(MGSLPC_INFO *info);
394 static bool irq_test(MGSLPC_INFO *info);
395 static int adapter_test(MGSLPC_INFO *info);
396
397 static int claim_resources(MGSLPC_INFO *info);
398 static void release_resources(MGSLPC_INFO *info);
399 static int mgslpc_add_device(MGSLPC_INFO *info);
400 static void mgslpc_remove_device(MGSLPC_INFO *info);
401
402 static bool rx_get_frame(MGSLPC_INFO *info, struct tty_struct *tty);
403 static void rx_reset_buffers(MGSLPC_INFO *info);
404 static int rx_alloc_buffers(MGSLPC_INFO *info);
405 static void rx_free_buffers(MGSLPC_INFO *info);
406
407 static irqreturn_t mgslpc_isr(int irq, void *dev_id);
408
409 /*
410 * Bottom half interrupt handlers
411 */
412 static void bh_handler(struct work_struct *work);
413 static void bh_transmit(MGSLPC_INFO *info, struct tty_struct *tty);
414 static void bh_status(MGSLPC_INFO *info);
415
416 /*
417 * ioctl handlers
418 */
419 static int tiocmget(struct tty_struct *tty);
420 static int tiocmset(struct tty_struct *tty,
421 unsigned int set, unsigned int clear);
422 static int get_stats(MGSLPC_INFO *info, struct mgsl_icount __user *user_icount);
423 static int get_params(MGSLPC_INFO *info, MGSL_PARAMS __user *user_params);
424 static int set_params(MGSLPC_INFO *info, MGSL_PARAMS __user *new_params, struct tty_struct *tty);
425 static int get_txidle(MGSLPC_INFO *info, int __user *idle_mode);
426 static int set_txidle(MGSLPC_INFO *info, int idle_mode);
427 static int set_txenable(MGSLPC_INFO *info, int enable, struct tty_struct *tty);
428 static int tx_abort(MGSLPC_INFO *info);
429 static int set_rxenable(MGSLPC_INFO *info, int enable);
430 static int wait_events(MGSLPC_INFO *info, int __user *mask);
431
432 static MGSLPC_INFO *mgslpc_device_list = NULL;
433 static int mgslpc_device_count = 0;
434
435 /*
436 * Set this param to non-zero to load eax with the
437 * .text section address and breakpoint on module load.
438 * This is useful for use with gdb and add-symbol-file command.
439 */
440 static bool break_on_load;
441
442 /*
443 * Driver major number, defaults to zero to get auto
444 * assigned major number. May be forced as module parameter.
445 */
446 static int ttymajor=0;
447
448 static int debug_level = 0;
449 static int maxframe[MAX_DEVICE_COUNT] = {0,};
450
451 module_param(break_on_load, bool, 0);
452 module_param(ttymajor, int, 0);
453 module_param(debug_level, int, 0);
454 module_param_array(maxframe, int, NULL, 0);
455
456 MODULE_LICENSE("GPL");
457
458 static char *driver_name = "SyncLink PC Card driver";
459 static char *driver_version = "$Revision: 4.34 $";
460
461 static struct tty_driver *serial_driver;
462
463 /* number of characters left in xmit buffer before we ask for more */
464 #define WAKEUP_CHARS 256
465
466 static void mgslpc_change_params(MGSLPC_INFO *info, struct tty_struct *tty);
467 static void mgslpc_wait_until_sent(struct tty_struct *tty, int timeout);
468
469 /* PCMCIA prototypes */
470
471 static int mgslpc_config(struct pcmcia_device *link);
472 static void mgslpc_release(u_long arg);
473 static void mgslpc_detach(struct pcmcia_device *p_dev);
474
475 /*
476 * 1st function defined in .text section. Calling this function in
477 * init_module() followed by a breakpoint allows a remote debugger
478 * (gdb) to get the .text address for the add-symbol-file command.
479 * This allows remote debugging of dynamically loadable modules.
480 */
481 static void* mgslpc_get_text_ptr(void)
482 {
483 return mgslpc_get_text_ptr;
484 }
485
486 /**
487 * line discipline callback wrappers
488 *
489 * The wrappers maintain line discipline references
490 * while calling into the line discipline.
491 *
492 * ldisc_receive_buf - pass receive data to line discipline
493 */
494
495 static void ldisc_receive_buf(struct tty_struct *tty,
496 const __u8 *data, char *flags, int count)
497 {
498 struct tty_ldisc *ld;
499 if (!tty)
500 return;
501 ld = tty_ldisc_ref(tty);
502 if (ld) {
503 if (ld->ops->receive_buf)
504 ld->ops->receive_buf(tty, data, flags, count);
505 tty_ldisc_deref(ld);
506 }
507 }
508
509 static const struct tty_port_operations mgslpc_port_ops = {
510 .carrier_raised = carrier_raised,
511 .dtr_rts = dtr_rts
512 };
513
514 static int mgslpc_probe(struct pcmcia_device *link)
515 {
516 MGSLPC_INFO *info;
517 int ret;
518
519 if (debug_level >= DEBUG_LEVEL_INFO)
520 printk("mgslpc_attach\n");
521
522 info = kzalloc(sizeof(MGSLPC_INFO), GFP_KERNEL);
523 if (!info) {
524 printk("Error can't allocate device instance data\n");
525 return -ENOMEM;
526 }
527
528 info->magic = MGSLPC_MAGIC;
529 tty_port_init(&info->port);
530 info->port.ops = &mgslpc_port_ops;
531 INIT_WORK(&info->task, bh_handler);
532 info->max_frame_size = 4096;
533 info->port.close_delay = 5*HZ/10;
534 info->port.closing_wait = 30*HZ;
535 init_waitqueue_head(&info->status_event_wait_q);
536 init_waitqueue_head(&info->event_wait_q);
537 spin_lock_init(&info->lock);
538 spin_lock_init(&info->netlock);
539 memcpy(&info->params,&default_params,sizeof(MGSL_PARAMS));
540 info->idle_mode = HDLC_TXIDLE_FLAGS;
541 info->imra_value = 0xffff;
542 info->imrb_value = 0xffff;
543 info->pim_value = 0xff;
544
545 info->p_dev = link;
546 link->priv = info;
547
548 /* Initialize the struct pcmcia_device structure */
549
550 ret = mgslpc_config(link);
551 if (ret != 0)
552 goto failed;
553
554 ret = mgslpc_add_device(info);
555 if (ret != 0)
556 goto failed_release;
557
558 return 0;
559
560 failed_release:
561 mgslpc_release((u_long)link);
562 failed:
563 tty_port_destroy(&info->port);
564 kfree(info);
565 return ret;
566 }
567
568 /* Card has been inserted.
569 */
570
571 static int mgslpc_ioprobe(struct pcmcia_device *p_dev, void *priv_data)
572 {
573 return pcmcia_request_io(p_dev);
574 }
575
576 static int mgslpc_config(struct pcmcia_device *link)
577 {
578 MGSLPC_INFO *info = link->priv;
579 int ret;
580
581 if (debug_level >= DEBUG_LEVEL_INFO)
582 printk("mgslpc_config(0x%p)\n", link);
583
584 link->config_flags |= CONF_ENABLE_IRQ | CONF_AUTO_SET_IO;
585
586 ret = pcmcia_loop_config(link, mgslpc_ioprobe, NULL);
587 if (ret != 0)
588 goto failed;
589
590 link->config_index = 8;
591 link->config_regs = PRESENT_OPTION;
592
593 ret = pcmcia_request_irq(link, mgslpc_isr);
594 if (ret)
595 goto failed;
596 ret = pcmcia_enable_device(link);
597 if (ret)
598 goto failed;
599
600 info->io_base = link->resource[0]->start;
601 info->irq_level = link->irq;
602 return 0;
603
604 failed:
605 mgslpc_release((u_long)link);
606 return -ENODEV;
607 }
608
609 /* Card has been removed.
610 * Unregister device and release PCMCIA configuration.
611 * If device is open, postpone until it is closed.
612 */
613 static void mgslpc_release(u_long arg)
614 {
615 struct pcmcia_device *link = (struct pcmcia_device *)arg;
616
617 if (debug_level >= DEBUG_LEVEL_INFO)
618 printk("mgslpc_release(0x%p)\n", link);
619
620 pcmcia_disable_device(link);
621 }
622
623 static void mgslpc_detach(struct pcmcia_device *link)
624 {
625 if (debug_level >= DEBUG_LEVEL_INFO)
626 printk("mgslpc_detach(0x%p)\n", link);
627
628 ((MGSLPC_INFO *)link->priv)->stop = 1;
629 mgslpc_release((u_long)link);
630
631 mgslpc_remove_device((MGSLPC_INFO *)link->priv);
632 }
633
634 static int mgslpc_suspend(struct pcmcia_device *link)
635 {
636 MGSLPC_INFO *info = link->priv;
637
638 info->stop = 1;
639
640 return 0;
641 }
642
643 static int mgslpc_resume(struct pcmcia_device *link)
644 {
645 MGSLPC_INFO *info = link->priv;
646
647 info->stop = 0;
648
649 return 0;
650 }
651
652
653 static inline bool mgslpc_paranoia_check(MGSLPC_INFO *info,
654 char *name, const char *routine)
655 {
656 #ifdef MGSLPC_PARANOIA_CHECK
657 static const char *badmagic =
658 "Warning: bad magic number for mgsl struct (%s) in %s\n";
659 static const char *badinfo =
660 "Warning: null mgslpc_info for (%s) in %s\n";
661
662 if (!info) {
663 printk(badinfo, name, routine);
664 return true;
665 }
666 if (info->magic != MGSLPC_MAGIC) {
667 printk(badmagic, name, routine);
668 return true;
669 }
670 #else
671 if (!info)
672 return true;
673 #endif
674 return false;
675 }
676
677
678 #define CMD_RXFIFO BIT7 // release current rx FIFO
679 #define CMD_RXRESET BIT6 // receiver reset
680 #define CMD_RXFIFO_READ BIT5
681 #define CMD_START_TIMER BIT4
682 #define CMD_TXFIFO BIT3 // release current tx FIFO
683 #define CMD_TXEOM BIT1 // transmit end message
684 #define CMD_TXRESET BIT0 // transmit reset
685
686 static bool wait_command_complete(MGSLPC_INFO *info, unsigned char channel)
687 {
688 int i = 0;
689 /* wait for command completion */
690 while (read_reg(info, (unsigned char)(channel+STAR)) & BIT2) {
691 udelay(1);
692 if (i++ == 1000)
693 return false;
694 }
695 return true;
696 }
697
698 static void issue_command(MGSLPC_INFO *info, unsigned char channel, unsigned char cmd)
699 {
700 wait_command_complete(info, channel);
701 write_reg(info, (unsigned char) (channel + CMDR), cmd);
702 }
703
704 static void tx_pause(struct tty_struct *tty)
705 {
706 MGSLPC_INFO *info = (MGSLPC_INFO *)tty->driver_data;
707 unsigned long flags;
708
709 if (mgslpc_paranoia_check(info, tty->name, "tx_pause"))
710 return;
711 if (debug_level >= DEBUG_LEVEL_INFO)
712 printk("tx_pause(%s)\n", info->device_name);
713
714 spin_lock_irqsave(&info->lock, flags);
715 if (info->tx_enabled)
716 tx_stop(info);
717 spin_unlock_irqrestore(&info->lock, flags);
718 }
719
720 static void tx_release(struct tty_struct *tty)
721 {
722 MGSLPC_INFO *info = (MGSLPC_INFO *)tty->driver_data;
723 unsigned long flags;
724
725 if (mgslpc_paranoia_check(info, tty->name, "tx_release"))
726 return;
727 if (debug_level >= DEBUG_LEVEL_INFO)
728 printk("tx_release(%s)\n", info->device_name);
729
730 spin_lock_irqsave(&info->lock, flags);
731 if (!info->tx_enabled)
732 tx_start(info, tty);
733 spin_unlock_irqrestore(&info->lock, flags);
734 }
735
736 /* Return next bottom half action to perform.
737 * or 0 if nothing to do.
738 */
739 static int bh_action(MGSLPC_INFO *info)
740 {
741 unsigned long flags;
742 int rc = 0;
743
744 spin_lock_irqsave(&info->lock, flags);
745
746 if (info->pending_bh & BH_RECEIVE) {
747 info->pending_bh &= ~BH_RECEIVE;
748 rc = BH_RECEIVE;
749 } else if (info->pending_bh & BH_TRANSMIT) {
750 info->pending_bh &= ~BH_TRANSMIT;
751 rc = BH_TRANSMIT;
752 } else if (info->pending_bh & BH_STATUS) {
753 info->pending_bh &= ~BH_STATUS;
754 rc = BH_STATUS;
755 }
756
757 if (!rc) {
758 /* Mark BH routine as complete */
759 info->bh_running = false;
760 info->bh_requested = false;
761 }
762
763 spin_unlock_irqrestore(&info->lock, flags);
764
765 return rc;
766 }
767
768 static void bh_handler(struct work_struct *work)
769 {
770 MGSLPC_INFO *info = container_of(work, MGSLPC_INFO, task);
771 struct tty_struct *tty;
772 int action;
773
774 if (debug_level >= DEBUG_LEVEL_BH)
775 printk("%s(%d):bh_handler(%s) entry\n",
776 __FILE__,__LINE__,info->device_name);
777
778 info->bh_running = true;
779 tty = tty_port_tty_get(&info->port);
780
781 while((action = bh_action(info)) != 0) {
782
783 /* Process work item */
784 if (debug_level >= DEBUG_LEVEL_BH)
785 printk("%s(%d):bh_handler() work item action=%d\n",
786 __FILE__,__LINE__,action);
787
788 switch (action) {
789
790 case BH_RECEIVE:
791 while(rx_get_frame(info, tty));
792 break;
793 case BH_TRANSMIT:
794 bh_transmit(info, tty);
795 break;
796 case BH_STATUS:
797 bh_status(info);
798 break;
799 default:
800 /* unknown work item ID */
801 printk("Unknown work item ID=%08X!\n", action);
802 break;
803 }
804 }
805
806 tty_kref_put(tty);
807 if (debug_level >= DEBUG_LEVEL_BH)
808 printk("%s(%d):bh_handler(%s) exit\n",
809 __FILE__,__LINE__,info->device_name);
810 }
811
812 static void bh_transmit(MGSLPC_INFO *info, struct tty_struct *tty)
813 {
814 if (debug_level >= DEBUG_LEVEL_BH)
815 printk("bh_transmit() entry on %s\n", info->device_name);
816
817 if (tty)
818 tty_wakeup(tty);
819 }
820
821 static void bh_status(MGSLPC_INFO *info)
822 {
823 info->ri_chkcount = 0;
824 info->dsr_chkcount = 0;
825 info->dcd_chkcount = 0;
826 info->cts_chkcount = 0;
827 }
828
829 /* eom: non-zero = end of frame */
830 static void rx_ready_hdlc(MGSLPC_INFO *info, int eom)
831 {
832 unsigned char data[2];
833 unsigned char fifo_count, read_count, i;
834 RXBUF *buf = (RXBUF*)(info->rx_buf + (info->rx_put * info->rx_buf_size));
835
836 if (debug_level >= DEBUG_LEVEL_ISR)
837 printk("%s(%d):rx_ready_hdlc(eom=%d)\n", __FILE__, __LINE__, eom);
838
839 if (!info->rx_enabled)
840 return;
841
842 if (info->rx_frame_count >= info->rx_buf_count) {
843 /* no more free buffers */
844 issue_command(info, CHA, CMD_RXRESET);
845 info->pending_bh |= BH_RECEIVE;
846 info->rx_overflow = true;
847 info->icount.buf_overrun++;
848 return;
849 }
850
851 if (eom) {
852 /* end of frame, get FIFO count from RBCL register */
853 fifo_count = (unsigned char)(read_reg(info, CHA+RBCL) & 0x1f);
854 if (fifo_count == 0)
855 fifo_count = 32;
856 } else
857 fifo_count = 32;
858
859 do {
860 if (fifo_count == 1) {
861 read_count = 1;
862 data[0] = read_reg(info, CHA + RXFIFO);
863 } else {
864 read_count = 2;
865 *((unsigned short *) data) = read_reg16(info, CHA + RXFIFO);
866 }
867 fifo_count -= read_count;
868 if (!fifo_count && eom)
869 buf->status = data[--read_count];
870
871 for (i = 0; i < read_count; i++) {
872 if (buf->count >= info->max_frame_size) {
873 /* frame too large, reset receiver and reset current buffer */
874 issue_command(info, CHA, CMD_RXRESET);
875 buf->count = 0;
876 return;
877 }
878 *(buf->data + buf->count) = data[i];
879 buf->count++;
880 }
881 } while (fifo_count);
882
883 if (eom) {
884 info->pending_bh |= BH_RECEIVE;
885 info->rx_frame_count++;
886 info->rx_put++;
887 if (info->rx_put >= info->rx_buf_count)
888 info->rx_put = 0;
889 }
890 issue_command(info, CHA, CMD_RXFIFO);
891 }
892
893 static void rx_ready_async(MGSLPC_INFO *info, int tcd)
894 {
895 struct tty_port *port = &info->port;
896 unsigned char data, status, flag;
897 int fifo_count;
898 int work = 0;
899 struct mgsl_icount *icount = &info->icount;
900
901 if (tcd) {
902 /* early termination, get FIFO count from RBCL register */
903 fifo_count = (unsigned char)(read_reg(info, CHA+RBCL) & 0x1f);
904
905 /* Zero fifo count could mean 0 or 32 bytes available.
906 * If BIT5 of STAR is set then at least 1 byte is available.
907 */
908 if (!fifo_count && (read_reg(info,CHA+STAR) & BIT5))
909 fifo_count = 32;
910 } else
911 fifo_count = 32;
912
913 tty_buffer_request_room(port, fifo_count);
914 /* Flush received async data to receive data buffer. */
915 while (fifo_count) {
916 data = read_reg(info, CHA + RXFIFO);
917 status = read_reg(info, CHA + RXFIFO);
918 fifo_count -= 2;
919
920 icount->rx++;
921 flag = TTY_NORMAL;
922
923 // if no frameing/crc error then save data
924 // BIT7:parity error
925 // BIT6:framing error
926
927 if (status & (BIT7 + BIT6)) {
928 if (status & BIT7)
929 icount->parity++;
930 else
931 icount->frame++;
932
933 /* discard char if tty control flags say so */
934 if (status & info->ignore_status_mask)
935 continue;
936
937 status &= info->read_status_mask;
938
939 if (status & BIT7)
940 flag = TTY_PARITY;
941 else if (status & BIT6)
942 flag = TTY_FRAME;
943 }
944 work += tty_insert_flip_char(port, data, flag);
945 }
946 issue_command(info, CHA, CMD_RXFIFO);
947
948 if (debug_level >= DEBUG_LEVEL_ISR) {
949 printk("%s(%d):rx_ready_async",
950 __FILE__,__LINE__);
951 printk("%s(%d):rx=%d brk=%d parity=%d frame=%d overrun=%d\n",
952 __FILE__,__LINE__,icount->rx,icount->brk,
953 icount->parity,icount->frame,icount->overrun);
954 }
955
956 if (work)
957 tty_flip_buffer_push(port);
958 }
959
960
961 static void tx_done(MGSLPC_INFO *info, struct tty_struct *tty)
962 {
963 if (!info->tx_active)
964 return;
965
966 info->tx_active = false;
967 info->tx_aborting = false;
968
969 if (info->params.mode == MGSL_MODE_ASYNC)
970 return;
971
972 info->tx_count = info->tx_put = info->tx_get = 0;
973 del_timer(&info->tx_timer);
974
975 if (info->drop_rts_on_tx_done) {
976 get_signals(info);
977 if (info->serial_signals & SerialSignal_RTS) {
978 info->serial_signals &= ~SerialSignal_RTS;
979 set_signals(info);
980 }
981 info->drop_rts_on_tx_done = false;
982 }
983
984 #if SYNCLINK_GENERIC_HDLC
985 if (info->netcount)
986 hdlcdev_tx_done(info);
987 else
988 #endif
989 {
990 if (tty && (tty->stopped || tty->hw_stopped)) {
991 tx_stop(info);
992 return;
993 }
994 info->pending_bh |= BH_TRANSMIT;
995 }
996 }
997
998 static void tx_ready(MGSLPC_INFO *info, struct tty_struct *tty)
999 {
1000 unsigned char fifo_count = 32;
1001 int c;
1002
1003 if (debug_level >= DEBUG_LEVEL_ISR)
1004 printk("%s(%d):tx_ready(%s)\n", __FILE__, __LINE__, info->device_name);
1005
1006 if (info->params.mode == MGSL_MODE_HDLC) {
1007 if (!info->tx_active)
1008 return;
1009 } else {
1010 if (tty && (tty->stopped || tty->hw_stopped)) {
1011 tx_stop(info);
1012 return;
1013 }
1014 if (!info->tx_count)
1015 info->tx_active = false;
1016 }
1017
1018 if (!info->tx_count)
1019 return;
1020
1021 while (info->tx_count && fifo_count) {
1022 c = min(2, min_t(int, fifo_count, min(info->tx_count, TXBUFSIZE - info->tx_get)));
1023
1024 if (c == 1) {
1025 write_reg(info, CHA + TXFIFO, *(info->tx_buf + info->tx_get));
1026 } else {
1027 write_reg16(info, CHA + TXFIFO,
1028 *((unsigned short*)(info->tx_buf + info->tx_get)));
1029 }
1030 info->tx_count -= c;
1031 info->tx_get = (info->tx_get + c) & (TXBUFSIZE - 1);
1032 fifo_count -= c;
1033 }
1034
1035 if (info->params.mode == MGSL_MODE_ASYNC) {
1036 if (info->tx_count < WAKEUP_CHARS)
1037 info->pending_bh |= BH_TRANSMIT;
1038 issue_command(info, CHA, CMD_TXFIFO);
1039 } else {
1040 if (info->tx_count)
1041 issue_command(info, CHA, CMD_TXFIFO);
1042 else
1043 issue_command(info, CHA, CMD_TXFIFO + CMD_TXEOM);
1044 }
1045 }
1046
1047 static void cts_change(MGSLPC_INFO *info, struct tty_struct *tty)
1048 {
1049 get_signals(info);
1050 if ((info->cts_chkcount)++ >= IO_PIN_SHUTDOWN_LIMIT)
1051 irq_disable(info, CHB, IRQ_CTS);
1052 info->icount.cts++;
1053 if (info->serial_signals & SerialSignal_CTS)
1054 info->input_signal_events.cts_up++;
1055 else
1056 info->input_signal_events.cts_down++;
1057 wake_up_interruptible(&info->status_event_wait_q);
1058 wake_up_interruptible(&info->event_wait_q);
1059
1060 if (tty && tty_port_cts_enabled(&info->port)) {
1061 if (tty->hw_stopped) {
1062 if (info->serial_signals & SerialSignal_CTS) {
1063 if (debug_level >= DEBUG_LEVEL_ISR)
1064 printk("CTS tx start...");
1065 tty->hw_stopped = 0;
1066 tx_start(info, tty);
1067 info->pending_bh |= BH_TRANSMIT;
1068 return;
1069 }
1070 } else {
1071 if (!(info->serial_signals & SerialSignal_CTS)) {
1072 if (debug_level >= DEBUG_LEVEL_ISR)
1073 printk("CTS tx stop...");
1074 tty->hw_stopped = 1;
1075 tx_stop(info);
1076 }
1077 }
1078 }
1079 info->pending_bh |= BH_STATUS;
1080 }
1081
1082 static void dcd_change(MGSLPC_INFO *info, struct tty_struct *tty)
1083 {
1084 get_signals(info);
1085 if ((info->dcd_chkcount)++ >= IO_PIN_SHUTDOWN_LIMIT)
1086 irq_disable(info, CHB, IRQ_DCD);
1087 info->icount.dcd++;
1088 if (info->serial_signals & SerialSignal_DCD) {
1089 info->input_signal_events.dcd_up++;
1090 }
1091 else
1092 info->input_signal_events.dcd_down++;
1093 #if SYNCLINK_GENERIC_HDLC
1094 if (info->netcount) {
1095 if (info->serial_signals & SerialSignal_DCD)
1096 netif_carrier_on(info->netdev);
1097 else
1098 netif_carrier_off(info->netdev);
1099 }
1100 #endif
1101 wake_up_interruptible(&info->status_event_wait_q);
1102 wake_up_interruptible(&info->event_wait_q);
1103
1104 if (info->port.flags & ASYNC_CHECK_CD) {
1105 if (debug_level >= DEBUG_LEVEL_ISR)
1106 printk("%s CD now %s...", info->device_name,
1107 (info->serial_signals & SerialSignal_DCD) ? "on" : "off");
1108 if (info->serial_signals & SerialSignal_DCD)
1109 wake_up_interruptible(&info->port.open_wait);
1110 else {
1111 if (debug_level >= DEBUG_LEVEL_ISR)
1112 printk("doing serial hangup...");
1113 if (tty)
1114 tty_hangup(tty);
1115 }
1116 }
1117 info->pending_bh |= BH_STATUS;
1118 }
1119
1120 static void dsr_change(MGSLPC_INFO *info)
1121 {
1122 get_signals(info);
1123 if ((info->dsr_chkcount)++ >= IO_PIN_SHUTDOWN_LIMIT)
1124 port_irq_disable(info, PVR_DSR);
1125 info->icount.dsr++;
1126 if (info->serial_signals & SerialSignal_DSR)
1127 info->input_signal_events.dsr_up++;
1128 else
1129 info->input_signal_events.dsr_down++;
1130 wake_up_interruptible(&info->status_event_wait_q);
1131 wake_up_interruptible(&info->event_wait_q);
1132 info->pending_bh |= BH_STATUS;
1133 }
1134
1135 static void ri_change(MGSLPC_INFO *info)
1136 {
1137 get_signals(info);
1138 if ((info->ri_chkcount)++ >= IO_PIN_SHUTDOWN_LIMIT)
1139 port_irq_disable(info, PVR_RI);
1140 info->icount.rng++;
1141 if (info->serial_signals & SerialSignal_RI)
1142 info->input_signal_events.ri_up++;
1143 else
1144 info->input_signal_events.ri_down++;
1145 wake_up_interruptible(&info->status_event_wait_q);
1146 wake_up_interruptible(&info->event_wait_q);
1147 info->pending_bh |= BH_STATUS;
1148 }
1149
1150 /* Interrupt service routine entry point.
1151 *
1152 * Arguments:
1153 *
1154 * irq interrupt number that caused interrupt
1155 * dev_id device ID supplied during interrupt registration
1156 */
1157 static irqreturn_t mgslpc_isr(int dummy, void *dev_id)
1158 {
1159 MGSLPC_INFO *info = dev_id;
1160 struct tty_struct *tty;
1161 unsigned short isr;
1162 unsigned char gis, pis;
1163 int count=0;
1164
1165 if (debug_level >= DEBUG_LEVEL_ISR)
1166 printk("mgslpc_isr(%d) entry.\n", info->irq_level);
1167
1168 if (!(info->p_dev->_locked))
1169 return IRQ_HANDLED;
1170
1171 tty = tty_port_tty_get(&info->port);
1172
1173 spin_lock(&info->lock);
1174
1175 while ((gis = read_reg(info, CHA + GIS))) {
1176 if (debug_level >= DEBUG_LEVEL_ISR)
1177 printk("mgslpc_isr %s gis=%04X\n", info->device_name,gis);
1178
1179 if ((gis & 0x70) || count > 1000) {
1180 printk("synclink_cs:hardware failed or ejected\n");
1181 break;
1182 }
1183 count++;
1184
1185 if (gis & (BIT1 | BIT0)) {
1186 isr = read_reg16(info, CHB + ISR);
1187 if (isr & IRQ_DCD)
1188 dcd_change(info, tty);
1189 if (isr & IRQ_CTS)
1190 cts_change(info, tty);
1191 }
1192 if (gis & (BIT3 | BIT2))
1193 {
1194 isr = read_reg16(info, CHA + ISR);
1195 if (isr & IRQ_TIMER) {
1196 info->irq_occurred = true;
1197 irq_disable(info, CHA, IRQ_TIMER);
1198 }
1199
1200 /* receive IRQs */
1201 if (isr & IRQ_EXITHUNT) {
1202 info->icount.exithunt++;
1203 wake_up_interruptible(&info->event_wait_q);
1204 }
1205 if (isr & IRQ_BREAK_ON) {
1206 info->icount.brk++;
1207 if (info->port.flags & ASYNC_SAK)
1208 do_SAK(tty);
1209 }
1210 if (isr & IRQ_RXTIME) {
1211 issue_command(info, CHA, CMD_RXFIFO_READ);
1212 }
1213 if (isr & (IRQ_RXEOM | IRQ_RXFIFO)) {
1214 if (info->params.mode == MGSL_MODE_HDLC)
1215 rx_ready_hdlc(info, isr & IRQ_RXEOM);
1216 else
1217 rx_ready_async(info, isr & IRQ_RXEOM);
1218 }
1219
1220 /* transmit IRQs */
1221 if (isr & IRQ_UNDERRUN) {
1222 if (info->tx_aborting)
1223 info->icount.txabort++;
1224 else
1225 info->icount.txunder++;
1226 tx_done(info, tty);
1227 }
1228 else if (isr & IRQ_ALLSENT) {
1229 info->icount.txok++;
1230 tx_done(info, tty);
1231 }
1232 else if (isr & IRQ_TXFIFO)
1233 tx_ready(info, tty);
1234 }
1235 if (gis & BIT7) {
1236 pis = read_reg(info, CHA + PIS);
1237 if (pis & BIT1)
1238 dsr_change(info);
1239 if (pis & BIT2)
1240 ri_change(info);
1241 }
1242 }
1243
1244 /* Request bottom half processing if there's something
1245 * for it to do and the bh is not already running
1246 */
1247
1248 if (info->pending_bh && !info->bh_running && !info->bh_requested) {
1249 if (debug_level >= DEBUG_LEVEL_ISR)
1250 printk("%s(%d):%s queueing bh task.\n",
1251 __FILE__,__LINE__,info->device_name);
1252 schedule_work(&info->task);
1253 info->bh_requested = true;
1254 }
1255
1256 spin_unlock(&info->lock);
1257 tty_kref_put(tty);
1258
1259 if (debug_level >= DEBUG_LEVEL_ISR)
1260 printk("%s(%d):mgslpc_isr(%d)exit.\n",
1261 __FILE__, __LINE__, info->irq_level);
1262
1263 return IRQ_HANDLED;
1264 }
1265
1266 /* Initialize and start device.
1267 */
1268 static int startup(MGSLPC_INFO * info, struct tty_struct *tty)
1269 {
1270 int retval = 0;
1271
1272 if (debug_level >= DEBUG_LEVEL_INFO)
1273 printk("%s(%d):startup(%s)\n", __FILE__, __LINE__, info->device_name);
1274
1275 if (info->port.flags & ASYNC_INITIALIZED)
1276 return 0;
1277
1278 if (!info->tx_buf) {
1279 /* allocate a page of memory for a transmit buffer */
1280 info->tx_buf = (unsigned char *)get_zeroed_page(GFP_KERNEL);
1281 if (!info->tx_buf) {
1282 printk(KERN_ERR"%s(%d):%s can't allocate transmit buffer\n",
1283 __FILE__, __LINE__, info->device_name);
1284 return -ENOMEM;
1285 }
1286 }
1287
1288 info->pending_bh = 0;
1289
1290 memset(&info->icount, 0, sizeof(info->icount));
1291
1292 setup_timer(&info->tx_timer, tx_timeout, (unsigned long)info);
1293
1294 /* Allocate and claim adapter resources */
1295 retval = claim_resources(info);
1296
1297 /* perform existence check and diagnostics */
1298 if (!retval)
1299 retval = adapter_test(info);
1300
1301 if (retval) {
1302 if (capable(CAP_SYS_ADMIN) && tty)
1303 set_bit(TTY_IO_ERROR, &tty->flags);
1304 release_resources(info);
1305 return retval;
1306 }
1307
1308 /* program hardware for current parameters */
1309 mgslpc_change_params(info, tty);
1310
1311 if (tty)
1312 clear_bit(TTY_IO_ERROR, &tty->flags);
1313
1314 info->port.flags |= ASYNC_INITIALIZED;
1315
1316 return 0;
1317 }
1318
1319 /* Called by mgslpc_close() and mgslpc_hangup() to shutdown hardware
1320 */
1321 static void shutdown(MGSLPC_INFO * info, struct tty_struct *tty)
1322 {
1323 unsigned long flags;
1324
1325 if (!(info->port.flags & ASYNC_INITIALIZED))
1326 return;
1327
1328 if (debug_level >= DEBUG_LEVEL_INFO)
1329 printk("%s(%d):mgslpc_shutdown(%s)\n",
1330 __FILE__, __LINE__, info->device_name);
1331
1332 /* clear status wait queue because status changes */
1333 /* can't happen after shutting down the hardware */
1334 wake_up_interruptible(&info->status_event_wait_q);
1335 wake_up_interruptible(&info->event_wait_q);
1336
1337 del_timer_sync(&info->tx_timer);
1338
1339 if (info->tx_buf) {
1340 free_page((unsigned long) info->tx_buf);
1341 info->tx_buf = NULL;
1342 }
1343
1344 spin_lock_irqsave(&info->lock, flags);
1345
1346 rx_stop(info);
1347 tx_stop(info);
1348
1349 /* TODO:disable interrupts instead of reset to preserve signal states */
1350 reset_device(info);
1351
1352 if (!tty || tty->termios.c_cflag & HUPCL) {
1353 info->serial_signals &= ~(SerialSignal_RTS | SerialSignal_DTR);
1354 set_signals(info);
1355 }
1356
1357 spin_unlock_irqrestore(&info->lock, flags);
1358
1359 release_resources(info);
1360
1361 if (tty)
1362 set_bit(TTY_IO_ERROR, &tty->flags);
1363
1364 info->port.flags &= ~ASYNC_INITIALIZED;
1365 }
1366
1367 static void mgslpc_program_hw(MGSLPC_INFO *info, struct tty_struct *tty)
1368 {
1369 unsigned long flags;
1370
1371 spin_lock_irqsave(&info->lock, flags);
1372
1373 rx_stop(info);
1374 tx_stop(info);
1375 info->tx_count = info->tx_put = info->tx_get = 0;
1376
1377 if (info->params.mode == MGSL_MODE_HDLC || info->netcount)
1378 hdlc_mode(info);
1379 else
1380 async_mode(info);
1381
1382 set_signals(info);
1383
1384 info->dcd_chkcount = 0;
1385 info->cts_chkcount = 0;
1386 info->ri_chkcount = 0;
1387 info->dsr_chkcount = 0;
1388
1389 irq_enable(info, CHB, IRQ_DCD | IRQ_CTS);
1390 port_irq_enable(info, (unsigned char) PVR_DSR | PVR_RI);
1391 get_signals(info);
1392
1393 if (info->netcount || (tty && (tty->termios.c_cflag & CREAD)))
1394 rx_start(info);
1395
1396 spin_unlock_irqrestore(&info->lock, flags);
1397 }
1398
1399 /* Reconfigure adapter based on new parameters
1400 */
1401 static void mgslpc_change_params(MGSLPC_INFO *info, struct tty_struct *tty)
1402 {
1403 unsigned cflag;
1404 int bits_per_char;
1405
1406 if (!tty)
1407 return;
1408
1409 if (debug_level >= DEBUG_LEVEL_INFO)
1410 printk("%s(%d):mgslpc_change_params(%s)\n",
1411 __FILE__, __LINE__, info->device_name);
1412
1413 cflag = tty->termios.c_cflag;
1414
1415 /* if B0 rate (hangup) specified then negate RTS and DTR */
1416 /* otherwise assert RTS and DTR */
1417 if (cflag & CBAUD)
1418 info->serial_signals |= SerialSignal_RTS | SerialSignal_DTR;
1419 else
1420 info->serial_signals &= ~(SerialSignal_RTS | SerialSignal_DTR);
1421
1422 /* byte size and parity */
1423
1424 switch (cflag & CSIZE) {
1425 case CS5: info->params.data_bits = 5; break;
1426 case CS6: info->params.data_bits = 6; break;
1427 case CS7: info->params.data_bits = 7; break;
1428 case CS8: info->params.data_bits = 8; break;
1429 default: info->params.data_bits = 7; break;
1430 }
1431
1432 if (cflag & CSTOPB)
1433 info->params.stop_bits = 2;
1434 else
1435 info->params.stop_bits = 1;
1436
1437 info->params.parity = ASYNC_PARITY_NONE;
1438 if (cflag & PARENB) {
1439 if (cflag & PARODD)
1440 info->params.parity = ASYNC_PARITY_ODD;
1441 else
1442 info->params.parity = ASYNC_PARITY_EVEN;
1443 #ifdef CMSPAR
1444 if (cflag & CMSPAR)
1445 info->params.parity = ASYNC_PARITY_SPACE;
1446 #endif
1447 }
1448
1449 /* calculate number of jiffies to transmit a full
1450 * FIFO (32 bytes) at specified data rate
1451 */
1452 bits_per_char = info->params.data_bits +
1453 info->params.stop_bits + 1;
1454
1455 /* if port data rate is set to 460800 or less then
1456 * allow tty settings to override, otherwise keep the
1457 * current data rate.
1458 */
1459 if (info->params.data_rate <= 460800) {
1460 info->params.data_rate = tty_get_baud_rate(tty);
1461 }
1462
1463 if (info->params.data_rate) {
1464 info->timeout = (32*HZ*bits_per_char) /
1465 info->params.data_rate;
1466 }
1467 info->timeout += HZ/50; /* Add .02 seconds of slop */
1468
1469 if (cflag & CRTSCTS)
1470 info->port.flags |= ASYNC_CTS_FLOW;
1471 else
1472 info->port.flags &= ~ASYNC_CTS_FLOW;
1473
1474 if (cflag & CLOCAL)
1475 info->port.flags &= ~ASYNC_CHECK_CD;
1476 else
1477 info->port.flags |= ASYNC_CHECK_CD;
1478
1479 /* process tty input control flags */
1480
1481 info->read_status_mask = 0;
1482 if (I_INPCK(tty))
1483 info->read_status_mask |= BIT7 | BIT6;
1484 if (I_IGNPAR(tty))
1485 info->ignore_status_mask |= BIT7 | BIT6;
1486
1487 mgslpc_program_hw(info, tty);
1488 }
1489
1490 /* Add a character to the transmit buffer
1491 */
1492 static int mgslpc_put_char(struct tty_struct *tty, unsigned char ch)
1493 {
1494 MGSLPC_INFO *info = (MGSLPC_INFO *)tty->driver_data;
1495 unsigned long flags;
1496
1497 if (debug_level >= DEBUG_LEVEL_INFO) {
1498 printk("%s(%d):mgslpc_put_char(%d) on %s\n",
1499 __FILE__, __LINE__, ch, info->device_name);
1500 }
1501
1502 if (mgslpc_paranoia_check(info, tty->name, "mgslpc_put_char"))
1503 return 0;
1504
1505 if (!info->tx_buf)
1506 return 0;
1507
1508 spin_lock_irqsave(&info->lock, flags);
1509
1510 if (info->params.mode == MGSL_MODE_ASYNC || !info->tx_active) {
1511 if (info->tx_count < TXBUFSIZE - 1) {
1512 info->tx_buf[info->tx_put++] = ch;
1513 info->tx_put &= TXBUFSIZE-1;
1514 info->tx_count++;
1515 }
1516 }
1517
1518 spin_unlock_irqrestore(&info->lock, flags);
1519 return 1;
1520 }
1521
1522 /* Enable transmitter so remaining characters in the
1523 * transmit buffer are sent.
1524 */
1525 static void mgslpc_flush_chars(struct tty_struct *tty)
1526 {
1527 MGSLPC_INFO *info = (MGSLPC_INFO *)tty->driver_data;
1528 unsigned long flags;
1529
1530 if (debug_level >= DEBUG_LEVEL_INFO)
1531 printk("%s(%d):mgslpc_flush_chars() entry on %s tx_count=%d\n",
1532 __FILE__, __LINE__, info->device_name, info->tx_count);
1533
1534 if (mgslpc_paranoia_check(info, tty->name, "mgslpc_flush_chars"))
1535 return;
1536
1537 if (info->tx_count <= 0 || tty->stopped ||
1538 tty->hw_stopped || !info->tx_buf)
1539 return;
1540
1541 if (debug_level >= DEBUG_LEVEL_INFO)
1542 printk("%s(%d):mgslpc_flush_chars() entry on %s starting transmitter\n",
1543 __FILE__, __LINE__, info->device_name);
1544
1545 spin_lock_irqsave(&info->lock, flags);
1546 if (!info->tx_active)
1547 tx_start(info, tty);
1548 spin_unlock_irqrestore(&info->lock, flags);
1549 }
1550
1551 /* Send a block of data
1552 *
1553 * Arguments:
1554 *
1555 * tty pointer to tty information structure
1556 * buf pointer to buffer containing send data
1557 * count size of send data in bytes
1558 *
1559 * Returns: number of characters written
1560 */
1561 static int mgslpc_write(struct tty_struct * tty,
1562 const unsigned char *buf, int count)
1563 {
1564 int c, ret = 0;
1565 MGSLPC_INFO *info = (MGSLPC_INFO *)tty->driver_data;
1566 unsigned long flags;
1567
1568 if (debug_level >= DEBUG_LEVEL_INFO)
1569 printk("%s(%d):mgslpc_write(%s) count=%d\n",
1570 __FILE__, __LINE__, info->device_name, count);
1571
1572 if (mgslpc_paranoia_check(info, tty->name, "mgslpc_write") ||
1573 !info->tx_buf)
1574 goto cleanup;
1575
1576 if (info->params.mode == MGSL_MODE_HDLC) {
1577 if (count > TXBUFSIZE) {
1578 ret = -EIO;
1579 goto cleanup;
1580 }
1581 if (info->tx_active)
1582 goto cleanup;
1583 else if (info->tx_count)
1584 goto start;
1585 }
1586
1587 for (;;) {
1588 c = min(count,
1589 min(TXBUFSIZE - info->tx_count - 1,
1590 TXBUFSIZE - info->tx_put));
1591 if (c <= 0)
1592 break;
1593
1594 memcpy(info->tx_buf + info->tx_put, buf, c);
1595
1596 spin_lock_irqsave(&info->lock, flags);
1597 info->tx_put = (info->tx_put + c) & (TXBUFSIZE-1);
1598 info->tx_count += c;
1599 spin_unlock_irqrestore(&info->lock, flags);
1600
1601 buf += c;
1602 count -= c;
1603 ret += c;
1604 }
1605 start:
1606 if (info->tx_count && !tty->stopped && !tty->hw_stopped) {
1607 spin_lock_irqsave(&info->lock, flags);
1608 if (!info->tx_active)
1609 tx_start(info, tty);
1610 spin_unlock_irqrestore(&info->lock, flags);
1611 }
1612 cleanup:
1613 if (debug_level >= DEBUG_LEVEL_INFO)
1614 printk("%s(%d):mgslpc_write(%s) returning=%d\n",
1615 __FILE__, __LINE__, info->device_name, ret);
1616 return ret;
1617 }
1618
1619 /* Return the count of free bytes in transmit buffer
1620 */
1621 static int mgslpc_write_room(struct tty_struct *tty)
1622 {
1623 MGSLPC_INFO *info = (MGSLPC_INFO *)tty->driver_data;
1624 int ret;
1625
1626 if (mgslpc_paranoia_check(info, tty->name, "mgslpc_write_room"))
1627 return 0;
1628
1629 if (info->params.mode == MGSL_MODE_HDLC) {
1630 /* HDLC (frame oriented) mode */
1631 if (info->tx_active)
1632 return 0;
1633 else
1634 return HDLC_MAX_FRAME_SIZE;
1635 } else {
1636 ret = TXBUFSIZE - info->tx_count - 1;
1637 if (ret < 0)
1638 ret = 0;
1639 }
1640
1641 if (debug_level >= DEBUG_LEVEL_INFO)
1642 printk("%s(%d):mgslpc_write_room(%s)=%d\n",
1643 __FILE__, __LINE__, info->device_name, ret);
1644 return ret;
1645 }
1646
1647 /* Return the count of bytes in transmit buffer
1648 */
1649 static int mgslpc_chars_in_buffer(struct tty_struct *tty)
1650 {
1651 MGSLPC_INFO *info = (MGSLPC_INFO *)tty->driver_data;
1652 int rc;
1653
1654 if (debug_level >= DEBUG_LEVEL_INFO)
1655 printk("%s(%d):mgslpc_chars_in_buffer(%s)\n",
1656 __FILE__, __LINE__, info->device_name);
1657
1658 if (mgslpc_paranoia_check(info, tty->name, "mgslpc_chars_in_buffer"))
1659 return 0;
1660
1661 if (info->params.mode == MGSL_MODE_HDLC)
1662 rc = info->tx_active ? info->max_frame_size : 0;
1663 else
1664 rc = info->tx_count;
1665
1666 if (debug_level >= DEBUG_LEVEL_INFO)
1667 printk("%s(%d):mgslpc_chars_in_buffer(%s)=%d\n",
1668 __FILE__, __LINE__, info->device_name, rc);
1669
1670 return rc;
1671 }
1672
1673 /* Discard all data in the send buffer
1674 */
1675 static void mgslpc_flush_buffer(struct tty_struct *tty)
1676 {
1677 MGSLPC_INFO *info = (MGSLPC_INFO *)tty->driver_data;
1678 unsigned long flags;
1679
1680 if (debug_level >= DEBUG_LEVEL_INFO)
1681 printk("%s(%d):mgslpc_flush_buffer(%s) entry\n",
1682 __FILE__, __LINE__, info->device_name);
1683
1684 if (mgslpc_paranoia_check(info, tty->name, "mgslpc_flush_buffer"))
1685 return;
1686
1687 spin_lock_irqsave(&info->lock, flags);
1688 info->tx_count = info->tx_put = info->tx_get = 0;
1689 del_timer(&info->tx_timer);
1690 spin_unlock_irqrestore(&info->lock, flags);
1691
1692 wake_up_interruptible(&tty->write_wait);
1693 tty_wakeup(tty);
1694 }
1695
1696 /* Send a high-priority XON/XOFF character
1697 */
1698 static void mgslpc_send_xchar(struct tty_struct *tty, char ch)
1699 {
1700 MGSLPC_INFO *info = (MGSLPC_INFO *)tty->driver_data;
1701 unsigned long flags;
1702
1703 if (debug_level >= DEBUG_LEVEL_INFO)
1704 printk("%s(%d):mgslpc_send_xchar(%s,%d)\n",
1705 __FILE__, __LINE__, info->device_name, ch);
1706
1707 if (mgslpc_paranoia_check(info, tty->name, "mgslpc_send_xchar"))
1708 return;
1709
1710 info->x_char = ch;
1711 if (ch) {
1712 spin_lock_irqsave(&info->lock, flags);
1713 if (!info->tx_enabled)
1714 tx_start(info, tty);
1715 spin_unlock_irqrestore(&info->lock, flags);
1716 }
1717 }
1718
1719 /* Signal remote device to throttle send data (our receive data)
1720 */
1721 static void mgslpc_throttle(struct tty_struct * tty)
1722 {
1723 MGSLPC_INFO *info = (MGSLPC_INFO *)tty->driver_data;
1724 unsigned long flags;
1725
1726 if (debug_level >= DEBUG_LEVEL_INFO)
1727 printk("%s(%d):mgslpc_throttle(%s) entry\n",
1728 __FILE__, __LINE__, info->device_name);
1729
1730 if (mgslpc_paranoia_check(info, tty->name, "mgslpc_throttle"))
1731 return;
1732
1733 if (I_IXOFF(tty))
1734 mgslpc_send_xchar(tty, STOP_CHAR(tty));
1735
1736 if (tty->termios.c_cflag & CRTSCTS) {
1737 spin_lock_irqsave(&info->lock, flags);
1738 info->serial_signals &= ~SerialSignal_RTS;
1739 set_signals(info);
1740 spin_unlock_irqrestore(&info->lock, flags);
1741 }
1742 }
1743
1744 /* Signal remote device to stop throttling send data (our receive data)
1745 */
1746 static void mgslpc_unthrottle(struct tty_struct * tty)
1747 {
1748 MGSLPC_INFO *info = (MGSLPC_INFO *)tty->driver_data;
1749 unsigned long flags;
1750
1751 if (debug_level >= DEBUG_LEVEL_INFO)
1752 printk("%s(%d):mgslpc_unthrottle(%s) entry\n",
1753 __FILE__, __LINE__, info->device_name);
1754
1755 if (mgslpc_paranoia_check(info, tty->name, "mgslpc_unthrottle"))
1756 return;
1757
1758 if (I_IXOFF(tty)) {
1759 if (info->x_char)
1760 info->x_char = 0;
1761 else
1762 mgslpc_send_xchar(tty, START_CHAR(tty));
1763 }
1764
1765 if (tty->termios.c_cflag & CRTSCTS) {
1766 spin_lock_irqsave(&info->lock, flags);
1767 info->serial_signals |= SerialSignal_RTS;
1768 set_signals(info);
1769 spin_unlock_irqrestore(&info->lock, flags);
1770 }
1771 }
1772
1773 /* get the current serial statistics
1774 */
1775 static int get_stats(MGSLPC_INFO * info, struct mgsl_icount __user *user_icount)
1776 {
1777 int err;
1778 if (debug_level >= DEBUG_LEVEL_INFO)
1779 printk("get_params(%s)\n", info->device_name);
1780 if (!user_icount) {
1781 memset(&info->icount, 0, sizeof(info->icount));
1782 } else {
1783 COPY_TO_USER(err, user_icount, &info->icount, sizeof(struct mgsl_icount));
1784 if (err)
1785 return -EFAULT;
1786 }
1787 return 0;
1788 }
1789
1790 /* get the current serial parameters
1791 */
1792 static int get_params(MGSLPC_INFO * info, MGSL_PARAMS __user *user_params)
1793 {
1794 int err;
1795 if (debug_level >= DEBUG_LEVEL_INFO)
1796 printk("get_params(%s)\n", info->device_name);
1797 COPY_TO_USER(err,user_params, &info->params, sizeof(MGSL_PARAMS));
1798 if (err)
1799 return -EFAULT;
1800 return 0;
1801 }
1802
1803 /* set the serial parameters
1804 *
1805 * Arguments:
1806 *
1807 * info pointer to device instance data
1808 * new_params user buffer containing new serial params
1809 *
1810 * Returns: 0 if success, otherwise error code
1811 */
1812 static int set_params(MGSLPC_INFO * info, MGSL_PARAMS __user *new_params, struct tty_struct *tty)
1813 {
1814 unsigned long flags;
1815 MGSL_PARAMS tmp_params;
1816 int err;
1817
1818 if (debug_level >= DEBUG_LEVEL_INFO)
1819 printk("%s(%d):set_params %s\n", __FILE__,__LINE__,
1820 info->device_name);
1821 COPY_FROM_USER(err,&tmp_params, new_params, sizeof(MGSL_PARAMS));
1822 if (err) {
1823 if (debug_level >= DEBUG_LEVEL_INFO)
1824 printk("%s(%d):set_params(%s) user buffer copy failed\n",
1825 __FILE__, __LINE__, info->device_name);
1826 return -EFAULT;
1827 }
1828
1829 spin_lock_irqsave(&info->lock, flags);
1830 memcpy(&info->params,&tmp_params,sizeof(MGSL_PARAMS));
1831 spin_unlock_irqrestore(&info->lock, flags);
1832
1833 mgslpc_change_params(info, tty);
1834
1835 return 0;
1836 }
1837
1838 static int get_txidle(MGSLPC_INFO * info, int __user *idle_mode)
1839 {
1840 int err;
1841 if (debug_level >= DEBUG_LEVEL_INFO)
1842 printk("get_txidle(%s)=%d\n", info->device_name, info->idle_mode);
1843 COPY_TO_USER(err,idle_mode, &info->idle_mode, sizeof(int));
1844 if (err)
1845 return -EFAULT;
1846 return 0;
1847 }
1848
1849 static int set_txidle(MGSLPC_INFO * info, int idle_mode)
1850 {
1851 unsigned long flags;
1852 if (debug_level >= DEBUG_LEVEL_INFO)
1853 printk("set_txidle(%s,%d)\n", info->device_name, idle_mode);
1854 spin_lock_irqsave(&info->lock, flags);
1855 info->idle_mode = idle_mode;
1856 tx_set_idle(info);
1857 spin_unlock_irqrestore(&info->lock, flags);
1858 return 0;
1859 }
1860
1861 static int get_interface(MGSLPC_INFO * info, int __user *if_mode)
1862 {
1863 int err;
1864 if (debug_level >= DEBUG_LEVEL_INFO)
1865 printk("get_interface(%s)=%d\n", info->device_name, info->if_mode);
1866 COPY_TO_USER(err,if_mode, &info->if_mode, sizeof(int));
1867 if (err)
1868 return -EFAULT;
1869 return 0;
1870 }
1871
1872 static int set_interface(MGSLPC_INFO * info, int if_mode)
1873 {
1874 unsigned long flags;
1875 unsigned char val;
1876 if (debug_level >= DEBUG_LEVEL_INFO)
1877 printk("set_interface(%s,%d)\n", info->device_name, if_mode);
1878 spin_lock_irqsave(&info->lock, flags);
1879 info->if_mode = if_mode;
1880
1881 val = read_reg(info, PVR) & 0x0f;
1882 switch (info->if_mode)
1883 {
1884 case MGSL_INTERFACE_RS232: val |= PVR_RS232; break;
1885 case MGSL_INTERFACE_V35: val |= PVR_V35; break;
1886 case MGSL_INTERFACE_RS422: val |= PVR_RS422; break;
1887 }
1888 write_reg(info, PVR, val);
1889
1890 spin_unlock_irqrestore(&info->lock, flags);
1891 return 0;
1892 }
1893
1894 static int set_txenable(MGSLPC_INFO * info, int enable, struct tty_struct *tty)
1895 {
1896 unsigned long flags;
1897
1898 if (debug_level >= DEBUG_LEVEL_INFO)
1899 printk("set_txenable(%s,%d)\n", info->device_name, enable);
1900
1901 spin_lock_irqsave(&info->lock, flags);
1902 if (enable) {
1903 if (!info->tx_enabled)
1904 tx_start(info, tty);
1905 } else {
1906 if (info->tx_enabled)
1907 tx_stop(info);
1908 }
1909 spin_unlock_irqrestore(&info->lock, flags);
1910 return 0;
1911 }
1912
1913 static int tx_abort(MGSLPC_INFO * info)
1914 {
1915 unsigned long flags;
1916
1917 if (debug_level >= DEBUG_LEVEL_INFO)
1918 printk("tx_abort(%s)\n", info->device_name);
1919
1920 spin_lock_irqsave(&info->lock, flags);
1921 if (info->tx_active && info->tx_count &&
1922 info->params.mode == MGSL_MODE_HDLC) {
1923 /* clear data count so FIFO is not filled on next IRQ.
1924 * This results in underrun and abort transmission.
1925 */
1926 info->tx_count = info->tx_put = info->tx_get = 0;
1927 info->tx_aborting = true;
1928 }
1929 spin_unlock_irqrestore(&info->lock, flags);
1930 return 0;
1931 }
1932
1933 static int set_rxenable(MGSLPC_INFO * info, int enable)
1934 {
1935 unsigned long flags;
1936
1937 if (debug_level >= DEBUG_LEVEL_INFO)
1938 printk("set_rxenable(%s,%d)\n", info->device_name, enable);
1939
1940 spin_lock_irqsave(&info->lock, flags);
1941 if (enable) {
1942 if (!info->rx_enabled)
1943 rx_start(info);
1944 } else {
1945 if (info->rx_enabled)
1946 rx_stop(info);
1947 }
1948 spin_unlock_irqrestore(&info->lock, flags);
1949 return 0;
1950 }
1951
1952 /* wait for specified event to occur
1953 *
1954 * Arguments: info pointer to device instance data
1955 * mask pointer to bitmask of events to wait for
1956 * Return Value: 0 if successful and bit mask updated with
1957 * of events triggerred,
1958 * otherwise error code
1959 */
1960 static int wait_events(MGSLPC_INFO * info, int __user *mask_ptr)
1961 {
1962 unsigned long flags;
1963 int s;
1964 int rc=0;
1965 struct mgsl_icount cprev, cnow;
1966 int events;
1967 int mask;
1968 struct _input_signal_events oldsigs, newsigs;
1969 DECLARE_WAITQUEUE(wait, current);
1970
1971 COPY_FROM_USER(rc,&mask, mask_ptr, sizeof(int));
1972 if (rc)
1973 return -EFAULT;
1974
1975 if (debug_level >= DEBUG_LEVEL_INFO)
1976 printk("wait_events(%s,%d)\n", info->device_name, mask);
1977
1978 spin_lock_irqsave(&info->lock, flags);
1979
1980 /* return immediately if state matches requested events */
1981 get_signals(info);
1982 s = info->serial_signals;
1983 events = mask &
1984 ( ((s & SerialSignal_DSR) ? MgslEvent_DsrActive:MgslEvent_DsrInactive) +
1985 ((s & SerialSignal_DCD) ? MgslEvent_DcdActive:MgslEvent_DcdInactive) +
1986 ((s & SerialSignal_CTS) ? MgslEvent_CtsActive:MgslEvent_CtsInactive) +
1987 ((s & SerialSignal_RI) ? MgslEvent_RiActive :MgslEvent_RiInactive) );
1988 if (events) {
1989 spin_unlock_irqrestore(&info->lock, flags);
1990 goto exit;
1991 }
1992
1993 /* save current irq counts */
1994 cprev = info->icount;
1995 oldsigs = info->input_signal_events;
1996
1997 if ((info->params.mode == MGSL_MODE_HDLC) &&
1998 (mask & MgslEvent_ExitHuntMode))
1999 irq_enable(info, CHA, IRQ_EXITHUNT);
2000
2001 set_current_state(TASK_INTERRUPTIBLE);
2002 add_wait_queue(&info->event_wait_q, &wait);
2003
2004 spin_unlock_irqrestore(&info->lock, flags);
2005
2006
2007 for(;;) {
2008 schedule();
2009 if (signal_pending(current)) {
2010 rc = -ERESTARTSYS;
2011 break;
2012 }
2013
2014 /* get current irq counts */
2015 spin_lock_irqsave(&info->lock, flags);
2016 cnow = info->icount;
2017 newsigs = info->input_signal_events;
2018 set_current_state(TASK_INTERRUPTIBLE);
2019 spin_unlock_irqrestore(&info->lock, flags);
2020
2021 /* if no change, wait aborted for some reason */
2022 if (newsigs.dsr_up == oldsigs.dsr_up &&
2023 newsigs.dsr_down == oldsigs.dsr_down &&
2024 newsigs.dcd_up == oldsigs.dcd_up &&
2025 newsigs.dcd_down == oldsigs.dcd_down &&
2026 newsigs.cts_up == oldsigs.cts_up &&
2027 newsigs.cts_down == oldsigs.cts_down &&
2028 newsigs.ri_up == oldsigs.ri_up &&
2029 newsigs.ri_down == oldsigs.ri_down &&
2030 cnow.exithunt == cprev.exithunt &&
2031 cnow.rxidle == cprev.rxidle) {
2032 rc = -EIO;
2033 break;
2034 }
2035
2036 events = mask &
2037 ( (newsigs.dsr_up != oldsigs.dsr_up ? MgslEvent_DsrActive:0) +
2038 (newsigs.dsr_down != oldsigs.dsr_down ? MgslEvent_DsrInactive:0) +
2039 (newsigs.dcd_up != oldsigs.dcd_up ? MgslEvent_DcdActive:0) +
2040 (newsigs.dcd_down != oldsigs.dcd_down ? MgslEvent_DcdInactive:0) +
2041 (newsigs.cts_up != oldsigs.cts_up ? MgslEvent_CtsActive:0) +
2042 (newsigs.cts_down != oldsigs.cts_down ? MgslEvent_CtsInactive:0) +
2043 (newsigs.ri_up != oldsigs.ri_up ? MgslEvent_RiActive:0) +
2044 (newsigs.ri_down != oldsigs.ri_down ? MgslEvent_RiInactive:0) +
2045 (cnow.exithunt != cprev.exithunt ? MgslEvent_ExitHuntMode:0) +
2046 (cnow.rxidle != cprev.rxidle ? MgslEvent_IdleReceived:0) );
2047 if (events)
2048 break;
2049
2050 cprev = cnow;
2051 oldsigs = newsigs;
2052 }
2053
2054 remove_wait_queue(&info->event_wait_q, &wait);
2055 set_current_state(TASK_RUNNING);
2056
2057 if (mask & MgslEvent_ExitHuntMode) {
2058 spin_lock_irqsave(&info->lock, flags);
2059 if (!waitqueue_active(&info->event_wait_q))
2060 irq_disable(info, CHA, IRQ_EXITHUNT);
2061 spin_unlock_irqrestore(&info->lock, flags);
2062 }
2063 exit:
2064 if (rc == 0)
2065 PUT_USER(rc, events, mask_ptr);
2066 return rc;
2067 }
2068
2069 static int modem_input_wait(MGSLPC_INFO *info,int arg)
2070 {
2071 unsigned long flags;
2072 int rc;
2073 struct mgsl_icount cprev, cnow;
2074 DECLARE_WAITQUEUE(wait, current);
2075
2076 /* save current irq counts */
2077 spin_lock_irqsave(&info->lock, flags);
2078 cprev = info->icount;
2079 add_wait_queue(&info->status_event_wait_q, &wait);
2080 set_current_state(TASK_INTERRUPTIBLE);
2081 spin_unlock_irqrestore(&info->lock, flags);
2082
2083 for(;;) {
2084 schedule();
2085 if (signal_pending(current)) {
2086 rc = -ERESTARTSYS;
2087 break;
2088 }
2089
2090 /* get new irq counts */
2091 spin_lock_irqsave(&info->lock, flags);
2092 cnow = info->icount;
2093 set_current_state(TASK_INTERRUPTIBLE);
2094 spin_unlock_irqrestore(&info->lock, flags);
2095
2096 /* if no change, wait aborted for some reason */
2097 if (cnow.rng == cprev.rng && cnow.dsr == cprev.dsr &&
2098 cnow.dcd == cprev.dcd && cnow.cts == cprev.cts) {
2099 rc = -EIO;
2100 break;
2101 }
2102
2103 /* check for change in caller specified modem input */
2104 if ((arg & TIOCM_RNG && cnow.rng != cprev.rng) ||
2105 (arg & TIOCM_DSR && cnow.dsr != cprev.dsr) ||
2106 (arg & TIOCM_CD && cnow.dcd != cprev.dcd) ||
2107 (arg & TIOCM_CTS && cnow.cts != cprev.cts)) {
2108 rc = 0;
2109 break;
2110 }
2111
2112 cprev = cnow;
2113 }
2114 remove_wait_queue(&info->status_event_wait_q, &wait);
2115 set_current_state(TASK_RUNNING);
2116 return rc;
2117 }
2118
2119 /* return the state of the serial control and status signals
2120 */
2121 static int tiocmget(struct tty_struct *tty)
2122 {
2123 MGSLPC_INFO *info = (MGSLPC_INFO *)tty->driver_data;
2124 unsigned int result;
2125 unsigned long flags;
2126
2127 spin_lock_irqsave(&info->lock, flags);
2128 get_signals(info);
2129 spin_unlock_irqrestore(&info->lock, flags);
2130
2131 result = ((info->serial_signals & SerialSignal_RTS) ? TIOCM_RTS:0) +
2132 ((info->serial_signals & SerialSignal_DTR) ? TIOCM_DTR:0) +
2133 ((info->serial_signals & SerialSignal_DCD) ? TIOCM_CAR:0) +
2134 ((info->serial_signals & SerialSignal_RI) ? TIOCM_RNG:0) +
2135 ((info->serial_signals & SerialSignal_DSR) ? TIOCM_DSR:0) +
2136 ((info->serial_signals & SerialSignal_CTS) ? TIOCM_CTS:0);
2137
2138 if (debug_level >= DEBUG_LEVEL_INFO)
2139 printk("%s(%d):%s tiocmget() value=%08X\n",
2140 __FILE__, __LINE__, info->device_name, result);
2141 return result;
2142 }
2143
2144 /* set modem control signals (DTR/RTS)
2145 */
2146 static int tiocmset(struct tty_struct *tty,
2147 unsigned int set, unsigned int clear)
2148 {
2149 MGSLPC_INFO *info = (MGSLPC_INFO *)tty->driver_data;
2150 unsigned long flags;
2151
2152 if (debug_level >= DEBUG_LEVEL_INFO)
2153 printk("%s(%d):%s tiocmset(%x,%x)\n",
2154 __FILE__, __LINE__, info->device_name, set, clear);
2155
2156 if (set & TIOCM_RTS)
2157 info->serial_signals |= SerialSignal_RTS;
2158 if (set & TIOCM_DTR)
2159 info->serial_signals |= SerialSignal_DTR;
2160 if (clear & TIOCM_RTS)
2161 info->serial_signals &= ~SerialSignal_RTS;
2162 if (clear & TIOCM_DTR)
2163 info->serial_signals &= ~SerialSignal_DTR;
2164
2165 spin_lock_irqsave(&info->lock, flags);
2166 set_signals(info);
2167 spin_unlock_irqrestore(&info->lock, flags);
2168
2169 return 0;
2170 }
2171
2172 /* Set or clear transmit break condition
2173 *
2174 * Arguments: tty pointer to tty instance data
2175 * break_state -1=set break condition, 0=clear
2176 */
2177 static int mgslpc_break(struct tty_struct *tty, int break_state)
2178 {
2179 MGSLPC_INFO * info = (MGSLPC_INFO *)tty->driver_data;
2180 unsigned long flags;
2181
2182 if (debug_level >= DEBUG_LEVEL_INFO)
2183 printk("%s(%d):mgslpc_break(%s,%d)\n",
2184 __FILE__, __LINE__, info->device_name, break_state);
2185
2186 if (mgslpc_paranoia_check(info, tty->name, "mgslpc_break"))
2187 return -EINVAL;
2188
2189 spin_lock_irqsave(&info->lock, flags);
2190 if (break_state == -1)
2191 set_reg_bits(info, CHA+DAFO, BIT6);
2192 else
2193 clear_reg_bits(info, CHA+DAFO, BIT6);
2194 spin_unlock_irqrestore(&info->lock, flags);
2195 return 0;
2196 }
2197
2198 static int mgslpc_get_icount(struct tty_struct *tty,
2199 struct serial_icounter_struct *icount)
2200 {
2201 MGSLPC_INFO * info = (MGSLPC_INFO *)tty->driver_data;
2202 struct mgsl_icount cnow; /* kernel counter temps */
2203 unsigned long flags;
2204
2205 spin_lock_irqsave(&info->lock, flags);
2206 cnow = info->icount;
2207 spin_unlock_irqrestore(&info->lock, flags);
2208
2209 icount->cts = cnow.cts;
2210 icount->dsr = cnow.dsr;
2211 icount->rng = cnow.rng;
2212 icount->dcd = cnow.dcd;
2213 icount->rx = cnow.rx;
2214 icount->tx = cnow.tx;
2215 icount->frame = cnow.frame;
2216 icount->overrun = cnow.overrun;
2217 icount->parity = cnow.parity;
2218 icount->brk = cnow.brk;
2219 icount->buf_overrun = cnow.buf_overrun;
2220
2221 return 0;
2222 }
2223
2224 /* Service an IOCTL request
2225 *
2226 * Arguments:
2227 *
2228 * tty pointer to tty instance data
2229 * cmd IOCTL command code
2230 * arg command argument/context
2231 *
2232 * Return Value: 0 if success, otherwise error code
2233 */
2234 static int mgslpc_ioctl(struct tty_struct *tty,
2235 unsigned int cmd, unsigned long arg)
2236 {
2237 MGSLPC_INFO * info = (MGSLPC_INFO *)tty->driver_data;
2238 void __user *argp = (void __user *)arg;
2239
2240 if (debug_level >= DEBUG_LEVEL_INFO)
2241 printk("%s(%d):mgslpc_ioctl %s cmd=%08X\n", __FILE__, __LINE__,
2242 info->device_name, cmd);
2243
2244 if (mgslpc_paranoia_check(info, tty->name, "mgslpc_ioctl"))
2245 return -ENODEV;
2246
2247 if ((cmd != TIOCGSERIAL) && (cmd != TIOCSSERIAL) &&
2248 (cmd != TIOCMIWAIT)) {
2249 if (tty->flags & (1 << TTY_IO_ERROR))
2250 return -EIO;
2251 }
2252
2253 switch (cmd) {
2254 case MGSL_IOCGPARAMS:
2255 return get_params(info, argp);
2256 case MGSL_IOCSPARAMS:
2257 return set_params(info, argp, tty);
2258 case MGSL_IOCGTXIDLE:
2259 return get_txidle(info, argp);
2260 case MGSL_IOCSTXIDLE:
2261 return set_txidle(info, (int)arg);
2262 case MGSL_IOCGIF:
2263 return get_interface(info, argp);
2264 case MGSL_IOCSIF:
2265 return set_interface(info,(int)arg);
2266 case MGSL_IOCTXENABLE:
2267 return set_txenable(info,(int)arg, tty);
2268 case MGSL_IOCRXENABLE:
2269 return set_rxenable(info,(int)arg);
2270 case MGSL_IOCTXABORT:
2271 return tx_abort(info);
2272 case MGSL_IOCGSTATS:
2273 return get_stats(info, argp);
2274 case MGSL_IOCWAITEVENT:
2275 return wait_events(info, argp);
2276 case TIOCMIWAIT:
2277 return modem_input_wait(info,(int)arg);
2278 default:
2279 return -ENOIOCTLCMD;
2280 }
2281 return 0;
2282 }
2283
2284 /* Set new termios settings
2285 *
2286 * Arguments:
2287 *
2288 * tty pointer to tty structure
2289 * termios pointer to buffer to hold returned old termios
2290 */
2291 static void mgslpc_set_termios(struct tty_struct *tty, struct ktermios *old_termios)
2292 {
2293 MGSLPC_INFO *info = (MGSLPC_INFO *)tty->driver_data;
2294 unsigned long flags;
2295
2296 if (debug_level >= DEBUG_LEVEL_INFO)
2297 printk("%s(%d):mgslpc_set_termios %s\n", __FILE__, __LINE__,
2298 tty->driver->name);
2299
2300 /* just return if nothing has changed */
2301 if ((tty->termios.c_cflag == old_termios->c_cflag)
2302 && (RELEVANT_IFLAG(tty->termios.c_iflag)
2303 == RELEVANT_IFLAG(old_termios->c_iflag)))
2304 return;
2305
2306 mgslpc_change_params(info, tty);
2307
2308 /* Handle transition to B0 status */
2309 if (old_termios->c_cflag & CBAUD &&
2310 !(tty->termios.c_cflag & CBAUD)) {
2311 info->serial_signals &= ~(SerialSignal_RTS | SerialSignal_DTR);
2312 spin_lock_irqsave(&info->lock, flags);
2313 set_signals(info);
2314 spin_unlock_irqrestore(&info->lock, flags);
2315 }
2316
2317 /* Handle transition away from B0 status */
2318 if (!(old_termios->c_cflag & CBAUD) &&
2319 tty->termios.c_cflag & CBAUD) {
2320 info->serial_signals |= SerialSignal_DTR;
2321 if (!(tty->termios.c_cflag & CRTSCTS) ||
2322 !test_bit(TTY_THROTTLED, &tty->flags)) {
2323 info->serial_signals |= SerialSignal_RTS;
2324 }
2325 spin_lock_irqsave(&info->lock, flags);
2326 set_signals(info);
2327 spin_unlock_irqrestore(&info->lock, flags);
2328 }
2329
2330 /* Handle turning off CRTSCTS */
2331 if (old_termios->c_cflag & CRTSCTS &&
2332 !(tty->termios.c_cflag & CRTSCTS)) {
2333 tty->hw_stopped = 0;
2334 tx_release(tty);
2335 }
2336 }
2337
2338 static void mgslpc_close(struct tty_struct *tty, struct file * filp)
2339 {
2340 MGSLPC_INFO * info = (MGSLPC_INFO *)tty->driver_data;
2341 struct tty_port *port = &info->port;
2342
2343 if (mgslpc_paranoia_check(info, tty->name, "mgslpc_close"))
2344 return;
2345
2346 if (debug_level >= DEBUG_LEVEL_INFO)
2347 printk("%s(%d):mgslpc_close(%s) entry, count=%d\n",
2348 __FILE__, __LINE__, info->device_name, port->count);
2349
2350 if (tty_port_close_start(port, tty, filp) == 0)
2351 goto cleanup;
2352
2353 if (port->flags & ASYNC_INITIALIZED)
2354 mgslpc_wait_until_sent(tty, info->timeout);
2355
2356 mgslpc_flush_buffer(tty);
2357
2358 tty_ldisc_flush(tty);
2359 shutdown(info, tty);
2360
2361 tty_port_close_end(port, tty);
2362 tty_port_tty_set(port, NULL);
2363 cleanup:
2364 if (debug_level >= DEBUG_LEVEL_INFO)
2365 printk("%s(%d):mgslpc_close(%s) exit, count=%d\n", __FILE__, __LINE__,
2366 tty->driver->name, port->count);
2367 }
2368
2369 /* Wait until the transmitter is empty.
2370 */
2371 static void mgslpc_wait_until_sent(struct tty_struct *tty, int timeout)
2372 {
2373 MGSLPC_INFO * info = (MGSLPC_INFO *)tty->driver_data;
2374 unsigned long orig_jiffies, char_time;
2375
2376 if (!info)
2377 return;
2378
2379 if (debug_level >= DEBUG_LEVEL_INFO)
2380 printk("%s(%d):mgslpc_wait_until_sent(%s) entry\n",
2381 __FILE__, __LINE__, info->device_name);
2382
2383 if (mgslpc_paranoia_check(info, tty->name, "mgslpc_wait_until_sent"))
2384 return;
2385
2386 if (!(info->port.flags & ASYNC_INITIALIZED))
2387 goto exit;
2388
2389 orig_jiffies = jiffies;
2390
2391 /* Set check interval to 1/5 of estimated time to
2392 * send a character, and make it at least 1. The check
2393 * interval should also be less than the timeout.
2394 * Note: use tight timings here to satisfy the NIST-PCTS.
2395 */
2396
2397 if (info->params.data_rate) {
2398 char_time = info->timeout/(32 * 5);
2399 if (!char_time)
2400 char_time++;
2401 } else
2402 char_time = 1;
2403
2404 if (timeout)
2405 char_time = min_t(unsigned long, char_time, timeout);
2406
2407 if (info->params.mode == MGSL_MODE_HDLC) {
2408 while (info->tx_active) {
2409 msleep_interruptible(jiffies_to_msecs(char_time));
2410 if (signal_pending(current))
2411 break;
2412 if (timeout && time_after(jiffies, orig_jiffies + timeout))
2413 break;
2414 }
2415 } else {
2416 while ((info->tx_count || info->tx_active) &&
2417 info->tx_enabled) {
2418 msleep_interruptible(jiffies_to_msecs(char_time));
2419 if (signal_pending(current))
2420 break;
2421 if (timeout && time_after(jiffies, orig_jiffies + timeout))
2422 break;
2423 }
2424 }
2425
2426 exit:
2427 if (debug_level >= DEBUG_LEVEL_INFO)
2428 printk("%s(%d):mgslpc_wait_until_sent(%s) exit\n",
2429 __FILE__, __LINE__, info->device_name);
2430 }
2431
2432 /* Called by tty_hangup() when a hangup is signaled.
2433 * This is the same as closing all open files for the port.
2434 */
2435 static void mgslpc_hangup(struct tty_struct *tty)
2436 {
2437 MGSLPC_INFO * info = (MGSLPC_INFO *)tty->driver_data;
2438
2439 if (debug_level >= DEBUG_LEVEL_INFO)
2440 printk("%s(%d):mgslpc_hangup(%s)\n",
2441 __FILE__, __LINE__, info->device_name);
2442
2443 if (mgslpc_paranoia_check(info, tty->name, "mgslpc_hangup"))
2444 return;
2445
2446 mgslpc_flush_buffer(tty);
2447 shutdown(info, tty);
2448 tty_port_hangup(&info->port);
2449 }
2450
2451 static int carrier_raised(struct tty_port *port)
2452 {
2453 MGSLPC_INFO *info = container_of(port, MGSLPC_INFO, port);
2454 unsigned long flags;
2455
2456 spin_lock_irqsave(&info->lock, flags);
2457 get_signals(info);
2458 spin_unlock_irqrestore(&info->lock, flags);
2459
2460 if (info->serial_signals & SerialSignal_DCD)
2461 return 1;
2462 return 0;
2463 }
2464
2465 static void dtr_rts(struct tty_port *port, int onoff)
2466 {
2467 MGSLPC_INFO *info = container_of(port, MGSLPC_INFO, port);
2468 unsigned long flags;
2469
2470 spin_lock_irqsave(&info->lock, flags);
2471 if (onoff)
2472 info->serial_signals |= SerialSignal_RTS | SerialSignal_DTR;
2473 else
2474 info->serial_signals &= ~(SerialSignal_RTS | SerialSignal_DTR);
2475 set_signals(info);
2476 spin_unlock_irqrestore(&info->lock, flags);
2477 }
2478
2479
2480 static int mgslpc_open(struct tty_struct *tty, struct file * filp)
2481 {
2482 MGSLPC_INFO *info;
2483 struct tty_port *port;
2484 int retval, line;
2485 unsigned long flags;
2486
2487 /* verify range of specified line number */
2488 line = tty->index;
2489 if (line >= mgslpc_device_count) {
2490 printk("%s(%d):mgslpc_open with invalid line #%d.\n",
2491 __FILE__, __LINE__, line);
2492 return -ENODEV;
2493 }
2494
2495 /* find the info structure for the specified line */
2496 info = mgslpc_device_list;
2497 while(info && info->line != line)
2498 info = info->next_device;
2499 if (mgslpc_paranoia_check(info, tty->name, "mgslpc_open"))
2500 return -ENODEV;
2501
2502 port = &info->port;
2503 tty->driver_data = info;
2504 tty_port_tty_set(port, tty);
2505
2506 if (debug_level >= DEBUG_LEVEL_INFO)
2507 printk("%s(%d):mgslpc_open(%s), old ref count = %d\n",
2508 __FILE__, __LINE__, tty->driver->name, port->count);
2509
2510 port->low_latency = (port->flags & ASYNC_LOW_LATENCY) ? 1 : 0;
2511
2512 spin_lock_irqsave(&info->netlock, flags);
2513 if (info->netcount) {
2514 retval = -EBUSY;
2515 spin_unlock_irqrestore(&info->netlock, flags);
2516 goto cleanup;
2517 }
2518 spin_lock(&port->lock);
2519 port->count++;
2520 spin_unlock(&port->lock);
2521 spin_unlock_irqrestore(&info->netlock, flags);
2522
2523 if (port->count == 1) {
2524 /* 1st open on this device, init hardware */
2525 retval = startup(info, tty);
2526 if (retval < 0)
2527 goto cleanup;
2528 }
2529
2530 retval = tty_port_block_til_ready(&info->port, tty, filp);
2531 if (retval) {
2532 if (debug_level >= DEBUG_LEVEL_INFO)
2533 printk("%s(%d):block_til_ready(%s) returned %d\n",
2534 __FILE__, __LINE__, info->device_name, retval);
2535 goto cleanup;
2536 }
2537
2538 if (debug_level >= DEBUG_LEVEL_INFO)
2539 printk("%s(%d):mgslpc_open(%s) success\n",
2540 __FILE__, __LINE__, info->device_name);
2541 retval = 0;
2542
2543 cleanup:
2544 return retval;
2545 }
2546
2547 /*
2548 * /proc fs routines....
2549 */
2550
2551 static inline void line_info(struct seq_file *m, MGSLPC_INFO *info)
2552 {
2553 char stat_buf[30];
2554 unsigned long flags;
2555
2556 seq_printf(m, "%s:io:%04X irq:%d",
2557 info->device_name, info->io_base, info->irq_level);
2558
2559 /* output current serial signal states */
2560 spin_lock_irqsave(&info->lock, flags);
2561 get_signals(info);
2562 spin_unlock_irqrestore(&info->lock, flags);
2563
2564 stat_buf[0] = 0;
2565 stat_buf[1] = 0;
2566 if (info->serial_signals & SerialSignal_RTS)
2567 strcat(stat_buf, "|RTS");
2568 if (info->serial_signals & SerialSignal_CTS)
2569 strcat(stat_buf, "|CTS");
2570 if (info->serial_signals & SerialSignal_DTR)
2571 strcat(stat_buf, "|DTR");
2572 if (info->serial_signals & SerialSignal_DSR)
2573 strcat(stat_buf, "|DSR");
2574 if (info->serial_signals & SerialSignal_DCD)
2575 strcat(stat_buf, "|CD");
2576 if (info->serial_signals & SerialSignal_RI)
2577 strcat(stat_buf, "|RI");
2578
2579 if (info->params.mode == MGSL_MODE_HDLC) {
2580 seq_printf(m, " HDLC txok:%d rxok:%d",
2581 info->icount.txok, info->icount.rxok);
2582 if (info->icount.txunder)
2583 seq_printf(m, " txunder:%d", info->icount.txunder);
2584 if (info->icount.txabort)
2585 seq_printf(m, " txabort:%d", info->icount.txabort);
2586 if (info->icount.rxshort)
2587 seq_printf(m, " rxshort:%d", info->icount.rxshort);
2588 if (info->icount.rxlong)
2589 seq_printf(m, " rxlong:%d", info->icount.rxlong);
2590 if (info->icount.rxover)
2591 seq_printf(m, " rxover:%d", info->icount.rxover);
2592 if (info->icount.rxcrc)
2593 seq_printf(m, " rxcrc:%d", info->icount.rxcrc);
2594 } else {
2595 seq_printf(m, " ASYNC tx:%d rx:%d",
2596 info->icount.tx, info->icount.rx);
2597 if (info->icount.frame)
2598 seq_printf(m, " fe:%d", info->icount.frame);
2599 if (info->icount.parity)
2600 seq_printf(m, " pe:%d", info->icount.parity);
2601 if (info->icount.brk)
2602 seq_printf(m, " brk:%d", info->icount.brk);
2603 if (info->icount.overrun)
2604 seq_printf(m, " oe:%d", info->icount.overrun);
2605 }
2606
2607 /* Append serial signal status to end */
2608 seq_printf(m, " %s\n", stat_buf+1);
2609
2610 seq_printf(m, "txactive=%d bh_req=%d bh_run=%d pending_bh=%x\n",
2611 info->tx_active,info->bh_requested,info->bh_running,
2612 info->pending_bh);
2613 }
2614
2615 /* Called to print information about devices
2616 */
2617 static int mgslpc_proc_show(struct seq_file *m, void *v)
2618 {
2619 MGSLPC_INFO *info;
2620
2621 seq_printf(m, "synclink driver:%s\n", driver_version);
2622
2623 info = mgslpc_device_list;
2624 while (info) {
2625 line_info(m, info);
2626 info = info->next_device;
2627 }
2628 return 0;
2629 }
2630
2631 static int mgslpc_proc_open(struct inode *inode, struct file *file)
2632 {
2633 return single_open(file, mgslpc_proc_show, NULL);
2634 }
2635
2636 static const struct file_operations mgslpc_proc_fops = {
2637 .owner = THIS_MODULE,
2638 .open = mgslpc_proc_open,
2639 .read = seq_read,
2640 .llseek = seq_lseek,
2641 .release = single_release,
2642 };
2643
2644 static int rx_alloc_buffers(MGSLPC_INFO *info)
2645 {
2646 /* each buffer has header and data */
2647 info->rx_buf_size = sizeof(RXBUF) + info->max_frame_size;
2648
2649 /* calculate total allocation size for 8 buffers */
2650 info->rx_buf_total_size = info->rx_buf_size * 8;
2651
2652 /* limit total allocated memory */
2653 if (info->rx_buf_total_size > 0x10000)
2654 info->rx_buf_total_size = 0x10000;
2655
2656 /* calculate number of buffers */
2657 info->rx_buf_count = info->rx_buf_total_size / info->rx_buf_size;
2658
2659 info->rx_buf = kmalloc(info->rx_buf_total_size, GFP_KERNEL);
2660 if (info->rx_buf == NULL)
2661 return -ENOMEM;
2662
2663 /* unused flag buffer to satisfy receive_buf calling interface */
2664 info->flag_buf = kzalloc(info->max_frame_size, GFP_KERNEL);
2665 if (!info->flag_buf) {
2666 kfree(info->rx_buf);
2667 info->rx_buf = NULL;
2668 return -ENOMEM;
2669 }
2670
2671 rx_reset_buffers(info);
2672 return 0;
2673 }
2674
2675 static void rx_free_buffers(MGSLPC_INFO *info)
2676 {
2677 kfree(info->rx_buf);
2678 info->rx_buf = NULL;
2679 kfree(info->flag_buf);
2680 info->flag_buf = NULL;
2681 }
2682
2683 static int claim_resources(MGSLPC_INFO *info)
2684 {
2685 if (rx_alloc_buffers(info) < 0) {
2686 printk("Can't allocate rx buffer %s\n", info->device_name);
2687 release_resources(info);
2688 return -ENODEV;
2689 }
2690 return 0;
2691 }
2692
2693 static void release_resources(MGSLPC_INFO *info)
2694 {
2695 if (debug_level >= DEBUG_LEVEL_INFO)
2696 printk("release_resources(%s)\n", info->device_name);
2697 rx_free_buffers(info);
2698 }
2699
2700 /* Add the specified device instance data structure to the
2701 * global linked list of devices and increment the device count.
2702 *
2703 * Arguments: info pointer to device instance data
2704 */
2705 static int mgslpc_add_device(MGSLPC_INFO *info)
2706 {
2707 MGSLPC_INFO *current_dev = NULL;
2708 struct device *tty_dev;
2709 int ret;
2710
2711 info->next_device = NULL;
2712 info->line = mgslpc_device_count;
2713 sprintf(info->device_name,"ttySLP%d",info->line);
2714
2715 if (info->line < MAX_DEVICE_COUNT) {
2716 if (maxframe[info->line])
2717 info->max_frame_size = maxframe[info->line];
2718 }
2719
2720 mgslpc_device_count++;
2721
2722 if (!mgslpc_device_list)
2723 mgslpc_device_list = info;
2724 else {
2725 current_dev = mgslpc_device_list;
2726 while (current_dev->next_device)
2727 current_dev = current_dev->next_device;
2728 current_dev->next_device = info;
2729 }
2730
2731 if (info->max_frame_size < 4096)
2732 info->max_frame_size = 4096;
2733 else if (info->max_frame_size > 65535)
2734 info->max_frame_size = 65535;
2735
2736 printk("SyncLink PC Card %s:IO=%04X IRQ=%d\n",
2737 info->device_name, info->io_base, info->irq_level);
2738
2739 #if SYNCLINK_GENERIC_HDLC
2740 ret = hdlcdev_init(info);
2741 if (ret != 0)
2742 goto failed;
2743 #endif
2744
2745 tty_dev = tty_port_register_device(&info->port, serial_driver, info->line,
2746 &info->p_dev->dev);
2747 if (IS_ERR(tty_dev)) {
2748 ret = PTR_ERR(tty_dev);
2749 #if SYNCLINK_GENERIC_HDLC
2750 hdlcdev_exit(info);
2751 #endif
2752 goto failed;
2753 }
2754
2755 return 0;
2756
2757 failed:
2758 if (current_dev)
2759 current_dev->next_device = NULL;
2760 else
2761 mgslpc_device_list = NULL;
2762 mgslpc_device_count--;
2763 return ret;
2764 }
2765
2766 static void mgslpc_remove_device(MGSLPC_INFO *remove_info)
2767 {
2768 MGSLPC_INFO *info = mgslpc_device_list;
2769 MGSLPC_INFO *last = NULL;
2770
2771 while(info) {
2772 if (info == remove_info) {
2773 if (last)
2774 last->next_device = info->next_device;
2775 else
2776 mgslpc_device_list = info->next_device;
2777 tty_unregister_device(serial_driver, info->line);
2778 #if SYNCLINK_GENERIC_HDLC
2779 hdlcdev_exit(info);
2780 #endif
2781 release_resources(info);
2782 tty_port_destroy(&info->port);
2783 kfree(info);
2784 mgslpc_device_count--;
2785 return;
2786 }
2787 last = info;
2788 info = info->next_device;
2789 }
2790 }
2791
2792 static const struct pcmcia_device_id mgslpc_ids[] = {
2793 PCMCIA_DEVICE_MANF_CARD(0x02c5, 0x0050),
2794 PCMCIA_DEVICE_NULL
2795 };
2796 MODULE_DEVICE_TABLE(pcmcia, mgslpc_ids);
2797
2798 static struct pcmcia_driver mgslpc_driver = {
2799 .owner = THIS_MODULE,
2800 .name = "synclink_cs",
2801 .probe = mgslpc_probe,
2802 .remove = mgslpc_detach,
2803 .id_table = mgslpc_ids,
2804 .suspend = mgslpc_suspend,
2805 .resume = mgslpc_resume,
2806 };
2807
2808 static const struct tty_operations mgslpc_ops = {
2809 .open = mgslpc_open,
2810 .close = mgslpc_close,
2811 .write = mgslpc_write,
2812 .put_char = mgslpc_put_char,
2813 .flush_chars = mgslpc_flush_chars,
2814 .write_room = mgslpc_write_room,
2815 .chars_in_buffer = mgslpc_chars_in_buffer,
2816 .flush_buffer = mgslpc_flush_buffer,
2817 .ioctl = mgslpc_ioctl,
2818 .throttle = mgslpc_throttle,
2819 .unthrottle = mgslpc_unthrottle,
2820 .send_xchar = mgslpc_send_xchar,
2821 .break_ctl = mgslpc_break,
2822 .wait_until_sent = mgslpc_wait_until_sent,
2823 .set_termios = mgslpc_set_termios,
2824 .stop = tx_pause,
2825 .start = tx_release,
2826 .hangup = mgslpc_hangup,
2827 .tiocmget = tiocmget,
2828 .tiocmset = tiocmset,
2829 .get_icount = mgslpc_get_icount,
2830 .proc_fops = &mgslpc_proc_fops,
2831 };
2832
2833 static int __init synclink_cs_init(void)
2834 {
2835 int rc;
2836
2837 if (break_on_load) {
2838 mgslpc_get_text_ptr();
2839 BREAKPOINT();
2840 }
2841
2842 serial_driver = tty_alloc_driver(MAX_DEVICE_COUNT,
2843 TTY_DRIVER_REAL_RAW |
2844 TTY_DRIVER_DYNAMIC_DEV);
2845 if (IS_ERR(serial_driver)) {
2846 rc = PTR_ERR(serial_driver);
2847 goto err;
2848 }
2849
2850 /* Initialize the tty_driver structure */
2851 serial_driver->driver_name = "synclink_cs";
2852 serial_driver->name = "ttySLP";
2853 serial_driver->major = ttymajor;
2854 serial_driver->minor_start = 64;
2855 serial_driver->type = TTY_DRIVER_TYPE_SERIAL;
2856 serial_driver->subtype = SERIAL_TYPE_NORMAL;
2857 serial_driver->init_termios = tty_std_termios;
2858 serial_driver->init_termios.c_cflag =
2859 B9600 | CS8 | CREAD | HUPCL | CLOCAL;
2860 tty_set_operations(serial_driver, &mgslpc_ops);
2861
2862 rc = tty_register_driver(serial_driver);
2863 if (rc < 0) {
2864 printk(KERN_ERR "%s(%d):Couldn't register serial driver\n",
2865 __FILE__, __LINE__);
2866 goto err_put_tty;
2867 }
2868
2869 rc = pcmcia_register_driver(&mgslpc_driver);
2870 if (rc < 0)
2871 goto err_unreg_tty;
2872
2873 printk(KERN_INFO "%s %s, tty major#%d\n", driver_name, driver_version,
2874 serial_driver->major);
2875
2876 return 0;
2877 err_unreg_tty:
2878 tty_unregister_driver(serial_driver);
2879 err_put_tty:
2880 put_tty_driver(serial_driver);
2881 err:
2882 return rc;
2883 }
2884
2885 static void __exit synclink_cs_exit(void)
2886 {
2887 pcmcia_unregister_driver(&mgslpc_driver);
2888 tty_unregister_driver(serial_driver);
2889 put_tty_driver(serial_driver);
2890 }
2891
2892 module_init(synclink_cs_init);
2893 module_exit(synclink_cs_exit);
2894
2895 static void mgslpc_set_rate(MGSLPC_INFO *info, unsigned char channel, unsigned int rate)
2896 {
2897 unsigned int M, N;
2898 unsigned char val;
2899
2900 /* note:standard BRG mode is broken in V3.2 chip
2901 * so enhanced mode is always used
2902 */
2903
2904 if (rate) {
2905 N = 3686400 / rate;
2906 if (!N)
2907 N = 1;
2908 N >>= 1;
2909 for (M = 1; N > 64 && M < 16; M++)
2910 N >>= 1;
2911 N--;
2912
2913 /* BGR[5..0] = N
2914 * BGR[9..6] = M
2915 * BGR[7..0] contained in BGR register
2916 * BGR[9..8] contained in CCR2[7..6]
2917 * divisor = (N+1)*2^M
2918 *
2919 * Note: M *must* not be zero (causes asymetric duty cycle)
2920 */
2921 write_reg(info, (unsigned char) (channel + BGR),
2922 (unsigned char) ((M << 6) + N));
2923 val = read_reg(info, (unsigned char) (channel + CCR2)) & 0x3f;
2924 val |= ((M << 4) & 0xc0);
2925 write_reg(info, (unsigned char) (channel + CCR2), val);
2926 }
2927 }
2928
2929 /* Enabled the AUX clock output at the specified frequency.
2930 */
2931 static void enable_auxclk(MGSLPC_INFO *info)
2932 {
2933 unsigned char val;
2934
2935 /* MODE
2936 *
2937 * 07..06 MDS[1..0] 10 = transparent HDLC mode
2938 * 05 ADM Address Mode, 0 = no addr recognition
2939 * 04 TMD Timer Mode, 0 = external
2940 * 03 RAC Receiver Active, 0 = inactive
2941 * 02 RTS 0=RTS active during xmit, 1=RTS always active
2942 * 01 TRS Timer Resolution, 1=512
2943 * 00 TLP Test Loop, 0 = no loop
2944 *
2945 * 1000 0010
2946 */
2947 val = 0x82;
2948
2949 /* channel B RTS is used to enable AUXCLK driver on SP505 */
2950 if (info->params.mode == MGSL_MODE_HDLC && info->params.clock_speed)
2951 val |= BIT2;
2952 write_reg(info, CHB + MODE, val);
2953
2954 /* CCR0
2955 *
2956 * 07 PU Power Up, 1=active, 0=power down
2957 * 06 MCE Master Clock Enable, 1=enabled
2958 * 05 Reserved, 0
2959 * 04..02 SC[2..0] Encoding
2960 * 01..00 SM[1..0] Serial Mode, 00=HDLC
2961 *
2962 * 11000000
2963 */
2964 write_reg(info, CHB + CCR0, 0xc0);
2965
2966 /* CCR1
2967 *
2968 * 07 SFLG Shared Flag, 0 = disable shared flags
2969 * 06 GALP Go Active On Loop, 0 = not used
2970 * 05 GLP Go On Loop, 0 = not used
2971 * 04 ODS Output Driver Select, 1=TxD is push-pull output
2972 * 03 ITF Interframe Time Fill, 0=mark, 1=flag
2973 * 02..00 CM[2..0] Clock Mode
2974 *
2975 * 0001 0111
2976 */
2977 write_reg(info, CHB + CCR1, 0x17);
2978
2979 /* CCR2 (Channel B)
2980 *
2981 * 07..06 BGR[9..8] Baud rate bits 9..8
2982 * 05 BDF Baud rate divisor factor, 0=1, 1=BGR value
2983 * 04 SSEL Clock source select, 1=submode b
2984 * 03 TOE 0=TxCLK is input, 1=TxCLK is output
2985 * 02 RWX Read/Write Exchange 0=disabled
2986 * 01 C32, CRC select, 0=CRC-16, 1=CRC-32
2987 * 00 DIV, data inversion 0=disabled, 1=enabled
2988 *
2989 * 0011 1000
2990 */
2991 if (info->params.mode == MGSL_MODE_HDLC && info->params.clock_speed)
2992 write_reg(info, CHB + CCR2, 0x38);
2993 else
2994 write_reg(info, CHB + CCR2, 0x30);
2995
2996 /* CCR4
2997 *
2998 * 07 MCK4 Master Clock Divide by 4, 1=enabled
2999 * 06 EBRG Enhanced Baud Rate Generator Mode, 1=enabled
3000 * 05 TST1 Test Pin, 0=normal operation
3001 * 04 ICD Ivert Carrier Detect, 1=enabled (active low)
3002 * 03..02 Reserved, must be 0
3003 * 01..00 RFT[1..0] RxFIFO Threshold 00=32 bytes
3004 *
3005 * 0101 0000
3006 */
3007 write_reg(info, CHB + CCR4, 0x50);
3008
3009 /* if auxclk not enabled, set internal BRG so
3010 * CTS transitions can be detected (requires TxC)
3011 */
3012 if (info->params.mode == MGSL_MODE_HDLC && info->params.clock_speed)
3013 mgslpc_set_rate(info, CHB, info->params.clock_speed);
3014 else
3015 mgslpc_set_rate(info, CHB, 921600);
3016 }
3017
3018 static void loopback_enable(MGSLPC_INFO *info)
3019 {
3020 unsigned char val;
3021
3022 /* CCR1:02..00 CM[2..0] Clock Mode = 111 (clock mode 7) */
3023 val = read_reg(info, CHA + CCR1) | (BIT2 | BIT1 | BIT0);
3024 write_reg(info, CHA + CCR1, val);
3025
3026 /* CCR2:04 SSEL Clock source select, 1=submode b */
3027 val = read_reg(info, CHA + CCR2) | (BIT4 | BIT5);
3028 write_reg(info, CHA + CCR2, val);
3029
3030 /* set LinkSpeed if available, otherwise default to 2Mbps */
3031 if (info->params.clock_speed)
3032 mgslpc_set_rate(info, CHA, info->params.clock_speed);
3033 else
3034 mgslpc_set_rate(info, CHA, 1843200);
3035
3036 /* MODE:00 TLP Test Loop, 1=loopback enabled */
3037 val = read_reg(info, CHA + MODE) | BIT0;
3038 write_reg(info, CHA + MODE, val);
3039 }
3040
3041 static void hdlc_mode(MGSLPC_INFO *info)
3042 {
3043 unsigned char val;
3044 unsigned char clkmode, clksubmode;
3045
3046 /* disable all interrupts */
3047 irq_disable(info, CHA, 0xffff);
3048 irq_disable(info, CHB, 0xffff);
3049 port_irq_disable(info, 0xff);
3050
3051 /* assume clock mode 0a, rcv=RxC xmt=TxC */
3052 clkmode = clksubmode = 0;
3053 if (info->params.flags & HDLC_FLAG_RXC_DPLL
3054 && info->params.flags & HDLC_FLAG_TXC_DPLL) {
3055 /* clock mode 7a, rcv = DPLL, xmt = DPLL */
3056 clkmode = 7;
3057 } else if (info->params.flags & HDLC_FLAG_RXC_BRG
3058 && info->params.flags & HDLC_FLAG_TXC_BRG) {
3059 /* clock mode 7b, rcv = BRG, xmt = BRG */
3060 clkmode = 7;
3061 clksubmode = 1;
3062 } else if (info->params.flags & HDLC_FLAG_RXC_DPLL) {
3063 if (info->params.flags & HDLC_FLAG_TXC_BRG) {
3064 /* clock mode 6b, rcv = DPLL, xmt = BRG/16 */
3065 clkmode = 6;
3066 clksubmode = 1;
3067 } else {
3068 /* clock mode 6a, rcv = DPLL, xmt = TxC */
3069 clkmode = 6;
3070 }
3071 } else if (info->params.flags & HDLC_FLAG_TXC_BRG) {
3072 /* clock mode 0b, rcv = RxC, xmt = BRG */
3073 clksubmode = 1;
3074 }
3075
3076 /* MODE
3077 *
3078 * 07..06 MDS[1..0] 10 = transparent HDLC mode
3079 * 05 ADM Address Mode, 0 = no addr recognition
3080 * 04 TMD Timer Mode, 0 = external
3081 * 03 RAC Receiver Active, 0 = inactive
3082 * 02 RTS 0=RTS active during xmit, 1=RTS always active
3083 * 01 TRS Timer Resolution, 1=512
3084 * 00 TLP Test Loop, 0 = no loop
3085 *
3086 * 1000 0010
3087 */
3088 val = 0x82;
3089 if (info->params.loopback)
3090 val |= BIT0;
3091
3092 /* preserve RTS state */
3093 if (info->serial_signals & SerialSignal_RTS)
3094 val |= BIT2;
3095 write_reg(info, CHA + MODE, val);
3096
3097 /* CCR0
3098 *
3099 * 07 PU Power Up, 1=active, 0=power down
3100 * 06 MCE Master Clock Enable, 1=enabled
3101 * 05 Reserved, 0
3102 * 04..02 SC[2..0] Encoding
3103 * 01..00 SM[1..0] Serial Mode, 00=HDLC
3104 *
3105 * 11000000
3106 */
3107 val = 0xc0;
3108 switch (info->params.encoding)
3109 {
3110 case HDLC_ENCODING_NRZI:
3111 val |= BIT3;
3112 break;
3113 case HDLC_ENCODING_BIPHASE_SPACE:
3114 val |= BIT4;
3115 break; // FM0
3116 case HDLC_ENCODING_BIPHASE_MARK:
3117 val |= BIT4 | BIT2;
3118 break; // FM1
3119 case HDLC_ENCODING_BIPHASE_LEVEL:
3120 val |= BIT4 | BIT3;
3121 break; // Manchester
3122 }
3123 write_reg(info, CHA + CCR0, val);
3124
3125 /* CCR1
3126 *
3127 * 07 SFLG Shared Flag, 0 = disable shared flags
3128 * 06 GALP Go Active On Loop, 0 = not used
3129 * 05 GLP Go On Loop, 0 = not used
3130 * 04 ODS Output Driver Select, 1=TxD is push-pull output
3131 * 03 ITF Interframe Time Fill, 0=mark, 1=flag
3132 * 02..00 CM[2..0] Clock Mode
3133 *
3134 * 0001 0000
3135 */
3136 val = 0x10 + clkmode;
3137 write_reg(info, CHA + CCR1, val);
3138
3139 /* CCR2
3140 *
3141 * 07..06 BGR[9..8] Baud rate bits 9..8
3142 * 05 BDF Baud rate divisor factor, 0=1, 1=BGR value
3143 * 04 SSEL Clock source select, 1=submode b
3144 * 03 TOE 0=TxCLK is input, 0=TxCLK is input
3145 * 02 RWX Read/Write Exchange 0=disabled
3146 * 01 C32, CRC select, 0=CRC-16, 1=CRC-32
3147 * 00 DIV, data inversion 0=disabled, 1=enabled
3148 *
3149 * 0000 0000
3150 */
3151 val = 0x00;
3152 if (clkmode == 2 || clkmode == 3 || clkmode == 6
3153 || clkmode == 7 || (clkmode == 0 && clksubmode == 1))
3154 val |= BIT5;
3155 if (clksubmode)
3156 val |= BIT4;
3157 if (info->params.crc_type == HDLC_CRC_32_CCITT)
3158 val |= BIT1;
3159 if (info->params.encoding == HDLC_ENCODING_NRZB)
3160 val |= BIT0;
3161 write_reg(info, CHA + CCR2, val);
3162
3163 /* CCR3
3164 *
3165 * 07..06 PRE[1..0] Preamble count 00=1, 01=2, 10=4, 11=8
3166 * 05 EPT Enable preamble transmission, 1=enabled
3167 * 04 RADD Receive address pushed to FIFO, 0=disabled
3168 * 03 CRL CRC Reset Level, 0=FFFF
3169 * 02 RCRC Rx CRC 0=On 1=Off
3170 * 01 TCRC Tx CRC 0=On 1=Off
3171 * 00 PSD DPLL Phase Shift Disable
3172 *
3173 * 0000 0000
3174 */
3175 val = 0x00;
3176 if (info->params.crc_type == HDLC_CRC_NONE)
3177 val |= BIT2 | BIT1;
3178 if (info->params.preamble != HDLC_PREAMBLE_PATTERN_NONE)
3179 val |= BIT5;
3180 switch (info->params.preamble_length)
3181 {
3182 case HDLC_PREAMBLE_LENGTH_16BITS:
3183 val |= BIT6;
3184 break;
3185 case HDLC_PREAMBLE_LENGTH_32BITS:
3186 val |= BIT6;
3187 break;
3188 case HDLC_PREAMBLE_LENGTH_64BITS:
3189 val |= BIT7 | BIT6;
3190 break;
3191 }
3192 write_reg(info, CHA + CCR3, val);
3193
3194 /* PRE - Preamble pattern */
3195 val = 0;
3196 switch (info->params.preamble)
3197 {
3198 case HDLC_PREAMBLE_PATTERN_FLAGS: val = 0x7e; break;
3199 case HDLC_PREAMBLE_PATTERN_10: val = 0xaa; break;
3200 case HDLC_PREAMBLE_PATTERN_01: val = 0x55; break;
3201 case HDLC_PREAMBLE_PATTERN_ONES: val = 0xff; break;
3202 }
3203 write_reg(info, CHA + PRE, val);
3204
3205 /* CCR4
3206 *
3207 * 07 MCK4 Master Clock Divide by 4, 1=enabled
3208 * 06 EBRG Enhanced Baud Rate Generator Mode, 1=enabled
3209 * 05 TST1 Test Pin, 0=normal operation
3210 * 04 ICD Ivert Carrier Detect, 1=enabled (active low)
3211 * 03..02 Reserved, must be 0
3212 * 01..00 RFT[1..0] RxFIFO Threshold 00=32 bytes
3213 *
3214 * 0101 0000
3215 */
3216 val = 0x50;
3217 write_reg(info, CHA + CCR4, val);
3218 if (info->params.flags & HDLC_FLAG_RXC_DPLL)
3219 mgslpc_set_rate(info, CHA, info->params.clock_speed * 16);
3220 else
3221 mgslpc_set_rate(info, CHA, info->params.clock_speed);
3222
3223 /* RLCR Receive length check register
3224 *
3225 * 7 1=enable receive length check
3226 * 6..0 Max frame length = (RL + 1) * 32
3227 */
3228 write_reg(info, CHA + RLCR, 0);
3229
3230 /* XBCH Transmit Byte Count High
3231 *
3232 * 07 DMA mode, 0 = interrupt driven
3233 * 06 NRM, 0=ABM (ignored)
3234 * 05 CAS Carrier Auto Start
3235 * 04 XC Transmit Continuously (ignored)
3236 * 03..00 XBC[10..8] Transmit byte count bits 10..8
3237 *
3238 * 0000 0000
3239 */
3240 val = 0x00;
3241 if (info->params.flags & HDLC_FLAG_AUTO_DCD)
3242 val |= BIT5;
3243 write_reg(info, CHA + XBCH, val);
3244 enable_auxclk(info);
3245 if (info->params.loopback || info->testing_irq)
3246 loopback_enable(info);
3247 if (info->params.flags & HDLC_FLAG_AUTO_CTS)
3248 {
3249 irq_enable(info, CHB, IRQ_CTS);
3250 /* PVR[3] 1=AUTO CTS active */
3251 set_reg_bits(info, CHA + PVR, BIT3);
3252 } else
3253 clear_reg_bits(info, CHA + PVR, BIT3);
3254
3255 irq_enable(info, CHA,
3256 IRQ_RXEOM | IRQ_RXFIFO | IRQ_ALLSENT |
3257 IRQ_UNDERRUN | IRQ_TXFIFO);
3258 issue_command(info, CHA, CMD_TXRESET + CMD_RXRESET);
3259 wait_command_complete(info, CHA);
3260 read_reg16(info, CHA + ISR); /* clear pending IRQs */
3261
3262 /* Master clock mode enabled above to allow reset commands
3263 * to complete even if no data clocks are present.
3264 *
3265 * Disable master clock mode for normal communications because
3266 * V3.2 of the ESCC2 has a bug that prevents the transmit all sent
3267 * IRQ when in master clock mode.
3268 *
3269 * Leave master clock mode enabled for IRQ test because the
3270 * timer IRQ used by the test can only happen in master clock mode.
3271 */
3272 if (!info->testing_irq)
3273 clear_reg_bits(info, CHA + CCR0, BIT6);
3274
3275 tx_set_idle(info);
3276
3277 tx_stop(info);
3278 rx_stop(info);
3279 }
3280
3281 static void rx_stop(MGSLPC_INFO *info)
3282 {
3283 if (debug_level >= DEBUG_LEVEL_ISR)
3284 printk("%s(%d):rx_stop(%s)\n",
3285 __FILE__, __LINE__, info->device_name);
3286
3287 /* MODE:03 RAC Receiver Active, 0=inactive */
3288 clear_reg_bits(info, CHA + MODE, BIT3);
3289
3290 info->rx_enabled = false;
3291 info->rx_overflow = false;
3292 }
3293
3294 static void rx_start(MGSLPC_INFO *info)
3295 {
3296 if (debug_level >= DEBUG_LEVEL_ISR)
3297 printk("%s(%d):rx_start(%s)\n",
3298 __FILE__, __LINE__, info->device_name);
3299
3300 rx_reset_buffers(info);
3301 info->rx_enabled = false;
3302 info->rx_overflow = false;
3303
3304 /* MODE:03 RAC Receiver Active, 1=active */
3305 set_reg_bits(info, CHA + MODE, BIT3);
3306
3307 info->rx_enabled = true;
3308 }
3309
3310 static void tx_start(MGSLPC_INFO *info, struct tty_struct *tty)
3311 {
3312 if (debug_level >= DEBUG_LEVEL_ISR)
3313 printk("%s(%d):tx_start(%s)\n",
3314 __FILE__, __LINE__, info->device_name);
3315
3316 if (info->tx_count) {
3317 /* If auto RTS enabled and RTS is inactive, then assert */
3318 /* RTS and set a flag indicating that the driver should */
3319 /* negate RTS when the transmission completes. */
3320 info->drop_rts_on_tx_done = false;
3321
3322 if (info->params.flags & HDLC_FLAG_AUTO_RTS) {
3323 get_signals(info);
3324 if (!(info->serial_signals & SerialSignal_RTS)) {
3325 info->serial_signals |= SerialSignal_RTS;
3326 set_signals(info);
3327 info->drop_rts_on_tx_done = true;
3328 }
3329 }
3330
3331 if (info->params.mode == MGSL_MODE_ASYNC) {
3332 if (!info->tx_active) {
3333 info->tx_active = true;
3334 tx_ready(info, tty);
3335 }
3336 } else {
3337 info->tx_active = true;
3338 tx_ready(info, tty);
3339 mod_timer(&info->tx_timer, jiffies +
3340 msecs_to_jiffies(5000));
3341 }
3342 }
3343
3344 if (!info->tx_enabled)
3345 info->tx_enabled = true;
3346 }
3347
3348 static void tx_stop(MGSLPC_INFO *info)
3349 {
3350 if (debug_level >= DEBUG_LEVEL_ISR)
3351 printk("%s(%d):tx_stop(%s)\n",
3352 __FILE__, __LINE__, info->device_name);
3353
3354 del_timer(&info->tx_timer);
3355
3356 info->tx_enabled = false;
3357 info->tx_active = false;
3358 }
3359
3360 /* Reset the adapter to a known state and prepare it for further use.
3361 */
3362 static void reset_device(MGSLPC_INFO *info)
3363 {
3364 /* power up both channels (set BIT7) */
3365 write_reg(info, CHA + CCR0, 0x80);
3366 write_reg(info, CHB + CCR0, 0x80);
3367 write_reg(info, CHA + MODE, 0);
3368 write_reg(info, CHB + MODE, 0);
3369
3370 /* disable all interrupts */
3371 irq_disable(info, CHA, 0xffff);
3372 irq_disable(info, CHB, 0xffff);
3373 port_irq_disable(info, 0xff);
3374
3375 /* PCR Port Configuration Register
3376 *
3377 * 07..04 DEC[3..0] Serial I/F select outputs
3378 * 03 output, 1=AUTO CTS control enabled
3379 * 02 RI Ring Indicator input 0=active
3380 * 01 DSR input 0=active
3381 * 00 DTR output 0=active
3382 *
3383 * 0000 0110
3384 */
3385 write_reg(info, PCR, 0x06);
3386
3387 /* PVR Port Value Register
3388 *
3389 * 07..04 DEC[3..0] Serial I/F select (0000=disabled)
3390 * 03 AUTO CTS output 1=enabled
3391 * 02 RI Ring Indicator input
3392 * 01 DSR input
3393 * 00 DTR output (1=inactive)
3394 *
3395 * 0000 0001
3396 */
3397 // write_reg(info, PVR, PVR_DTR);
3398
3399 /* IPC Interrupt Port Configuration
3400 *
3401 * 07 VIS 1=Masked interrupts visible
3402 * 06..05 Reserved, 0
3403 * 04..03 SLA Slave address, 00 ignored
3404 * 02 CASM Cascading Mode, 1=daisy chain
3405 * 01..00 IC[1..0] Interrupt Config, 01=push-pull output, active low
3406 *
3407 * 0000 0101
3408 */
3409 write_reg(info, IPC, 0x05);
3410 }
3411
3412 static void async_mode(MGSLPC_INFO *info)
3413 {
3414 unsigned char val;
3415
3416 /* disable all interrupts */
3417 irq_disable(info, CHA, 0xffff);
3418 irq_disable(info, CHB, 0xffff);
3419 port_irq_disable(info, 0xff);
3420
3421 /* MODE
3422 *
3423 * 07 Reserved, 0
3424 * 06 FRTS RTS State, 0=active
3425 * 05 FCTS Flow Control on CTS
3426 * 04 FLON Flow Control Enable
3427 * 03 RAC Receiver Active, 0 = inactive
3428 * 02 RTS 0=Auto RTS, 1=manual RTS
3429 * 01 TRS Timer Resolution, 1=512
3430 * 00 TLP Test Loop, 0 = no loop
3431 *
3432 * 0000 0110
3433 */
3434 val = 0x06;
3435 if (info->params.loopback)
3436 val |= BIT0;
3437
3438 /* preserve RTS state */
3439 if (!(info->serial_signals & SerialSignal_RTS))
3440 val |= BIT6;
3441 write_reg(info, CHA + MODE, val);
3442
3443 /* CCR0
3444 *
3445 * 07 PU Power Up, 1=active, 0=power down
3446 * 06 MCE Master Clock Enable, 1=enabled
3447 * 05 Reserved, 0
3448 * 04..02 SC[2..0] Encoding, 000=NRZ
3449 * 01..00 SM[1..0] Serial Mode, 11=Async
3450 *
3451 * 1000 0011
3452 */
3453 write_reg(info, CHA + CCR0, 0x83);
3454
3455 /* CCR1
3456 *
3457 * 07..05 Reserved, 0
3458 * 04 ODS Output Driver Select, 1=TxD is push-pull output
3459 * 03 BCR Bit Clock Rate, 1=16x
3460 * 02..00 CM[2..0] Clock Mode, 111=BRG
3461 *
3462 * 0001 1111
3463 */
3464 write_reg(info, CHA + CCR1, 0x1f);
3465
3466 /* CCR2 (channel A)
3467 *
3468 * 07..06 BGR[9..8] Baud rate bits 9..8
3469 * 05 BDF Baud rate divisor factor, 0=1, 1=BGR value
3470 * 04 SSEL Clock source select, 1=submode b
3471 * 03 TOE 0=TxCLK is input, 0=TxCLK is input
3472 * 02 RWX Read/Write Exchange 0=disabled
3473 * 01 Reserved, 0
3474 * 00 DIV, data inversion 0=disabled, 1=enabled
3475 *
3476 * 0001 0000
3477 */
3478 write_reg(info, CHA + CCR2, 0x10);
3479
3480 /* CCR3
3481 *
3482 * 07..01 Reserved, 0
3483 * 00 PSD DPLL Phase Shift Disable
3484 *
3485 * 0000 0000
3486 */
3487 write_reg(info, CHA + CCR3, 0);
3488
3489 /* CCR4
3490 *
3491 * 07 MCK4 Master Clock Divide by 4, 1=enabled
3492 * 06 EBRG Enhanced Baud Rate Generator Mode, 1=enabled
3493 * 05 TST1 Test Pin, 0=normal operation
3494 * 04 ICD Ivert Carrier Detect, 1=enabled (active low)
3495 * 03..00 Reserved, must be 0
3496 *
3497 * 0101 0000
3498 */
3499 write_reg(info, CHA + CCR4, 0x50);
3500 mgslpc_set_rate(info, CHA, info->params.data_rate * 16);
3501
3502 /* DAFO Data Format
3503 *
3504 * 07 Reserved, 0
3505 * 06 XBRK transmit break, 0=normal operation
3506 * 05 Stop bits (0=1, 1=2)
3507 * 04..03 PAR[1..0] Parity (01=odd, 10=even)
3508 * 02 PAREN Parity Enable
3509 * 01..00 CHL[1..0] Character Length (00=8, 01=7)
3510 *
3511 */
3512 val = 0x00;
3513 if (info->params.data_bits != 8)
3514 val |= BIT0; /* 7 bits */
3515 if (info->params.stop_bits != 1)
3516 val |= BIT5;
3517 if (info->params.parity != ASYNC_PARITY_NONE)
3518 {
3519 val |= BIT2; /* Parity enable */
3520 if (info->params.parity == ASYNC_PARITY_ODD)
3521 val |= BIT3;
3522 else
3523 val |= BIT4;
3524 }
3525 write_reg(info, CHA + DAFO, val);
3526
3527 /* RFC Rx FIFO Control
3528 *
3529 * 07 Reserved, 0
3530 * 06 DPS, 1=parity bit not stored in data byte
3531 * 05 DXS, 0=all data stored in FIFO (including XON/XOFF)
3532 * 04 RFDF Rx FIFO Data Format, 1=status byte stored in FIFO
3533 * 03..02 RFTH[1..0], rx threshold, 11=16 status + 16 data byte
3534 * 01 Reserved, 0
3535 * 00 TCDE Terminate Char Detect Enable, 0=disabled
3536 *
3537 * 0101 1100
3538 */
3539 write_reg(info, CHA + RFC, 0x5c);
3540
3541 /* RLCR Receive length check register
3542 *
3543 * Max frame length = (RL + 1) * 32
3544 */
3545 write_reg(info, CHA + RLCR, 0);
3546
3547 /* XBCH Transmit Byte Count High
3548 *
3549 * 07 DMA mode, 0 = interrupt driven
3550 * 06 NRM, 0=ABM (ignored)
3551 * 05 CAS Carrier Auto Start
3552 * 04 XC Transmit Continuously (ignored)
3553 * 03..00 XBC[10..8] Transmit byte count bits 10..8
3554 *
3555 * 0000 0000
3556 */
3557 val = 0x00;
3558 if (info->params.flags & HDLC_FLAG_AUTO_DCD)
3559 val |= BIT5;
3560 write_reg(info, CHA + XBCH, val);
3561 if (info->params.flags & HDLC_FLAG_AUTO_CTS)
3562 irq_enable(info, CHA, IRQ_CTS);
3563
3564 /* MODE:03 RAC Receiver Active, 1=active */
3565 set_reg_bits(info, CHA + MODE, BIT3);
3566 enable_auxclk(info);
3567 if (info->params.flags & HDLC_FLAG_AUTO_CTS) {
3568 irq_enable(info, CHB, IRQ_CTS);
3569 /* PVR[3] 1=AUTO CTS active */
3570 set_reg_bits(info, CHA + PVR, BIT3);
3571 } else
3572 clear_reg_bits(info, CHA + PVR, BIT3);
3573 irq_enable(info, CHA,
3574 IRQ_RXEOM | IRQ_RXFIFO | IRQ_BREAK_ON | IRQ_RXTIME |
3575 IRQ_ALLSENT | IRQ_TXFIFO);
3576 issue_command(info, CHA, CMD_TXRESET + CMD_RXRESET);
3577 wait_command_complete(info, CHA);
3578 read_reg16(info, CHA + ISR); /* clear pending IRQs */
3579 }
3580
3581 /* Set the HDLC idle mode for the transmitter.
3582 */
3583 static void tx_set_idle(MGSLPC_INFO *info)
3584 {
3585 /* Note: ESCC2 only supports flags and one idle modes */
3586 if (info->idle_mode == HDLC_TXIDLE_FLAGS)
3587 set_reg_bits(info, CHA + CCR1, BIT3);
3588 else
3589 clear_reg_bits(info, CHA + CCR1, BIT3);
3590 }
3591
3592 /* get state of the V24 status (input) signals.
3593 */
3594 static void get_signals(MGSLPC_INFO *info)
3595 {
3596 unsigned char status = 0;
3597
3598 /* preserve RTS and DTR */
3599 info->serial_signals &= SerialSignal_RTS | SerialSignal_DTR;
3600
3601 if (read_reg(info, CHB + VSTR) & BIT7)
3602 info->serial_signals |= SerialSignal_DCD;
3603 if (read_reg(info, CHB + STAR) & BIT1)
3604 info->serial_signals |= SerialSignal_CTS;
3605
3606 status = read_reg(info, CHA + PVR);
3607 if (!(status & PVR_RI))
3608 info->serial_signals |= SerialSignal_RI;
3609 if (!(status & PVR_DSR))
3610 info->serial_signals |= SerialSignal_DSR;
3611 }
3612
3613 /* Set the state of RTS and DTR based on contents of
3614 * serial_signals member of device extension.
3615 */
3616 static void set_signals(MGSLPC_INFO *info)
3617 {
3618 unsigned char val;
3619
3620 val = read_reg(info, CHA + MODE);
3621 if (info->params.mode == MGSL_MODE_ASYNC) {
3622 if (info->serial_signals & SerialSignal_RTS)
3623 val &= ~BIT6;
3624 else
3625 val |= BIT6;
3626 } else {
3627 if (info->serial_signals & SerialSignal_RTS)
3628 val |= BIT2;
3629 else
3630 val &= ~BIT2;
3631 }
3632 write_reg(info, CHA + MODE, val);
3633
3634 if (info->serial_signals & SerialSignal_DTR)
3635 clear_reg_bits(info, CHA + PVR, PVR_DTR);
3636 else
3637 set_reg_bits(info, CHA + PVR, PVR_DTR);
3638 }
3639
3640 static void rx_reset_buffers(MGSLPC_INFO *info)
3641 {
3642 RXBUF *buf;
3643 int i;
3644
3645 info->rx_put = 0;
3646 info->rx_get = 0;
3647 info->rx_frame_count = 0;
3648 for (i=0 ; i < info->rx_buf_count ; i++) {
3649 buf = (RXBUF*)(info->rx_buf + (i * info->rx_buf_size));
3650 buf->status = buf->count = 0;
3651 }
3652 }
3653
3654 /* Attempt to return a received HDLC frame
3655 * Only frames received without errors are returned.
3656 *
3657 * Returns true if frame returned, otherwise false
3658 */
3659 static bool rx_get_frame(MGSLPC_INFO *info, struct tty_struct *tty)
3660 {
3661 unsigned short status;
3662 RXBUF *buf;
3663 unsigned int framesize = 0;
3664 unsigned long flags;
3665 bool return_frame = false;
3666
3667 if (info->rx_frame_count == 0)
3668 return false;
3669
3670 buf = (RXBUF*)(info->rx_buf + (info->rx_get * info->rx_buf_size));
3671
3672 status = buf->status;
3673
3674 /* 07 VFR 1=valid frame
3675 * 06 RDO 1=data overrun
3676 * 05 CRC 1=OK, 0=error
3677 * 04 RAB 1=frame aborted
3678 */
3679 if ((status & 0xf0) != 0xA0) {
3680 if (!(status & BIT7) || (status & BIT4))
3681 info->icount.rxabort++;
3682 else if (status & BIT6)
3683 info->icount.rxover++;
3684 else if (!(status & BIT5)) {
3685 info->icount.rxcrc++;
3686 if (info->params.crc_type & HDLC_CRC_RETURN_EX)
3687 return_frame = true;
3688 }
3689 framesize = 0;
3690 #if SYNCLINK_GENERIC_HDLC
3691 {
3692 info->netdev->stats.rx_errors++;
3693 info->netdev->stats.rx_frame_errors++;
3694 }
3695 #endif
3696 } else
3697 return_frame = true;
3698
3699 if (return_frame)
3700 framesize = buf->count;
3701
3702 if (debug_level >= DEBUG_LEVEL_BH)
3703 printk("%s(%d):rx_get_frame(%s) status=%04X size=%d\n",
3704 __FILE__, __LINE__, info->device_name, status, framesize);
3705
3706 if (debug_level >= DEBUG_LEVEL_DATA)
3707 trace_block(info, buf->data, framesize, 0);
3708
3709 if (framesize) {
3710 if ((info->params.crc_type & HDLC_CRC_RETURN_EX &&
3711 framesize+1 > info->max_frame_size) ||
3712 framesize > info->max_frame_size)
3713 info->icount.rxlong++;
3714 else {
3715 if (status & BIT5)
3716 info->icount.rxok++;
3717
3718 if (info->params.crc_type & HDLC_CRC_RETURN_EX) {
3719 *(buf->data + framesize) = status & BIT5 ? RX_OK:RX_CRC_ERROR;
3720 ++framesize;
3721 }
3722
3723 #if SYNCLINK_GENERIC_HDLC
3724 if (info->netcount)
3725 hdlcdev_rx(info, buf->data, framesize);
3726 else
3727 #endif
3728 ldisc_receive_buf(tty, buf->data, info->flag_buf, framesize);
3729 }
3730 }
3731
3732 spin_lock_irqsave(&info->lock, flags);
3733 buf->status = buf->count = 0;
3734 info->rx_frame_count--;
3735 info->rx_get++;
3736 if (info->rx_get >= info->rx_buf_count)
3737 info->rx_get = 0;
3738 spin_unlock_irqrestore(&info->lock, flags);
3739
3740 return true;
3741 }
3742
3743 static bool register_test(MGSLPC_INFO *info)
3744 {
3745 static unsigned char patterns[] =
3746 { 0x00, 0xff, 0xaa, 0x55, 0x69, 0x96, 0x0f };
3747 static unsigned int count = ARRAY_SIZE(patterns);
3748 unsigned int i;
3749 bool rc = true;
3750 unsigned long flags;
3751
3752 spin_lock_irqsave(&info->lock, flags);
3753 reset_device(info);
3754
3755 for (i = 0; i < count; i++) {
3756 write_reg(info, XAD1, patterns[i]);
3757 write_reg(info, XAD2, patterns[(i + 1) % count]);
3758 if ((read_reg(info, XAD1) != patterns[i]) ||
3759 (read_reg(info, XAD2) != patterns[(i + 1) % count])) {
3760 rc = false;
3761 break;
3762 }
3763 }
3764
3765 spin_unlock_irqrestore(&info->lock, flags);
3766 return rc;
3767 }
3768
3769 static bool irq_test(MGSLPC_INFO *info)
3770 {
3771 unsigned long end_time;
3772 unsigned long flags;
3773
3774 spin_lock_irqsave(&info->lock, flags);
3775 reset_device(info);
3776
3777 info->testing_irq = true;
3778 hdlc_mode(info);
3779
3780 info->irq_occurred = false;
3781
3782 /* init hdlc mode */
3783
3784 irq_enable(info, CHA, IRQ_TIMER);
3785 write_reg(info, CHA + TIMR, 0); /* 512 cycles */
3786 issue_command(info, CHA, CMD_START_TIMER);
3787
3788 spin_unlock_irqrestore(&info->lock, flags);
3789
3790 end_time=100;
3791 while(end_time-- && !info->irq_occurred) {
3792 msleep_interruptible(10);
3793 }
3794
3795 info->testing_irq = false;
3796
3797 spin_lock_irqsave(&info->lock, flags);
3798 reset_device(info);
3799 spin_unlock_irqrestore(&info->lock, flags);
3800
3801 return info->irq_occurred;
3802 }
3803
3804 static int adapter_test(MGSLPC_INFO *info)
3805 {
3806 if (!register_test(info)) {
3807 info->init_error = DiagStatus_AddressFailure;
3808 printk("%s(%d):Register test failure for device %s Addr=%04X\n",
3809 __FILE__, __LINE__, info->device_name, (unsigned short)(info->io_base));
3810 return -ENODEV;
3811 }
3812
3813 if (!irq_test(info)) {
3814 info->init_error = DiagStatus_IrqFailure;
3815 printk("%s(%d):Interrupt test failure for device %s IRQ=%d\n",
3816 __FILE__, __LINE__, info->device_name, (unsigned short)(info->irq_level));
3817 return -ENODEV;
3818 }
3819
3820 if (debug_level >= DEBUG_LEVEL_INFO)
3821 printk("%s(%d):device %s passed diagnostics\n",
3822 __FILE__, __LINE__, info->device_name);
3823 return 0;
3824 }
3825
3826 static void trace_block(MGSLPC_INFO *info,const char* data, int count, int xmit)
3827 {
3828 int i;
3829 int linecount;
3830 if (xmit)
3831 printk("%s tx data:\n", info->device_name);
3832 else
3833 printk("%s rx data:\n", info->device_name);
3834
3835 while(count) {
3836 if (count > 16)
3837 linecount = 16;
3838 else
3839 linecount = count;
3840
3841 for(i=0;i<linecount;i++)
3842 printk("%02X ", (unsigned char)data[i]);
3843 for(;i<17;i++)
3844 printk(" ");
3845 for(i=0;i<linecount;i++) {
3846 if (data[i]>=040 && data[i]<=0176)
3847 printk("%c", data[i]);
3848 else
3849 printk(".");
3850 }
3851 printk("\n");
3852
3853 data += linecount;
3854 count -= linecount;
3855 }
3856 }
3857
3858 /* HDLC frame time out
3859 * update stats and do tx completion processing
3860 */
3861 static void tx_timeout(unsigned long context)
3862 {
3863 MGSLPC_INFO *info = (MGSLPC_INFO*)context;
3864 unsigned long flags;
3865
3866 if (debug_level >= DEBUG_LEVEL_INFO)
3867 printk("%s(%d):tx_timeout(%s)\n",
3868 __FILE__, __LINE__, info->device_name);
3869 if (info->tx_active &&
3870 info->params.mode == MGSL_MODE_HDLC) {
3871 info->icount.txtimeout++;
3872 }
3873 spin_lock_irqsave(&info->lock, flags);
3874 info->tx_active = false;
3875 info->tx_count = info->tx_put = info->tx_get = 0;
3876
3877 spin_unlock_irqrestore(&info->lock, flags);
3878
3879 #if SYNCLINK_GENERIC_HDLC
3880 if (info->netcount)
3881 hdlcdev_tx_done(info);
3882 else
3883 #endif
3884 {
3885 struct tty_struct *tty = tty_port_tty_get(&info->port);
3886 bh_transmit(info, tty);
3887 tty_kref_put(tty);
3888 }
3889 }
3890
3891 #if SYNCLINK_GENERIC_HDLC
3892
3893 /**
3894 * called by generic HDLC layer when protocol selected (PPP, frame relay, etc.)
3895 * set encoding and frame check sequence (FCS) options
3896 *
3897 * dev pointer to network device structure
3898 * encoding serial encoding setting
3899 * parity FCS setting
3900 *
3901 * returns 0 if success, otherwise error code
3902 */
3903 static int hdlcdev_attach(struct net_device *dev, unsigned short encoding,
3904 unsigned short parity)
3905 {
3906 MGSLPC_INFO *info = dev_to_port(dev);
3907 struct tty_struct *tty;
3908 unsigned char new_encoding;
3909 unsigned short new_crctype;
3910
3911 /* return error if TTY interface open */
3912 if (info->port.count)
3913 return -EBUSY;
3914
3915 switch (encoding)
3916 {
3917 case ENCODING_NRZ: new_encoding = HDLC_ENCODING_NRZ; break;
3918 case ENCODING_NRZI: new_encoding = HDLC_ENCODING_NRZI_SPACE; break;
3919 case ENCODING_FM_MARK: new_encoding = HDLC_ENCODING_BIPHASE_MARK; break;
3920 case ENCODING_FM_SPACE: new_encoding = HDLC_ENCODING_BIPHASE_SPACE; break;
3921 case ENCODING_MANCHESTER: new_encoding = HDLC_ENCODING_BIPHASE_LEVEL; break;
3922 default: return -EINVAL;
3923 }
3924
3925 switch (parity)
3926 {
3927 case PARITY_NONE: new_crctype = HDLC_CRC_NONE; break;
3928 case PARITY_CRC16_PR1_CCITT: new_crctype = HDLC_CRC_16_CCITT; break;
3929 case PARITY_CRC32_PR1_CCITT: new_crctype = HDLC_CRC_32_CCITT; break;
3930 default: return -EINVAL;
3931 }
3932
3933 info->params.encoding = new_encoding;
3934 info->params.crc_type = new_crctype;
3935
3936 /* if network interface up, reprogram hardware */
3937 if (info->netcount) {
3938 tty = tty_port_tty_get(&info->port);
3939 mgslpc_program_hw(info, tty);
3940 tty_kref_put(tty);
3941 }
3942
3943 return 0;
3944 }
3945
3946 /**
3947 * called by generic HDLC layer to send frame
3948 *
3949 * skb socket buffer containing HDLC frame
3950 * dev pointer to network device structure
3951 */
3952 static netdev_tx_t hdlcdev_xmit(struct sk_buff *skb,
3953 struct net_device *dev)
3954 {
3955 MGSLPC_INFO *info = dev_to_port(dev);
3956 unsigned long flags;
3957
3958 if (debug_level >= DEBUG_LEVEL_INFO)
3959 printk(KERN_INFO "%s:hdlc_xmit(%s)\n", __FILE__, dev->name);
3960
3961 /* stop sending until this frame completes */
3962 netif_stop_queue(dev);
3963
3964 /* copy data to device buffers */
3965 skb_copy_from_linear_data(skb, info->tx_buf, skb->len);
3966 info->tx_get = 0;
3967 info->tx_put = info->tx_count = skb->len;
3968
3969 /* update network statistics */
3970 dev->stats.tx_packets++;
3971 dev->stats.tx_bytes += skb->len;
3972
3973 /* done with socket buffer, so free it */
3974 dev_kfree_skb(skb);
3975
3976 /* save start time for transmit timeout detection */
3977 dev->trans_start = jiffies;
3978
3979 /* start hardware transmitter if necessary */
3980 spin_lock_irqsave(&info->lock, flags);
3981 if (!info->tx_active) {
3982 struct tty_struct *tty = tty_port_tty_get(&info->port);
3983 tx_start(info, tty);
3984 tty_kref_put(tty);
3985 }
3986 spin_unlock_irqrestore(&info->lock, flags);
3987
3988 return NETDEV_TX_OK;
3989 }
3990
3991 /**
3992 * called by network layer when interface enabled
3993 * claim resources and initialize hardware
3994 *
3995 * dev pointer to network device structure
3996 *
3997 * returns 0 if success, otherwise error code
3998 */
3999 static int hdlcdev_open(struct net_device *dev)
4000 {
4001 MGSLPC_INFO *info = dev_to_port(dev);
4002 struct tty_struct *tty;
4003 int rc;
4004 unsigned long flags;
4005
4006 if (debug_level >= DEBUG_LEVEL_INFO)
4007 printk("%s:hdlcdev_open(%s)\n", __FILE__, dev->name);
4008
4009 /* generic HDLC layer open processing */
4010 rc = hdlc_open(dev);
4011 if (rc != 0)
4012 return rc;
4013
4014 /* arbitrate between network and tty opens */
4015 spin_lock_irqsave(&info->netlock, flags);
4016 if (info->port.count != 0 || info->netcount != 0) {
4017 printk(KERN_WARNING "%s: hdlc_open returning busy\n", dev->name);
4018 spin_unlock_irqrestore(&info->netlock, flags);
4019 return -EBUSY;
4020 }
4021 info->netcount=1;
4022 spin_unlock_irqrestore(&info->netlock, flags);
4023
4024 tty = tty_port_tty_get(&info->port);
4025 /* claim resources and init adapter */
4026 rc = startup(info, tty);
4027 if (rc != 0) {
4028 tty_kref_put(tty);
4029 spin_lock_irqsave(&info->netlock, flags);
4030 info->netcount=0;
4031 spin_unlock_irqrestore(&info->netlock, flags);
4032 return rc;
4033 }
4034 /* assert RTS and DTR, apply hardware settings */
4035 info->serial_signals |= SerialSignal_RTS | SerialSignal_DTR;
4036 mgslpc_program_hw(info, tty);
4037 tty_kref_put(tty);
4038
4039 /* enable network layer transmit */
4040 dev->trans_start = jiffies;
4041 netif_start_queue(dev);
4042
4043 /* inform generic HDLC layer of current DCD status */
4044 spin_lock_irqsave(&info->lock, flags);
4045 get_signals(info);
4046 spin_unlock_irqrestore(&info->lock, flags);
4047 if (info->serial_signals & SerialSignal_DCD)
4048 netif_carrier_on(dev);
4049 else
4050 netif_carrier_off(dev);
4051 return 0;
4052 }
4053
4054 /**
4055 * called by network layer when interface is disabled
4056 * shutdown hardware and release resources
4057 *
4058 * dev pointer to network device structure
4059 *
4060 * returns 0 if success, otherwise error code
4061 */
4062 static int hdlcdev_close(struct net_device *dev)
4063 {
4064 MGSLPC_INFO *info = dev_to_port(dev);
4065 struct tty_struct *tty = tty_port_tty_get(&info->port);
4066 unsigned long flags;
4067
4068 if (debug_level >= DEBUG_LEVEL_INFO)
4069 printk("%s:hdlcdev_close(%s)\n", __FILE__, dev->name);
4070
4071 netif_stop_queue(dev);
4072
4073 /* shutdown adapter and release resources */
4074 shutdown(info, tty);
4075 tty_kref_put(tty);
4076 hdlc_close(dev);
4077
4078 spin_lock_irqsave(&info->netlock, flags);
4079 info->netcount=0;
4080 spin_unlock_irqrestore(&info->netlock, flags);
4081
4082 return 0;
4083 }
4084
4085 /**
4086 * called by network layer to process IOCTL call to network device
4087 *
4088 * dev pointer to network device structure
4089 * ifr pointer to network interface request structure
4090 * cmd IOCTL command code
4091 *
4092 * returns 0 if success, otherwise error code
4093 */
4094 static int hdlcdev_ioctl(struct net_device *dev, struct ifreq *ifr, int cmd)
4095 {
4096 const size_t size = sizeof(sync_serial_settings);
4097 sync_serial_settings new_line;
4098 sync_serial_settings __user *line = ifr->ifr_settings.ifs_ifsu.sync;
4099 MGSLPC_INFO *info = dev_to_port(dev);
4100 unsigned int flags;
4101
4102 if (debug_level >= DEBUG_LEVEL_INFO)
4103 printk("%s:hdlcdev_ioctl(%s)\n", __FILE__, dev->name);
4104
4105 /* return error if TTY interface open */
4106 if (info->port.count)
4107 return -EBUSY;
4108
4109 if (cmd != SIOCWANDEV)
4110 return hdlc_ioctl(dev, ifr, cmd);
4111
4112 memset(&new_line, 0, size);
4113
4114 switch(ifr->ifr_settings.type) {
4115 case IF_GET_IFACE: /* return current sync_serial_settings */
4116
4117 ifr->ifr_settings.type = IF_IFACE_SYNC_SERIAL;
4118 if (ifr->ifr_settings.size < size) {
4119 ifr->ifr_settings.size = size; /* data size wanted */
4120 return -ENOBUFS;
4121 }
4122
4123 flags = info->params.flags & (HDLC_FLAG_RXC_RXCPIN | HDLC_FLAG_RXC_DPLL |
4124 HDLC_FLAG_RXC_BRG | HDLC_FLAG_RXC_TXCPIN |
4125 HDLC_FLAG_TXC_TXCPIN | HDLC_FLAG_TXC_DPLL |
4126 HDLC_FLAG_TXC_BRG | HDLC_FLAG_TXC_RXCPIN);
4127
4128 switch (flags){
4129 case (HDLC_FLAG_RXC_RXCPIN | HDLC_FLAG_TXC_TXCPIN): new_line.clock_type = CLOCK_EXT; break;
4130 case (HDLC_FLAG_RXC_BRG | HDLC_FLAG_TXC_BRG): new_line.clock_type = CLOCK_INT; break;
4131 case (HDLC_FLAG_RXC_RXCPIN | HDLC_FLAG_TXC_BRG): new_line.clock_type = CLOCK_TXINT; break;
4132 case (HDLC_FLAG_RXC_RXCPIN | HDLC_FLAG_TXC_RXCPIN): new_line.clock_type = CLOCK_TXFROMRX; break;
4133 default: new_line.clock_type = CLOCK_DEFAULT;
4134 }
4135
4136 new_line.clock_rate = info->params.clock_speed;
4137 new_line.loopback = info->params.loopback ? 1:0;
4138
4139 if (copy_to_user(line, &new_line, size))
4140 return -EFAULT;
4141 return 0;
4142
4143 case IF_IFACE_SYNC_SERIAL: /* set sync_serial_settings */
4144
4145 if(!capable(CAP_NET_ADMIN))
4146 return -EPERM;
4147 if (copy_from_user(&new_line, line, size))
4148 return -EFAULT;
4149
4150 switch (new_line.clock_type)
4151 {
4152 case CLOCK_EXT: flags = HDLC_FLAG_RXC_RXCPIN | HDLC_FLAG_TXC_TXCPIN; break;
4153 case CLOCK_TXFROMRX: flags = HDLC_FLAG_RXC_RXCPIN | HDLC_FLAG_TXC_RXCPIN; break;
4154 case CLOCK_INT: flags = HDLC_FLAG_RXC_BRG | HDLC_FLAG_TXC_BRG; break;
4155 case CLOCK_TXINT: flags = HDLC_FLAG_RXC_RXCPIN | HDLC_FLAG_TXC_BRG; break;
4156 case CLOCK_DEFAULT: flags = info->params.flags &
4157 (HDLC_FLAG_RXC_RXCPIN | HDLC_FLAG_RXC_DPLL |
4158 HDLC_FLAG_RXC_BRG | HDLC_FLAG_RXC_TXCPIN |
4159 HDLC_FLAG_TXC_TXCPIN | HDLC_FLAG_TXC_DPLL |
4160 HDLC_FLAG_TXC_BRG | HDLC_FLAG_TXC_RXCPIN); break;
4161 default: return -EINVAL;
4162 }
4163
4164 if (new_line.loopback != 0 && new_line.loopback != 1)
4165 return -EINVAL;
4166
4167 info->params.flags &= ~(HDLC_FLAG_RXC_RXCPIN | HDLC_FLAG_RXC_DPLL |
4168 HDLC_FLAG_RXC_BRG | HDLC_FLAG_RXC_TXCPIN |
4169 HDLC_FLAG_TXC_TXCPIN | HDLC_FLAG_TXC_DPLL |
4170 HDLC_FLAG_TXC_BRG | HDLC_FLAG_TXC_RXCPIN);
4171 info->params.flags |= flags;
4172
4173 info->params.loopback = new_line.loopback;
4174
4175 if (flags & (HDLC_FLAG_RXC_BRG | HDLC_FLAG_TXC_BRG))
4176 info->params.clock_speed = new_line.clock_rate;
4177 else
4178 info->params.clock_speed = 0;
4179
4180 /* if network interface up, reprogram hardware */
4181 if (info->netcount) {
4182 struct tty_struct *tty = tty_port_tty_get(&info->port);
4183 mgslpc_program_hw(info, tty);
4184 tty_kref_put(tty);
4185 }
4186 return 0;
4187
4188 default:
4189 return hdlc_ioctl(dev, ifr, cmd);
4190 }
4191 }
4192
4193 /**
4194 * called by network layer when transmit timeout is detected
4195 *
4196 * dev pointer to network device structure
4197 */
4198 static void hdlcdev_tx_timeout(struct net_device *dev)
4199 {
4200 MGSLPC_INFO *info = dev_to_port(dev);
4201 unsigned long flags;
4202
4203 if (debug_level >= DEBUG_LEVEL_INFO)
4204 printk("hdlcdev_tx_timeout(%s)\n", dev->name);
4205
4206 dev->stats.tx_errors++;
4207 dev->stats.tx_aborted_errors++;
4208
4209 spin_lock_irqsave(&info->lock, flags);
4210 tx_stop(info);
4211 spin_unlock_irqrestore(&info->lock, flags);
4212
4213 netif_wake_queue(dev);
4214 }
4215
4216 /**
4217 * called by device driver when transmit completes
4218 * reenable network layer transmit if stopped
4219 *
4220 * info pointer to device instance information
4221 */
4222 static void hdlcdev_tx_done(MGSLPC_INFO *info)
4223 {
4224 if (netif_queue_stopped(info->netdev))
4225 netif_wake_queue(info->netdev);
4226 }
4227
4228 /**
4229 * called by device driver when frame received
4230 * pass frame to network layer
4231 *
4232 * info pointer to device instance information
4233 * buf pointer to buffer contianing frame data
4234 * size count of data bytes in buf
4235 */
4236 static void hdlcdev_rx(MGSLPC_INFO *info, char *buf, int size)
4237 {
4238 struct sk_buff *skb = dev_alloc_skb(size);
4239 struct net_device *dev = info->netdev;
4240
4241 if (debug_level >= DEBUG_LEVEL_INFO)
4242 printk("hdlcdev_rx(%s)\n", dev->name);
4243
4244 if (skb == NULL) {
4245 printk(KERN_NOTICE "%s: can't alloc skb, dropping packet\n", dev->name);
4246 dev->stats.rx_dropped++;
4247 return;
4248 }
4249
4250 memcpy(skb_put(skb, size), buf, size);
4251
4252 skb->protocol = hdlc_type_trans(skb, dev);
4253
4254 dev->stats.rx_packets++;
4255 dev->stats.rx_bytes += size;
4256
4257 netif_rx(skb);
4258 }
4259
4260 static const struct net_device_ops hdlcdev_ops = {
4261 .ndo_open = hdlcdev_open,
4262 .ndo_stop = hdlcdev_close,
4263 .ndo_change_mtu = hdlc_change_mtu,
4264 .ndo_start_xmit = hdlc_start_xmit,
4265 .ndo_do_ioctl = hdlcdev_ioctl,
4266 .ndo_tx_timeout = hdlcdev_tx_timeout,
4267 };
4268
4269 /**
4270 * called by device driver when adding device instance
4271 * do generic HDLC initialization
4272 *
4273 * info pointer to device instance information
4274 *
4275 * returns 0 if success, otherwise error code
4276 */
4277 static int hdlcdev_init(MGSLPC_INFO *info)
4278 {
4279 int rc;
4280 struct net_device *dev;
4281 hdlc_device *hdlc;
4282
4283 /* allocate and initialize network and HDLC layer objects */
4284
4285 dev = alloc_hdlcdev(info);
4286 if (dev == NULL) {
4287 printk(KERN_ERR "%s:hdlc device allocation failure\n", __FILE__);
4288 return -ENOMEM;
4289 }
4290
4291 /* for network layer reporting purposes only */
4292 dev->base_addr = info->io_base;
4293 dev->irq = info->irq_level;
4294
4295 /* network layer callbacks and settings */
4296 dev->netdev_ops = &hdlcdev_ops;
4297 dev->watchdog_timeo = 10 * HZ;
4298 dev->tx_queue_len = 50;
4299
4300 /* generic HDLC layer callbacks and settings */
4301 hdlc = dev_to_hdlc(dev);
4302 hdlc->attach = hdlcdev_attach;
4303 hdlc->xmit = hdlcdev_xmit;
4304
4305 /* register objects with HDLC layer */
4306 rc = register_hdlc_device(dev);
4307 if (rc) {
4308 printk(KERN_WARNING "%s:unable to register hdlc device\n", __FILE__);
4309 free_netdev(dev);
4310 return rc;
4311 }
4312
4313 info->netdev = dev;
4314 return 0;
4315 }
4316
4317 /**
4318 * called by device driver when removing device instance
4319 * do generic HDLC cleanup
4320 *
4321 * info pointer to device instance information
4322 */
4323 static void hdlcdev_exit(MGSLPC_INFO *info)
4324 {
4325 unregister_hdlc_device(info->netdev);
4326 free_netdev(info->netdev);
4327 info->netdev = NULL;
4328 }
4329
4330 #endif /* CONFIG_HDLC */
4331
Linux with added FPC-III support