?  search:
summary | log | graphiclog1 | graphiclog2 | commit | commitdiff | tree | refs | edit | fork
blame | history | raw | HEAD
Merge tag 'locks-v3.16-2' of git://git.samba.org/jlayton/linux
[linux/fpc-iii.git] / arch / arm / mach-at91 / at91sam9263_devices.c
blob309390d8e2f8cebe71c09d5876d4dc89a20724f5
1 /*
2 * arch/arm/mach-at91/at91sam9263_devices.c
3 *
4 * Copyright (C) 2007 Atmel Corporation.
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
10 *
11 */
12 #include <asm/mach/arch.h>
13 #include <asm/mach/map.h>
14
15 #include <linux/dma-mapping.h>
16 #include <linux/gpio.h>
17 #include <linux/platform_device.h>
18 #include <linux/i2c-gpio.h>
19
20 #include <linux/fb.h>
21 #include <video/atmel_lcdc.h>
22
23 #include <mach/at91sam9263.h>
24 #include <mach/at91sam9263_matrix.h>
25 #include <mach/at91_matrix.h>
26 #include <mach/at91sam9_smc.h>
27 #include <mach/hardware.h>
28
29 #include "board.h"
30 #include "generic.h"
31 #include "gpio.h"
32
33
34 /* --------------------------------------------------------------------
35 * USB Host
36 * -------------------------------------------------------------------- */
37
38 #if defined(CONFIG_USB_OHCI_HCD) || defined(CONFIG_USB_OHCI_HCD_MODULE)
39 static u64 ohci_dmamask = DMA_BIT_MASK(32);
40 static struct at91_usbh_data usbh_data;
41
42 static struct resource usbh_resources[] = {
43 [0] = {
44 .start = AT91SAM9263_UHP_BASE,
45 .end = AT91SAM9263_UHP_BASE + SZ_1M - 1,
46 .flags = IORESOURCE_MEM,
47 },
48 [1] = {
49 .start = NR_IRQS_LEGACY + AT91SAM9263_ID_UHP,
50 .end = NR_IRQS_LEGACY + AT91SAM9263_ID_UHP,
51 .flags = IORESOURCE_IRQ,
52 },
53 };
54
55 static struct platform_device at91_usbh_device = {
56 .name = "at91_ohci",
57 .id = -1,
58 .dev = {
59 .dma_mask = &ohci_dmamask,
60 .coherent_dma_mask = DMA_BIT_MASK(32),
61 .platform_data = &usbh_data,
62 },
63 .resource = usbh_resources,
64 .num_resources = ARRAY_SIZE(usbh_resources),
65 };
66
67 void __init at91_add_device_usbh(struct at91_usbh_data *data)
68 {
69 int i;
70
71 if (!data)
72 return;
73
74 /* Enable VBus control for UHP ports */
75 for (i = 0; i < data->ports; i++) {
76 if (gpio_is_valid(data->vbus_pin[i]))
77 at91_set_gpio_output(data->vbus_pin[i],
78 data->vbus_pin_active_low[i]);
79 }
80
81 /* Enable overcurrent notification */
82 for (i = 0; i < data->ports; i++) {
83 if (gpio_is_valid(data->overcurrent_pin[i]))
84 at91_set_gpio_input(data->overcurrent_pin[i], 1);
85 }
86
87 usbh_data = *data;
88 platform_device_register(&at91_usbh_device);
89 }
90 #else
91 void __init at91_add_device_usbh(struct at91_usbh_data *data) {}
92 #endif
93
94
95 /* --------------------------------------------------------------------
96 * USB Device (Gadget)
97 * -------------------------------------------------------------------- */
98
99 #if defined(CONFIG_USB_AT91) || defined(CONFIG_USB_AT91_MODULE)
100 static struct at91_udc_data udc_data;
101
102 static struct resource udc_resources[] = {
103 [0] = {
104 .start = AT91SAM9263_BASE_UDP,
105 .end = AT91SAM9263_BASE_UDP + SZ_16K - 1,
106 .flags = IORESOURCE_MEM,
107 },
108 [1] = {
109 .start = NR_IRQS_LEGACY + AT91SAM9263_ID_UDP,
110 .end = NR_IRQS_LEGACY + AT91SAM9263_ID_UDP,
111 .flags = IORESOURCE_IRQ,
112 },
113 };
114
115 static struct platform_device at91_udc_device = {
116 .name = "at91_udc",
117 .id = -1,
118 .dev = {
119 .platform_data = &udc_data,
120 },
121 .resource = udc_resources,
122 .num_resources = ARRAY_SIZE(udc_resources),
123 };
124
125 void __init at91_add_device_udc(struct at91_udc_data *data)
126 {
127 if (!data)
128 return;
129
130 if (gpio_is_valid(data->vbus_pin)) {
131 at91_set_gpio_input(data->vbus_pin, 0);
132 at91_set_deglitch(data->vbus_pin, 1);
133 }
134
135 /* Pullup pin is handled internally by USB device peripheral */
136
137 udc_data = *data;
138 platform_device_register(&at91_udc_device);
139 }
140 #else
141 void __init at91_add_device_udc(struct at91_udc_data *data) {}
142 #endif
143
144
145 /* --------------------------------------------------------------------
146 * Ethernet
147 * -------------------------------------------------------------------- */
148
149 #if defined(CONFIG_MACB) || defined(CONFIG_MACB_MODULE)
150 static u64 eth_dmamask = DMA_BIT_MASK(32);
151 static struct macb_platform_data eth_data;
152
153 static struct resource eth_resources[] = {
154 [0] = {
155 .start = AT91SAM9263_BASE_EMAC,
156 .end = AT91SAM9263_BASE_EMAC + SZ_16K - 1,
157 .flags = IORESOURCE_MEM,
158 },
159 [1] = {
160 .start = NR_IRQS_LEGACY + AT91SAM9263_ID_EMAC,
161 .end = NR_IRQS_LEGACY + AT91SAM9263_ID_EMAC,
162 .flags = IORESOURCE_IRQ,
163 },
164 };
165
166 static struct platform_device at91sam9263_eth_device = {
167 .name = "macb",
168 .id = -1,
169 .dev = {
170 .dma_mask = &eth_dmamask,
171 .coherent_dma_mask = DMA_BIT_MASK(32),
172 .platform_data = &eth_data,
173 },
174 .resource = eth_resources,
175 .num_resources = ARRAY_SIZE(eth_resources),
176 };
177
178 void __init at91_add_device_eth(struct macb_platform_data *data)
179 {
180 if (!data)
181 return;
182
183 if (gpio_is_valid(data->phy_irq_pin)) {
184 at91_set_gpio_input(data->phy_irq_pin, 0);
185 at91_set_deglitch(data->phy_irq_pin, 1);
186 }
187
188 /* Pins used for MII and RMII */
189 at91_set_A_periph(AT91_PIN_PE21, 0); /* ETXCK_EREFCK */
190 at91_set_B_periph(AT91_PIN_PC25, 0); /* ERXDV */
191 at91_set_A_periph(AT91_PIN_PE25, 0); /* ERX0 */
192 at91_set_A_periph(AT91_PIN_PE26, 0); /* ERX1 */
193 at91_set_A_periph(AT91_PIN_PE27, 0); /* ERXER */
194 at91_set_A_periph(AT91_PIN_PE28, 0); /* ETXEN */
195 at91_set_A_periph(AT91_PIN_PE23, 0); /* ETX0 */
196 at91_set_A_periph(AT91_PIN_PE24, 0); /* ETX1 */
197 at91_set_A_periph(AT91_PIN_PE30, 0); /* EMDIO */
198 at91_set_A_periph(AT91_PIN_PE29, 0); /* EMDC */
199
200 if (!data->is_rmii) {
201 at91_set_A_periph(AT91_PIN_PE22, 0); /* ECRS */
202 at91_set_B_periph(AT91_PIN_PC26, 0); /* ECOL */
203 at91_set_B_periph(AT91_PIN_PC22, 0); /* ERX2 */
204 at91_set_B_periph(AT91_PIN_PC23, 0); /* ERX3 */
205 at91_set_B_periph(AT91_PIN_PC27, 0); /* ERXCK */
206 at91_set_B_periph(AT91_PIN_PC20, 0); /* ETX2 */
207 at91_set_B_periph(AT91_PIN_PC21, 0); /* ETX3 */
208 at91_set_B_periph(AT91_PIN_PC24, 0); /* ETXER */
209 }
210
211 eth_data = *data;
212 platform_device_register(&at91sam9263_eth_device);
213 }
214 #else
215 void __init at91_add_device_eth(struct macb_platform_data *data) {}
216 #endif
217
218
219 /* --------------------------------------------------------------------
220 * MMC / SD
221 * -------------------------------------------------------------------- */
222
223 #if IS_ENABLED(CONFIG_MMC_ATMELMCI)
224 static u64 mmc_dmamask = DMA_BIT_MASK(32);
225 static struct mci_platform_data mmc0_data, mmc1_data;
226
227 static struct resource mmc0_resources[] = {
228 [0] = {
229 .start = AT91SAM9263_BASE_MCI0,
230 .end = AT91SAM9263_BASE_MCI0 + SZ_16K - 1,
231 .flags = IORESOURCE_MEM,
232 },
233 [1] = {
234 .start = NR_IRQS_LEGACY + AT91SAM9263_ID_MCI0,
235 .end = NR_IRQS_LEGACY + AT91SAM9263_ID_MCI0,
236 .flags = IORESOURCE_IRQ,
237 },
238 };
239
240 static struct platform_device at91sam9263_mmc0_device = {
241 .name = "atmel_mci",
242 .id = 0,
243 .dev = {
244 .dma_mask = &mmc_dmamask,
245 .coherent_dma_mask = DMA_BIT_MASK(32),
246 .platform_data = &mmc0_data,
247 },
248 .resource = mmc0_resources,
249 .num_resources = ARRAY_SIZE(mmc0_resources),
250 };
251
252 static struct resource mmc1_resources[] = {
253 [0] = {
254 .start = AT91SAM9263_BASE_MCI1,
255 .end = AT91SAM9263_BASE_MCI1 + SZ_16K - 1,
256 .flags = IORESOURCE_MEM,
257 },
258 [1] = {
259 .start = NR_IRQS_LEGACY + AT91SAM9263_ID_MCI1,
260 .end = NR_IRQS_LEGACY + AT91SAM9263_ID_MCI1,
261 .flags = IORESOURCE_IRQ,
262 },
263 };
264
265 static struct platform_device at91sam9263_mmc1_device = {
266 .name = "atmel_mci",
267 .id = 1,
268 .dev = {
269 .dma_mask = &mmc_dmamask,
270 .coherent_dma_mask = DMA_BIT_MASK(32),
271 .platform_data = &mmc1_data,
272 },
273 .resource = mmc1_resources,
274 .num_resources = ARRAY_SIZE(mmc1_resources),
275 };
276
277 void __init at91_add_device_mci(short mmc_id, struct mci_platform_data *data)
278 {
279 unsigned int i;
280 unsigned int slot_count = 0;
281
282 if (!data)
283 return;
284
285 for (i = 0; i < ATMCI_MAX_NR_SLOTS; i++) {
286
287 if (!data->slot[i].bus_width)
288 continue;
289
290 /* input/irq */
291 if (gpio_is_valid(data->slot[i].detect_pin)) {
292 at91_set_gpio_input(data->slot[i].detect_pin,
293 1);
294 at91_set_deglitch(data->slot[i].detect_pin,
295 1);
296 }
297 if (gpio_is_valid(data->slot[i].wp_pin))
298 at91_set_gpio_input(data->slot[i].wp_pin, 1);
299
300 if (mmc_id == 0) { /* MCI0 */
301 switch (i) {
302 case 0: /* slot A */
303 /* CMD */
304 at91_set_A_periph(AT91_PIN_PA1, 1);
305 /* DAT0, maybe DAT1..DAT3 */
306 at91_set_A_periph(AT91_PIN_PA0, 1);
307 if (data->slot[i].bus_width == 4) {
308 at91_set_A_periph(AT91_PIN_PA3, 1);
309 at91_set_A_periph(AT91_PIN_PA4, 1);
310 at91_set_A_periph(AT91_PIN_PA5, 1);
311 }
312 slot_count++;
313 break;
314 case 1: /* slot B */
315 /* CMD */
316 at91_set_A_periph(AT91_PIN_PA16, 1);
317 /* DAT0, maybe DAT1..DAT3 */
318 at91_set_A_periph(AT91_PIN_PA17, 1);
319 if (data->slot[i].bus_width == 4) {
320 at91_set_A_periph(AT91_PIN_PA18, 1);
321 at91_set_A_periph(AT91_PIN_PA19, 1);
322 at91_set_A_periph(AT91_PIN_PA20, 1);
323 }
324 slot_count++;
325 break;
326 default:
327 printk(KERN_ERR
328 "AT91: SD/MMC slot %d not available\n", i);
329 break;
330 }
331 if (slot_count) {
332 /* CLK */
333 at91_set_A_periph(AT91_PIN_PA12, 0);
334
335 mmc0_data = *data;
336 platform_device_register(&at91sam9263_mmc0_device);
337 }
338 } else if (mmc_id == 1) { /* MCI1 */
339 switch (i) {
340 case 0: /* slot A */
341 /* CMD */
342 at91_set_A_periph(AT91_PIN_PA7, 1);
343 /* DAT0, maybe DAT1..DAT3 */
344 at91_set_A_periph(AT91_PIN_PA8, 1);
345 if (data->slot[i].bus_width == 4) {
346 at91_set_A_periph(AT91_PIN_PA9, 1);
347 at91_set_A_periph(AT91_PIN_PA10, 1);
348 at91_set_A_periph(AT91_PIN_PA11, 1);
349 }
350 slot_count++;
351 break;
352 case 1: /* slot B */
353 /* CMD */
354 at91_set_A_periph(AT91_PIN_PA21, 1);
355 /* DAT0, maybe DAT1..DAT3 */
356 at91_set_A_periph(AT91_PIN_PA22, 1);
357 if (data->slot[i].bus_width == 4) {
358 at91_set_A_periph(AT91_PIN_PA23, 1);
359 at91_set_A_periph(AT91_PIN_PA24, 1);
360 at91_set_A_periph(AT91_PIN_PA25, 1);
361 }
362 slot_count++;
363 break;
364 default:
365 printk(KERN_ERR
366 "AT91: SD/MMC slot %d not available\n", i);
367 break;
368 }
369 if (slot_count) {
370 /* CLK */
371 at91_set_A_periph(AT91_PIN_PA6, 0);
372
373 mmc1_data = *data;
374 platform_device_register(&at91sam9263_mmc1_device);
375 }
376 }
377 }
378 }
379 #else
380 void __init at91_add_device_mci(short mmc_id, struct mci_platform_data *data) {}
381 #endif
382
383 /* --------------------------------------------------------------------
384 * Compact Flash (PCMCIA or IDE)
385 * -------------------------------------------------------------------- */
386
387 #if defined(CONFIG_PATA_AT91) || defined(CONFIG_PATA_AT91_MODULE) || \
388 defined(CONFIG_AT91_CF) || defined(CONFIG_AT91_CF_MODULE)
389
390 static struct at91_cf_data cf0_data;
391
392 static struct resource cf0_resources[] = {
393 [0] = {
394 .start = AT91_CHIPSELECT_4,
395 .end = AT91_CHIPSELECT_4 + SZ_256M - 1,
396 .flags = IORESOURCE_MEM | IORESOURCE_MEM_8AND16BIT,
397 }
398 };
399
400 static struct platform_device cf0_device = {
401 .id = 0,
402 .dev = {
403 .platform_data = &cf0_data,
404 },
405 .resource = cf0_resources,
406 .num_resources = ARRAY_SIZE(cf0_resources),
407 };
408
409 static struct at91_cf_data cf1_data;
410
411 static struct resource cf1_resources[] = {
412 [0] = {
413 .start = AT91_CHIPSELECT_5,
414 .end = AT91_CHIPSELECT_5 + SZ_256M - 1,
415 .flags = IORESOURCE_MEM | IORESOURCE_MEM_8AND16BIT,
416 }
417 };
418
419 static struct platform_device cf1_device = {
420 .id = 1,
421 .dev = {
422 .platform_data = &cf1_data,
423 },
424 .resource = cf1_resources,
425 .num_resources = ARRAY_SIZE(cf1_resources),
426 };
427
428 void __init at91_add_device_cf(struct at91_cf_data *data)
429 {
430 unsigned long ebi0_csa;
431 struct platform_device *pdev;
432
433 if (!data)
434 return;
435
436 /*
437 * assign CS4 or CS5 to SMC with Compact Flash logic support,
438 * we assume SMC timings are configured by board code,
439 * except True IDE where timings are controlled by driver
440 */
441 ebi0_csa = at91_matrix_read(AT91_MATRIX_EBI0CSA);
442 switch (data->chipselect) {
443 case 4:
444 at91_set_A_periph(AT91_PIN_PD6, 0); /* EBI0_NCS4/CFCS0 */
445 ebi0_csa |= AT91_MATRIX_EBI0_CS4A_SMC_CF1;
446 cf0_data = *data;
447 pdev = &cf0_device;
448 break;
449 case 5:
450 at91_set_A_periph(AT91_PIN_PD7, 0); /* EBI0_NCS5/CFCS1 */
451 ebi0_csa |= AT91_MATRIX_EBI0_CS5A_SMC_CF2;
452 cf1_data = *data;
453 pdev = &cf1_device;
454 break;
455 default:
456 printk(KERN_ERR "AT91 CF: bad chip-select requested (%u)\n",
457 data->chipselect);
458 return;
459 }
460 at91_matrix_write(AT91_MATRIX_EBI0CSA, ebi0_csa);
461
462 if (gpio_is_valid(data->det_pin)) {
463 at91_set_gpio_input(data->det_pin, 1);
464 at91_set_deglitch(data->det_pin, 1);
465 }
466
467 if (gpio_is_valid(data->irq_pin)) {
468 at91_set_gpio_input(data->irq_pin, 1);
469 at91_set_deglitch(data->irq_pin, 1);
470 }
471
472 if (gpio_is_valid(data->vcc_pin))
473 /* initially off */
474 at91_set_gpio_output(data->vcc_pin, 0);
475
476 /* enable EBI controlled pins */
477 at91_set_A_periph(AT91_PIN_PD5, 1); /* NWAIT */
478 at91_set_A_periph(AT91_PIN_PD8, 0); /* CFCE1 */
479 at91_set_A_periph(AT91_PIN_PD9, 0); /* CFCE2 */
480 at91_set_A_periph(AT91_PIN_PD14, 0); /* CFNRW */
481
482 pdev->name = (data->flags & AT91_CF_TRUE_IDE) ? "pata_at91" : "at91_cf";
483 platform_device_register(pdev);
484 }
485 #else
486 void __init at91_add_device_cf(struct at91_cf_data *data) {}
487 #endif
488
489 /* --------------------------------------------------------------------
490 * NAND / SmartMedia
491 * -------------------------------------------------------------------- */
492
493 #if defined(CONFIG_MTD_NAND_ATMEL) || defined(CONFIG_MTD_NAND_ATMEL_MODULE)
494 static struct atmel_nand_data nand_data;
495
496 #define NAND_BASE AT91_CHIPSELECT_3
497
498 static struct resource nand_resources[] = {
499 [0] = {
500 .start = NAND_BASE,
501 .end = NAND_BASE + SZ_256M - 1,
502 .flags = IORESOURCE_MEM,
503 },
504 [1] = {
505 .start = AT91SAM9263_BASE_ECC0,
506 .end = AT91SAM9263_BASE_ECC0 + SZ_512 - 1,
507 .flags = IORESOURCE_MEM,
508 }
509 };
510
511 static struct platform_device at91sam9263_nand_device = {
512 .name = "atmel_nand",
513 .id = -1,
514 .dev = {
515 .platform_data = &nand_data,
516 },
517 .resource = nand_resources,
518 .num_resources = ARRAY_SIZE(nand_resources),
519 };
520
521 void __init at91_add_device_nand(struct atmel_nand_data *data)
522 {
523 unsigned long csa;
524
525 if (!data)
526 return;
527
528 csa = at91_matrix_read(AT91_MATRIX_EBI0CSA);
529 at91_matrix_write(AT91_MATRIX_EBI0CSA, csa | AT91_MATRIX_EBI0_CS3A_SMC_SMARTMEDIA);
530
531 /* enable pin */
532 if (gpio_is_valid(data->enable_pin))
533 at91_set_gpio_output(data->enable_pin, 1);
534
535 /* ready/busy pin */
536 if (gpio_is_valid(data->rdy_pin))
537 at91_set_gpio_input(data->rdy_pin, 1);
538
539 /* card detect pin */
540 if (gpio_is_valid(data->det_pin))
541 at91_set_gpio_input(data->det_pin, 1);
542
543 nand_data = *data;
544 platform_device_register(&at91sam9263_nand_device);
545 }
546 #else
547 void __init at91_add_device_nand(struct atmel_nand_data *data) {}
548 #endif
549
550
551 /* --------------------------------------------------------------------
552 * TWI (i2c)
553 * -------------------------------------------------------------------- */
554
555 /*
556 * Prefer the GPIO code since the TWI controller isn't robust
557 * (gets overruns and underruns under load) and can only issue
558 * repeated STARTs in one scenario (the driver doesn't yet handle them).
559 */
560 #if defined(CONFIG_I2C_GPIO) || defined(CONFIG_I2C_GPIO_MODULE)
561
562 static struct i2c_gpio_platform_data pdata = {
563 .sda_pin = AT91_PIN_PB4,
564 .sda_is_open_drain = 1,
565 .scl_pin = AT91_PIN_PB5,
566 .scl_is_open_drain = 1,
567 .udelay = 2, /* ~100 kHz */
568 };
569
570 static struct platform_device at91sam9263_twi_device = {
571 .name = "i2c-gpio",
572 .id = 0,
573 .dev.platform_data = &pdata,
574 };
575
576 void __init at91_add_device_i2c(struct i2c_board_info *devices, int nr_devices)
577 {
578 at91_set_GPIO_periph(AT91_PIN_PB4, 1); /* TWD (SDA) */
579 at91_set_multi_drive(AT91_PIN_PB4, 1);
580
581 at91_set_GPIO_periph(AT91_PIN_PB5, 1); /* TWCK (SCL) */
582 at91_set_multi_drive(AT91_PIN_PB5, 1);
583
584 i2c_register_board_info(0, devices, nr_devices);
585 platform_device_register(&at91sam9263_twi_device);
586 }
587
588 #elif defined(CONFIG_I2C_AT91) || defined(CONFIG_I2C_AT91_MODULE)
589
590 static struct resource twi_resources[] = {
591 [0] = {
592 .start = AT91SAM9263_BASE_TWI,
593 .end = AT91SAM9263_BASE_TWI + SZ_16K - 1,
594 .flags = IORESOURCE_MEM,
595 },
596 [1] = {
597 .start = NR_IRQS_LEGACY + AT91SAM9263_ID_TWI,
598 .end = NR_IRQS_LEGACY + AT91SAM9263_ID_TWI,
599 .flags = IORESOURCE_IRQ,
600 },
601 };
602
603 static struct platform_device at91sam9263_twi_device = {
604 .name = "i2c-at91sam9260",
605 .id = 0,
606 .resource = twi_resources,
607 .num_resources = ARRAY_SIZE(twi_resources),
608 };
609
610 void __init at91_add_device_i2c(struct i2c_board_info *devices, int nr_devices)
611 {
612 /* pins used for TWI interface */
613 at91_set_A_periph(AT91_PIN_PB4, 0); /* TWD */
614 at91_set_multi_drive(AT91_PIN_PB4, 1);
615
616 at91_set_A_periph(AT91_PIN_PB5, 0); /* TWCK */
617 at91_set_multi_drive(AT91_PIN_PB5, 1);
618
619 i2c_register_board_info(0, devices, nr_devices);
620 platform_device_register(&at91sam9263_twi_device);
621 }
622 #else
623 void __init at91_add_device_i2c(struct i2c_board_info *devices, int nr_devices) {}
624 #endif
625
626
627 /* --------------------------------------------------------------------
628 * SPI
629 * -------------------------------------------------------------------- */
630
631 #if defined(CONFIG_SPI_ATMEL) || defined(CONFIG_SPI_ATMEL_MODULE)
632 static u64 spi_dmamask = DMA_BIT_MASK(32);
633
634 static struct resource spi0_resources[] = {
635 [0] = {
636 .start = AT91SAM9263_BASE_SPI0,
637 .end = AT91SAM9263_BASE_SPI0 + SZ_16K - 1,
638 .flags = IORESOURCE_MEM,
639 },
640 [1] = {
641 .start = NR_IRQS_LEGACY + AT91SAM9263_ID_SPI0,
642 .end = NR_IRQS_LEGACY + AT91SAM9263_ID_SPI0,
643 .flags = IORESOURCE_IRQ,
644 },
645 };
646
647 static struct platform_device at91sam9263_spi0_device = {
648 .name = "atmel_spi",
649 .id = 0,
650 .dev = {
651 .dma_mask = &spi_dmamask,
652 .coherent_dma_mask = DMA_BIT_MASK(32),
653 },
654 .resource = spi0_resources,
655 .num_resources = ARRAY_SIZE(spi0_resources),
656 };
657
658 static const unsigned spi0_standard_cs[4] = { AT91_PIN_PA5, AT91_PIN_PA3, AT91_PIN_PA4, AT91_PIN_PB11 };
659
660 static struct resource spi1_resources[] = {
661 [0] = {
662 .start = AT91SAM9263_BASE_SPI1,
663 .end = AT91SAM9263_BASE_SPI1 + SZ_16K - 1,
664 .flags = IORESOURCE_MEM,
665 },
666 [1] = {
667 .start = NR_IRQS_LEGACY + AT91SAM9263_ID_SPI1,
668 .end = NR_IRQS_LEGACY + AT91SAM9263_ID_SPI1,
669 .flags = IORESOURCE_IRQ,
670 },
671 };
672
673 static struct platform_device at91sam9263_spi1_device = {
674 .name = "atmel_spi",
675 .id = 1,
676 .dev = {
677 .dma_mask = &spi_dmamask,
678 .coherent_dma_mask = DMA_BIT_MASK(32),
679 },
680 .resource = spi1_resources,
681 .num_resources = ARRAY_SIZE(spi1_resources),
682 };
683
684 static const unsigned spi1_standard_cs[4] = { AT91_PIN_PB15, AT91_PIN_PB16, AT91_PIN_PB17, AT91_PIN_PB18 };
685
686 void __init at91_add_device_spi(struct spi_board_info *devices, int nr_devices)
687 {
688 int i;
689 unsigned long cs_pin;
690 short enable_spi0 = 0;
691 short enable_spi1 = 0;
692
693 /* Choose SPI chip-selects */
694 for (i = 0; i < nr_devices; i++) {
695 if (devices[i].controller_data)
696 cs_pin = (unsigned long) devices[i].controller_data;
697 else if (devices[i].bus_num == 0)
698 cs_pin = spi0_standard_cs[devices[i].chip_select];
699 else
700 cs_pin = spi1_standard_cs[devices[i].chip_select];
701
702 if (!gpio_is_valid(cs_pin))
703 continue;
704
705 if (devices[i].bus_num == 0)
706 enable_spi0 = 1;
707 else
708 enable_spi1 = 1;
709
710 /* enable chip-select pin */
711 at91_set_gpio_output(cs_pin, 1);
712
713 /* pass chip-select pin to driver */
714 devices[i].controller_data = (void *) cs_pin;
715 }
716
717 spi_register_board_info(devices, nr_devices);
718
719 /* Configure SPI bus(es) */
720 if (enable_spi0) {
721 at91_set_B_periph(AT91_PIN_PA0, 0); /* SPI0_MISO */
722 at91_set_B_periph(AT91_PIN_PA1, 0); /* SPI0_MOSI */
723 at91_set_B_periph(AT91_PIN_PA2, 0); /* SPI0_SPCK */
724
725 platform_device_register(&at91sam9263_spi0_device);
726 }
727 if (enable_spi1) {
728 at91_set_A_periph(AT91_PIN_PB12, 0); /* SPI1_MISO */
729 at91_set_A_periph(AT91_PIN_PB13, 0); /* SPI1_MOSI */
730 at91_set_A_periph(AT91_PIN_PB14, 0); /* SPI1_SPCK */
731
732 platform_device_register(&at91sam9263_spi1_device);
733 }
734 }
735 #else
736 void __init at91_add_device_spi(struct spi_board_info *devices, int nr_devices) {}
737 #endif
738
739
740 /* --------------------------------------------------------------------
741 * AC97
742 * -------------------------------------------------------------------- */
743
744 #if defined(CONFIG_SND_ATMEL_AC97C) || defined(CONFIG_SND_ATMEL_AC97C_MODULE)
745 static u64 ac97_dmamask = DMA_BIT_MASK(32);
746 static struct ac97c_platform_data ac97_data;
747
748 static struct resource ac97_resources[] = {
749 [0] = {
750 .start = AT91SAM9263_BASE_AC97C,
751 .end = AT91SAM9263_BASE_AC97C + SZ_16K - 1,
752 .flags = IORESOURCE_MEM,
753 },
754 [1] = {
755 .start = NR_IRQS_LEGACY + AT91SAM9263_ID_AC97C,
756 .end = NR_IRQS_LEGACY + AT91SAM9263_ID_AC97C,
757 .flags = IORESOURCE_IRQ,
758 },
759 };
760
761 static struct platform_device at91sam9263_ac97_device = {
762 .name = "atmel_ac97c",
763 .id = 0,
764 .dev = {
765 .dma_mask = &ac97_dmamask,
766 .coherent_dma_mask = DMA_BIT_MASK(32),
767 .platform_data = &ac97_data,
768 },
769 .resource = ac97_resources,
770 .num_resources = ARRAY_SIZE(ac97_resources),
771 };
772
773 void __init at91_add_device_ac97(struct ac97c_platform_data *data)
774 {
775 if (!data)
776 return;
777
778 at91_set_A_periph(AT91_PIN_PB0, 0); /* AC97FS */
779 at91_set_A_periph(AT91_PIN_PB1, 0); /* AC97CK */
780 at91_set_A_periph(AT91_PIN_PB2, 0); /* AC97TX */
781 at91_set_A_periph(AT91_PIN_PB3, 0); /* AC97RX */
782
783 /* reset */
784 if (gpio_is_valid(data->reset_pin))
785 at91_set_gpio_output(data->reset_pin, 0);
786
787 ac97_data = *data;
788 platform_device_register(&at91sam9263_ac97_device);
789 }
790 #else
791 void __init at91_add_device_ac97(struct ac97c_platform_data *data) {}
792 #endif
793
794 /* --------------------------------------------------------------------
795 * CAN Controller
796 * -------------------------------------------------------------------- */
797
798 #if defined(CONFIG_CAN_AT91) || defined(CONFIG_CAN_AT91_MODULE)
799 static struct resource can_resources[] = {
800 [0] = {
801 .start = AT91SAM9263_BASE_CAN,
802 .end = AT91SAM9263_BASE_CAN + SZ_16K - 1,
803 .flags = IORESOURCE_MEM,
804 },
805 [1] = {
806 .start = NR_IRQS_LEGACY + AT91SAM9263_ID_CAN,
807 .end = NR_IRQS_LEGACY + AT91SAM9263_ID_CAN,
808 .flags = IORESOURCE_IRQ,
809 },
810 };
811
812 static struct platform_device at91sam9263_can_device = {
813 .name = "at91_can",
814 .id = -1,
815 .resource = can_resources,
816 .num_resources = ARRAY_SIZE(can_resources),
817 };
818
819 void __init at91_add_device_can(struct at91_can_data *data)
820 {
821 at91_set_A_periph(AT91_PIN_PA13, 0); /* CANTX */
822 at91_set_A_periph(AT91_PIN_PA14, 0); /* CANRX */
823 at91sam9263_can_device.dev.platform_data = data;
824
825 platform_device_register(&at91sam9263_can_device);
826 }
827 #else
828 void __init at91_add_device_can(struct at91_can_data *data) {}
829 #endif
830
831 /* --------------------------------------------------------------------
832 * LCD Controller
833 * -------------------------------------------------------------------- */
834
835 #if defined(CONFIG_FB_ATMEL) || defined(CONFIG_FB_ATMEL_MODULE)
836 static u64 lcdc_dmamask = DMA_BIT_MASK(32);
837 static struct atmel_lcdfb_pdata lcdc_data;
838
839 static struct resource lcdc_resources[] = {
840 [0] = {
841 .start = AT91SAM9263_LCDC_BASE,
842 .end = AT91SAM9263_LCDC_BASE + SZ_4K - 1,
843 .flags = IORESOURCE_MEM,
844 },
845 [1] = {
846 .start = NR_IRQS_LEGACY + AT91SAM9263_ID_LCDC,
847 .end = NR_IRQS_LEGACY + AT91SAM9263_ID_LCDC,
848 .flags = IORESOURCE_IRQ,
849 },
850 };
851
852 static struct platform_device at91_lcdc_device = {
853 .name = "at91sam9263-lcdfb",
854 .id = 0,
855 .dev = {
856 .dma_mask = &lcdc_dmamask,
857 .coherent_dma_mask = DMA_BIT_MASK(32),
858 .platform_data = &lcdc_data,
859 },
860 .resource = lcdc_resources,
861 .num_resources = ARRAY_SIZE(lcdc_resources),
862 };
863
864 void __init at91_add_device_lcdc(struct atmel_lcdfb_pdata *data)
865 {
866 if (!data)
867 return;
868
869 at91_set_A_periph(AT91_PIN_PC1, 0); /* LCDHSYNC */
870 at91_set_A_periph(AT91_PIN_PC2, 0); /* LCDDOTCK */
871 at91_set_A_periph(AT91_PIN_PC3, 0); /* LCDDEN */
872 at91_set_B_periph(AT91_PIN_PB9, 0); /* LCDCC */
873 at91_set_A_periph(AT91_PIN_PC6, 0); /* LCDD2 */
874 at91_set_A_periph(AT91_PIN_PC7, 0); /* LCDD3 */
875 at91_set_A_periph(AT91_PIN_PC8, 0); /* LCDD4 */
876 at91_set_A_periph(AT91_PIN_PC9, 0); /* LCDD5 */
877 at91_set_A_periph(AT91_PIN_PC10, 0); /* LCDD6 */
878 at91_set_A_periph(AT91_PIN_PC11, 0); /* LCDD7 */
879 at91_set_A_periph(AT91_PIN_PC14, 0); /* LCDD10 */
880 at91_set_A_periph(AT91_PIN_PC15, 0); /* LCDD11 */
881 at91_set_A_periph(AT91_PIN_PC16, 0); /* LCDD12 */
882 at91_set_B_periph(AT91_PIN_PC12, 0); /* LCDD13 */
883 at91_set_A_periph(AT91_PIN_PC18, 0); /* LCDD14 */
884 at91_set_A_periph(AT91_PIN_PC19, 0); /* LCDD15 */
885 at91_set_A_periph(AT91_PIN_PC22, 0); /* LCDD18 */
886 at91_set_A_periph(AT91_PIN_PC23, 0); /* LCDD19 */
887 at91_set_A_periph(AT91_PIN_PC24, 0); /* LCDD20 */
888 at91_set_B_periph(AT91_PIN_PC17, 0); /* LCDD21 */
889 at91_set_A_periph(AT91_PIN_PC26, 0); /* LCDD22 */
890 at91_set_A_periph(AT91_PIN_PC27, 0); /* LCDD23 */
891
892 lcdc_data = *data;
893 platform_device_register(&at91_lcdc_device);
894 }
895 #else
896 void __init at91_add_device_lcdc(struct atmel_lcdfb_pdata *data) {}
897 #endif
898
899
900 /* --------------------------------------------------------------------
901 * Image Sensor Interface
902 * -------------------------------------------------------------------- */
903
904 #if defined(CONFIG_VIDEO_AT91_ISI) || defined(CONFIG_VIDEO_AT91_ISI_MODULE)
905
906 struct resource isi_resources[] = {
907 [0] = {
908 .start = AT91SAM9263_BASE_ISI,
909 .end = AT91SAM9263_BASE_ISI + SZ_16K - 1,
910 .flags = IORESOURCE_MEM,
911 },
912 [1] = {
913 .start = NR_IRQS_LEGACY + AT91SAM9263_ID_ISI,
914 .end = NR_IRQS_LEGACY + AT91SAM9263_ID_ISI,
915 .flags = IORESOURCE_IRQ,
916 },
917 };
918
919 static struct platform_device at91sam9263_isi_device = {
920 .name = "at91_isi",
921 .id = -1,
922 .resource = isi_resources,
923 .num_resources = ARRAY_SIZE(isi_resources),
924 };
925
926 void __init at91_add_device_isi(struct isi_platform_data *data,
927 bool use_pck_as_mck)
928 {
929 at91_set_A_periph(AT91_PIN_PE0, 0); /* ISI_D0 */
930 at91_set_A_periph(AT91_PIN_PE1, 0); /* ISI_D1 */
931 at91_set_A_periph(AT91_PIN_PE2, 0); /* ISI_D2 */
932 at91_set_A_periph(AT91_PIN_PE3, 0); /* ISI_D3 */
933 at91_set_A_periph(AT91_PIN_PE4, 0); /* ISI_D4 */
934 at91_set_A_periph(AT91_PIN_PE5, 0); /* ISI_D5 */
935 at91_set_A_periph(AT91_PIN_PE6, 0); /* ISI_D6 */
936 at91_set_A_periph(AT91_PIN_PE7, 0); /* ISI_D7 */
937 at91_set_A_periph(AT91_PIN_PE8, 0); /* ISI_PCK */
938 at91_set_A_periph(AT91_PIN_PE9, 0); /* ISI_HSYNC */
939 at91_set_A_periph(AT91_PIN_PE10, 0); /* ISI_VSYNC */
940 at91_set_B_periph(AT91_PIN_PE12, 0); /* ISI_PD8 */
941 at91_set_B_periph(AT91_PIN_PE13, 0); /* ISI_PD9 */
942 at91_set_B_periph(AT91_PIN_PE14, 0); /* ISI_PD10 */
943 at91_set_B_periph(AT91_PIN_PE15, 0); /* ISI_PD11 */
944
945 if (use_pck_as_mck) {
946 at91_set_B_periph(AT91_PIN_PE11, 0); /* ISI_MCK (PCK3) */
947
948 /* TODO: register the PCK for ISI_MCK and set its parent */
949 }
950 }
951 #else
952 void __init at91_add_device_isi(struct isi_platform_data *data,
953 bool use_pck_as_mck) {}
954 #endif
955
956
957 /* --------------------------------------------------------------------
958 * Timer/Counter block
959 * -------------------------------------------------------------------- */
960
961 #ifdef CONFIG_ATMEL_TCLIB
962
963 static struct resource tcb_resources[] = {
964 [0] = {
965 .start = AT91SAM9263_BASE_TCB0,
966 .end = AT91SAM9263_BASE_TCB0 + SZ_16K - 1,
967 .flags = IORESOURCE_MEM,
968 },
969 [1] = {
970 .start = NR_IRQS_LEGACY + AT91SAM9263_ID_TCB,
971 .end = NR_IRQS_LEGACY + AT91SAM9263_ID_TCB,
972 .flags = IORESOURCE_IRQ,
973 },
974 };
975
976 static struct platform_device at91sam9263_tcb_device = {
977 .name = "atmel_tcb",
978 .id = 0,
979 .resource = tcb_resources,
980 .num_resources = ARRAY_SIZE(tcb_resources),
981 };
982
983 #if defined(CONFIG_OF)
984 static struct of_device_id tcb_ids[] = {
985 { .compatible = "atmel,at91rm9200-tcb" },
986 { /*sentinel*/ }
987 };
988 #endif
989
990 static void __init at91_add_device_tc(void)
991 {
992 #if defined(CONFIG_OF)
993 struct device_node *np;
994
995 np = of_find_matching_node(NULL, tcb_ids);
996 if (np) {
997 of_node_put(np);
998 return;
999 }
1000 #endif
1001
1002 platform_device_register(&at91sam9263_tcb_device);
1003 }
1004 #else
1005 static void __init at91_add_device_tc(void) { }
1006 #endif
1007
1008
1009 /* --------------------------------------------------------------------
1010 * RTT
1011 * -------------------------------------------------------------------- */
1012
1013 static struct resource rtt0_resources[] = {
1014 {
1015 .start = AT91SAM9263_BASE_RTT0,
1016 .end = AT91SAM9263_BASE_RTT0 + SZ_16 - 1,
1017 .flags = IORESOURCE_MEM,
1018 }, {
1019 .flags = IORESOURCE_MEM,
1020 }, {
1021 .flags = IORESOURCE_IRQ,
1022 }
1023 };
1024
1025 static struct platform_device at91sam9263_rtt0_device = {
1026 .name = "at91_rtt",
1027 .id = 0,
1028 .resource = rtt0_resources,
1029 };
1030
1031 static struct resource rtt1_resources[] = {
1032 {
1033 .start = AT91SAM9263_BASE_RTT1,
1034 .end = AT91SAM9263_BASE_RTT1 + SZ_16 - 1,
1035 .flags = IORESOURCE_MEM,
1036 }, {
1037 .flags = IORESOURCE_MEM,
1038 }, {
1039 .flags = IORESOURCE_IRQ,
1040 }
1041 };
1042
1043 static struct platform_device at91sam9263_rtt1_device = {
1044 .name = "at91_rtt",
1045 .id = 1,
1046 .resource = rtt1_resources,
1047 };
1048
1049 #if IS_ENABLED(CONFIG_RTC_DRV_AT91SAM9)
1050 static void __init at91_add_device_rtt_rtc(void)
1051 {
1052 struct platform_device *pdev;
1053 struct resource *r;
1054
1055 switch (CONFIG_RTC_DRV_AT91SAM9_RTT) {
1056 case 0:
1057 /*
1058 * The second resource is needed only for the chosen RTT:
1059 * GPBR will serve as the storage for RTC time offset
1060 */
1061 at91sam9263_rtt0_device.num_resources = 3;
1062 at91sam9263_rtt1_device.num_resources = 1;
1063 pdev = &at91sam9263_rtt0_device;
1064 r = rtt0_resources;
1065 break;
1066 case 1:
1067 at91sam9263_rtt0_device.num_resources = 1;
1068 at91sam9263_rtt1_device.num_resources = 3;
1069 pdev = &at91sam9263_rtt1_device;
1070 r = rtt1_resources;
1071 break;
1072 default:
1073 pr_err("at91sam9263: only supports 2 RTT (%d)\n",
1074 CONFIG_RTC_DRV_AT91SAM9_RTT);
1075 return;
1076 }
1077
1078 pdev->name = "rtc-at91sam9";
1079 r[1].start = AT91SAM9263_BASE_GPBR + 4 * CONFIG_RTC_DRV_AT91SAM9_GPBR;
1080 r[1].end = r[1].start + 3;
1081 r[2].start = NR_IRQS_LEGACY + AT91_ID_SYS;
1082 r[2].end = NR_IRQS_LEGACY + AT91_ID_SYS;
1083 }
1084 #else
1085 static void __init at91_add_device_rtt_rtc(void)
1086 {
1087 /* Only one resource is needed: RTT not used as RTC */
1088 at91sam9263_rtt0_device.num_resources = 1;
1089 at91sam9263_rtt1_device.num_resources = 1;
1090 }
1091 #endif
1092
1093 static void __init at91_add_device_rtt(void)
1094 {
1095 at91_add_device_rtt_rtc();
1096 platform_device_register(&at91sam9263_rtt0_device);
1097 platform_device_register(&at91sam9263_rtt1_device);
1098 }
1099
1100
1101 /* --------------------------------------------------------------------
1102 * Watchdog
1103 * -------------------------------------------------------------------- */
1104
1105 #if defined(CONFIG_AT91SAM9X_WATCHDOG) || defined(CONFIG_AT91SAM9X_WATCHDOG_MODULE)
1106 static struct resource wdt_resources[] = {
1107 {
1108 .start = AT91SAM9263_BASE_WDT,
1109 .end = AT91SAM9263_BASE_WDT + SZ_16 - 1,
1110 .flags = IORESOURCE_MEM,
1111 }
1112 };
1113
1114 static struct platform_device at91sam9263_wdt_device = {
1115 .name = "at91_wdt",
1116 .id = -1,
1117 .resource = wdt_resources,
1118 .num_resources = ARRAY_SIZE(wdt_resources),
1119 };
1120
1121 static void __init at91_add_device_watchdog(void)
1122 {
1123 platform_device_register(&at91sam9263_wdt_device);
1124 }
1125 #else
1126 static void __init at91_add_device_watchdog(void) {}
1127 #endif
1128
1129
1130 /* --------------------------------------------------------------------
1131 * PWM
1132 * --------------------------------------------------------------------*/
1133
1134 #if defined(CONFIG_ATMEL_PWM)
1135 static u32 pwm_mask;
1136
1137 static struct resource pwm_resources[] = {
1138 [0] = {
1139 .start = AT91SAM9263_BASE_PWMC,
1140 .end = AT91SAM9263_BASE_PWMC + SZ_16K - 1,
1141 .flags = IORESOURCE_MEM,
1142 },
1143 [1] = {
1144 .start = NR_IRQS_LEGACY + AT91SAM9263_ID_PWMC,
1145 .end = NR_IRQS_LEGACY + AT91SAM9263_ID_PWMC,
1146 .flags = IORESOURCE_IRQ,
1147 },
1148 };
1149
1150 static struct platform_device at91sam9263_pwm0_device = {
1151 .name = "atmel_pwm",
1152 .id = -1,
1153 .dev = {
1154 .platform_data = &pwm_mask,
1155 },
1156 .resource = pwm_resources,
1157 .num_resources = ARRAY_SIZE(pwm_resources),
1158 };
1159
1160 void __init at91_add_device_pwm(u32 mask)
1161 {
1162 if (mask & (1 << AT91_PWM0))
1163 at91_set_B_periph(AT91_PIN_PB7, 1); /* enable PWM0 */
1164
1165 if (mask & (1 << AT91_PWM1))
1166 at91_set_B_periph(AT91_PIN_PB8, 1); /* enable PWM1 */
1167
1168 if (mask & (1 << AT91_PWM2))
1169 at91_set_B_periph(AT91_PIN_PC29, 1); /* enable PWM2 */
1170
1171 if (mask & (1 << AT91_PWM3))
1172 at91_set_B_periph(AT91_PIN_PB29, 1); /* enable PWM3 */
1173
1174 pwm_mask = mask;
1175
1176 platform_device_register(&at91sam9263_pwm0_device);
1177 }
1178 #else
1179 void __init at91_add_device_pwm(u32 mask) {}
1180 #endif
1181
1182
1183 /* --------------------------------------------------------------------
1184 * SSC -- Synchronous Serial Controller
1185 * -------------------------------------------------------------------- */
1186
1187 #if defined(CONFIG_ATMEL_SSC) || defined(CONFIG_ATMEL_SSC_MODULE)
1188 static u64 ssc0_dmamask = DMA_BIT_MASK(32);
1189
1190 static struct resource ssc0_resources[] = {
1191 [0] = {
1192 .start = AT91SAM9263_BASE_SSC0,
1193 .end = AT91SAM9263_BASE_SSC0 + SZ_16K - 1,
1194 .flags = IORESOURCE_MEM,
1195 },
1196 [1] = {
1197 .start = NR_IRQS_LEGACY + AT91SAM9263_ID_SSC0,
1198 .end = NR_IRQS_LEGACY + AT91SAM9263_ID_SSC0,
1199 .flags = IORESOURCE_IRQ,
1200 },
1201 };
1202
1203 static struct platform_device at91sam9263_ssc0_device = {
1204 .name = "at91rm9200_ssc",
1205 .id = 0,
1206 .dev = {
1207 .dma_mask = &ssc0_dmamask,
1208 .coherent_dma_mask = DMA_BIT_MASK(32),
1209 },
1210 .resource = ssc0_resources,
1211 .num_resources = ARRAY_SIZE(ssc0_resources),
1212 };
1213
1214 static inline void configure_ssc0_pins(unsigned pins)
1215 {
1216 if (pins & ATMEL_SSC_TF)
1217 at91_set_B_periph(AT91_PIN_PB0, 1);
1218 if (pins & ATMEL_SSC_TK)
1219 at91_set_B_periph(AT91_PIN_PB1, 1);
1220 if (pins & ATMEL_SSC_TD)
1221 at91_set_B_periph(AT91_PIN_PB2, 1);
1222 if (pins & ATMEL_SSC_RD)
1223 at91_set_B_periph(AT91_PIN_PB3, 1);
1224 if (pins & ATMEL_SSC_RK)
1225 at91_set_B_periph(AT91_PIN_PB4, 1);
1226 if (pins & ATMEL_SSC_RF)
1227 at91_set_B_periph(AT91_PIN_PB5, 1);
1228 }
1229
1230 static u64 ssc1_dmamask = DMA_BIT_MASK(32);
1231
1232 static struct resource ssc1_resources[] = {
1233 [0] = {
1234 .start = AT91SAM9263_BASE_SSC1,
1235 .end = AT91SAM9263_BASE_SSC1 + SZ_16K - 1,
1236 .flags = IORESOURCE_MEM,
1237 },
1238 [1] = {
1239 .start = NR_IRQS_LEGACY + AT91SAM9263_ID_SSC1,
1240 .end = NR_IRQS_LEGACY + AT91SAM9263_ID_SSC1,
1241 .flags = IORESOURCE_IRQ,
1242 },
1243 };
1244
1245 static struct platform_device at91sam9263_ssc1_device = {
1246 .name = "at91rm9200_ssc",
1247 .id = 1,
1248 .dev = {
1249 .dma_mask = &ssc1_dmamask,
1250 .coherent_dma_mask = DMA_BIT_MASK(32),
1251 },
1252 .resource = ssc1_resources,
1253 .num_resources = ARRAY_SIZE(ssc1_resources),
1254 };
1255
1256 static inline void configure_ssc1_pins(unsigned pins)
1257 {
1258 if (pins & ATMEL_SSC_TF)
1259 at91_set_A_periph(AT91_PIN_PB6, 1);
1260 if (pins & ATMEL_SSC_TK)
1261 at91_set_A_periph(AT91_PIN_PB7, 1);
1262 if (pins & ATMEL_SSC_TD)
1263 at91_set_A_periph(AT91_PIN_PB8, 1);
1264 if (pins & ATMEL_SSC_RD)
1265 at91_set_A_periph(AT91_PIN_PB9, 1);
1266 if (pins & ATMEL_SSC_RK)
1267 at91_set_A_periph(AT91_PIN_PB10, 1);
1268 if (pins & ATMEL_SSC_RF)
1269 at91_set_A_periph(AT91_PIN_PB11, 1);
1270 }
1271
1272 /*
1273 * SSC controllers are accessed through library code, instead of any
1274 * kind of all-singing/all-dancing driver. For example one could be
1275 * used by a particular I2S audio codec's driver, while another one
1276 * on the same system might be used by a custom data capture driver.
1277 */
1278 void __init at91_add_device_ssc(unsigned id, unsigned pins)
1279 {
1280 struct platform_device *pdev;
1281
1282 /*
1283 * NOTE: caller is responsible for passing information matching
1284 * "pins" to whatever will be using each particular controller.
1285 */
1286 switch (id) {
1287 case AT91SAM9263_ID_SSC0:
1288 pdev = &at91sam9263_ssc0_device;
1289 configure_ssc0_pins(pins);
1290 break;
1291 case AT91SAM9263_ID_SSC1:
1292 pdev = &at91sam9263_ssc1_device;
1293 configure_ssc1_pins(pins);
1294 break;
1295 default:
1296 return;
1297 }
1298
1299 platform_device_register(pdev);
1300 }
1301
1302 #else
1303 void __init at91_add_device_ssc(unsigned id, unsigned pins) {}
1304 #endif
1305
1306
1307 /* --------------------------------------------------------------------
1308 * UART
1309 * -------------------------------------------------------------------- */
1310
1311 #if defined(CONFIG_SERIAL_ATMEL)
1312
1313 static struct resource dbgu_resources[] = {
1314 [0] = {
1315 .start = AT91SAM9263_BASE_DBGU,
1316 .end = AT91SAM9263_BASE_DBGU + SZ_512 - 1,
1317 .flags = IORESOURCE_MEM,
1318 },
1319 [1] = {
1320 .start = NR_IRQS_LEGACY + AT91_ID_SYS,
1321 .end = NR_IRQS_LEGACY + AT91_ID_SYS,
1322 .flags = IORESOURCE_IRQ,
1323 },
1324 };
1325
1326 static struct atmel_uart_data dbgu_data = {
1327 .use_dma_tx = 0,
1328 .use_dma_rx = 0, /* DBGU not capable of receive DMA */
1329 };
1330
1331 static u64 dbgu_dmamask = DMA_BIT_MASK(32);
1332
1333 static struct platform_device at91sam9263_dbgu_device = {
1334 .name = "atmel_usart",
1335 .id = 0,
1336 .dev = {
1337 .dma_mask = &dbgu_dmamask,
1338 .coherent_dma_mask = DMA_BIT_MASK(32),
1339 .platform_data = &dbgu_data,
1340 },
1341 .resource = dbgu_resources,
1342 .num_resources = ARRAY_SIZE(dbgu_resources),
1343 };
1344
1345 static inline void configure_dbgu_pins(void)
1346 {
1347 at91_set_A_periph(AT91_PIN_PC30, 0); /* DRXD */
1348 at91_set_A_periph(AT91_PIN_PC31, 1); /* DTXD */
1349 }
1350
1351 static struct resource uart0_resources[] = {
1352 [0] = {
1353 .start = AT91SAM9263_BASE_US0,
1354 .end = AT91SAM9263_BASE_US0 + SZ_16K - 1,
1355 .flags = IORESOURCE_MEM,
1356 },
1357 [1] = {
1358 .start = NR_IRQS_LEGACY + AT91SAM9263_ID_US0,
1359 .end = NR_IRQS_LEGACY + AT91SAM9263_ID_US0,
1360 .flags = IORESOURCE_IRQ,
1361 },
1362 };
1363
1364 static struct atmel_uart_data uart0_data = {
1365 .use_dma_tx = 1,
1366 .use_dma_rx = 1,
1367 };
1368
1369 static u64 uart0_dmamask = DMA_BIT_MASK(32);
1370
1371 static struct platform_device at91sam9263_uart0_device = {
1372 .name = "atmel_usart",
1373 .id = 1,
1374 .dev = {
1375 .dma_mask = &uart0_dmamask,
1376 .coherent_dma_mask = DMA_BIT_MASK(32),
1377 .platform_data = &uart0_data,
1378 },
1379 .resource = uart0_resources,
1380 .num_resources = ARRAY_SIZE(uart0_resources),
1381 };
1382
1383 static inline void configure_usart0_pins(unsigned pins)
1384 {
1385 at91_set_A_periph(AT91_PIN_PA26, 1); /* TXD0 */
1386 at91_set_A_periph(AT91_PIN_PA27, 0); /* RXD0 */
1387
1388 if (pins & ATMEL_UART_RTS)
1389 at91_set_A_periph(AT91_PIN_PA28, 0); /* RTS0 */
1390 if (pins & ATMEL_UART_CTS)
1391 at91_set_A_periph(AT91_PIN_PA29, 0); /* CTS0 */
1392 }
1393
1394 static struct resource uart1_resources[] = {
1395 [0] = {
1396 .start = AT91SAM9263_BASE_US1,
1397 .end = AT91SAM9263_BASE_US1 + SZ_16K - 1,
1398 .flags = IORESOURCE_MEM,
1399 },
1400 [1] = {
1401 .start = NR_IRQS_LEGACY + AT91SAM9263_ID_US1,
1402 .end = NR_IRQS_LEGACY + AT91SAM9263_ID_US1,
1403 .flags = IORESOURCE_IRQ,
1404 },
1405 };
1406
1407 static struct atmel_uart_data uart1_data = {
1408 .use_dma_tx = 1,
1409 .use_dma_rx = 1,
1410 };
1411
1412 static u64 uart1_dmamask = DMA_BIT_MASK(32);
1413
1414 static struct platform_device at91sam9263_uart1_device = {
1415 .name = "atmel_usart",
1416 .id = 2,
1417 .dev = {
1418 .dma_mask = &uart1_dmamask,
1419 .coherent_dma_mask = DMA_BIT_MASK(32),
1420 .platform_data = &uart1_data,
1421 },
1422 .resource = uart1_resources,
1423 .num_resources = ARRAY_SIZE(uart1_resources),
1424 };
1425
1426 static inline void configure_usart1_pins(unsigned pins)
1427 {
1428 at91_set_A_periph(AT91_PIN_PD0, 1); /* TXD1 */
1429 at91_set_A_periph(AT91_PIN_PD1, 0); /* RXD1 */
1430
1431 if (pins & ATMEL_UART_RTS)
1432 at91_set_B_periph(AT91_PIN_PD7, 0); /* RTS1 */
1433 if (pins & ATMEL_UART_CTS)
1434 at91_set_B_periph(AT91_PIN_PD8, 0); /* CTS1 */
1435 }
1436
1437 static struct resource uart2_resources[] = {
1438 [0] = {
1439 .start = AT91SAM9263_BASE_US2,
1440 .end = AT91SAM9263_BASE_US2 + SZ_16K - 1,
1441 .flags = IORESOURCE_MEM,
1442 },
1443 [1] = {
1444 .start = NR_IRQS_LEGACY + AT91SAM9263_ID_US2,
1445 .end = NR_IRQS_LEGACY + AT91SAM9263_ID_US2,
1446 .flags = IORESOURCE_IRQ,
1447 },
1448 };
1449
1450 static struct atmel_uart_data uart2_data = {
1451 .use_dma_tx = 1,
1452 .use_dma_rx = 1,
1453 };
1454
1455 static u64 uart2_dmamask = DMA_BIT_MASK(32);
1456
1457 static struct platform_device at91sam9263_uart2_device = {
1458 .name = "atmel_usart",
1459 .id = 3,
1460 .dev = {
1461 .dma_mask = &uart2_dmamask,
1462 .coherent_dma_mask = DMA_BIT_MASK(32),
1463 .platform_data = &uart2_data,
1464 },
1465 .resource = uart2_resources,
1466 .num_resources = ARRAY_SIZE(uart2_resources),
1467 };
1468
1469 static inline void configure_usart2_pins(unsigned pins)
1470 {
1471 at91_set_A_periph(AT91_PIN_PD2, 1); /* TXD2 */
1472 at91_set_A_periph(AT91_PIN_PD3, 0); /* RXD2 */
1473
1474 if (pins & ATMEL_UART_RTS)
1475 at91_set_B_periph(AT91_PIN_PD5, 0); /* RTS2 */
1476 if (pins & ATMEL_UART_CTS)
1477 at91_set_B_periph(AT91_PIN_PD6, 0); /* CTS2 */
1478 }
1479
1480 static struct platform_device *__initdata at91_uarts[ATMEL_MAX_UART]; /* the UARTs to use */
1481
1482 void __init at91_register_uart(unsigned id, unsigned portnr, unsigned pins)
1483 {
1484 struct platform_device *pdev;
1485 struct atmel_uart_data *pdata;
1486
1487 switch (id) {
1488 case 0: /* DBGU */
1489 pdev = &at91sam9263_dbgu_device;
1490 configure_dbgu_pins();
1491 break;
1492 case AT91SAM9263_ID_US0:
1493 pdev = &at91sam9263_uart0_device;
1494 configure_usart0_pins(pins);
1495 break;
1496 case AT91SAM9263_ID_US1:
1497 pdev = &at91sam9263_uart1_device;
1498 configure_usart1_pins(pins);
1499 break;
1500 case AT91SAM9263_ID_US2:
1501 pdev = &at91sam9263_uart2_device;
1502 configure_usart2_pins(pins);
1503 break;
1504 default:
1505 return;
1506 }
1507 pdata = pdev->dev.platform_data;
1508 pdata->num = portnr; /* update to mapped ID */
1509
1510 if (portnr < ATMEL_MAX_UART)
1511 at91_uarts[portnr] = pdev;
1512 }
1513
1514 void __init at91_add_device_serial(void)
1515 {
1516 int i;
1517
1518 for (i = 0; i < ATMEL_MAX_UART; i++) {
1519 if (at91_uarts[i])
1520 platform_device_register(at91_uarts[i]);
1521 }
1522 }
1523 #else
1524 void __init at91_register_uart(unsigned id, unsigned portnr, unsigned pins) {}
1525 void __init at91_add_device_serial(void) {}
1526 #endif
1527
1528
1529 /* -------------------------------------------------------------------- */
1530 /*
1531 * These devices are always present and don't need any board-specific
1532 * setup.
1533 */
1534 static int __init at91_add_standard_devices(void)
1535 {
1536 if (of_have_populated_dt())
1537 return 0;
1538
1539 at91_add_device_rtt();
1540 at91_add_device_watchdog();
1541 at91_add_device_tc();
1542 return 0;
1543 }
1544
1545 arch_initcall(at91_add_standard_devices);
Linux with added FPC-III support