Merge tag 'locks-v3.16-2' of git://git.samba.org/jlayton/linux
[linux/fpc-iii.git] / arch / arm / mach-imx / clk-gate2.c
blob4ba587da89d2ef69bf8d96dcdbf27cf8ad6e93aa
1 /*
2 * Copyright (C) 2010-2011 Canonical Ltd <jeremy.kerr@canonical.com>
3 * Copyright (C) 2011-2012 Mike Turquette, Linaro Ltd <mturquette@linaro.org>
5 * This program is free software; you can redistribute it and/or modify
6 * it under the terms of the GNU General Public License version 2 as
7 * published by the Free Software Foundation.
9 * Gated clock implementation
12 #include <linux/clk-provider.h>
13 #include <linux/module.h>
14 #include <linux/slab.h>
15 #include <linux/io.h>
16 #include <linux/err.h>
17 #include <linux/string.h>
18 #include "clk.h"
20 /**
21 * DOC: basic gatable clock which can gate and ungate it's ouput
23 * Traits of this clock:
24 * prepare - clk_(un)prepare only ensures parent is (un)prepared
25 * enable - clk_enable and clk_disable are functional & control gating
26 * rate - inherits rate from parent. No clk_set_rate support
27 * parent - fixed parent. No clk_set_parent support
30 struct clk_gate2 {
31 struct clk_hw hw;
32 void __iomem *reg;
33 u8 bit_idx;
34 u8 flags;
35 spinlock_t *lock;
36 unsigned int *share_count;
39 #define to_clk_gate2(_hw) container_of(_hw, struct clk_gate2, hw)
41 static int clk_gate2_enable(struct clk_hw *hw)
43 struct clk_gate2 *gate = to_clk_gate2(hw);
44 u32 reg;
45 unsigned long flags = 0;
47 spin_lock_irqsave(gate->lock, flags);
49 if (gate->share_count && (*gate->share_count)++ > 0)
50 goto out;
52 reg = readl(gate->reg);
53 reg |= 3 << gate->bit_idx;
54 writel(reg, gate->reg);
56 out:
57 spin_unlock_irqrestore(gate->lock, flags);
59 return 0;
62 static void clk_gate2_disable(struct clk_hw *hw)
64 struct clk_gate2 *gate = to_clk_gate2(hw);
65 u32 reg;
66 unsigned long flags = 0;
68 spin_lock_irqsave(gate->lock, flags);
70 if (gate->share_count && --(*gate->share_count) > 0)
71 goto out;
73 reg = readl(gate->reg);
74 reg &= ~(3 << gate->bit_idx);
75 writel(reg, gate->reg);
77 out:
78 spin_unlock_irqrestore(gate->lock, flags);
81 static int clk_gate2_is_enabled(struct clk_hw *hw)
83 u32 reg;
84 struct clk_gate2 *gate = to_clk_gate2(hw);
86 reg = readl(gate->reg);
88 if (((reg >> gate->bit_idx) & 1) == 1)
89 return 1;
91 return 0;
94 static struct clk_ops clk_gate2_ops = {
95 .enable = clk_gate2_enable,
96 .disable = clk_gate2_disable,
97 .is_enabled = clk_gate2_is_enabled,
100 struct clk *clk_register_gate2(struct device *dev, const char *name,
101 const char *parent_name, unsigned long flags,
102 void __iomem *reg, u8 bit_idx,
103 u8 clk_gate2_flags, spinlock_t *lock,
104 unsigned int *share_count)
106 struct clk_gate2 *gate;
107 struct clk *clk;
108 struct clk_init_data init;
110 gate = kzalloc(sizeof(struct clk_gate2), GFP_KERNEL);
111 if (!gate)
112 return ERR_PTR(-ENOMEM);
114 /* struct clk_gate2 assignments */
115 gate->reg = reg;
116 gate->bit_idx = bit_idx;
117 gate->flags = clk_gate2_flags;
118 gate->lock = lock;
119 gate->share_count = share_count;
121 init.name = name;
122 init.ops = &clk_gate2_ops;
123 init.flags = flags;
124 init.parent_names = parent_name ? &parent_name : NULL;
125 init.num_parents = parent_name ? 1 : 0;
127 gate->hw.init = &init;
129 clk = clk_register(dev, &gate->hw);
130 if (IS_ERR(clk))
131 kfree(gate);
133 return clk;