Merge tag 'locks-v3.16-2' of git://git.samba.org/jlayton/linux
[linux/fpc-iii.git] / arch / arm / mach-imx / mach-mx31lite.c
blobfa15d0b6118d8a7befd3ce6bd4b1334278be23da
1 /*
2 * Copyright (C) 2000 Deep Blue Solutions Ltd
3 * Copyright (C) 2002 Shane Nay (shane@minirl.com)
4 * Copyright 2005-2007 Freescale Semiconductor, Inc. All Rights Reserved.
5 * Copyright (C) 2009 Daniel Mack <daniel@caiaq.de>
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License as published by
9 * the Free Software Foundation; either version 2 of the License, or
10 * (at your option) any later version.
12 * This program is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 * GNU General Public License for more details.
18 #include <linux/types.h>
19 #include <linux/init.h>
20 #include <linux/kernel.h>
21 #include <linux/memory.h>
22 #include <linux/platform_device.h>
23 #include <linux/gpio.h>
24 #include <linux/moduleparam.h>
25 #include <linux/smsc911x.h>
26 #include <linux/mfd/mc13783.h>
27 #include <linux/spi/spi.h>
28 #include <linux/usb/otg.h>
29 #include <linux/usb/ulpi.h>
30 #include <linux/mtd/physmap.h>
31 #include <linux/delay.h>
32 #include <linux/regulator/machine.h>
33 #include <linux/regulator/fixed.h>
35 #include <asm/mach-types.h>
36 #include <asm/mach/arch.h>
37 #include <asm/mach/time.h>
38 #include <asm/mach/map.h>
39 #include <asm/page.h>
40 #include <asm/setup.h>
42 #include "board-mx31lite.h"
43 #include "common.h"
44 #include "devices-imx31.h"
45 #include "hardware.h"
46 #include "iomux-mx3.h"
47 #include "ulpi.h"
50 * This file contains the module-specific initialization routines.
53 static unsigned int mx31lite_pins[] = {
54 /* LAN9117 IRQ pin */
55 IOMUX_MODE(MX31_PIN_SFS6, IOMUX_CONFIG_GPIO),
56 /* SPI 1 */
57 MX31_PIN_CSPI2_SCLK__SCLK,
58 MX31_PIN_CSPI2_MOSI__MOSI,
59 MX31_PIN_CSPI2_MISO__MISO,
60 MX31_PIN_CSPI2_SPI_RDY__SPI_RDY,
61 MX31_PIN_CSPI2_SS0__SS0,
62 MX31_PIN_CSPI2_SS1__SS1,
63 MX31_PIN_CSPI2_SS2__SS2,
66 static const struct mxc_nand_platform_data
67 mx31lite_nand_board_info __initconst = {
68 .width = 1,
69 .hw_ecc = 1,
72 static struct smsc911x_platform_config smsc911x_config = {
73 .irq_polarity = SMSC911X_IRQ_POLARITY_ACTIVE_LOW,
74 .irq_type = SMSC911X_IRQ_TYPE_PUSH_PULL,
75 .flags = SMSC911X_USE_16BIT,
78 static struct resource smsc911x_resources[] = {
80 .start = MX31_CS4_BASE_ADDR,
81 .end = MX31_CS4_BASE_ADDR + 0x100,
82 .flags = IORESOURCE_MEM,
83 }, {
84 /* irq number is run-time assigned */
85 .flags = IORESOURCE_IRQ,
89 static struct platform_device smsc911x_device = {
90 .name = "smsc911x",
91 .id = -1,
92 .num_resources = ARRAY_SIZE(smsc911x_resources),
93 .resource = smsc911x_resources,
94 .dev = {
95 .platform_data = &smsc911x_config,
100 * SPI
102 * The MC13783 is the only hard-wired SPI device on the module.
105 static int spi_internal_chipselect[] = {
106 MXC_SPI_CS(0),
109 static const struct spi_imx_master spi1_pdata __initconst = {
110 .chipselect = spi_internal_chipselect,
111 .num_chipselect = ARRAY_SIZE(spi_internal_chipselect),
114 static struct mc13xxx_platform_data mc13783_pdata __initdata = {
115 .flags = MC13XXX_USE_RTC,
118 static struct spi_board_info mc13783_spi_dev __initdata = {
119 .modalias = "mc13783",
120 .max_speed_hz = 1000000,
121 .bus_num = 1,
122 .chip_select = 0,
123 .platform_data = &mc13783_pdata,
124 /* irq number is run-time assigned */
128 * USB
131 #define USB_PAD_CFG (PAD_CTL_DRV_MAX | PAD_CTL_SRE_FAST | PAD_CTL_HYS_CMOS | \
132 PAD_CTL_ODE_CMOS | PAD_CTL_100K_PU)
134 static int usbh2_init(struct platform_device *pdev)
136 int pins[] = {
137 MX31_PIN_USBH2_DATA0__USBH2_DATA0,
138 MX31_PIN_USBH2_DATA1__USBH2_DATA1,
139 MX31_PIN_USBH2_CLK__USBH2_CLK,
140 MX31_PIN_USBH2_DIR__USBH2_DIR,
141 MX31_PIN_USBH2_NXT__USBH2_NXT,
142 MX31_PIN_USBH2_STP__USBH2_STP,
145 mxc_iomux_setup_multiple_pins(pins, ARRAY_SIZE(pins), "USB H2");
147 mxc_iomux_set_pad(MX31_PIN_USBH2_CLK, USB_PAD_CFG);
148 mxc_iomux_set_pad(MX31_PIN_USBH2_DIR, USB_PAD_CFG);
149 mxc_iomux_set_pad(MX31_PIN_USBH2_NXT, USB_PAD_CFG);
150 mxc_iomux_set_pad(MX31_PIN_USBH2_STP, USB_PAD_CFG);
151 mxc_iomux_set_pad(MX31_PIN_USBH2_DATA0, USB_PAD_CFG);
152 mxc_iomux_set_pad(MX31_PIN_USBH2_DATA1, USB_PAD_CFG);
153 mxc_iomux_set_pad(MX31_PIN_SRXD6, USB_PAD_CFG);
154 mxc_iomux_set_pad(MX31_PIN_STXD6, USB_PAD_CFG);
155 mxc_iomux_set_pad(MX31_PIN_SFS3, USB_PAD_CFG);
156 mxc_iomux_set_pad(MX31_PIN_SCK3, USB_PAD_CFG);
157 mxc_iomux_set_pad(MX31_PIN_SRXD3, USB_PAD_CFG);
158 mxc_iomux_set_pad(MX31_PIN_STXD3, USB_PAD_CFG);
160 mxc_iomux_set_gpr(MUX_PGP_UH2, true);
162 /* chip select */
163 mxc_iomux_alloc_pin(IOMUX_MODE(MX31_PIN_DTR_DCE1, IOMUX_CONFIG_GPIO),
164 "USBH2_CS");
165 gpio_request(IOMUX_TO_GPIO(MX31_PIN_DTR_DCE1), "USBH2 CS");
166 gpio_direction_output(IOMUX_TO_GPIO(MX31_PIN_DTR_DCE1), 0);
168 mdelay(10);
170 return mx31_initialize_usb_hw(pdev->id, MXC_EHCI_POWER_PINS_ENABLED);
173 static struct mxc_usbh_platform_data usbh2_pdata __initdata = {
174 .init = usbh2_init,
175 .portsc = MXC_EHCI_MODE_ULPI | MXC_EHCI_UTMI_8BIT,
179 * NOR flash
182 static struct physmap_flash_data nor_flash_data = {
183 .width = 2,
186 static struct resource nor_flash_resource = {
187 .start = 0xa0000000,
188 .end = 0xa1ffffff,
189 .flags = IORESOURCE_MEM,
192 static struct platform_device physmap_flash_device = {
193 .name = "physmap-flash",
194 .id = 0,
195 .dev = {
196 .platform_data = &nor_flash_data,
198 .resource = &nor_flash_resource,
199 .num_resources = 1,
205 * This structure defines the MX31 memory map.
207 static struct map_desc mx31lite_io_desc[] __initdata = {
209 .virtual = (unsigned long)MX31_CS4_BASE_ADDR_VIRT,
210 .pfn = __phys_to_pfn(MX31_CS4_BASE_ADDR),
211 .length = MX31_CS4_SIZE,
212 .type = MT_DEVICE
217 * Set up static virtual mappings.
219 void __init mx31lite_map_io(void)
221 mx31_map_io();
222 iotable_init(mx31lite_io_desc, ARRAY_SIZE(mx31lite_io_desc));
225 static int mx31lite_baseboard;
226 core_param(mx31lite_baseboard, mx31lite_baseboard, int, 0444);
228 static struct regulator_consumer_supply dummy_supplies[] = {
229 REGULATOR_SUPPLY("vdd33a", "smsc911x"),
230 REGULATOR_SUPPLY("vddvario", "smsc911x"),
233 static void __init mx31lite_init(void)
235 int ret;
237 imx31_soc_init();
239 switch (mx31lite_baseboard) {
240 case MX31LITE_NOBOARD:
241 break;
242 case MX31LITE_DB:
243 mx31lite_db_init();
244 break;
245 default:
246 printk(KERN_ERR "Illegal mx31lite_baseboard type %d\n",
247 mx31lite_baseboard);
250 mxc_iomux_setup_multiple_pins(mx31lite_pins, ARRAY_SIZE(mx31lite_pins),
251 "mx31lite");
253 /* NOR and NAND flash */
254 platform_device_register(&physmap_flash_device);
255 imx31_add_mxc_nand(&mx31lite_nand_board_info);
257 imx31_add_spi_imx1(&spi1_pdata);
258 mc13783_spi_dev.irq = gpio_to_irq(IOMUX_TO_GPIO(MX31_PIN_GPIO1_3));
259 spi_register_board_info(&mc13783_spi_dev, 1);
261 /* USB */
262 usbh2_pdata.otg = imx_otg_ulpi_create(ULPI_OTG_DRVVBUS |
263 ULPI_OTG_DRVVBUS_EXT);
264 if (usbh2_pdata.otg)
265 imx31_add_mxc_ehci_hs(2, &usbh2_pdata);
267 regulator_register_fixed(0, dummy_supplies, ARRAY_SIZE(dummy_supplies));
269 /* SMSC9117 IRQ pin */
270 ret = gpio_request(IOMUX_TO_GPIO(MX31_PIN_SFS6), "sms9117-irq");
271 if (ret)
272 pr_warning("could not get LAN irq gpio\n");
273 else {
274 gpio_direction_input(IOMUX_TO_GPIO(MX31_PIN_SFS6));
275 smsc911x_resources[1].start =
276 gpio_to_irq(IOMUX_TO_GPIO(MX31_PIN_SFS6));
277 smsc911x_resources[1].end =
278 gpio_to_irq(IOMUX_TO_GPIO(MX31_PIN_SFS6));
279 platform_device_register(&smsc911x_device);
283 static void __init mx31lite_timer_init(void)
285 mx31_clocks_init(26000000);
288 MACHINE_START(MX31LITE, "LogicPD i.MX31 SOM")
289 /* Maintainer: Freescale Semiconductor, Inc. */
290 .atag_offset = 0x100,
291 .map_io = mx31lite_map_io,
292 .init_early = imx31_init_early,
293 .init_irq = mx31_init_irq,
294 .init_time = mx31lite_timer_init,
295 .init_machine = mx31lite_init,
296 .restart = mxc_restart,
297 MACHINE_END