Merge tag 'locks-v3.16-2' of git://git.samba.org/jlayton/linux
[linux/fpc-iii.git] / arch / arm / mach-omap2 / am35xx-emac.c
blob6a6935caac1e4dbd9c1eab2a191f64329c082909
1 /*
2 * Copyright (C) 2011 Ilya Yanok, Emcraft Systems
4 * Based on mach-omap2/board-am3517evm.c
5 * Copyright (C) 2009 Texas Instruments Incorporated
6 * Author: Ranjith Lohithakshan <ranjithl@ti.com>
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2
10 * published by the Free Software Foundation.
12 * This program is distributed "as is" WITHOUT ANY WARRANTY of any kind,
13 * whether express or implied; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
15 * General Public License for more details.
18 #include <linux/err.h>
19 #include <linux/davinci_emac.h>
20 #include "omap_device.h"
21 #include "am35xx.h"
22 #include "control.h"
23 #include "am35xx-emac.h"
25 static void am35xx_enable_emac_int(void)
27 u32 v;
29 v = omap_ctrl_readl(AM35XX_CONTROL_LVL_INTR_CLEAR);
30 v |= (AM35XX_CPGMAC_C0_RX_PULSE_CLR | AM35XX_CPGMAC_C0_TX_PULSE_CLR |
31 AM35XX_CPGMAC_C0_MISC_PULSE_CLR | AM35XX_CPGMAC_C0_RX_THRESH_CLR);
32 omap_ctrl_writel(v, AM35XX_CONTROL_LVL_INTR_CLEAR);
33 omap_ctrl_readl(AM35XX_CONTROL_LVL_INTR_CLEAR); /* OCP barrier */
36 static void am35xx_disable_emac_int(void)
38 u32 v;
40 v = omap_ctrl_readl(AM35XX_CONTROL_LVL_INTR_CLEAR);
41 v |= (AM35XX_CPGMAC_C0_RX_PULSE_CLR | AM35XX_CPGMAC_C0_TX_PULSE_CLR);
42 omap_ctrl_writel(v, AM35XX_CONTROL_LVL_INTR_CLEAR);
43 omap_ctrl_readl(AM35XX_CONTROL_LVL_INTR_CLEAR); /* OCP barrier */
46 static struct emac_platform_data am35xx_emac_pdata = {
47 .ctrl_reg_offset = AM35XX_EMAC_CNTRL_OFFSET,
48 .ctrl_mod_reg_offset = AM35XX_EMAC_CNTRL_MOD_OFFSET,
49 .ctrl_ram_offset = AM35XX_EMAC_CNTRL_RAM_OFFSET,
50 .ctrl_ram_size = AM35XX_EMAC_CNTRL_RAM_SIZE,
51 .hw_ram_addr = AM35XX_EMAC_HW_RAM_ADDR,
52 .version = EMAC_VERSION_2,
53 .interrupt_enable = am35xx_enable_emac_int,
54 .interrupt_disable = am35xx_disable_emac_int,
57 static struct mdio_platform_data am35xx_mdio_pdata;
59 static int __init omap_davinci_emac_dev_init(struct omap_hwmod *oh,
60 void *pdata, int pdata_len)
62 struct platform_device *pdev;
64 pdev = omap_device_build(oh->class->name, 0, oh, pdata, pdata_len);
65 if (IS_ERR(pdev)) {
66 WARN(1, "Can't build omap_device for %s:%s.\n",
67 oh->class->name, oh->name);
68 return PTR_ERR(pdev);
71 return 0;
74 void __init am35xx_emac_init(unsigned long mdio_bus_freq, u8 rmii_en)
76 struct omap_hwmod *oh;
77 u32 v;
78 int ret;
80 oh = omap_hwmod_lookup("davinci_mdio");
81 if (!oh) {
82 pr_err("Could not find davinci_mdio hwmod\n");
83 return;
86 am35xx_mdio_pdata.bus_freq = mdio_bus_freq;
88 ret = omap_davinci_emac_dev_init(oh, &am35xx_mdio_pdata,
89 sizeof(am35xx_mdio_pdata));
90 if (ret) {
91 pr_err("Could not build davinci_mdio hwmod device\n");
92 return;
95 oh = omap_hwmod_lookup("davinci_emac");
96 if (!oh) {
97 pr_err("Could not find davinci_emac hwmod\n");
98 return;
101 am35xx_emac_pdata.rmii_en = rmii_en;
103 ret = omap_davinci_emac_dev_init(oh, &am35xx_emac_pdata,
104 sizeof(am35xx_emac_pdata));
105 if (ret) {
106 pr_err("Could not build davinci_emac hwmod device\n");
107 return;
110 v = omap_ctrl_readl(AM35XX_CONTROL_IP_SW_RESET);
111 v &= ~AM35XX_CPGMACSS_SW_RST;
112 omap_ctrl_writel(v, AM35XX_CONTROL_IP_SW_RESET);
113 omap_ctrl_readl(AM35XX_CONTROL_IP_SW_RESET); /* OCP barrier */