arch/arm/mach-omap2/display.c

   1 /*
   2  * OMAP2plus display device setup / initialization.
   3  *
   4  * Copyright (C) 2010 Texas Instruments Incorporated - http://www.ti.com/
   5  *      Senthilvadivu Guruswamy
   6  *      Sumit Semwal
   7  *
   8  * This program is free software; you can redistribute it and/or modify
   9  * it under the terms of the GNU General Public License version 2 as
  10  * published by the Free Software Foundation.
  11  *
  12  * This program is distributed "as is" WITHOUT ANY WARRANTY of any
  13  * kind, whether express or implied; without even the implied warranty
  14  * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  15  * GNU General Public License for more details.
  16  */
  17
  18 #include <linux/string.h>
  19 #include <linux/kernel.h>
  20 #include <linux/init.h>
  21 #include <linux/platform_device.h>
  22 #include <linux/io.h>
  23 #include <linux/clk.h>
  24 #include <linux/err.h>
  25 #include <linux/delay.h>
  26 #include <linux/of.h>
  27 #include <linux/of_platform.h>
  28 #include <linux/slab.h>
  29
  30 #include <video/omapdss.h>
  31 #include "omap_hwmod.h"
  32 #include "omap_device.h"
  33 #include "omap-pm.h"
  34 #include "common.h"
  35
  36 #include "soc.h"
  37 #include "iomap.h"
  38 #include "control.h"
  39 #include "display.h"
  40 #include "prm.h"
  41
  42 #define DISPC_CONTROL           0x0040
  43 #define DISPC_CONTROL2          0x0238
  44 #define DISPC_CONTROL3          0x0848
  45 #define DISPC_IRQSTATUS         0x0018
  46
  47 #define DSS_SYSCONFIG           0x10
  48 #define DSS_SYSSTATUS           0x14
  49 #define DSS_CONTROL             0x40
  50 #define DSS_SDI_CONTROL         0x44
  51 #define DSS_PLL_CONTROL         0x48
  52
  53 #define LCD_EN_MASK             (0x1 << 0)
  54 #define DIGIT_EN_MASK           (0x1 << 1)
  55
  56 #define FRAMEDONE_IRQ_SHIFT     0
  57 #define EVSYNC_EVEN_IRQ_SHIFT   2
  58 #define EVSYNC_ODD_IRQ_SHIFT    3
  59 #define FRAMEDONE2_IRQ_SHIFT    22
  60 #define FRAMEDONE3_IRQ_SHIFT    30
  61 #define FRAMEDONETV_IRQ_SHIFT   24
  62
  63 /*
  64  * FRAMEDONE_IRQ_TIMEOUT: how long (in milliseconds) to wait during DISPC
  65  *     reset before deciding that something has gone wrong
  66  */
  67 #define FRAMEDONE_IRQ_TIMEOUT           100
  68
  69 static struct platform_device omap_display_device = {
  70         .name          = "omapdss",
  71         .id            = -1,
  72         .dev            = {
  73                 .platform_data = NULL,
  74         },
  75 };
  76
  77 struct omap_dss_hwmod_data {
  78         const char *oh_name;
  79         const char *dev_name;
  80         const int id;
  81 };
  82
  83 static const struct omap_dss_hwmod_data omap2_dss_hwmod_data[] __initconst = {
  84         { "dss_core", "omapdss_dss", -1 },
  85         { "dss_dispc", "omapdss_dispc", -1 },
  86         { "dss_rfbi", "omapdss_rfbi", -1 },
  87         { "dss_venc", "omapdss_venc", -1 },
  88 };
  89
  90 static const struct omap_dss_hwmod_data omap3_dss_hwmod_data[] __initconst = {
  91         { "dss_core", "omapdss_dss", -1 },
  92         { "dss_dispc", "omapdss_dispc", -1 },
  93         { "dss_rfbi", "omapdss_rfbi", -1 },
  94         { "dss_venc", "omapdss_venc", -1 },
  95         { "dss_dsi1", "omapdss_dsi", 0 },
  96 };
  97
  98 static const struct omap_dss_hwmod_data omap4_dss_hwmod_data[] __initconst = {
  99         { "dss_core", "omapdss_dss", -1 },
 100         { "dss_dispc", "omapdss_dispc", -1 },
 101         { "dss_rfbi", "omapdss_rfbi", -1 },
 102         { "dss_dsi1", "omapdss_dsi", 0 },
 103         { "dss_dsi2", "omapdss_dsi", 1 },
 104         { "dss_hdmi", "omapdss_hdmi", -1 },
 105 };
 106
 107 static int omap4_dsi_mux_pads(int dsi_id, unsigned lanes)
 108 {
 109         u32 enable_mask, enable_shift;
 110         u32 pipd_mask, pipd_shift;
 111         u32 reg;
 112
 113         if (dsi_id == 0) {
 114                 enable_mask = OMAP4_DSI1_LANEENABLE_MASK;
 115                 enable_shift = OMAP4_DSI1_LANEENABLE_SHIFT;
 116                 pipd_mask = OMAP4_DSI1_PIPD_MASK;
 117                 pipd_shift = OMAP4_DSI1_PIPD_SHIFT;
 118         } else if (dsi_id == 1) {
 119                 enable_mask = OMAP4_DSI2_LANEENABLE_MASK;
 120                 enable_shift = OMAP4_DSI2_LANEENABLE_SHIFT;
 121                 pipd_mask = OMAP4_DSI2_PIPD_MASK;
 122                 pipd_shift = OMAP4_DSI2_PIPD_SHIFT;
 123         } else {
 124                 return -ENODEV;
 125         }
 126
 127         reg = omap4_ctrl_pad_readl(OMAP4_CTRL_MODULE_PAD_CORE_CONTROL_DSIPHY);
 128
 129         reg &= ~enable_mask;
 130         reg &= ~pipd_mask;
 131
 132         reg |= (lanes << enable_shift) & enable_mask;
 133         reg |= (lanes << pipd_shift) & pipd_mask;
 134
 135         omap4_ctrl_pad_writel(reg, OMAP4_CTRL_MODULE_PAD_CORE_CONTROL_DSIPHY);
 136
 137         return 0;
 138 }
 139
 140 static int omap_dsi_enable_pads(int dsi_id, unsigned lane_mask)
 141 {
 142         if (cpu_is_omap44xx())
 143                 return omap4_dsi_mux_pads(dsi_id, lane_mask);
 144
 145         return 0;
 146 }
 147
 148 static void omap_dsi_disable_pads(int dsi_id, unsigned lane_mask)
 149 {
 150         if (cpu_is_omap44xx())
 151                 omap4_dsi_mux_pads(dsi_id, 0);
 152 }
 153
 154 static int omap_dss_set_min_bus_tput(struct device *dev, unsigned long tput)
 155 {
 156         return omap_pm_set_min_bus_tput(dev, OCP_INITIATOR_AGENT, tput);
 157 }
 158
 159 static struct platform_device *create_dss_pdev(const char *pdev_name,
 160                 int pdev_id, const char *oh_name, void *pdata, int pdata_len,
 161                 struct platform_device *parent)
 162 {
 163         struct platform_device *pdev;
 164         struct omap_device *od;
 165         struct omap_hwmod *ohs[1];
 166         struct omap_hwmod *oh;
 167         int r;
 168
 169         oh = omap_hwmod_lookup(oh_name);
 170         if (!oh) {
 171                 pr_err("Could not look up %s\n", oh_name);
 172                 r = -ENODEV;
 173                 goto err;
 174         }
 175
 176         pdev = platform_device_alloc(pdev_name, pdev_id);
 177         if (!pdev) {
 178                 pr_err("Could not create pdev for %s\n", pdev_name);
 179                 r = -ENOMEM;
 180                 goto err;
 181         }
 182
 183         if (parent != NULL)
 184                 pdev->dev.parent = &parent->dev;
 185
 186         if (pdev->id != -1)
 187                 dev_set_name(&pdev->dev, "%s.%d", pdev->name, pdev->id);
 188         else
 189                 dev_set_name(&pdev->dev, "%s", pdev->name);
 190
 191         ohs[0] = oh;
 192         od = omap_device_alloc(pdev, ohs, 1);
 193         if (IS_ERR(od)) {
 194                 pr_err("Could not alloc omap_device for %s\n", pdev_name);
 195                 r = -ENOMEM;
 196                 goto err;
 197         }
 198
 199         r = platform_device_add_data(pdev, pdata, pdata_len);
 200         if (r) {
 201                 pr_err("Could not set pdata for %s\n", pdev_name);
 202                 goto err;
 203         }
 204
 205         r = omap_device_register(pdev);
 206         if (r) {
 207                 pr_err("Could not register omap_device for %s\n", pdev_name);
 208                 goto err;
 209         }
 210
 211         return pdev;
 212
 213 err:
 214         return ERR_PTR(r);
 215 }
 216
 217 static struct platform_device *create_simple_dss_pdev(const char *pdev_name,
 218                 int pdev_id, void *pdata, int pdata_len,
 219                 struct platform_device *parent)
 220 {
 221         struct platform_device *pdev;
 222         int r;
 223
 224         pdev = platform_device_alloc(pdev_name, pdev_id);
 225         if (!pdev) {
 226                 pr_err("Could not create pdev for %s\n", pdev_name);
 227                 r = -ENOMEM;
 228                 goto err;
 229         }
 230
 231         if (parent != NULL)
 232                 pdev->dev.parent = &parent->dev;
 233
 234         if (pdev->id != -1)
 235                 dev_set_name(&pdev->dev, "%s.%d", pdev->name, pdev->id);
 236         else
 237                 dev_set_name(&pdev->dev, "%s", pdev->name);
 238
 239         r = platform_device_add_data(pdev, pdata, pdata_len);
 240         if (r) {
 241                 pr_err("Could not set pdata for %s\n", pdev_name);
 242                 goto err;
 243         }
 244
 245         r = platform_device_add(pdev);
 246         if (r) {
 247                 pr_err("Could not register platform_device for %s\n", pdev_name);
 248                 goto err;
 249         }
 250
 251         return pdev;
 252
 253 err:
 254         return ERR_PTR(r);
 255 }
 256
 257 static enum omapdss_version __init omap_display_get_version(void)
 258 {
 259         if (cpu_is_omap24xx())
 260                 return OMAPDSS_VER_OMAP24xx;
 261         else if (cpu_is_omap3630())
 262                 return OMAPDSS_VER_OMAP3630;
 263         else if (cpu_is_omap34xx()) {
 264                 if (soc_is_am35xx()) {
 265                         return OMAPDSS_VER_AM35xx;
 266                 } else {
 267                         if (omap_rev() < OMAP3430_REV_ES3_0)
 268                                 return OMAPDSS_VER_OMAP34xx_ES1;
 269                         else
 270                                 return OMAPDSS_VER_OMAP34xx_ES3;
 271                 }
 272         } else if (omap_rev() == OMAP4430_REV_ES1_0)
 273                 return OMAPDSS_VER_OMAP4430_ES1;
 274         else if (omap_rev() == OMAP4430_REV_ES2_0 ||
 275                         omap_rev() == OMAP4430_REV_ES2_1 ||
 276                         omap_rev() == OMAP4430_REV_ES2_2)
 277                 return OMAPDSS_VER_OMAP4430_ES2;
 278         else if (cpu_is_omap44xx())
 279                 return OMAPDSS_VER_OMAP4;
 280         else if (soc_is_omap54xx())
 281                 return OMAPDSS_VER_OMAP5;
 282         else if (soc_is_am43xx())
 283                 return OMAPDSS_VER_AM43xx;
 284         else
 285                 return OMAPDSS_VER_UNKNOWN;
 286 }
 287
 288 int __init omap_display_init(struct omap_dss_board_info *board_data)
 289 {
 290         int r = 0;
 291         struct platform_device *pdev;
 292         int i, oh_count;
 293         const struct omap_dss_hwmod_data *curr_dss_hwmod;
 294         struct platform_device *dss_pdev;
 295         enum omapdss_version ver;
 296
 297         /* create omapdss device */
 298
 299         ver = omap_display_get_version();
 300
 301         if (ver == OMAPDSS_VER_UNKNOWN) {
 302                 pr_err("DSS not supported on this SoC\n");
 303                 return -ENODEV;
 304         }
 305
 306         board_data->version = ver;
 307         board_data->dsi_enable_pads = omap_dsi_enable_pads;
 308         board_data->dsi_disable_pads = omap_dsi_disable_pads;
 309         board_data->set_min_bus_tput = omap_dss_set_min_bus_tput;
 310
 311         omap_display_device.dev.platform_data = board_data;
 312
 313         r = platform_device_register(&omap_display_device);
 314         if (r < 0) {
 315                 pr_err("Unable to register omapdss device\n");
 316                 return r;
 317         }
 318
 319         /* create devices for dss hwmods */
 320
 321         if (cpu_is_omap24xx()) {
 322                 curr_dss_hwmod = omap2_dss_hwmod_data;
 323                 oh_count = ARRAY_SIZE(omap2_dss_hwmod_data);
 324         } else if (cpu_is_omap34xx()) {
 325                 curr_dss_hwmod = omap3_dss_hwmod_data;
 326                 oh_count = ARRAY_SIZE(omap3_dss_hwmod_data);
 327         } else {
 328                 curr_dss_hwmod = omap4_dss_hwmod_data;
 329                 oh_count = ARRAY_SIZE(omap4_dss_hwmod_data);
 330         }
 331
 332         /*
 333          * First create the pdev for dss_core, which is used as a parent device
 334          * by the other dss pdevs. Note: dss_core has to be the first item in
 335          * the hwmod list.
 336          */
 337         dss_pdev = create_dss_pdev(curr_dss_hwmod[0].dev_name,
 338                         curr_dss_hwmod[0].id,
 339                         curr_dss_hwmod[0].oh_name,
 340                         board_data, sizeof(*board_data),
 341                         NULL);
 342
 343         if (IS_ERR(dss_pdev)) {
 344                 pr_err("Could not build omap_device for %s\n",
 345                                 curr_dss_hwmod[0].oh_name);
 346
 347                 return PTR_ERR(dss_pdev);
 348         }
 349
 350         for (i = 1; i < oh_count; i++) {
 351                 pdev = create_dss_pdev(curr_dss_hwmod[i].dev_name,
 352                                 curr_dss_hwmod[i].id,
 353                                 curr_dss_hwmod[i].oh_name,
 354                                 board_data, sizeof(*board_data),
 355                                 dss_pdev);
 356
 357                 if (IS_ERR(pdev)) {
 358                         pr_err("Could not build omap_device for %s\n",
 359                                         curr_dss_hwmod[i].oh_name);
 360
 361                         return PTR_ERR(pdev);
 362                 }
 363         }
 364
 365         /* Create devices for DPI and SDI */
 366
 367         pdev = create_simple_dss_pdev("omapdss_dpi", 0,
 368                         board_data, sizeof(*board_data), dss_pdev);
 369         if (IS_ERR(pdev)) {
 370                 pr_err("Could not build platform_device for omapdss_dpi\n");
 371                 return PTR_ERR(pdev);
 372         }
 373
 374         if (cpu_is_omap34xx()) {
 375                 pdev = create_simple_dss_pdev("omapdss_sdi", 0,
 376                                 board_data, sizeof(*board_data), dss_pdev);
 377                 if (IS_ERR(pdev)) {
 378                         pr_err("Could not build platform_device for omapdss_sdi\n");
 379                         return PTR_ERR(pdev);
 380                 }
 381         }
 382
 383         /* create DRM device */
 384         r = omap_init_drm();
 385         if (r < 0) {
 386                 pr_err("Unable to register omapdrm device\n");
 387                 return r;
 388         }
 389
 390         /* create vrfb device */
 391         r = omap_init_vrfb();
 392         if (r < 0) {
 393                 pr_err("Unable to register omapvrfb device\n");
 394                 return r;
 395         }
 396
 397         /* create FB device */
 398         r = omap_init_fb();
 399         if (r < 0) {
 400                 pr_err("Unable to register omapfb device\n");
 401                 return r;
 402         }
 403
 404         /* create V4L2 display device */
 405         r = omap_init_vout();
 406         if (r < 0) {
 407                 pr_err("Unable to register omap_vout device\n");
 408                 return r;
 409         }
 410
 411         return 0;
 412 }
 413
 414 static void dispc_disable_outputs(void)
 415 {
 416         u32 v, irq_mask = 0;
 417         bool lcd_en, digit_en, lcd2_en = false, lcd3_en = false;
 418         int i;
 419         struct omap_dss_dispc_dev_attr *da;
 420         struct omap_hwmod *oh;
 421
 422         oh = omap_hwmod_lookup("dss_dispc");
 423         if (!oh) {
 424                 WARN(1, "display: could not disable outputs during reset - could not find dss_dispc hwmod\n");
 425                 return;
 426         }
 427
 428         if (!oh->dev_attr) {
 429                 pr_err("display: could not disable outputs during reset due to missing dev_attr\n");
 430                 return;
 431         }
 432
 433         da = (struct omap_dss_dispc_dev_attr *)oh->dev_attr;
 434
 435         /* store value of LCDENABLE and DIGITENABLE bits */
 436         v = omap_hwmod_read(oh, DISPC_CONTROL);
 437         lcd_en = v & LCD_EN_MASK;
 438         digit_en = v & DIGIT_EN_MASK;
 439
 440         /* store value of LCDENABLE for LCD2 */
 441         if (da->manager_count > 2) {
 442                 v = omap_hwmod_read(oh, DISPC_CONTROL2);
 443                 lcd2_en = v & LCD_EN_MASK;
 444         }
 445
 446         /* store value of LCDENABLE for LCD3 */
 447         if (da->manager_count > 3) {
 448                 v = omap_hwmod_read(oh, DISPC_CONTROL3);
 449                 lcd3_en = v & LCD_EN_MASK;
 450         }
 451
 452         if (!(lcd_en | digit_en | lcd2_en | lcd3_en))
 453                 return; /* no managers currently enabled */
 454
 455         /*
 456          * If any manager was enabled, we need to disable it before
 457          * DSS clocks are disabled or DISPC module is reset
 458          */
 459         if (lcd_en)
 460                 irq_mask |= 1 << FRAMEDONE_IRQ_SHIFT;
 461
 462         if (digit_en) {
 463                 if (da->has_framedonetv_irq) {
 464                         irq_mask |= 1 << FRAMEDONETV_IRQ_SHIFT;
 465                 } else {
 466                         irq_mask |= 1 << EVSYNC_EVEN_IRQ_SHIFT |
 467                                 1 << EVSYNC_ODD_IRQ_SHIFT;
 468                 }
 469         }
 470
 471         if (lcd2_en)
 472                 irq_mask |= 1 << FRAMEDONE2_IRQ_SHIFT;
 473         if (lcd3_en)
 474                 irq_mask |= 1 << FRAMEDONE3_IRQ_SHIFT;
 475
 476         /*
 477          * clear any previous FRAMEDONE, FRAMEDONETV,
 478          * EVSYNC_EVEN/ODD, FRAMEDONE2 or FRAMEDONE3 interrupts
 479          */
 480         omap_hwmod_write(irq_mask, oh, DISPC_IRQSTATUS);
 481
 482         /* disable LCD and TV managers */
 483         v = omap_hwmod_read(oh, DISPC_CONTROL);
 484         v &= ~(LCD_EN_MASK | DIGIT_EN_MASK);
 485         omap_hwmod_write(v, oh, DISPC_CONTROL);
 486
 487         /* disable LCD2 manager */
 488         if (da->manager_count > 2) {
 489                 v = omap_hwmod_read(oh, DISPC_CONTROL2);
 490                 v &= ~LCD_EN_MASK;
 491                 omap_hwmod_write(v, oh, DISPC_CONTROL2);
 492         }
 493
 494         /* disable LCD3 manager */
 495         if (da->manager_count > 3) {
 496                 v = omap_hwmod_read(oh, DISPC_CONTROL3);
 497                 v &= ~LCD_EN_MASK;
 498                 omap_hwmod_write(v, oh, DISPC_CONTROL3);
 499         }
 500
 501         i = 0;
 502         while ((omap_hwmod_read(oh, DISPC_IRQSTATUS) & irq_mask) !=
 503                irq_mask) {
 504                 i++;
 505                 if (i > FRAMEDONE_IRQ_TIMEOUT) {
 506                         pr_err("didn't get FRAMEDONE1/2/3 or TV interrupt\n");
 507                         break;
 508                 }
 509                 mdelay(1);
 510         }
 511 }
 512
 513 int omap_dss_reset(struct omap_hwmod *oh)
 514 {
 515         struct omap_hwmod_opt_clk *oc;
 516         int c = 0;
 517         int i, r;
 518
 519         if (!(oh->class->sysc->sysc_flags & SYSS_HAS_RESET_STATUS)) {
 520                 pr_err("dss_core: hwmod data doesn't contain reset data\n");
 521                 return -EINVAL;
 522         }
 523
 524         for (i = oh->opt_clks_cnt, oc = oh->opt_clks; i > 0; i--, oc++)
 525                 if (oc->_clk)
 526                         clk_prepare_enable(oc->_clk);
 527
 528         dispc_disable_outputs();
 529
 530         /* clear SDI registers */
 531         if (cpu_is_omap3430()) {
 532                 omap_hwmod_write(0x0, oh, DSS_SDI_CONTROL);
 533                 omap_hwmod_write(0x0, oh, DSS_PLL_CONTROL);
 534         }
 535
 536         /*
 537          * clear DSS_CONTROL register to switch DSS clock sources to
 538          * PRCM clock, if any
 539          */
 540         omap_hwmod_write(0x0, oh, DSS_CONTROL);
 541
 542         omap_test_timeout((omap_hwmod_read(oh, oh->class->sysc->syss_offs)
 543                                 & SYSS_RESETDONE_MASK),
 544                         MAX_MODULE_SOFTRESET_WAIT, c);
 545
 546         if (c == MAX_MODULE_SOFTRESET_WAIT)
 547                 pr_warning("dss_core: waiting for reset to finish failed\n");
 548         else
 549                 pr_debug("dss_core: softreset done\n");
 550
 551         for (i = oh->opt_clks_cnt, oc = oh->opt_clks; i > 0; i--, oc++)
 552                 if (oc->_clk)
 553                         clk_disable_unprepare(oc->_clk);
 554
 555         r = (c == MAX_MODULE_SOFTRESET_WAIT) ? -ETIMEDOUT : 0;
 556
 557         return r;
 558 }
 559
 560 void __init omapdss_early_init_of(void)
 561 {
 562
 563 }
 564
 565 struct device_node * __init omapdss_find_dss_of_node(void)
 566 {
 567         struct device_node *node;
 568
 569         node = of_find_compatible_node(NULL, NULL, "ti,omap2-dss");
 570         if (node)
 571                 return node;
 572
 573         node = of_find_compatible_node(NULL, NULL, "ti,omap3-dss");
 574         if (node)
 575                 return node;
 576
 577         node = of_find_compatible_node(NULL, NULL, "ti,omap4-dss");
 578         if (node)
 579                 return node;
 580
 581         node = of_find_compatible_node(NULL, NULL, "ti,omap5-dss");
 582         if (node)
 583                 return node;
 584
 585         return NULL;
 586 }
 587
 588 int __init omapdss_init_of(void)
 589 {
 590         int r;
 591         enum omapdss_version ver;
 592         struct device_node *node;
 593         struct platform_device *pdev;
 594
 595         static struct omap_dss_board_info board_data = {
 596                 .dsi_enable_pads = omap_dsi_enable_pads,
 597                 .dsi_disable_pads = omap_dsi_disable_pads,
 598                 .set_min_bus_tput = omap_dss_set_min_bus_tput,
 599         };
 600
 601         /* only create dss helper devices if dss is enabled in the .dts */
 602
 603         node = omapdss_find_dss_of_node();
 604         if (!node)
 605                 return 0;
 606
 607         if (!of_device_is_available(node))
 608                 return 0;
 609
 610         ver = omap_display_get_version();
 611
 612         if (ver == OMAPDSS_VER_UNKNOWN) {
 613                 pr_err("DSS not supported on this SoC\n");
 614                 return -ENODEV;
 615         }
 616
 617         pdev = of_find_device_by_node(node);
 618
 619         if (!pdev) {
 620                 pr_err("Unable to find DSS platform device\n");
 621                 return -ENODEV;
 622         }
 623
 624         r = of_platform_populate(node, NULL, NULL, &pdev->dev);
 625         if (r) {
 626                 pr_err("Unable to populate DSS submodule devices\n");
 627                 return r;
 628         }
 629
 630         board_data.version = ver;
 631
 632         omap_display_device.dev.platform_data = &board_data;
 633
 634         r = platform_device_register(&omap_display_device);
 635         if (r < 0) {
 636                 pr_err("Unable to register omapdss device\n");
 637                 return r;
 638         }
 639
 640         /* create DRM device */
 641         r = omap_init_drm();
 642         if (r < 0) {
 643                 pr_err("Unable to register omapdrm device\n");
 644                 return r;
 645         }
 646
 647         /* create vrfb device */
 648         r = omap_init_vrfb();
 649         if (r < 0) {
 650                 pr_err("Unable to register omapvrfb device\n");
 651                 return r;
 652         }
 653
 654         /* create FB device */
 655         r = omap_init_fb();
 656         if (r < 0) {
 657                 pr_err("Unable to register omapfb device\n");
 658                 return r;
 659         }
 660
 661         /* create V4L2 display device */
 662         r = omap_init_vout();
 663         if (r < 0) {
 664                 pr_err("Unable to register omap_vout device\n");
 665                 return r;
 666         }
 667
 668         return 0;
 669 }