arch/arm/mach-orion5x/irq.c

   1 /*
   2  * arch/arm/mach-orion5x/irq.c
   3  *
   4  * Core IRQ functions for Marvell Orion System On Chip
   5  *
   6  * Maintainer: Tzachi Perelstein <tzachi@marvell.com>
   7  *
   8  * This file is licensed under the terms of the GNU General Public
   9  * License version 2.  This program is licensed "as is" without any
  10  * warranty of any kind, whether express or implied.
  11  */
  12 #include <linux/gpio.h>
  13 #include <linux/kernel.h>
  14 #include <linux/irq.h>
  15 #include <linux/io.h>
  16 #include <mach/bridge-regs.h>
  17 #include <plat/orion-gpio.h>
  18 #include <plat/irq.h>
  19 #include <asm/exception.h>
  20 #include "common.h"
  21
  22 static int __initdata gpio0_irqs[4] = {
  23         IRQ_ORION5X_GPIO_0_7,
  24         IRQ_ORION5X_GPIO_8_15,
  25         IRQ_ORION5X_GPIO_16_23,
  26         IRQ_ORION5X_GPIO_24_31,
  27 };
  28
  29 #ifdef CONFIG_MULTI_IRQ_HANDLER
  30 /*
  31  * Compiling with both non-DT and DT support enabled, will
  32  * break asm irq handler used by non-DT boards. Therefore,
  33  * we provide a C-style irq handler even for non-DT boards,
  34  * if MULTI_IRQ_HANDLER is set.
  35  */
  36
  37 asmlinkage void
  38 __exception_irq_entry orion5x_legacy_handle_irq(struct pt_regs *regs)
  39 {
  40         u32 stat;
  41
  42         stat = readl_relaxed(MAIN_IRQ_CAUSE);
  43         stat &= readl_relaxed(MAIN_IRQ_MASK);
  44         if (stat) {
  45                 unsigned int hwirq = __fls(stat);
  46                 handle_IRQ(hwirq, regs);
  47                 return;
  48         }
  49 }
  50 #endif
  51
  52 void __init orion5x_init_irq(void)
  53 {
  54         orion_irq_init(0, MAIN_IRQ_MASK);
  55
  56 #ifdef CONFIG_MULTI_IRQ_HANDLER
  57         set_handle_irq(orion5x_legacy_handle_irq);
  58 #endif
  59
  60         /*
  61          * Initialize gpiolib for GPIOs 0-31.
  62          */
  63         orion_gpio_init(NULL, 0, 32, GPIO_VIRT_BASE, 0,
  64                         IRQ_ORION5X_GPIO_START, gpio0_irqs);
  65 }