Merge tag 'locks-v3.16-2' of git://git.samba.org/jlayton/linux
[linux/fpc-iii.git] / arch / arm / mach-orion5x / rd88f5181l-fxo-setup.c
blob213b3e143c5761bf2853738a1ec2d50976e9d74f
1 /*
2 * arch/arm/mach-orion5x/rd88f5181l-fxo-setup.c
4 * Marvell Orion-VoIP FXO Reference Design Setup
6 * This file is licensed under the terms of the GNU General Public
7 * License version 2. This program is licensed "as is" without any
8 * warranty of any kind, whether express or implied.
9 */
10 #include <linux/gpio.h>
11 #include <linux/kernel.h>
12 #include <linux/init.h>
13 #include <linux/platform_device.h>
14 #include <linux/pci.h>
15 #include <linux/irq.h>
16 #include <linux/mtd/physmap.h>
17 #include <linux/mv643xx_eth.h>
18 #include <linux/ethtool.h>
19 #include <net/dsa.h>
20 #include <asm/mach-types.h>
21 #include <asm/mach/arch.h>
22 #include <asm/mach/pci.h>
23 #include <mach/orion5x.h>
24 #include "common.h"
25 #include "mpp.h"
27 /*****************************************************************************
28 * RD-88F5181L FXO Info
29 ****************************************************************************/
31 * 8M NOR flash Device bus boot chip select
33 #define RD88F5181L_FXO_NOR_BOOT_BASE 0xff800000
34 #define RD88F5181L_FXO_NOR_BOOT_SIZE SZ_8M
37 /*****************************************************************************
38 * 8M NOR Flash on Device bus Boot chip select
39 ****************************************************************************/
40 static struct physmap_flash_data rd88f5181l_fxo_nor_boot_flash_data = {
41 .width = 1,
44 static struct resource rd88f5181l_fxo_nor_boot_flash_resource = {
45 .flags = IORESOURCE_MEM,
46 .start = RD88F5181L_FXO_NOR_BOOT_BASE,
47 .end = RD88F5181L_FXO_NOR_BOOT_BASE +
48 RD88F5181L_FXO_NOR_BOOT_SIZE - 1,
51 static struct platform_device rd88f5181l_fxo_nor_boot_flash = {
52 .name = "physmap-flash",
53 .id = 0,
54 .dev = {
55 .platform_data = &rd88f5181l_fxo_nor_boot_flash_data,
57 .num_resources = 1,
58 .resource = &rd88f5181l_fxo_nor_boot_flash_resource,
62 /*****************************************************************************
63 * General Setup
64 ****************************************************************************/
65 static unsigned int rd88f5181l_fxo_mpp_modes[] __initdata = {
66 MPP0_GPIO, /* LED1 CardBus LED (front panel) */
67 MPP1_GPIO, /* PCI_intA */
68 MPP2_GPIO, /* Hard Reset / Factory Init*/
69 MPP3_GPIO, /* FXS or DAA select */
70 MPP4_GPIO, /* LED6 - phone LED (front panel) */
71 MPP5_GPIO, /* LED5 - phone LED (front panel) */
72 MPP6_PCI_CLK, /* CPU PCI refclk */
73 MPP7_PCI_CLK, /* PCI/PCIe refclk */
74 MPP8_GPIO, /* CardBus reset */
75 MPP9_GPIO, /* GE_RXERR */
76 MPP10_GPIO, /* LED2 MiniPCI LED (front panel) */
77 MPP11_GPIO, /* Lifeline control */
78 MPP12_GIGE, /* GE_TXD[4] */
79 MPP13_GIGE, /* GE_TXD[5] */
80 MPP14_GIGE, /* GE_TXD[6] */
81 MPP15_GIGE, /* GE_TXD[7] */
82 MPP16_GIGE, /* GE_RXD[4] */
83 MPP17_GIGE, /* GE_RXD[5] */
84 MPP18_GIGE, /* GE_RXD[6] */
85 MPP19_GIGE, /* GE_RXD[7] */
89 static struct mv643xx_eth_platform_data rd88f5181l_fxo_eth_data = {
90 .phy_addr = MV643XX_ETH_PHY_NONE,
91 .speed = SPEED_1000,
92 .duplex = DUPLEX_FULL,
95 static struct dsa_chip_data rd88f5181l_fxo_switch_chip_data = {
96 .port_names[0] = "lan2",
97 .port_names[1] = "lan1",
98 .port_names[2] = "wan",
99 .port_names[3] = "cpu",
100 .port_names[5] = "lan4",
101 .port_names[7] = "lan3",
104 static struct dsa_platform_data rd88f5181l_fxo_switch_plat_data = {
105 .nr_chips = 1,
106 .chip = &rd88f5181l_fxo_switch_chip_data,
109 static void __init rd88f5181l_fxo_init(void)
112 * Setup basic Orion functions. Need to be called early.
114 orion5x_init();
116 orion5x_mpp_conf(rd88f5181l_fxo_mpp_modes);
119 * Configure peripherals.
121 orion5x_ehci0_init();
122 orion5x_eth_init(&rd88f5181l_fxo_eth_data);
123 orion5x_eth_switch_init(&rd88f5181l_fxo_switch_plat_data, NO_IRQ);
124 orion5x_uart0_init();
126 mvebu_mbus_add_window_by_id(ORION_MBUS_DEVBUS_BOOT_TARGET,
127 ORION_MBUS_DEVBUS_BOOT_ATTR,
128 RD88F5181L_FXO_NOR_BOOT_BASE,
129 RD88F5181L_FXO_NOR_BOOT_SIZE);
130 platform_device_register(&rd88f5181l_fxo_nor_boot_flash);
133 static int __init
134 rd88f5181l_fxo_pci_map_irq(const struct pci_dev *dev, u8 slot, u8 pin)
136 int irq;
139 * Check for devices with hard-wired IRQs.
141 irq = orion5x_pci_map_irq(dev, slot, pin);
142 if (irq != -1)
143 return irq;
146 * Mini-PCI / Cardbus slot.
148 return gpio_to_irq(1);
151 static struct hw_pci rd88f5181l_fxo_pci __initdata = {
152 .nr_controllers = 2,
153 .setup = orion5x_pci_sys_setup,
154 .scan = orion5x_pci_sys_scan_bus,
155 .map_irq = rd88f5181l_fxo_pci_map_irq,
158 static int __init rd88f5181l_fxo_pci_init(void)
160 if (machine_is_rd88f5181l_fxo()) {
161 orion5x_pci_set_cardbus_mode();
162 pci_common_init(&rd88f5181l_fxo_pci);
165 return 0;
167 subsys_initcall(rd88f5181l_fxo_pci_init);
169 MACHINE_START(RD88F5181L_FXO, "Marvell Orion-VoIP FXO Reference Design")
170 /* Maintainer: Nicolas Pitre <nico@marvell.com> */
171 .atag_offset = 0x100,
172 .init_machine = rd88f5181l_fxo_init,
173 .map_io = orion5x_map_io,
174 .init_early = orion5x_init_early,
175 .init_irq = orion5x_init_irq,
176 .init_time = orion5x_timer_init,
177 .fixup = tag_fixup_mem32,
178 .restart = orion5x_restart,
179 MACHINE_END