arch/arm/mach-s3c24xx/s3c2443.c

   1 /* linux/arch/arm/mach-s3c2443/s3c2443.c
   2  *
   3  * Copyright (c) 2007 Simtec Electronics
   4  *   Ben Dooks <ben@simtec.co.uk>
   5  *
   6  * Samsung S3C2443 Mobile CPU support
   7  *
   8  * This program is free software; you can redistribute it and/or modify
   9  * it under the terms of the GNU General Public License version 2 as
  10  * published by the Free Software Foundation.
  11 */
  12
  13 #include <linux/kernel.h>
  14 #include <linux/types.h>
  15 #include <linux/interrupt.h>
  16 #include <linux/list.h>
  17 #include <linux/timer.h>
  18 #include <linux/init.h>
  19 #include <linux/gpio.h>
  20 #include <linux/platform_device.h>
  21 #include <linux/serial_core.h>
  22 #include <linux/device.h>
  23 #include <linux/clk.h>
  24 #include <linux/io.h>
  25 #include <linux/reboot.h>
  26
  27 #include <asm/mach/arch.h>
  28 #include <asm/mach/map.h>
  29 #include <asm/mach/irq.h>
  30
  31 #include <mach/hardware.h>
  32 #include <mach/gpio-samsung.h>
  33 #include <asm/irq.h>
  34 #include <asm/system_misc.h>
  35
  36 #include <mach/regs-s3c2443-clock.h>
  37 #include <mach/rtc-core.h>
  38
  39 #include <plat/gpio-core.h>
  40 #include <plat/gpio-cfg.h>
  41 #include <plat/gpio-cfg-helpers.h>
  42 #include <plat/devs.h>
  43 #include <plat/cpu.h>
  44 #include <plat/fb-core.h>
  45 #include <plat/nand-core.h>
  46 #include <plat/adc-core.h>
  47 #include <plat/spi-core.h>
  48
  49 static struct map_desc s3c2443_iodesc[] __initdata = {
  50         IODESC_ENT(WATCHDOG),
  51         IODESC_ENT(CLKPWR),
  52         IODESC_ENT(TIMER),
  53 };
  54
  55 struct bus_type s3c2443_subsys = {
  56         .name = "s3c2443-core",
  57         .dev_name = "s3c2443-core",
  58 };
  59
  60 static struct device s3c2443_dev = {
  61         .bus            = &s3c2443_subsys,
  62 };
  63
  64 void s3c2443_restart(enum reboot_mode mode, const char *cmd)
  65 {
  66         if (mode == REBOOT_SOFT)
  67                 soft_restart(0);
  68
  69         __raw_writel(S3C2443_SWRST_RESET, S3C2443_SWRST);
  70 }
  71
  72 int __init s3c2443_init(void)
  73 {
  74         printk("S3C2443: Initialising architecture\n");
  75
  76         s3c_nand_setname("s3c2412-nand");
  77         s3c_fb_setname("s3c2443-fb");
  78
  79         s3c_adc_setname("s3c2443-adc");
  80         s3c_rtc_setname("s3c2443-rtc");
  81
  82         /* change WDT IRQ number */
  83         s3c_device_wdt.resource[1].start = IRQ_S3C2443_WDT;
  84         s3c_device_wdt.resource[1].end   = IRQ_S3C2443_WDT;
  85
  86         return device_register(&s3c2443_dev);
  87 }
  88
  89 void __init s3c2443_init_uarts(struct s3c2410_uartcfg *cfg, int no)
  90 {
  91         s3c24xx_init_uartdevs("s3c2440-uart", s3c2410_uart_resources, cfg, no);
  92 }
  93
  94 /* s3c2443_map_io
  95  *
  96  * register the standard cpu IO areas, and any passed in from the
  97  * machine specific initialisation.
  98  */
  99
 100 void __init s3c2443_map_io(void)
 101 {
 102         s3c24xx_gpiocfg_default.set_pull = s3c2443_gpio_setpull;
 103         s3c24xx_gpiocfg_default.get_pull = s3c2443_gpio_getpull;
 104
 105         /* initialize device information early */
 106         s3c64xx_spi_setname("s3c2443-spi");
 107
 108         iotable_init(s3c2443_iodesc, ARRAY_SIZE(s3c2443_iodesc));
 109 }
 110
 111 /* need to register the subsystem before we actually register the device, and
 112  * we also need to ensure that it has been initialised before any of the
 113  * drivers even try to use it (even if not on an s3c2443 based system)
 114  * as a driver which may support both 2443 and 2440 may try and use it.
 115 */
 116
 117 static int __init s3c2443_core_init(void)
 118 {
 119         return subsys_system_register(&s3c2443_subsys, NULL);
 120 }
 121
 122 core_initcall(s3c2443_core_init);