arch/arm/mach-tegra/tegra.c

   1 /*
   2  * NVIDIA Tegra SoC device tree board support
   3  *
   4  * Copyright (C) 2011, 2013, NVIDIA Corporation
   5  * Copyright (C) 2010 Secret Lab Technologies, Ltd.
   6  * Copyright (C) 2010 Google, Inc.
   7  *
   8  * This software is licensed under the terms of the GNU General Public
   9  * License version 2, as published by the Free Software Foundation, and
  10  * may be copied, distributed, and modified under those terms.
  11  *
  12  * This program is distributed in the hope that it will be useful,
  13  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  14  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  15  * GNU General Public License for more details.
  16  *
  17  */
  18
  19 #include <linux/kernel.h>
  20 #include <linux/init.h>
  21 #include <linux/platform_device.h>
  22 #include <linux/serial_8250.h>
  23 #include <linux/clk.h>
  24 #include <linux/dma-mapping.h>
  25 #include <linux/irqdomain.h>
  26 #include <linux/of.h>
  27 #include <linux/of_address.h>
  28 #include <linux/of_fdt.h>
  29 #include <linux/of_platform.h>
  30 #include <linux/pda_power.h>
  31 #include <linux/io.h>
  32 #include <linux/slab.h>
  33 #include <linux/sys_soc.h>
  34 #include <linux/usb/tegra_usb_phy.h>
  35 #include <linux/clk/tegra.h>
  36 #include <linux/irqchip.h>
  37
  38 #include <asm/hardware/cache-l2x0.h>
  39 #include <asm/mach-types.h>
  40 #include <asm/mach/arch.h>
  41 #include <asm/mach/time.h>
  42 #include <asm/setup.h>
  43 #include <asm/trusted_foundations.h>
  44
  45 #include "apbio.h"
  46 #include "board.h"
  47 #include "common.h"
  48 #include "cpuidle.h"
  49 #include "fuse.h"
  50 #include "iomap.h"
  51 #include "irq.h"
  52 #include "pmc.h"
  53 #include "pm.h"
  54 #include "reset.h"
  55 #include "sleep.h"
  56
  57 /*
  58  * Storage for debug-macro.S's state.
  59  *
  60  * This must be in .data not .bss so that it gets initialized each time the
  61  * kernel is loaded. The data is declared here rather than debug-macro.S so
  62  * that multiple inclusions of debug-macro.S point at the same data.
  63  */
  64 u32 tegra_uart_config[3] = {
  65         /* Debug UART initialization required */
  66         1,
  67         /* Debug UART physical address */
  68         0,
  69         /* Debug UART virtual address */
  70         0,
  71 };
  72
  73 static void __init tegra_init_early(void)
  74 {
  75         of_register_trusted_foundations();
  76         tegra_apb_io_init();
  77         tegra_init_fuse();
  78         tegra_cpu_reset_handler_init();
  79         tegra_powergate_init();
  80         tegra_hotplug_init();
  81 }
  82
  83 static void __init tegra_dt_init_irq(void)
  84 {
  85         tegra_pmc_init_irq();
  86         tegra_init_irq();
  87         irqchip_init();
  88         tegra_legacy_irq_syscore_init();
  89 }
  90
  91 static void __init tegra_dt_init(void)
  92 {
  93         struct soc_device_attribute *soc_dev_attr;
  94         struct soc_device *soc_dev;
  95         struct device *parent = NULL;
  96
  97         tegra_pmc_init();
  98
  99         tegra_clocks_apply_init_table();
 100
 101         soc_dev_attr = kzalloc(sizeof(*soc_dev_attr), GFP_KERNEL);
 102         if (!soc_dev_attr)
 103                 goto out;
 104
 105         soc_dev_attr->family = kasprintf(GFP_KERNEL, "Tegra");
 106         soc_dev_attr->revision = kasprintf(GFP_KERNEL, "%d", tegra_revision);
 107         soc_dev_attr->soc_id = kasprintf(GFP_KERNEL, "%d", tegra_chip_id);
 108
 109         soc_dev = soc_device_register(soc_dev_attr);
 110         if (IS_ERR(soc_dev)) {
 111                 kfree(soc_dev_attr->family);
 112                 kfree(soc_dev_attr->revision);
 113                 kfree(soc_dev_attr->soc_id);
 114                 kfree(soc_dev_attr);
 115                 goto out;
 116         }
 117
 118         parent = soc_device_to_device(soc_dev);
 119
 120         /*
 121          * Finished with the static registrations now; fill in the missing
 122          * devices
 123          */
 124 out:
 125         of_platform_populate(NULL, of_default_bus_match_table, NULL, parent);
 126 }
 127
 128 static void __init paz00_init(void)
 129 {
 130         if (IS_ENABLED(CONFIG_ARCH_TEGRA_2x_SOC))
 131                 tegra_paz00_wifikill_init();
 132 }
 133
 134 static struct {
 135         char *machine;
 136         void (*init)(void);
 137 } board_init_funcs[] = {
 138         { "compal,paz00", paz00_init },
 139 };
 140
 141 static void __init tegra_dt_init_late(void)
 142 {
 143         int i;
 144
 145         tegra_init_suspend();
 146         tegra_cpuidle_init();
 147         tegra_powergate_debugfs_init();
 148
 149         for (i = 0; i < ARRAY_SIZE(board_init_funcs); i++) {
 150                 if (of_machine_is_compatible(board_init_funcs[i].machine)) {
 151                         board_init_funcs[i].init();
 152                         break;
 153                 }
 154         }
 155 }
 156
 157 static const char * const tegra_dt_board_compat[] = {
 158         "nvidia,tegra124",
 159         "nvidia,tegra114",
 160         "nvidia,tegra30",
 161         "nvidia,tegra20",
 162         NULL
 163 };
 164
 165 DT_MACHINE_START(TEGRA_DT, "NVIDIA Tegra SoC (Flattened Device Tree)")
 166         .l2c_aux_val    = 0x3c400001,
 167         .l2c_aux_mask   = 0xc20fc3fe,
 168         .smp            = smp_ops(tegra_smp_ops),
 169         .map_io         = tegra_map_common_io,
 170         .init_early     = tegra_init_early,
 171         .init_irq       = tegra_dt_init_irq,
 172         .init_machine   = tegra_dt_init,
 173         .init_late      = tegra_dt_init_late,
 174         .restart        = tegra_pmc_restart,
 175         .dt_compat      = tegra_dt_board_compat,
 176 MACHINE_END