1 /* linux/arch/arm/plat-samsung/devs.c
3 * Copyright (c) 2011 Samsung Electronics Co., Ltd.
4 * http://www.samsung.com
6 * Base SAMSUNG platform device definitions
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
13 #include <linux/amba/pl330.h>
14 #include <linux/kernel.h>
15 #include <linux/types.h>
16 #include <linux/interrupt.h>
17 #include <linux/list.h>
18 #include <linux/timer.h>
19 #include <linux/init.h>
20 #include <linux/serial_core.h>
21 #include <linux/serial_s3c.h>
22 #include <linux/platform_device.h>
24 #include <linux/slab.h>
25 #include <linux/string.h>
26 #include <linux/dma-mapping.h>
28 #include <linux/gfp.h>
29 #include <linux/mtd/mtd.h>
30 #include <linux/mtd/onenand.h>
31 #include <linux/mtd/partitions.h>
32 #include <linux/mmc/host.h>
33 #include <linux/ioport.h>
34 #include <linux/sizes.h>
35 #include <linux/platform_data/s3c-hsudc.h>
36 #include <linux/platform_data/s3c-hsotg.h>
37 #include <linux/platform_data/dma-s3c24xx.h>
39 #include <media/s5p_hdmi.h>
42 #include <asm/mach/arch.h>
43 #include <asm/mach/map.h>
44 #include <asm/mach/irq.h>
47 #include <mach/irqs.h>
51 #include <plat/devs.h>
53 #include <linux/platform_data/ata-samsung_cf.h>
55 #include <plat/fb-s3c2410.h>
56 #include <plat/hdmi.h>
57 #include <linux/platform_data/hwmon-s3c.h>
58 #include <linux/platform_data/i2c-s3c2410.h>
59 #include <plat/keypad.h>
60 #include <linux/platform_data/mmc-s3cmci.h>
61 #include <linux/platform_data/mtd-nand-s3c2410.h>
62 #include <plat/pwm-core.h>
63 #include <plat/sdhci.h>
64 #include <linux/platform_data/touchscreen-s3c2410.h>
65 #include <linux/platform_data/usb-s3c2410_udc.h>
66 #include <linux/platform_data/usb-ohci-s3c2410.h>
67 #include <plat/usb-phy.h>
68 #include <plat/regs-spi.h>
69 #include <linux/platform_data/spi-s3c64xx.h>
71 static u64 samsung_device_dma_mask
= DMA_BIT_MASK(32);
74 #ifdef CONFIG_CPU_S3C2440
75 static struct resource s3c_ac97_resource
[] = {
76 [0] = DEFINE_RES_MEM(S3C2440_PA_AC97
, S3C2440_SZ_AC97
),
77 [1] = DEFINE_RES_IRQ(IRQ_S3C244X_AC97
),
78 [2] = DEFINE_RES_DMA_NAMED(DMACH_PCM_OUT
, "PCM out"),
79 [3] = DEFINE_RES_DMA_NAMED(DMACH_PCM_IN
, "PCM in"),
80 [4] = DEFINE_RES_DMA_NAMED(DMACH_MIC_IN
, "Mic in"),
83 struct platform_device s3c_device_ac97
= {
84 .name
= "samsung-ac97",
86 .num_resources
= ARRAY_SIZE(s3c_ac97_resource
),
87 .resource
= s3c_ac97_resource
,
89 .dma_mask
= &samsung_device_dma_mask
,
90 .coherent_dma_mask
= DMA_BIT_MASK(32),
93 #endif /* CONFIG_CPU_S3C2440 */
97 #ifdef CONFIG_PLAT_S3C24XX
98 static struct resource s3c_adc_resource
[] = {
99 [0] = DEFINE_RES_MEM(S3C24XX_PA_ADC
, S3C24XX_SZ_ADC
),
100 [1] = DEFINE_RES_IRQ(IRQ_TC
),
101 [2] = DEFINE_RES_IRQ(IRQ_ADC
),
104 struct platform_device s3c_device_adc
= {
105 .name
= "s3c24xx-adc",
107 .num_resources
= ARRAY_SIZE(s3c_adc_resource
),
108 .resource
= s3c_adc_resource
,
110 #endif /* CONFIG_PLAT_S3C24XX */
112 #if defined(CONFIG_SAMSUNG_DEV_ADC)
113 static struct resource s3c_adc_resource
[] = {
114 [0] = DEFINE_RES_MEM(SAMSUNG_PA_ADC
, SZ_256
),
115 [1] = DEFINE_RES_IRQ(IRQ_TC
),
116 [2] = DEFINE_RES_IRQ(IRQ_ADC
),
119 struct platform_device s3c_device_adc
= {
120 .name
= "samsung-adc",
122 .num_resources
= ARRAY_SIZE(s3c_adc_resource
),
123 .resource
= s3c_adc_resource
,
125 #endif /* CONFIG_SAMSUNG_DEV_ADC */
127 /* Camif Controller */
129 #ifdef CONFIG_CPU_S3C2440
130 static struct resource s3c_camif_resource
[] = {
131 [0] = DEFINE_RES_MEM(S3C2440_PA_CAMIF
, S3C2440_SZ_CAMIF
),
132 [1] = DEFINE_RES_IRQ(IRQ_S3C2440_CAM_C
),
133 [2] = DEFINE_RES_IRQ(IRQ_S3C2440_CAM_P
),
136 struct platform_device s3c_device_camif
= {
137 .name
= "s3c2440-camif",
139 .num_resources
= ARRAY_SIZE(s3c_camif_resource
),
140 .resource
= s3c_camif_resource
,
142 .dma_mask
= &samsung_device_dma_mask
,
143 .coherent_dma_mask
= DMA_BIT_MASK(32),
146 #endif /* CONFIG_CPU_S3C2440 */
150 #ifdef CONFIG_PLAT_S5P
151 static struct resource samsung_asoc_idma_resource
= DEFINE_RES_IRQ(IRQ_I2S0
);
153 struct platform_device samsung_asoc_idma
= {
154 .name
= "samsung-idma",
157 .resource
= &samsung_asoc_idma_resource
,
159 .dma_mask
= &samsung_device_dma_mask
,
160 .coherent_dma_mask
= DMA_BIT_MASK(32),
167 #ifdef CONFIG_S3C_DEV_FB
168 static struct resource s3c_fb_resource
[] = {
169 [0] = DEFINE_RES_MEM(S3C_PA_FB
, SZ_16K
),
170 [1] = DEFINE_RES_IRQ(IRQ_LCD_VSYNC
),
171 [2] = DEFINE_RES_IRQ(IRQ_LCD_FIFO
),
172 [3] = DEFINE_RES_IRQ(IRQ_LCD_SYSTEM
),
175 struct platform_device s3c_device_fb
= {
178 .num_resources
= ARRAY_SIZE(s3c_fb_resource
),
179 .resource
= s3c_fb_resource
,
181 .dma_mask
= &samsung_device_dma_mask
,
182 .coherent_dma_mask
= DMA_BIT_MASK(32),
186 void __init
s3c_fb_set_platdata(struct s3c_fb_platdata
*pd
)
188 s3c_set_platdata(pd
, sizeof(struct s3c_fb_platdata
),
191 #endif /* CONFIG_S3C_DEV_FB */
195 #ifdef CONFIG_S5P_DEV_FIMC0
196 static struct resource s5p_fimc0_resource
[] = {
197 [0] = DEFINE_RES_MEM(S5P_PA_FIMC0
, SZ_4K
),
198 [1] = DEFINE_RES_IRQ(IRQ_FIMC0
),
201 struct platform_device s5p_device_fimc0
= {
204 .num_resources
= ARRAY_SIZE(s5p_fimc0_resource
),
205 .resource
= s5p_fimc0_resource
,
207 .dma_mask
= &samsung_device_dma_mask
,
208 .coherent_dma_mask
= DMA_BIT_MASK(32),
212 struct platform_device s5p_device_fimc_md
= {
213 .name
= "s5p-fimc-md",
216 #endif /* CONFIG_S5P_DEV_FIMC0 */
218 #ifdef CONFIG_S5P_DEV_FIMC1
219 static struct resource s5p_fimc1_resource
[] = {
220 [0] = DEFINE_RES_MEM(S5P_PA_FIMC1
, SZ_4K
),
221 [1] = DEFINE_RES_IRQ(IRQ_FIMC1
),
224 struct platform_device s5p_device_fimc1
= {
227 .num_resources
= ARRAY_SIZE(s5p_fimc1_resource
),
228 .resource
= s5p_fimc1_resource
,
230 .dma_mask
= &samsung_device_dma_mask
,
231 .coherent_dma_mask
= DMA_BIT_MASK(32),
234 #endif /* CONFIG_S5P_DEV_FIMC1 */
236 #ifdef CONFIG_S5P_DEV_FIMC2
237 static struct resource s5p_fimc2_resource
[] = {
238 [0] = DEFINE_RES_MEM(S5P_PA_FIMC2
, SZ_4K
),
239 [1] = DEFINE_RES_IRQ(IRQ_FIMC2
),
242 struct platform_device s5p_device_fimc2
= {
245 .num_resources
= ARRAY_SIZE(s5p_fimc2_resource
),
246 .resource
= s5p_fimc2_resource
,
248 .dma_mask
= &samsung_device_dma_mask
,
249 .coherent_dma_mask
= DMA_BIT_MASK(32),
252 #endif /* CONFIG_S5P_DEV_FIMC2 */
254 #ifdef CONFIG_S5P_DEV_FIMC3
255 static struct resource s5p_fimc3_resource
[] = {
256 [0] = DEFINE_RES_MEM(S5P_PA_FIMC3
, SZ_4K
),
257 [1] = DEFINE_RES_IRQ(IRQ_FIMC3
),
260 struct platform_device s5p_device_fimc3
= {
263 .num_resources
= ARRAY_SIZE(s5p_fimc3_resource
),
264 .resource
= s5p_fimc3_resource
,
266 .dma_mask
= &samsung_device_dma_mask
,
267 .coherent_dma_mask
= DMA_BIT_MASK(32),
270 #endif /* CONFIG_S5P_DEV_FIMC3 */
274 #ifdef CONFIG_S5P_DEV_G2D
275 static struct resource s5p_g2d_resource
[] = {
276 [0] = DEFINE_RES_MEM(S5P_PA_G2D
, SZ_4K
),
277 [1] = DEFINE_RES_IRQ(IRQ_2D
),
280 struct platform_device s5p_device_g2d
= {
283 .num_resources
= ARRAY_SIZE(s5p_g2d_resource
),
284 .resource
= s5p_g2d_resource
,
286 .dma_mask
= &samsung_device_dma_mask
,
287 .coherent_dma_mask
= DMA_BIT_MASK(32),
290 #endif /* CONFIG_S5P_DEV_G2D */
292 #ifdef CONFIG_S5P_DEV_JPEG
293 static struct resource s5p_jpeg_resource
[] = {
294 [0] = DEFINE_RES_MEM(S5P_PA_JPEG
, SZ_4K
),
295 [1] = DEFINE_RES_IRQ(IRQ_JPEG
),
298 struct platform_device s5p_device_jpeg
= {
301 .num_resources
= ARRAY_SIZE(s5p_jpeg_resource
),
302 .resource
= s5p_jpeg_resource
,
304 .dma_mask
= &samsung_device_dma_mask
,
305 .coherent_dma_mask
= DMA_BIT_MASK(32),
308 #endif /* CONFIG_S5P_DEV_JPEG */
312 #ifdef CONFIG_S5P_DEV_FIMD0
313 static struct resource s5p_fimd0_resource
[] = {
314 [0] = DEFINE_RES_MEM(S5P_PA_FIMD0
, SZ_32K
),
315 [1] = DEFINE_RES_IRQ_NAMED(IRQ_FIMD0_VSYNC
, "vsync"),
316 [2] = DEFINE_RES_IRQ_NAMED(IRQ_FIMD0_FIFO
, "fifo"),
317 [3] = DEFINE_RES_IRQ_NAMED(IRQ_FIMD0_SYSTEM
, "lcd_sys"),
320 struct platform_device s5p_device_fimd0
= {
323 .num_resources
= ARRAY_SIZE(s5p_fimd0_resource
),
324 .resource
= s5p_fimd0_resource
,
326 .dma_mask
= &samsung_device_dma_mask
,
327 .coherent_dma_mask
= DMA_BIT_MASK(32),
331 void __init
s5p_fimd0_set_platdata(struct s3c_fb_platdata
*pd
)
333 s3c_set_platdata(pd
, sizeof(struct s3c_fb_platdata
),
336 #endif /* CONFIG_S5P_DEV_FIMD0 */
340 #ifdef CONFIG_S3C_DEV_HWMON
341 struct platform_device s3c_device_hwmon
= {
344 .dev
.parent
= &s3c_device_adc
.dev
,
347 void __init
s3c_hwmon_set_platdata(struct s3c_hwmon_pdata
*pd
)
349 s3c_set_platdata(pd
, sizeof(struct s3c_hwmon_pdata
),
352 #endif /* CONFIG_S3C_DEV_HWMON */
356 #ifdef CONFIG_S3C_DEV_HSMMC
357 static struct resource s3c_hsmmc_resource
[] = {
358 [0] = DEFINE_RES_MEM(S3C_PA_HSMMC0
, SZ_4K
),
359 [1] = DEFINE_RES_IRQ(IRQ_HSMMC0
),
362 struct s3c_sdhci_platdata s3c_hsmmc0_def_platdata
= {
364 .host_caps
= (MMC_CAP_4_BIT_DATA
|
365 MMC_CAP_MMC_HIGHSPEED
| MMC_CAP_SD_HIGHSPEED
),
368 struct platform_device s3c_device_hsmmc0
= {
371 .num_resources
= ARRAY_SIZE(s3c_hsmmc_resource
),
372 .resource
= s3c_hsmmc_resource
,
374 .dma_mask
= &samsung_device_dma_mask
,
375 .coherent_dma_mask
= DMA_BIT_MASK(32),
376 .platform_data
= &s3c_hsmmc0_def_platdata
,
380 void s3c_sdhci0_set_platdata(struct s3c_sdhci_platdata
*pd
)
382 s3c_sdhci_set_platdata(pd
, &s3c_hsmmc0_def_platdata
);
384 #endif /* CONFIG_S3C_DEV_HSMMC */
386 #ifdef CONFIG_S3C_DEV_HSMMC1
387 static struct resource s3c_hsmmc1_resource
[] = {
388 [0] = DEFINE_RES_MEM(S3C_PA_HSMMC1
, SZ_4K
),
389 [1] = DEFINE_RES_IRQ(IRQ_HSMMC1
),
392 struct s3c_sdhci_platdata s3c_hsmmc1_def_platdata
= {
394 .host_caps
= (MMC_CAP_4_BIT_DATA
|
395 MMC_CAP_MMC_HIGHSPEED
| MMC_CAP_SD_HIGHSPEED
),
398 struct platform_device s3c_device_hsmmc1
= {
401 .num_resources
= ARRAY_SIZE(s3c_hsmmc1_resource
),
402 .resource
= s3c_hsmmc1_resource
,
404 .dma_mask
= &samsung_device_dma_mask
,
405 .coherent_dma_mask
= DMA_BIT_MASK(32),
406 .platform_data
= &s3c_hsmmc1_def_platdata
,
410 void s3c_sdhci1_set_platdata(struct s3c_sdhci_platdata
*pd
)
412 s3c_sdhci_set_platdata(pd
, &s3c_hsmmc1_def_platdata
);
414 #endif /* CONFIG_S3C_DEV_HSMMC1 */
418 #ifdef CONFIG_S3C_DEV_HSMMC2
419 static struct resource s3c_hsmmc2_resource
[] = {
420 [0] = DEFINE_RES_MEM(S3C_PA_HSMMC2
, SZ_4K
),
421 [1] = DEFINE_RES_IRQ(IRQ_HSMMC2
),
424 struct s3c_sdhci_platdata s3c_hsmmc2_def_platdata
= {
426 .host_caps
= (MMC_CAP_4_BIT_DATA
|
427 MMC_CAP_MMC_HIGHSPEED
| MMC_CAP_SD_HIGHSPEED
),
430 struct platform_device s3c_device_hsmmc2
= {
433 .num_resources
= ARRAY_SIZE(s3c_hsmmc2_resource
),
434 .resource
= s3c_hsmmc2_resource
,
436 .dma_mask
= &samsung_device_dma_mask
,
437 .coherent_dma_mask
= DMA_BIT_MASK(32),
438 .platform_data
= &s3c_hsmmc2_def_platdata
,
442 void s3c_sdhci2_set_platdata(struct s3c_sdhci_platdata
*pd
)
444 s3c_sdhci_set_platdata(pd
, &s3c_hsmmc2_def_platdata
);
446 #endif /* CONFIG_S3C_DEV_HSMMC2 */
448 #ifdef CONFIG_S3C_DEV_HSMMC3
449 static struct resource s3c_hsmmc3_resource
[] = {
450 [0] = DEFINE_RES_MEM(S3C_PA_HSMMC3
, SZ_4K
),
451 [1] = DEFINE_RES_IRQ(IRQ_HSMMC3
),
454 struct s3c_sdhci_platdata s3c_hsmmc3_def_platdata
= {
456 .host_caps
= (MMC_CAP_4_BIT_DATA
|
457 MMC_CAP_MMC_HIGHSPEED
| MMC_CAP_SD_HIGHSPEED
),
460 struct platform_device s3c_device_hsmmc3
= {
463 .num_resources
= ARRAY_SIZE(s3c_hsmmc3_resource
),
464 .resource
= s3c_hsmmc3_resource
,
466 .dma_mask
= &samsung_device_dma_mask
,
467 .coherent_dma_mask
= DMA_BIT_MASK(32),
468 .platform_data
= &s3c_hsmmc3_def_platdata
,
472 void s3c_sdhci3_set_platdata(struct s3c_sdhci_platdata
*pd
)
474 s3c_sdhci_set_platdata(pd
, &s3c_hsmmc3_def_platdata
);
476 #endif /* CONFIG_S3C_DEV_HSMMC3 */
480 static struct resource s3c_i2c0_resource
[] = {
481 [0] = DEFINE_RES_MEM(S3C_PA_IIC
, SZ_4K
),
482 [1] = DEFINE_RES_IRQ(IRQ_IIC
),
485 struct platform_device s3c_device_i2c0
= {
486 .name
= "s3c2410-i2c",
488 .num_resources
= ARRAY_SIZE(s3c_i2c0_resource
),
489 .resource
= s3c_i2c0_resource
,
492 struct s3c2410_platform_i2c default_i2c_data __initdata
= {
495 .frequency
= 100*1000,
499 void __init
s3c_i2c0_set_platdata(struct s3c2410_platform_i2c
*pd
)
501 struct s3c2410_platform_i2c
*npd
;
504 pd
= &default_i2c_data
;
508 npd
= s3c_set_platdata(pd
, sizeof(struct s3c2410_platform_i2c
),
512 npd
->cfg_gpio
= s3c_i2c0_cfg_gpio
;
515 #ifdef CONFIG_S3C_DEV_I2C1
516 static struct resource s3c_i2c1_resource
[] = {
517 [0] = DEFINE_RES_MEM(S3C_PA_IIC1
, SZ_4K
),
518 [1] = DEFINE_RES_IRQ(IRQ_IIC1
),
521 struct platform_device s3c_device_i2c1
= {
522 .name
= "s3c2410-i2c",
524 .num_resources
= ARRAY_SIZE(s3c_i2c1_resource
),
525 .resource
= s3c_i2c1_resource
,
528 void __init
s3c_i2c1_set_platdata(struct s3c2410_platform_i2c
*pd
)
530 struct s3c2410_platform_i2c
*npd
;
533 pd
= &default_i2c_data
;
537 npd
= s3c_set_platdata(pd
, sizeof(struct s3c2410_platform_i2c
),
541 npd
->cfg_gpio
= s3c_i2c1_cfg_gpio
;
543 #endif /* CONFIG_S3C_DEV_I2C1 */
545 #ifdef CONFIG_S3C_DEV_I2C2
546 static struct resource s3c_i2c2_resource
[] = {
547 [0] = DEFINE_RES_MEM(S3C_PA_IIC2
, SZ_4K
),
548 [1] = DEFINE_RES_IRQ(IRQ_IIC2
),
551 struct platform_device s3c_device_i2c2
= {
552 .name
= "s3c2410-i2c",
554 .num_resources
= ARRAY_SIZE(s3c_i2c2_resource
),
555 .resource
= s3c_i2c2_resource
,
558 void __init
s3c_i2c2_set_platdata(struct s3c2410_platform_i2c
*pd
)
560 struct s3c2410_platform_i2c
*npd
;
563 pd
= &default_i2c_data
;
567 npd
= s3c_set_platdata(pd
, sizeof(struct s3c2410_platform_i2c
),
571 npd
->cfg_gpio
= s3c_i2c2_cfg_gpio
;
573 #endif /* CONFIG_S3C_DEV_I2C2 */
575 #ifdef CONFIG_S3C_DEV_I2C3
576 static struct resource s3c_i2c3_resource
[] = {
577 [0] = DEFINE_RES_MEM(S3C_PA_IIC3
, SZ_4K
),
578 [1] = DEFINE_RES_IRQ(IRQ_IIC3
),
581 struct platform_device s3c_device_i2c3
= {
582 .name
= "s3c2440-i2c",
584 .num_resources
= ARRAY_SIZE(s3c_i2c3_resource
),
585 .resource
= s3c_i2c3_resource
,
588 void __init
s3c_i2c3_set_platdata(struct s3c2410_platform_i2c
*pd
)
590 struct s3c2410_platform_i2c
*npd
;
593 pd
= &default_i2c_data
;
597 npd
= s3c_set_platdata(pd
, sizeof(struct s3c2410_platform_i2c
),
601 npd
->cfg_gpio
= s3c_i2c3_cfg_gpio
;
603 #endif /*CONFIG_S3C_DEV_I2C3 */
605 #ifdef CONFIG_S3C_DEV_I2C4
606 static struct resource s3c_i2c4_resource
[] = {
607 [0] = DEFINE_RES_MEM(S3C_PA_IIC4
, SZ_4K
),
608 [1] = DEFINE_RES_IRQ(IRQ_IIC4
),
611 struct platform_device s3c_device_i2c4
= {
612 .name
= "s3c2440-i2c",
614 .num_resources
= ARRAY_SIZE(s3c_i2c4_resource
),
615 .resource
= s3c_i2c4_resource
,
618 void __init
s3c_i2c4_set_platdata(struct s3c2410_platform_i2c
*pd
)
620 struct s3c2410_platform_i2c
*npd
;
623 pd
= &default_i2c_data
;
627 npd
= s3c_set_platdata(pd
, sizeof(struct s3c2410_platform_i2c
),
631 npd
->cfg_gpio
= s3c_i2c4_cfg_gpio
;
633 #endif /*CONFIG_S3C_DEV_I2C4 */
635 #ifdef CONFIG_S3C_DEV_I2C5
636 static struct resource s3c_i2c5_resource
[] = {
637 [0] = DEFINE_RES_MEM(S3C_PA_IIC5
, SZ_4K
),
638 [1] = DEFINE_RES_IRQ(IRQ_IIC5
),
641 struct platform_device s3c_device_i2c5
= {
642 .name
= "s3c2440-i2c",
644 .num_resources
= ARRAY_SIZE(s3c_i2c5_resource
),
645 .resource
= s3c_i2c5_resource
,
648 void __init
s3c_i2c5_set_platdata(struct s3c2410_platform_i2c
*pd
)
650 struct s3c2410_platform_i2c
*npd
;
653 pd
= &default_i2c_data
;
657 npd
= s3c_set_platdata(pd
, sizeof(struct s3c2410_platform_i2c
),
661 npd
->cfg_gpio
= s3c_i2c5_cfg_gpio
;
663 #endif /*CONFIG_S3C_DEV_I2C5 */
665 #ifdef CONFIG_S3C_DEV_I2C6
666 static struct resource s3c_i2c6_resource
[] = {
667 [0] = DEFINE_RES_MEM(S3C_PA_IIC6
, SZ_4K
),
668 [1] = DEFINE_RES_IRQ(IRQ_IIC6
),
671 struct platform_device s3c_device_i2c6
= {
672 .name
= "s3c2440-i2c",
674 .num_resources
= ARRAY_SIZE(s3c_i2c6_resource
),
675 .resource
= s3c_i2c6_resource
,
678 void __init
s3c_i2c6_set_platdata(struct s3c2410_platform_i2c
*pd
)
680 struct s3c2410_platform_i2c
*npd
;
683 pd
= &default_i2c_data
;
687 npd
= s3c_set_platdata(pd
, sizeof(struct s3c2410_platform_i2c
),
691 npd
->cfg_gpio
= s3c_i2c6_cfg_gpio
;
693 #endif /* CONFIG_S3C_DEV_I2C6 */
695 #ifdef CONFIG_S3C_DEV_I2C7
696 static struct resource s3c_i2c7_resource
[] = {
697 [0] = DEFINE_RES_MEM(S3C_PA_IIC7
, SZ_4K
),
698 [1] = DEFINE_RES_IRQ(IRQ_IIC7
),
701 struct platform_device s3c_device_i2c7
= {
702 .name
= "s3c2440-i2c",
704 .num_resources
= ARRAY_SIZE(s3c_i2c7_resource
),
705 .resource
= s3c_i2c7_resource
,
708 void __init
s3c_i2c7_set_platdata(struct s3c2410_platform_i2c
*pd
)
710 struct s3c2410_platform_i2c
*npd
;
713 pd
= &default_i2c_data
;
717 npd
= s3c_set_platdata(pd
, sizeof(struct s3c2410_platform_i2c
),
721 npd
->cfg_gpio
= s3c_i2c7_cfg_gpio
;
723 #endif /* CONFIG_S3C_DEV_I2C7 */
727 #ifdef CONFIG_S5P_DEV_I2C_HDMIPHY
728 static struct resource s5p_i2c_resource
[] = {
729 [0] = DEFINE_RES_MEM(S5P_PA_IIC_HDMIPHY
, SZ_4K
),
730 [1] = DEFINE_RES_IRQ(IRQ_IIC_HDMIPHY
),
733 struct platform_device s5p_device_i2c_hdmiphy
= {
734 .name
= "s3c2440-hdmiphy-i2c",
736 .num_resources
= ARRAY_SIZE(s5p_i2c_resource
),
737 .resource
= s5p_i2c_resource
,
740 void __init
s5p_i2c_hdmiphy_set_platdata(struct s3c2410_platform_i2c
*pd
)
742 struct s3c2410_platform_i2c
*npd
;
745 pd
= &default_i2c_data
;
747 if (soc_is_s5pv210())
753 npd
= s3c_set_platdata(pd
, sizeof(struct s3c2410_platform_i2c
),
754 &s5p_device_i2c_hdmiphy
);
757 static struct s5p_hdmi_platform_data s5p_hdmi_def_platdata
;
759 void __init
s5p_hdmi_set_platdata(struct i2c_board_info
*hdmiphy_info
,
760 struct i2c_board_info
*mhl_info
, int mhl_bus
)
762 struct s5p_hdmi_platform_data
*pd
= &s5p_hdmi_def_platdata
;
764 if (soc_is_s5pv210())
769 pd
->hdmiphy_info
= hdmiphy_info
;
770 pd
->mhl_info
= mhl_info
;
771 pd
->mhl_bus
= mhl_bus
;
773 s3c_set_platdata(pd
, sizeof(struct s5p_hdmi_platform_data
),
777 #endif /* CONFIG_S5P_DEV_I2C_HDMIPHY */
781 #ifdef CONFIG_PLAT_S3C24XX
782 static struct resource s3c_iis_resource
[] = {
783 [0] = DEFINE_RES_MEM(S3C24XX_PA_IIS
, S3C24XX_SZ_IIS
),
786 struct platform_device s3c_device_iis
= {
787 .name
= "s3c24xx-iis",
789 .num_resources
= ARRAY_SIZE(s3c_iis_resource
),
790 .resource
= s3c_iis_resource
,
792 .dma_mask
= &samsung_device_dma_mask
,
793 .coherent_dma_mask
= DMA_BIT_MASK(32),
796 #endif /* CONFIG_PLAT_S3C24XX */
800 #ifdef CONFIG_SAMSUNG_DEV_IDE
801 static struct resource s3c_cfcon_resource
[] = {
802 [0] = DEFINE_RES_MEM(SAMSUNG_PA_CFCON
, SZ_16K
),
803 [1] = DEFINE_RES_IRQ(IRQ_CFCON
),
806 struct platform_device s3c_device_cfcon
= {
808 .num_resources
= ARRAY_SIZE(s3c_cfcon_resource
),
809 .resource
= s3c_cfcon_resource
,
812 void __init
s3c_ide_set_platdata(struct s3c_ide_platdata
*pdata
)
814 s3c_set_platdata(pdata
, sizeof(struct s3c_ide_platdata
),
817 #endif /* CONFIG_SAMSUNG_DEV_IDE */
821 #ifdef CONFIG_SAMSUNG_DEV_KEYPAD
822 static struct resource samsung_keypad_resources
[] = {
823 [0] = DEFINE_RES_MEM(SAMSUNG_PA_KEYPAD
, SZ_32
),
824 [1] = DEFINE_RES_IRQ(IRQ_KEYPAD
),
827 struct platform_device samsung_device_keypad
= {
828 .name
= "samsung-keypad",
830 .num_resources
= ARRAY_SIZE(samsung_keypad_resources
),
831 .resource
= samsung_keypad_resources
,
834 void __init
samsung_keypad_set_platdata(struct samsung_keypad_platdata
*pd
)
836 struct samsung_keypad_platdata
*npd
;
838 npd
= s3c_set_platdata(pd
, sizeof(struct samsung_keypad_platdata
),
839 &samsung_device_keypad
);
842 npd
->cfg_gpio
= samsung_keypad_cfg_gpio
;
844 #endif /* CONFIG_SAMSUNG_DEV_KEYPAD */
848 #ifdef CONFIG_PLAT_S3C24XX
849 static struct resource s3c_lcd_resource
[] = {
850 [0] = DEFINE_RES_MEM(S3C24XX_PA_LCD
, S3C24XX_SZ_LCD
),
851 [1] = DEFINE_RES_IRQ(IRQ_LCD
),
854 struct platform_device s3c_device_lcd
= {
855 .name
= "s3c2410-lcd",
857 .num_resources
= ARRAY_SIZE(s3c_lcd_resource
),
858 .resource
= s3c_lcd_resource
,
860 .dma_mask
= &samsung_device_dma_mask
,
861 .coherent_dma_mask
= DMA_BIT_MASK(32),
865 void __init
s3c24xx_fb_set_platdata(struct s3c2410fb_mach_info
*pd
)
867 struct s3c2410fb_mach_info
*npd
;
869 npd
= s3c_set_platdata(pd
, sizeof(*npd
), &s3c_device_lcd
);
871 npd
->displays
= kmemdup(pd
->displays
,
872 sizeof(struct s3c2410fb_display
) * npd
->num_displays
,
875 printk(KERN_ERR
"no memory for LCD display data\n");
877 printk(KERN_ERR
"no memory for LCD platform data\n");
880 #endif /* CONFIG_PLAT_S3C24XX */
884 #ifdef CONFIG_S5P_DEV_CSIS0
885 static struct resource s5p_mipi_csis0_resource
[] = {
886 [0] = DEFINE_RES_MEM(S5P_PA_MIPI_CSIS0
, SZ_16K
),
887 [1] = DEFINE_RES_IRQ(IRQ_MIPI_CSIS0
),
890 struct platform_device s5p_device_mipi_csis0
= {
891 .name
= "s5p-mipi-csis",
893 .num_resources
= ARRAY_SIZE(s5p_mipi_csis0_resource
),
894 .resource
= s5p_mipi_csis0_resource
,
896 #endif /* CONFIG_S5P_DEV_CSIS0 */
898 #ifdef CONFIG_S5P_DEV_CSIS1
899 static struct resource s5p_mipi_csis1_resource
[] = {
900 [0] = DEFINE_RES_MEM(S5P_PA_MIPI_CSIS1
, SZ_16K
),
901 [1] = DEFINE_RES_IRQ(IRQ_MIPI_CSIS1
),
904 struct platform_device s5p_device_mipi_csis1
= {
905 .name
= "s5p-mipi-csis",
907 .num_resources
= ARRAY_SIZE(s5p_mipi_csis1_resource
),
908 .resource
= s5p_mipi_csis1_resource
,
914 #ifdef CONFIG_S3C_DEV_NAND
915 static struct resource s3c_nand_resource
[] = {
916 [0] = DEFINE_RES_MEM(S3C_PA_NAND
, SZ_1M
),
919 struct platform_device s3c_device_nand
= {
920 .name
= "s3c2410-nand",
922 .num_resources
= ARRAY_SIZE(s3c_nand_resource
),
923 .resource
= s3c_nand_resource
,
927 * s3c_nand_copy_set() - copy nand set data
928 * @set: The new structure, directly copied from the old.
930 * Copy all the fields from the NAND set field from what is probably __initdata
931 * to new kernel memory. The code returns 0 if the copy happened correctly or
932 * an error code for the calling function to display.
934 * Note, we currently do not try and look to see if we've already copied the
935 * data in a previous set.
937 static int __init
s3c_nand_copy_set(struct s3c2410_nand_set
*set
)
942 size
= sizeof(struct mtd_partition
) * set
->nr_partitions
;
944 ptr
= kmemdup(set
->partitions
, size
, GFP_KERNEL
);
945 set
->partitions
= ptr
;
951 if (set
->nr_map
&& set
->nr_chips
) {
952 size
= sizeof(int) * set
->nr_chips
;
953 ptr
= kmemdup(set
->nr_map
, size
, GFP_KERNEL
);
960 if (set
->ecc_layout
) {
961 ptr
= kmemdup(set
->ecc_layout
,
962 sizeof(struct nand_ecclayout
), GFP_KERNEL
);
963 set
->ecc_layout
= ptr
;
972 void __init
s3c_nand_set_platdata(struct s3c2410_platform_nand
*nand
)
974 struct s3c2410_platform_nand
*npd
;
978 /* note, if we get a failure in allocation, we simply drop out of the
979 * function. If there is so little memory available at initialisation
980 * time then there is little chance the system is going to run.
983 npd
= s3c_set_platdata(nand
, sizeof(struct s3c2410_platform_nand
),
988 /* now see if we need to copy any of the nand set data */
990 size
= sizeof(struct s3c2410_nand_set
) * npd
->nr_sets
;
992 struct s3c2410_nand_set
*from
= npd
->sets
;
993 struct s3c2410_nand_set
*to
;
996 to
= kmemdup(from
, size
, GFP_KERNEL
);
997 npd
->sets
= to
; /* set, even if we failed */
1000 printk(KERN_ERR
"%s: no memory for sets\n", __func__
);
1004 for (i
= 0; i
< npd
->nr_sets
; i
++) {
1005 ret
= s3c_nand_copy_set(to
);
1007 printk(KERN_ERR
"%s: failed to copy set %d\n",
1015 #endif /* CONFIG_S3C_DEV_NAND */
1019 #ifdef CONFIG_S3C_DEV_ONENAND
1020 static struct resource s3c_onenand_resources
[] = {
1021 [0] = DEFINE_RES_MEM(S3C_PA_ONENAND
, SZ_1K
),
1022 [1] = DEFINE_RES_MEM(S3C_PA_ONENAND_BUF
, S3C_SZ_ONENAND_BUF
),
1023 [2] = DEFINE_RES_IRQ(IRQ_ONENAND
),
1026 struct platform_device s3c_device_onenand
= {
1027 .name
= "samsung-onenand",
1029 .num_resources
= ARRAY_SIZE(s3c_onenand_resources
),
1030 .resource
= s3c_onenand_resources
,
1032 #endif /* CONFIG_S3C_DEV_ONENAND */
1034 #ifdef CONFIG_S3C64XX_DEV_ONENAND1
1035 static struct resource s3c64xx_onenand1_resources
[] = {
1036 [0] = DEFINE_RES_MEM(S3C64XX_PA_ONENAND1
, SZ_1K
),
1037 [1] = DEFINE_RES_MEM(S3C64XX_PA_ONENAND1_BUF
, S3C64XX_SZ_ONENAND1_BUF
),
1038 [2] = DEFINE_RES_IRQ(IRQ_ONENAND1
),
1041 struct platform_device s3c64xx_device_onenand1
= {
1042 .name
= "samsung-onenand",
1044 .num_resources
= ARRAY_SIZE(s3c64xx_onenand1_resources
),
1045 .resource
= s3c64xx_onenand1_resources
,
1048 void __init
s3c64xx_onenand1_set_platdata(struct onenand_platform_data
*pdata
)
1050 s3c_set_platdata(pdata
, sizeof(struct onenand_platform_data
),
1051 &s3c64xx_device_onenand1
);
1053 #endif /* CONFIG_S3C64XX_DEV_ONENAND1 */
1055 #ifdef CONFIG_S5P_DEV_ONENAND
1056 static struct resource s5p_onenand_resources
[] = {
1057 [0] = DEFINE_RES_MEM(S5P_PA_ONENAND
, SZ_128K
),
1058 [1] = DEFINE_RES_MEM(S5P_PA_ONENAND_DMA
, SZ_8K
),
1059 [2] = DEFINE_RES_IRQ(IRQ_ONENAND_AUDI
),
1062 struct platform_device s5p_device_onenand
= {
1063 .name
= "s5pc110-onenand",
1065 .num_resources
= ARRAY_SIZE(s5p_onenand_resources
),
1066 .resource
= s5p_onenand_resources
,
1068 #endif /* CONFIG_S5P_DEV_ONENAND */
1072 #if defined(CONFIG_PLAT_S5P) && !defined(CONFIG_ARCH_EXYNOS)
1073 static struct resource s5p_pmu_resource
[] = {
1074 DEFINE_RES_IRQ(IRQ_PMU
)
1077 static struct platform_device s5p_device_pmu
= {
1080 .num_resources
= ARRAY_SIZE(s5p_pmu_resource
),
1081 .resource
= s5p_pmu_resource
,
1084 static int __init
s5p_pmu_init(void)
1086 platform_device_register(&s5p_device_pmu
);
1089 arch_initcall(s5p_pmu_init
);
1090 #endif /* CONFIG_PLAT_S5P */
1094 #ifdef CONFIG_SAMSUNG_DEV_PWM
1095 static struct resource samsung_pwm_resource
[] = {
1096 DEFINE_RES_MEM(SAMSUNG_PA_TIMER
, SZ_4K
),
1099 struct platform_device samsung_device_pwm
= {
1100 .name
= "samsung-pwm",
1102 .num_resources
= ARRAY_SIZE(samsung_pwm_resource
),
1103 .resource
= samsung_pwm_resource
,
1106 void __init
samsung_pwm_set_platdata(struct samsung_pwm_variant
*pd
)
1108 samsung_device_pwm
.dev
.platform_data
= pd
;
1110 #endif /* CONFIG_SAMSUNG_DEV_PWM */
1114 #ifdef CONFIG_PLAT_S3C24XX
1115 static struct resource s3c_rtc_resource
[] = {
1116 [0] = DEFINE_RES_MEM(S3C24XX_PA_RTC
, SZ_256
),
1117 [1] = DEFINE_RES_IRQ(IRQ_RTC
),
1118 [2] = DEFINE_RES_IRQ(IRQ_TICK
),
1121 struct platform_device s3c_device_rtc
= {
1122 .name
= "s3c2410-rtc",
1124 .num_resources
= ARRAY_SIZE(s3c_rtc_resource
),
1125 .resource
= s3c_rtc_resource
,
1127 #endif /* CONFIG_PLAT_S3C24XX */
1129 #ifdef CONFIG_S3C_DEV_RTC
1130 static struct resource s3c_rtc_resource
[] = {
1131 [0] = DEFINE_RES_MEM(S3C_PA_RTC
, SZ_256
),
1132 [1] = DEFINE_RES_IRQ(IRQ_RTC_ALARM
),
1133 [2] = DEFINE_RES_IRQ(IRQ_RTC_TIC
),
1136 struct platform_device s3c_device_rtc
= {
1137 .name
= "s3c64xx-rtc",
1139 .num_resources
= ARRAY_SIZE(s3c_rtc_resource
),
1140 .resource
= s3c_rtc_resource
,
1142 #endif /* CONFIG_S3C_DEV_RTC */
1146 #ifdef CONFIG_PLAT_S3C24XX
1147 static struct resource s3c_sdi_resource
[] = {
1148 [0] = DEFINE_RES_MEM(S3C24XX_PA_SDI
, S3C24XX_SZ_SDI
),
1149 [1] = DEFINE_RES_IRQ(IRQ_SDI
),
1152 struct platform_device s3c_device_sdi
= {
1153 .name
= "s3c2410-sdi",
1155 .num_resources
= ARRAY_SIZE(s3c_sdi_resource
),
1156 .resource
= s3c_sdi_resource
,
1159 void __init
s3c24xx_mci_set_platdata(struct s3c24xx_mci_pdata
*pdata
)
1161 s3c_set_platdata(pdata
, sizeof(struct s3c24xx_mci_pdata
),
1164 #endif /* CONFIG_PLAT_S3C24XX */
1168 #ifdef CONFIG_PLAT_S3C24XX
1169 static struct resource s3c_spi0_resource
[] = {
1170 [0] = DEFINE_RES_MEM(S3C24XX_PA_SPI
, SZ_32
),
1171 [1] = DEFINE_RES_IRQ(IRQ_SPI0
),
1174 struct platform_device s3c_device_spi0
= {
1175 .name
= "s3c2410-spi",
1177 .num_resources
= ARRAY_SIZE(s3c_spi0_resource
),
1178 .resource
= s3c_spi0_resource
,
1180 .dma_mask
= &samsung_device_dma_mask
,
1181 .coherent_dma_mask
= DMA_BIT_MASK(32),
1185 static struct resource s3c_spi1_resource
[] = {
1186 [0] = DEFINE_RES_MEM(S3C24XX_PA_SPI1
, SZ_32
),
1187 [1] = DEFINE_RES_IRQ(IRQ_SPI1
),
1190 struct platform_device s3c_device_spi1
= {
1191 .name
= "s3c2410-spi",
1193 .num_resources
= ARRAY_SIZE(s3c_spi1_resource
),
1194 .resource
= s3c_spi1_resource
,
1196 .dma_mask
= &samsung_device_dma_mask
,
1197 .coherent_dma_mask
= DMA_BIT_MASK(32),
1200 #endif /* CONFIG_PLAT_S3C24XX */
1204 #ifdef CONFIG_PLAT_S3C24XX
1205 static struct resource s3c_ts_resource
[] = {
1206 [0] = DEFINE_RES_MEM(S3C24XX_PA_ADC
, S3C24XX_SZ_ADC
),
1207 [1] = DEFINE_RES_IRQ(IRQ_TC
),
1210 struct platform_device s3c_device_ts
= {
1211 .name
= "s3c2410-ts",
1213 .dev
.parent
= &s3c_device_adc
.dev
,
1214 .num_resources
= ARRAY_SIZE(s3c_ts_resource
),
1215 .resource
= s3c_ts_resource
,
1218 void __init
s3c24xx_ts_set_platdata(struct s3c2410_ts_mach_info
*hard_s3c2410ts_info
)
1220 s3c_set_platdata(hard_s3c2410ts_info
,
1221 sizeof(struct s3c2410_ts_mach_info
), &s3c_device_ts
);
1223 #endif /* CONFIG_PLAT_S3C24XX */
1225 #ifdef CONFIG_SAMSUNG_DEV_TS
1226 static struct resource s3c_ts_resource
[] = {
1227 [0] = DEFINE_RES_MEM(SAMSUNG_PA_ADC
, SZ_256
),
1228 [1] = DEFINE_RES_IRQ(IRQ_TC
),
1231 static struct s3c2410_ts_mach_info default_ts_data __initdata
= {
1234 .oversampling_shift
= 2,
1237 struct platform_device s3c_device_ts
= {
1238 .name
= "s3c64xx-ts",
1240 .num_resources
= ARRAY_SIZE(s3c_ts_resource
),
1241 .resource
= s3c_ts_resource
,
1244 void __init
s3c24xx_ts_set_platdata(struct s3c2410_ts_mach_info
*pd
)
1247 pd
= &default_ts_data
;
1249 s3c_set_platdata(pd
, sizeof(struct s3c2410_ts_mach_info
),
1252 #endif /* CONFIG_SAMSUNG_DEV_TS */
1256 #ifdef CONFIG_S5P_DEV_TV
1258 static struct resource s5p_hdmi_resources
[] = {
1259 [0] = DEFINE_RES_MEM(S5P_PA_HDMI
, SZ_1M
),
1260 [1] = DEFINE_RES_IRQ(IRQ_HDMI
),
1263 struct platform_device s5p_device_hdmi
= {
1266 .num_resources
= ARRAY_SIZE(s5p_hdmi_resources
),
1267 .resource
= s5p_hdmi_resources
,
1270 static struct resource s5p_sdo_resources
[] = {
1271 [0] = DEFINE_RES_MEM(S5P_PA_SDO
, SZ_64K
),
1272 [1] = DEFINE_RES_IRQ(IRQ_SDO
),
1275 struct platform_device s5p_device_sdo
= {
1278 .num_resources
= ARRAY_SIZE(s5p_sdo_resources
),
1279 .resource
= s5p_sdo_resources
,
1282 static struct resource s5p_mixer_resources
[] = {
1283 [0] = DEFINE_RES_MEM_NAMED(S5P_PA_MIXER
, SZ_64K
, "mxr"),
1284 [1] = DEFINE_RES_MEM_NAMED(S5P_PA_VP
, SZ_64K
, "vp"),
1285 [2] = DEFINE_RES_IRQ_NAMED(IRQ_MIXER
, "irq"),
1288 struct platform_device s5p_device_mixer
= {
1289 .name
= "s5p-mixer",
1291 .num_resources
= ARRAY_SIZE(s5p_mixer_resources
),
1292 .resource
= s5p_mixer_resources
,
1294 .dma_mask
= &samsung_device_dma_mask
,
1295 .coherent_dma_mask
= DMA_BIT_MASK(32),
1298 #endif /* CONFIG_S5P_DEV_TV */
1302 #ifdef CONFIG_S3C_DEV_USB_HOST
1303 static struct resource s3c_usb_resource
[] = {
1304 [0] = DEFINE_RES_MEM(S3C_PA_USBHOST
, SZ_256
),
1305 [1] = DEFINE_RES_IRQ(IRQ_USBH
),
1308 struct platform_device s3c_device_ohci
= {
1309 .name
= "s3c2410-ohci",
1311 .num_resources
= ARRAY_SIZE(s3c_usb_resource
),
1312 .resource
= s3c_usb_resource
,
1314 .dma_mask
= &samsung_device_dma_mask
,
1315 .coherent_dma_mask
= DMA_BIT_MASK(32),
1320 * s3c_ohci_set_platdata - initialise OHCI device platform data
1321 * @info: The platform data.
1323 * This call copies the @info passed in and sets the device .platform_data
1324 * field to that copy. The @info is copied so that the original can be marked
1328 void __init
s3c_ohci_set_platdata(struct s3c2410_hcd_info
*info
)
1330 s3c_set_platdata(info
, sizeof(struct s3c2410_hcd_info
),
1333 #endif /* CONFIG_S3C_DEV_USB_HOST */
1335 /* USB Device (Gadget) */
1337 #ifdef CONFIG_PLAT_S3C24XX
1338 static struct resource s3c_usbgadget_resource
[] = {
1339 [0] = DEFINE_RES_MEM(S3C24XX_PA_USBDEV
, S3C24XX_SZ_USBDEV
),
1340 [1] = DEFINE_RES_IRQ(IRQ_USBD
),
1343 struct platform_device s3c_device_usbgadget
= {
1344 .name
= "s3c2410-usbgadget",
1346 .num_resources
= ARRAY_SIZE(s3c_usbgadget_resource
),
1347 .resource
= s3c_usbgadget_resource
,
1350 void __init
s3c24xx_udc_set_platdata(struct s3c2410_udc_mach_info
*pd
)
1352 s3c_set_platdata(pd
, sizeof(*pd
), &s3c_device_usbgadget
);
1354 #endif /* CONFIG_PLAT_S3C24XX */
1358 #ifdef CONFIG_S3C_DEV_USB_HSOTG
1359 static struct resource s3c_usb_hsotg_resources
[] = {
1360 [0] = DEFINE_RES_MEM(S3C_PA_USB_HSOTG
, SZ_128K
),
1361 [1] = DEFINE_RES_IRQ(IRQ_OTG
),
1364 struct platform_device s3c_device_usb_hsotg
= {
1365 .name
= "s3c-hsotg",
1367 .num_resources
= ARRAY_SIZE(s3c_usb_hsotg_resources
),
1368 .resource
= s3c_usb_hsotg_resources
,
1370 .dma_mask
= &samsung_device_dma_mask
,
1371 .coherent_dma_mask
= DMA_BIT_MASK(32),
1375 void __init
s3c_hsotg_set_platdata(struct s3c_hsotg_plat
*pd
)
1377 struct s3c_hsotg_plat
*npd
;
1379 npd
= s3c_set_platdata(pd
, sizeof(struct s3c_hsotg_plat
),
1380 &s3c_device_usb_hsotg
);
1383 npd
->phy_init
= s5p_usb_phy_init
;
1385 npd
->phy_exit
= s5p_usb_phy_exit
;
1387 #endif /* CONFIG_S3C_DEV_USB_HSOTG */
1389 /* USB High Spped 2.0 Device (Gadget) */
1391 #ifdef CONFIG_PLAT_S3C24XX
1392 static struct resource s3c_hsudc_resource
[] = {
1393 [0] = DEFINE_RES_MEM(S3C2416_PA_HSUDC
, S3C2416_SZ_HSUDC
),
1394 [1] = DEFINE_RES_IRQ(IRQ_USBD
),
1397 struct platform_device s3c_device_usb_hsudc
= {
1398 .name
= "s3c-hsudc",
1400 .num_resources
= ARRAY_SIZE(s3c_hsudc_resource
),
1401 .resource
= s3c_hsudc_resource
,
1403 .dma_mask
= &samsung_device_dma_mask
,
1404 .coherent_dma_mask
= DMA_BIT_MASK(32),
1408 void __init
s3c24xx_hsudc_set_platdata(struct s3c24xx_hsudc_platdata
*pd
)
1410 s3c_set_platdata(pd
, sizeof(*pd
), &s3c_device_usb_hsudc
);
1412 #endif /* CONFIG_PLAT_S3C24XX */
1416 #ifdef CONFIG_S3C_DEV_WDT
1417 static struct resource s3c_wdt_resource
[] = {
1418 [0] = DEFINE_RES_MEM(S3C_PA_WDT
, SZ_1K
),
1419 [1] = DEFINE_RES_IRQ(IRQ_WDT
),
1422 struct platform_device s3c_device_wdt
= {
1423 .name
= "s3c2410-wdt",
1425 .num_resources
= ARRAY_SIZE(s3c_wdt_resource
),
1426 .resource
= s3c_wdt_resource
,
1428 #endif /* CONFIG_S3C_DEV_WDT */
1430 #ifdef CONFIG_S3C64XX_DEV_SPI0
1431 static struct resource s3c64xx_spi0_resource
[] = {
1432 [0] = DEFINE_RES_MEM(S3C_PA_SPI0
, SZ_256
),
1433 [1] = DEFINE_RES_DMA(DMACH_SPI0_TX
),
1434 [2] = DEFINE_RES_DMA(DMACH_SPI0_RX
),
1435 [3] = DEFINE_RES_IRQ(IRQ_SPI0
),
1438 struct platform_device s3c64xx_device_spi0
= {
1439 .name
= "s3c6410-spi",
1441 .num_resources
= ARRAY_SIZE(s3c64xx_spi0_resource
),
1442 .resource
= s3c64xx_spi0_resource
,
1444 .dma_mask
= &samsung_device_dma_mask
,
1445 .coherent_dma_mask
= DMA_BIT_MASK(32),
1449 void __init
s3c64xx_spi0_set_platdata(int (*cfg_gpio
)(void), int src_clk_nr
,
1452 struct s3c64xx_spi_info pd
;
1454 /* Reject invalid configuration */
1455 if (!num_cs
|| src_clk_nr
< 0) {
1456 pr_err("%s: Invalid SPI configuration\n", __func__
);
1461 pd
.src_clk_nr
= src_clk_nr
;
1462 pd
.cfg_gpio
= (cfg_gpio
) ? cfg_gpio
: s3c64xx_spi0_cfg_gpio
;
1463 #if defined(CONFIG_PL330_DMA)
1464 pd
.filter
= pl330_filter
;
1465 #elif defined(CONFIG_S3C64XX_PL080)
1466 pd
.filter
= pl08x_filter_id
;
1467 #elif defined(CONFIG_S3C24XX_DMAC)
1468 pd
.filter
= s3c24xx_dma_filter
;
1471 s3c_set_platdata(&pd
, sizeof(pd
), &s3c64xx_device_spi0
);
1473 #endif /* CONFIG_S3C64XX_DEV_SPI0 */
1475 #ifdef CONFIG_S3C64XX_DEV_SPI1
1476 static struct resource s3c64xx_spi1_resource
[] = {
1477 [0] = DEFINE_RES_MEM(S3C_PA_SPI1
, SZ_256
),
1478 [1] = DEFINE_RES_DMA(DMACH_SPI1_TX
),
1479 [2] = DEFINE_RES_DMA(DMACH_SPI1_RX
),
1480 [3] = DEFINE_RES_IRQ(IRQ_SPI1
),
1483 struct platform_device s3c64xx_device_spi1
= {
1484 .name
= "s3c6410-spi",
1486 .num_resources
= ARRAY_SIZE(s3c64xx_spi1_resource
),
1487 .resource
= s3c64xx_spi1_resource
,
1489 .dma_mask
= &samsung_device_dma_mask
,
1490 .coherent_dma_mask
= DMA_BIT_MASK(32),
1494 void __init
s3c64xx_spi1_set_platdata(int (*cfg_gpio
)(void), int src_clk_nr
,
1497 struct s3c64xx_spi_info pd
;
1499 /* Reject invalid configuration */
1500 if (!num_cs
|| src_clk_nr
< 0) {
1501 pr_err("%s: Invalid SPI configuration\n", __func__
);
1506 pd
.src_clk_nr
= src_clk_nr
;
1507 pd
.cfg_gpio
= (cfg_gpio
) ? cfg_gpio
: s3c64xx_spi1_cfg_gpio
;
1508 #if defined(CONFIG_PL330_DMA)
1509 pd
.filter
= pl330_filter
;
1510 #elif defined(CONFIG_S3C64XX_PL080)
1511 pd
.filter
= pl08x_filter_id
;
1514 s3c_set_platdata(&pd
, sizeof(pd
), &s3c64xx_device_spi1
);
1516 #endif /* CONFIG_S3C64XX_DEV_SPI1 */
1518 #ifdef CONFIG_S3C64XX_DEV_SPI2
1519 static struct resource s3c64xx_spi2_resource
[] = {
1520 [0] = DEFINE_RES_MEM(S3C_PA_SPI2
, SZ_256
),
1521 [1] = DEFINE_RES_DMA(DMACH_SPI2_TX
),
1522 [2] = DEFINE_RES_DMA(DMACH_SPI2_RX
),
1523 [3] = DEFINE_RES_IRQ(IRQ_SPI2
),
1526 struct platform_device s3c64xx_device_spi2
= {
1527 .name
= "s3c6410-spi",
1529 .num_resources
= ARRAY_SIZE(s3c64xx_spi2_resource
),
1530 .resource
= s3c64xx_spi2_resource
,
1532 .dma_mask
= &samsung_device_dma_mask
,
1533 .coherent_dma_mask
= DMA_BIT_MASK(32),
1537 void __init
s3c64xx_spi2_set_platdata(int (*cfg_gpio
)(void), int src_clk_nr
,
1540 struct s3c64xx_spi_info pd
;
1542 /* Reject invalid configuration */
1543 if (!num_cs
|| src_clk_nr
< 0) {
1544 pr_err("%s: Invalid SPI configuration\n", __func__
);
1549 pd
.src_clk_nr
= src_clk_nr
;
1550 pd
.cfg_gpio
= (cfg_gpio
) ? cfg_gpio
: s3c64xx_spi2_cfg_gpio
;
1551 #if defined(CONFIG_PL330_DMA)
1552 pd
.filter
= pl330_filter
;
1553 #elif defined(CONFIG_S3C64XX_PL080)
1554 pd
.filter
= pl08x_filter_id
;
1557 s3c_set_platdata(&pd
, sizeof(pd
), &s3c64xx_device_spi2
);
1559 #endif /* CONFIG_S3C64XX_DEV_SPI2 */