1 /* linux/arch/arm/plat-samsung/include/plat/dma-s3c24xx.h
3 * Copyright (C) 2006 Simtec Electronics
4 * Ben Dooks <ben@simtec.co.uk>
6 * Samsung S3C24XX DMA support - per SoC functions
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
13 #include <plat/dma-core.h>
15 extern struct bus_type dma_subsys
;
16 extern struct s3c2410_dma_chan s3c2410_chans
[S3C_DMA_CHANNELS
];
18 #define DMA_CH_VALID (1<<31)
19 #define DMA_CH_NEVER (1<<30)
21 /* struct s3c24xx_dma_map
23 * this holds the mapping information for the channel selected
24 * to be connected to the specified device
27 struct s3c24xx_dma_map
{
30 unsigned long channels
[S3C_DMA_CHANNELS
];
33 struct s3c24xx_dma_selection
{
34 struct s3c24xx_dma_map
*map
;
35 unsigned long map_size
;
36 unsigned long dcon_mask
;
38 void (*select
)(struct s3c2410_dma_chan
*chan
,
39 struct s3c24xx_dma_map
*map
);
42 extern int s3c24xx_dma_init_map(struct s3c24xx_dma_selection
*sel
);
44 /* struct s3c24xx_dma_order_ch
46 * channel map for one of the `enum dma_ch` dma channels. the list
47 * entry contains a set of low-level channel numbers, orred with
48 * DMA_CH_VALID, which are checked in the order in the array.
51 struct s3c24xx_dma_order_ch
{
52 unsigned int list
[S3C_DMA_CHANNELS
]; /* list of channels */
53 unsigned int flags
; /* flags */
56 /* struct s3c24xx_dma_order
58 * information provided by either the core or the board to give the
59 * dma system a hint on how to allocate channels
62 struct s3c24xx_dma_order
{
63 struct s3c24xx_dma_order_ch channels
[DMACH_MAX
];
66 extern int s3c24xx_dma_order_set(struct s3c24xx_dma_order
*map
);
68 /* DMA init code, called from the cpu support code */
70 extern int s3c2410_dma_init(void);
72 extern int s3c24xx_dma_init(unsigned int channels
, unsigned int irq
,