| blob | dbb118e1a4e091985724cf27fe4e1ce1e12248a2 |
1 /* -*- mode: asm -*-
2 **
3 ** head.S -- This file contains the initial boot code for the
4 ** Linux/68k kernel.
5 **
6 ** Copyright 1993 by Hamish Macdonald
7 **
8 ** 68040 fixes by Michael Rausch
9 ** 68060 fixes by Roman Hodek
10 ** MMU cleanup by Randy Thelen
11 ** Final MMU cleanup by Roman Zippel
12 **
13 ** Atari support by Andreas Schwab, using ideas of Robert de Vries
14 ** and Bjoern Brauel
15 ** VME Support by Richard Hirst
16 **
17 ** 94/11/14 Andreas Schwab: put kernel at PAGESIZE
18 ** 94/11/18 Andreas Schwab: remove identity mapping of STRAM for Atari
19 ** ++ Bjoern & Roman: ATARI-68040 support for the Medusa
20 ** 95/11/18 Richard Hirst: Added MVME166 support
21 ** 96/04/26 Guenther Kelleter: fixed identity mapping for Falcon with
22 ** Magnum- and FX-alternate ram
23 ** 98/04/25 Phil Blundell: added HP300 support
24 ** 1998/08/30 David Kilzer: Added support for font_desc structures
25 ** for linux-2.1.115
26 ** 1999/02/11 Richard Zidlicky: added Q40 support (initial version 99/01/01)
27 ** 2004/05/13 Kars de Jong: Finalised HP300 support
28 **
29 ** This file is subject to the terms and conditions of the GNU General Public
30 ** License. See the file README.legal in the main directory of this archive
31 ** for more details.
32 **
33 */
35 /*
36 * Linux startup code.
37 *
38 * At this point, the boot loader has:
39 * Disabled interrupts
40 * Disabled caches
41 * Put us in supervisor state.
42 *
43 * The kernel setup code takes the following steps:
44 * . Raise interrupt level
45 * . Set up initial kernel memory mapping.
46 * . This sets up a mapping of the 4M of memory the kernel is located in.
47 * . It also does a mapping of any initial machine specific areas.
48 * . Enable the MMU
49 * . Enable cache memories
50 * . Jump to kernel startup
51 *
52 * Much of the file restructuring was to accomplish:
53 * 1) Remove register dependency through-out the file.
54 * 2) Increase use of subroutines to perform functions
55 * 3) Increase readability of the code
56 *
57 * Of course, readability is a subjective issue, so it will never be
58 * argued that that goal was accomplished. It was merely a goal.
59 * A key way to help make code more readable is to give good
60 * documentation. So, the first thing you will find is exaustive
61 * write-ups on the structure of the file, and the features of the
62 * functional subroutines.
63 *
64 * General Structure:
65 * ------------------
66 * Without a doubt the single largest chunk of head.S is spent
67 * mapping the kernel and I/O physical space into the logical range
68 * for the kernel.
69 * There are new subroutines and data structures to make MMU
70 * support cleaner and easier to understand.
71 * First, you will find a routine call "mmu_map" which maps
72 * a logical to a physical region for some length given a cache
73 * type on behalf of the caller. This routine makes writing the
74 * actual per-machine specific code very simple.
75 * A central part of the code, but not a subroutine in itself,
76 * is the mmu_init code which is broken down into mapping the kernel
77 * (the same for all machines) and mapping machine-specific I/O
78 * regions.
79 * Also, there will be a description of engaging the MMU and
80 * caches.
81 * You will notice that there is a chunk of code which
82 * can emit the entire MMU mapping of the machine. This is present
83 * only in debug modes and can be very helpful.
84 * Further, there is a new console driver in head.S that is
85 * also only engaged in debug mode. Currently, it's only supported
86 * on the Macintosh class of machines. However, it is hoped that
87 * others will plug-in support for specific machines.
88 *
89 * ######################################################################
90 *
91 * mmu_map
92 * -------
93 * mmu_map was written for two key reasons. First, it was clear
94 * that it was very difficult to read the previous code for mapping
95 * regions of memory. Second, the Macintosh required such extensive
96 * memory allocations that it didn't make sense to propagate the
97 * existing code any further.
98 * mmu_map requires some parameters:
99 *
100 * mmu_map (logical, physical, length, cache_type)
101 *
102 * While this essentially describes the function in the abstract, you'll
103 * find more indepth description of other parameters at the implementation site.
104 *
105 * mmu_get_root_table_entry
106 * ------------------------
107 * mmu_get_ptr_table_entry
108 * -----------------------
109 * mmu_get_page_table_entry
110 * ------------------------
111 *
112 * These routines are used by other mmu routines to get a pointer into
113 * a table, if necessary a new table is allocated. These routines are working
114 * basically like pmd_alloc() and pte_alloc() in <asm/pgtable.h>. The root
115 * table needs of course only to be allocated once in mmu_get_root_table_entry,
116 * so that here also some mmu specific initialization is done. The second page
117 * at the start of the kernel (the first page is unmapped later) is used for
118 * the kernel_pg_dir. It must be at a position known at link time (as it's used
119 * to initialize the init task struct) and since it needs special cache
120 * settings, it's the easiest to use this page, the rest of the page is used
121 * for further pointer tables.
122 * mmu_get_page_table_entry allocates always a whole page for page tables, this
123 * means 1024 pages and so 4MB of memory can be mapped. It doesn't make sense
124 * to manage page tables in smaller pieces as nearly all mappings have that
125 * size.
126 *
127 * ######################################################################
128 *
129 *
130 * ######################################################################
131 *
132 * mmu_engage
133 * ----------
134 * Thanks to a small helping routine enabling the mmu got quite simple
135 * and there is only one way left. mmu_engage makes a complete a new mapping
136 * that only includes the absolute necessary to be able to jump to the final
137 * position and to restore the original mapping.
138 * As this code doesn't need a transparent translation register anymore this
139 * means all registers are free to be used by machines that needs them for
140 * other purposes.
141 *
142 * ######################################################################
143 *
144 * mmu_print
145 * ---------
146 * This algorithm will print out the page tables of the system as
147 * appropriate for an 030 or an 040. This is useful for debugging purposes
148 * and as such is enclosed in #ifdef MMU_PRINT/#endif clauses.
149 *
150 * ######################################################################
151 *
152 * console_init
153 * ------------
154 * The console is also able to be turned off. The console in head.S
155 * is specifically for debugging and can be very useful. It is surrounded by
156 * #ifdef / #endif clauses so it doesn't have to ship in known-good
157 * kernels. It's basic algorithm is to determine the size of the screen
158 * (in height/width and bit depth) and then use that information for
159 * displaying an 8x8 font or an 8x16 (widthxheight). I prefer the 8x8 for
160 * debugging so I can see more good data. But it was trivial to add support
161 * for both fonts, so I included it.
162 * Also, the algorithm for plotting pixels is abstracted so that in
163 * theory other platforms could add support for different kinds of frame
164 * buffers. This could be very useful.
165 *
166 * console_put_penguin
167 * -------------------
168 * An important part of any Linux bring up is the penguin and there's
169 * nothing like getting the Penguin on the screen! This algorithm will work
170 * on any machine for which there is a console_plot_pixel.
171 *
172 * console_scroll
173 * --------------
174 * My hope is that the scroll algorithm does the right thing on the
175 * various platforms, but it wouldn't be hard to add the test conditions
176 * and new code if it doesn't.
177 *
178 * console_putc
179 * -------------
180 *
181 * ######################################################################
182 *
183 * Register usage has greatly simplified within head.S. Every subroutine
184 * saves and restores all registers that it modifies (except it returns a
185 * value in there of course). So the only register that needs to be initialized
186 * is the stack pointer.
187 * All other init code and data is now placed in the init section, so it will
188 * be automatically freed at the end of the kernel initialization.
189 *
190 * ######################################################################
191 *
192 * options
193 * -------
194 * There are many options available in a build of this file. I've
195 * taken the time to describe them here to save you the time of searching
196 * for them and trying to understand what they mean.
197 *
198 * CONFIG_xxx: These are the obvious machine configuration defines created
199 * during configuration. These are defined in autoconf.h.
200 *
201 * CONSOLE_DEBUG: Only supports a Mac frame buffer but could easily be
202 * extended to support other platforms.
203 *
204 * TEST_MMU: This is a test harness for running on any given machine but
205 * getting an MMU dump for another class of machine. The classes of machines
206 * that can be tested are any of the makes (Atari, Amiga, Mac, VME, etc.)
207 * and any of the models (030, 040, 060, etc.).
208 *
209 * NOTE: TEST_MMU is NOT permanent! It is scheduled to be removed
210 * When head.S boots on Atari, Amiga, Macintosh, and VME
211 * machines. At that point the underlying logic will be
212 * believed to be solid enough to be trusted, and TEST_MMU
213 * can be dropped. Do note that that will clean up the
214 * head.S code significantly as large blocks of #if/#else
215 * clauses can be removed.
216 *
217 * MMU_NOCACHE_KERNEL: On the Macintosh platform there was an inquiry into
218 * determing why devices don't appear to work. A test case was to remove
219 * the cacheability of the kernel bits.
220 *
221 * MMU_PRINT: There is a routine built into head.S that can display the
222 * MMU data structures. It outputs its result through the serial_putc
223 * interface. So where ever that winds up driving data, that's where the
224 * mmu struct will appear.
225 *
226 * SERIAL_DEBUG: There are a series of putc() macro statements
227 * scattered through out the code to give progress of status to the
228 * person sitting at the console. This constant determines whether those
229 * are used.
230 *
231 * DEBUG: This is the standard DEBUG flag that can be set for building
232 * the kernel. It has the effect adding additional tests into
233 * the code.
234 *
235 * FONT_6x11:
236 * FONT_8x8:
237 * FONT_8x16:
238 * In theory these could be determined at run time or handed
239 * over by the booter. But, let's be real, it's a fine hard
240 * coded value. (But, you will notice the code is run-time
241 * flexible!) A pointer to the font's struct font_desc
242 * is kept locally in Lconsole_font. It is used to determine
243 * font size information dynamically.
244 *
245 * Atari constants:
246 * USE_PRINTER: Use the printer port for serial debug.
247 * USE_SCC_B: Use the SCC port A (Serial2) for serial debug.
248 * USE_SCC_A: Use the SCC port B (Modem2) for serial debug.
249 * USE_MFP: Use the ST-MFP port (Modem1) for serial debug.
250 *
251 * Macintosh constants:
252 * MAC_USE_SCC_A: Use SCC port A (modem) for serial debug.
253 * MAC_USE_SCC_B: Use SCC port B (printer) for serial debug.
254 */
256 #include <linux/linkage.h>
257 #include <linux/init.h>
258 #include <asm/bootinfo.h>
259 #include <asm/bootinfo-amiga.h>
260 #include <asm/bootinfo-atari.h>
261 #include <asm/bootinfo-hp300.h>
262 #include <asm/bootinfo-mac.h>
263 #include <asm/bootinfo-q40.h>
264 #include <asm/bootinfo-vme.h>
265 #include <asm/setup.h>
266 #include <asm/entry.h>
267 #include <asm/pgtable.h>
268 #include <asm/page.h>
269 #include <asm/asm-offsets.h>
270 #ifdef CONFIG_MAC
271 # include <asm/machw.h>
272 #endif
274 #ifdef CONFIG_EARLY_PRINTK
275 # define SERIAL_DEBUG
276 # if defined(CONFIG_MAC) && defined(CONFIG_FONT_SUPPORT)
277 # define CONSOLE_DEBUG
278 # endif
279 #endif
281 #undef MMU_PRINT
282 #undef MMU_NOCACHE_KERNEL
283 #undef DEBUG
285 /*
286 * For the head.S console, there are three supported fonts, 6x11, 8x16 and 8x8.
287 * The 8x8 font is harder to read but fits more on the screen.
288 */
289 #define FONT_8x8 /* default */
290 /* #define FONT_8x16 */ /* 2nd choice */
291 /* #define FONT_6x11 */ /* 3rd choice */
293 .globl kernel_pg_dir
294 .globl availmem
295 .globl m68k_init_mapped_size
296 .globl m68k_pgtable_cachemode
297 .globl m68k_supervisor_cachemode
298 #ifdef CONFIG_MVME16x
299 .globl mvme_bdid
300 #endif
301 #ifdef CONFIG_Q40
302 .globl q40_mem_cptr
303 #endif
305 CPUTYPE_040 = 1 /* indicates an 040 */
306 CPUTYPE_060 = 2 /* indicates an 060 */
307 CPUTYPE_0460 = 3 /* if either above are set, this is set */
308 CPUTYPE_020 = 4 /* indicates an 020 */
310 /* Translation control register */
311 TC_ENABLE = 0x8000
312 TC_PAGE8K = 0x4000
313 TC_PAGE4K = 0x0000
315 /* Transparent translation registers */
316 TTR_ENABLE = 0x8000 /* enable transparent translation */
317 TTR_ANYMODE = 0x4000 /* user and kernel mode access */
318 TTR_KERNELMODE = 0x2000 /* only kernel mode access */
319 TTR_USERMODE = 0x0000 /* only user mode access */
320 TTR_CI = 0x0400 /* inhibit cache */
321 TTR_RW = 0x0200 /* read/write mode */
322 TTR_RWM = 0x0100 /* read/write mask */
323 TTR_FCB2 = 0x0040 /* function code base bit 2 */
324 TTR_FCB1 = 0x0020 /* function code base bit 1 */
325 TTR_FCB0 = 0x0010 /* function code base bit 0 */
326 TTR_FCM2 = 0x0004 /* function code mask bit 2 */
327 TTR_FCM1 = 0x0002 /* function code mask bit 1 */
328 TTR_FCM0 = 0x0001 /* function code mask bit 0 */
330 /* Cache Control registers */
331 CC6_ENABLE_D = 0x80000000 /* enable data cache (680[46]0) */
332 CC6_FREEZE_D = 0x40000000 /* freeze data cache (68060) */
333 CC6_ENABLE_SB = 0x20000000 /* enable store buffer (68060) */
334 CC6_PUSH_DPI = 0x10000000 /* disable CPUSH invalidation (68060) */
335 CC6_HALF_D = 0x08000000 /* half-cache mode for data cache (68060) */
336 CC6_ENABLE_B = 0x00800000 /* enable branch cache (68060) */
337 CC6_CLRA_B = 0x00400000 /* clear all entries in branch cache (68060) */
338 CC6_CLRU_B = 0x00200000 /* clear user entries in branch cache (68060) */
339 CC6_ENABLE_I = 0x00008000 /* enable instruction cache (680[46]0) */
340 CC6_FREEZE_I = 0x00004000 /* freeze instruction cache (68060) */
341 CC6_HALF_I = 0x00002000 /* half-cache mode for instruction cache (68060) */
342 CC3_ALLOC_WRITE = 0x00002000 /* write allocate mode(68030) */
343 CC3_ENABLE_DB = 0x00001000 /* enable data burst (68030) */
344 CC3_CLR_D = 0x00000800 /* clear data cache (68030) */
345 CC3_CLRE_D = 0x00000400 /* clear entry in data cache (68030) */
346 CC3_FREEZE_D = 0x00000200 /* freeze data cache (68030) */
347 CC3_ENABLE_D = 0x00000100 /* enable data cache (68030) */
348 CC3_ENABLE_IB = 0x00000010 /* enable instruction burst (68030) */
349 CC3_CLR_I = 0x00000008 /* clear instruction cache (68030) */
350 CC3_CLRE_I = 0x00000004 /* clear entry in instruction cache (68030) */
351 CC3_FREEZE_I = 0x00000002 /* freeze instruction cache (68030) */
352 CC3_ENABLE_I = 0x00000001 /* enable instruction cache (68030) */
354 /* Miscellaneous definitions */
355 PAGESIZE = 4096
356 PAGESHIFT = 12
358 ROOT_TABLE_SIZE = 128
359 PTR_TABLE_SIZE = 128
360 PAGE_TABLE_SIZE = 64
361 ROOT_INDEX_SHIFT = 25
362 PTR_INDEX_SHIFT = 18
363 PAGE_INDEX_SHIFT = 12
365 #ifdef DEBUG
366 /* When debugging use readable names for labels */
367 #ifdef __STDC__
368 #define L(name) .head.S.##name
369 #else
370 #define L(name) .head.S./**/name
371 #endif
372 #else
373 #ifdef __STDC__
374 #define L(name) .L##name
375 #else
376 #define L(name) .L/**/name
377 #endif
378 #endif
380 /* The __INITDATA stuff is a no-op when ftrace or kgdb are turned on */
381 #ifndef __INITDATA
382 #define __INITDATA .data
383 #define __FINIT .previous
384 #endif
386 /* Several macros to make the writing of subroutines easier:
387 * - func_start marks the beginning of the routine which setups the frame
388 * register and saves the registers, it also defines another macro
389 * to automatically restore the registers again.
390 * - func_return marks the end of the routine and simply calls the prepared
391 * macro to restore registers and jump back to the caller.
392 * - func_define generates another macro to automatically put arguments
393 * onto the stack call the subroutine and cleanup the stack again.
394 */
396 /* Within subroutines these macros can be used to access the arguments
397 * on the stack. With STACK some allocated memory on the stack can be
398 * accessed and ARG0 points to the return address (used by mmu_engage).
399 */
400 #define STACK %a6@(stackstart)
401 #define ARG0 %a6@(4)
402 #define ARG1 %a6@(8)
403 #define ARG2 %a6@(12)
404 #define ARG3 %a6@(16)
405 #define ARG4 %a6@(20)
407 .macro func_start name,saveregs,stack=0
408 L(\name):
409 linkw %a6,#-\stack
410 moveml \saveregs,%sp@-
411 .set stackstart,-\stack
413 .macro func_return_\name
414 moveml %sp@+,\saveregs
415 unlk %a6
416 rts
417 .endm
418 .endm
420 .macro func_return name
421 func_return_\name
422 .endm
424 .macro func_call name
425 jbsr L(\name)
426 .endm
428 .macro move_stack nr,arg1,arg2,arg3,arg4
429 .if \nr
430 move_stack "(\nr-1)",\arg2,\arg3,\arg4
431 movel \arg1,%sp@-
432 .endif
433 .endm
435 .macro func_define name,nr=0
436 .macro \name arg1,arg2,arg3,arg4
437 move_stack \nr,\arg1,\arg2,\arg3,\arg4
438 func_call \name
439 .if \nr
440 lea %sp@(\nr*4),%sp
441 .endif
442 .endm
443 .endm
445 func_define mmu_map,4
446 func_define mmu_map_tt,4
447 func_define mmu_fixup_page_mmu_cache,1
448 func_define mmu_temp_map,2
449 func_define mmu_engage
450 func_define mmu_get_root_table_entry,1
451 func_define mmu_get_ptr_table_entry,2
452 func_define mmu_get_page_table_entry,2
453 func_define mmu_print
454 func_define get_new_page
455 #if defined(CONFIG_HP300) || defined(CONFIG_APOLLO)
456 func_define set_leds
457 #endif
459 .macro mmu_map_eq arg1,arg2,arg3
460 mmu_map \arg1,\arg1,\arg2,\arg3
461 .endm
463 .macro get_bi_record record
464 pea \record
465 func_call get_bi_record
466 addql #4,%sp
467 .endm
469 func_define serial_putc,1
470 func_define console_putc,1
472 func_define console_init
473 func_define console_put_penguin
474 func_define console_plot_pixel,3
475 func_define console_scroll
477 .macro putc ch
478 #if defined(CONSOLE_DEBUG) || defined(SERIAL_DEBUG)
479 pea \ch
480 #endif
481 #ifdef CONSOLE_DEBUG
482 func_call console_putc
483 #endif
484 #ifdef SERIAL_DEBUG
485 func_call serial_putc
486 #endif
487 #if defined(CONSOLE_DEBUG) || defined(SERIAL_DEBUG)
488 addql #4,%sp
489 #endif
490 .endm
492 .macro dputc ch
493 #ifdef DEBUG
494 putc \ch
495 #endif
496 .endm
498 func_define putn,1
500 .macro dputn nr
501 #ifdef DEBUG
502 putn \nr
503 #endif
504 .endm
506 .macro puts string
507 #if defined(CONSOLE_DEBUG) || defined(SERIAL_DEBUG)
508 __INITDATA
509 .Lstr\@:
510 .string "\string"
511 __FINIT
512 pea %pc@(.Lstr\@)
513 func_call puts
514 addql #4,%sp
515 #endif
516 .endm
518 .macro dputs string
519 #ifdef DEBUG
520 puts "\string"
521 #endif
522 .endm
524 #define is_not_amiga(lab) cmpl &MACH_AMIGA,%pc@(m68k_machtype); jne lab
525 #define is_not_atari(lab) cmpl &MACH_ATARI,%pc@(m68k_machtype); jne lab
526 #define is_not_mac(lab) cmpl &MACH_MAC,%pc@(m68k_machtype); jne lab
527 #define is_not_mvme147(lab) cmpl &MACH_MVME147,%pc@(m68k_machtype); jne lab
528 #define is_not_mvme16x(lab) cmpl &MACH_MVME16x,%pc@(m68k_machtype); jne lab
529 #define is_not_bvme6000(lab) cmpl &MACH_BVME6000,%pc@(m68k_machtype); jne lab
530 #define is_mvme147(lab) cmpl &MACH_MVME147,%pc@(m68k_machtype); jeq lab
531 #define is_mvme16x(lab) cmpl &MACH_MVME16x,%pc@(m68k_machtype); jeq lab
532 #define is_bvme6000(lab) cmpl &MACH_BVME6000,%pc@(m68k_machtype); jeq lab
533 #define is_not_hp300(lab) cmpl &MACH_HP300,%pc@(m68k_machtype); jne lab
534 #define is_not_apollo(lab) cmpl &MACH_APOLLO,%pc@(m68k_machtype); jne lab
535 #define is_not_q40(lab) cmpl &MACH_Q40,%pc@(m68k_machtype); jne lab
536 #define is_not_sun3x(lab) cmpl &MACH_SUN3X,%pc@(m68k_machtype); jne lab
538 #define hasnt_leds(lab) cmpl &MACH_HP300,%pc@(m68k_machtype); \
539 jeq 42f; \
540 cmpl &MACH_APOLLO,%pc@(m68k_machtype); \
541 jne lab ;\
542 42:\
544 #define is_040_or_060(lab) btst &CPUTYPE_0460,%pc@(L(cputype)+3); jne lab
545 #define is_not_040_or_060(lab) btst &CPUTYPE_0460,%pc@(L(cputype)+3); jeq lab
546 #define is_040(lab) btst &CPUTYPE_040,%pc@(L(cputype)+3); jne lab
547 #define is_060(lab) btst &CPUTYPE_060,%pc@(L(cputype)+3); jne lab
548 #define is_not_060(lab) btst &CPUTYPE_060,%pc@(L(cputype)+3); jeq lab
549 #define is_020(lab) btst &CPUTYPE_020,%pc@(L(cputype)+3); jne lab
550 #define is_not_020(lab) btst &CPUTYPE_020,%pc@(L(cputype)+3); jeq lab
552 /* On the HP300 we use the on-board LEDs for debug output before
553 the console is running. Writing a 1 bit turns the corresponding LED
554 _off_ - on the 340 bit 7 is towards the back panel of the machine. */
555 .macro leds mask
556 #if defined(CONFIG_HP300) || defined(CONFIG_APOLLO)
557 hasnt_leds(.Lled\@)
558 pea \mask
559 func_call set_leds
560 addql #4,%sp
561 .Lled\@:
562 #endif
563 .endm
565 __HEAD
566 ENTRY(_stext)
567 /*
568 * Version numbers of the bootinfo interface
569 * The area from _stext to _start will later be used as kernel pointer table
570 */
571 bras 1f /* Jump over bootinfo version numbers */
573 .long BOOTINFOV_MAGIC
574 .long MACH_AMIGA, AMIGA_BOOTI_VERSION
575 .long MACH_ATARI, ATARI_BOOTI_VERSION
576 .long MACH_MVME147, MVME147_BOOTI_VERSION
577 .long MACH_MVME16x, MVME16x_BOOTI_VERSION
578 .long MACH_BVME6000, BVME6000_BOOTI_VERSION
579 .long MACH_MAC, MAC_BOOTI_VERSION
580 .long MACH_Q40, Q40_BOOTI_VERSION
581 .long MACH_HP300, HP300_BOOTI_VERSION
582 .long 0
583 1: jra __start
585 .equ kernel_pg_dir,_stext
587 .equ .,_stext+PAGESIZE
589 ENTRY(_start)
590 jra __start
591 __INIT
592 ENTRY(__start)
593 /*
594 * Setup initial stack pointer
595 */
596 lea %pc@(_stext),%sp
598 /*
599 * Record the CPU and machine type.
600 */
601 get_bi_record BI_MACHTYPE
602 lea %pc@(m68k_machtype),%a1
603 movel %a0@,%a1@
605 get_bi_record BI_FPUTYPE
606 lea %pc@(m68k_fputype),%a1
607 movel %a0@,%a1@
609 get_bi_record BI_MMUTYPE
610 lea %pc@(m68k_mmutype),%a1
611 movel %a0@,%a1@
613 get_bi_record BI_CPUTYPE
614 lea %pc@(m68k_cputype),%a1
615 movel %a0@,%a1@
617 leds 0x1
619 #ifdef CONFIG_MAC
620 /*
621 * For Macintosh, we need to determine the display parameters early (at least
622 * while debugging it).
623 */
625 is_not_mac(L(test_notmac))
627 get_bi_record BI_MAC_VADDR
628 lea %pc@(L(mac_videobase)),%a1
629 movel %a0@,%a1@
631 get_bi_record BI_MAC_VDEPTH
632 lea %pc@(L(mac_videodepth)),%a1
633 movel %a0@,%a1@
635 get_bi_record BI_MAC_VDIM
636 lea %pc@(L(mac_dimensions)),%a1
637 movel %a0@,%a1@
639 get_bi_record BI_MAC_VROW
640 lea %pc@(L(mac_rowbytes)),%a1
641 movel %a0@,%a1@
643 get_bi_record BI_MAC_SCCBASE
644 lea %pc@(L(mac_sccbase)),%a1
645 movel %a0@,%a1@
647 L(test_notmac):
648 #endif /* CONFIG_MAC */
651 /*
652 * There are ultimately two pieces of information we want for all kinds of
653 * processors CpuType and CacheBits. The CPUTYPE was passed in from booter
654 * and is converted here from a booter type definition to a separate bit
655 * number which allows for the standard is_0x0 macro tests.
656 */
657 movel %pc@(m68k_cputype),%d0
658 /*
659 * Assume it's an 030
660 */
661 clrl %d1
663 /*
664 * Test the BootInfo cputype for 060
665 */
666 btst #CPUB_68060,%d0
667 jeq 1f
668 bset #CPUTYPE_060,%d1
669 bset #CPUTYPE_0460,%d1
670 jra 3f
671 1:
672 /*
673 * Test the BootInfo cputype for 040
674 */
675 btst #CPUB_68040,%d0
676 jeq 2f
677 bset #CPUTYPE_040,%d1
678 bset #CPUTYPE_0460,%d1
679 jra 3f
680 2:
681 /*
682 * Test the BootInfo cputype for 020
683 */
684 btst #CPUB_68020,%d0
685 jeq 3f
686 bset #CPUTYPE_020,%d1
687 jra 3f
688 3:
689 /*
690 * Record the cpu type
691 */
692 lea %pc@(L(cputype)),%a0
693 movel %d1,%a0@
695 /*
696 * NOTE:
697 *
698 * Now the macros are valid:
699 * is_040_or_060
700 * is_not_040_or_060
701 * is_040
702 * is_060
703 * is_not_060
704 */
706 /*
707 * Determine the cache mode for pages holding MMU tables
708 * and for supervisor mode, unused for '020 and '030
709 */
710 clrl %d0
711 clrl %d1
713 is_not_040_or_060(L(save_cachetype))
715 /*
716 * '040 or '060
717 * d1 := cacheable write-through
718 * NOTE: The 68040 manual strongly recommends non-cached for MMU tables,
719 * but we have been using write-through since at least 2.0.29 so I
720 * guess it is OK.
721 */
722 #ifdef CONFIG_060_WRITETHROUGH
723 /*
724 * If this is a 68060 board using drivers with cache coherency
725 * problems, then supervisor memory accesses need to be write-through
726 * also; otherwise, we want copyback.
727 */
729 is_not_060(1f)
730 movel #_PAGE_CACHE040W,%d0
731 jra L(save_cachetype)
732 #endif /* CONFIG_060_WRITETHROUGH */
733 1:
734 movew #_PAGE_CACHE040,%d0
736 movel #_PAGE_CACHE040W,%d1
738 L(save_cachetype):
739 /* Save cache mode for supervisor mode and page tables
740 */
741 lea %pc@(m68k_supervisor_cachemode),%a0
742 movel %d0,%a0@
743 lea %pc@(m68k_pgtable_cachemode),%a0
744 movel %d1,%a0@
746 /*
747 * raise interrupt level
748 */
749 movew #0x2700,%sr
751 /*
752 If running on an Atari, determine the I/O base of the
753 serial port and test if we are running on a Medusa or Hades.
754 This test is necessary here, because on the Hades the serial
755 port is only accessible in the high I/O memory area.
757 The test whether it is a Medusa is done by writing to the byte at
758 phys. 0x0. This should result in a bus error on all other machines.
760 ...should, but doesn't. The Afterburner040 for the Falcon has the
761 same behaviour (0x0..0x7 are no ROM shadow). So we have to do
762 another test to distinguish Medusa and AB040. This is a
763 read attempt for 0x00ff82fe phys. that should bus error on a Falcon
764 (+AB040), but is in the range where the Medusa always asserts DTACK.
766 The test for the Hades is done by reading address 0xb0000000. This
767 should give a bus error on the Medusa.
768 */
770 #ifdef CONFIG_ATARI
771 is_not_atari(L(notypetest))
773 /* get special machine type (Medusa/Hades/AB40) */
774 moveq #0,%d3 /* default if tag doesn't exist */
775 get_bi_record BI_ATARI_MCH_TYPE
776 tstl %d0
777 jbmi 1f
778 movel %a0@,%d3
779 lea %pc@(atari_mch_type),%a0
780 movel %d3,%a0@
781 1:
782 /* On the Hades, the iobase must be set up before opening the
783 * serial port. There are no I/O regs at 0x00ffxxxx at all. */
784 moveq #0,%d0
785 cmpl #ATARI_MACH_HADES,%d3
786 jbne 1f
787 movel #0xff000000,%d0 /* Hades I/O base addr: 0xff000000 */
788 1: lea %pc@(L(iobase)),%a0
789 movel %d0,%a0@
791 L(notypetest):
792 #endif
794 #ifdef CONFIG_VME
795 is_mvme147(L(getvmetype))
796 is_bvme6000(L(getvmetype))
797 is_not_mvme16x(L(gvtdone))
799 /* See if the loader has specified the BI_VME_TYPE tag. Recent
800 * versions of VMELILO and TFTPLILO do this. We have to do this
801 * early so we know how to handle console output. If the tag
802 * doesn't exist then we use the Bug for output on MVME16x.
803 */
804 L(getvmetype):
805 get_bi_record BI_VME_TYPE
806 tstl %d0
807 jbmi 1f
808 movel %a0@,%d3
809 lea %pc@(vme_brdtype),%a0
810 movel %d3,%a0@
811 1:
812 #ifdef CONFIG_MVME16x
813 is_not_mvme16x(L(gvtdone))
815 /* Need to get the BRD_ID info to differentiate between 162, 167,
816 * etc. This is available as a BI_VME_BRDINFO tag with later
817 * versions of VMELILO and TFTPLILO, otherwise we call the Bug.
818 */
819 get_bi_record BI_VME_BRDINFO
820 tstl %d0
821 jpl 1f
823 /* Get pointer to board ID data from Bug */
824 movel %d2,%sp@-
825 trap #15
826 .word 0x70 /* trap 0x70 - .BRD_ID */
827 movel %sp@+,%a0
828 1:
829 lea %pc@(mvme_bdid),%a1
830 /* Structure is 32 bytes long */
831 movel %a0@+,%a1@+
832 movel %a0@+,%a1@+
833 movel %a0@+,%a1@+
834 movel %a0@+,%a1@+
835 movel %a0@+,%a1@+
836 movel %a0@+,%a1@+
837 movel %a0@+,%a1@+
838 movel %a0@+,%a1@+
839 #endif
841 L(gvtdone):
843 #endif
845 #ifdef CONFIG_HP300
846 is_not_hp300(L(nothp))
848 /* Get the address of the UART for serial debugging */
849 get_bi_record BI_HP300_UART_ADDR
850 tstl %d0
851 jbmi 1f
852 movel %a0@,%d3
853 lea %pc@(L(uartbase)),%a0
854 movel %d3,%a0@
855 get_bi_record BI_HP300_UART_SCODE
856 tstl %d0
857 jbmi 1f
858 movel %a0@,%d3
859 lea %pc@(L(uart_scode)),%a0
860 movel %d3,%a0@
861 1:
862 L(nothp):
863 #endif
865 /*
866 * Initialize serial port
867 */
868 jbsr L(serial_init)
870 /*
871 * Initialize console
872 */
873 #ifdef CONFIG_MAC
874 is_not_mac(L(nocon))
875 # ifdef CONSOLE_DEBUG
876 console_init
877 # ifdef CONFIG_LOGO
878 console_put_penguin
879 # endif /* CONFIG_LOGO */
880 # endif /* CONSOLE_DEBUG */
881 L(nocon):
882 #endif /* CONFIG_MAC */
885 putc '\n'
886 putc 'A'
887 leds 0x2
888 dputn %pc@(L(cputype))
889 dputn %pc@(m68k_supervisor_cachemode)
890 dputn %pc@(m68k_pgtable_cachemode)
891 dputc '\n'
893 /*
894 * Save physical start address of kernel
895 */
896 lea %pc@(L(phys_kernel_start)),%a0
897 lea %pc@(_stext),%a1
898 subl #_stext,%a1
899 addl #PAGE_OFFSET,%a1
900 movel %a1,%a0@
902 putc 'B'
904 leds 0x4
906 /*
907 * mmu_init
908 *
909 * This block of code does what's necessary to map in the various kinds
910 * of machines for execution of Linux.
911 * First map the first 4, 8, or 16 MB of kernel code & data
912 */
914 get_bi_record BI_MEMCHUNK
915 movel %a0@(4),%d0
916 movel #16*1024*1024,%d1
917 cmpl %d0,%d1
918 jls 1f
919 lsrl #1,%d1
920 cmpl %d0,%d1
921 jls 1f
922 lsrl #1,%d1
923 1:
924 movel %d1,m68k_init_mapped_size
925 mmu_map #PAGE_OFFSET,%pc@(L(phys_kernel_start)),%d1,\
926 %pc@(m68k_supervisor_cachemode)
928 putc 'C'
930 #ifdef CONFIG_AMIGA
932 L(mmu_init_amiga):
934 is_not_amiga(L(mmu_init_not_amiga))
935 /*
936 * mmu_init_amiga
937 */
939 putc 'D'
941 is_not_040_or_060(1f)
943 /*
944 * 040: Map the 16Meg range physical 0x0 up to logical 0x8000.0000
945 */
946 mmu_map #0x80000000,#0,#0x01000000,#_PAGE_NOCACHE_S
947 /*
948 * Map the Zorro III I/O space with transparent translation
949 * for frame buffer memory etc.
950 */
951 mmu_map_tt #1,#0x40000000,#0x20000000,#_PAGE_NOCACHE_S
953 jbra L(mmu_init_done)
955 1:
956 /*
957 * 030: Map the 32Meg range physical 0x0 up to logical 0x8000.0000
958 */
959 mmu_map #0x80000000,#0,#0x02000000,#_PAGE_NOCACHE030
960 mmu_map_tt #1,#0x40000000,#0x20000000,#_PAGE_NOCACHE030
962 jbra L(mmu_init_done)
964 L(mmu_init_not_amiga):
965 #endif
967 #ifdef CONFIG_ATARI
969 L(mmu_init_atari):
971 is_not_atari(L(mmu_init_not_atari))
973 putc 'E'
975 /* On the Atari, we map the I/O region (phys. 0x00ffxxxx) by mapping
976 the last 16 MB of virtual address space to the first 16 MB (i.e.
977 0xffxxxxxx -> 0x00xxxxxx). For this, an additional pointer table is
978 needed. I/O ranges are marked non-cachable.
980 For the Medusa it is better to map the I/O region transparently
981 (i.e. 0xffxxxxxx -> 0xffxxxxxx), because some I/O registers are
982 accessible only in the high area.
984 On the Hades all I/O registers are only accessible in the high
985 area.
986 */
988 /* I/O base addr for non-Medusa, non-Hades: 0x00000000 */
989 moveq #0,%d0
990 movel %pc@(atari_mch_type),%d3
991 cmpl #ATARI_MACH_MEDUSA,%d3
992 jbeq 2f
993 cmpl #ATARI_MACH_HADES,%d3
994 jbne 1f
995 2: movel #0xff000000,%d0 /* Medusa/Hades base addr: 0xff000000 */
996 1: movel %d0,%d3
998 is_040_or_060(L(spata68040))
1000 /* Map everything non-cacheable, though not all parts really
1001 * need to disable caches (crucial only for 0xff8000..0xffffff
1002 * (standard I/O) and 0xf00000..0xf3ffff (IDE)). The remainder
1003 * isn't really used, except for sometimes peeking into the
1004 * ROMs (mirror at phys. 0x0), so caching isn't necessary for
1005 * this. */
1006 mmu_map #0xff000000,%d3,#0x01000000,#_PAGE_NOCACHE030
1008 jbra L(mmu_init_done)
1010 L(spata68040):
1012 mmu_map #0xff000000,%d3,#0x01000000,#_PAGE_NOCACHE_S
1014 jbra L(mmu_init_done)
1016 L(mmu_init_not_atari):
1017 #endif
1019 #ifdef CONFIG_Q40
1020 is_not_q40(L(notq40))
1021 /*
1022 * add transparent mapping for 0xff00 0000 - 0xffff ffff
1023 * non-cached serialized etc..
1024 * this includes master chip, DAC, RTC and ISA ports
1025 * 0xfe000000-0xfeffffff is for screen and ROM
1026 */
1028 putc 'Q'
1030 mmu_map_tt #0,#0xfe000000,#0x01000000,#_PAGE_CACHE040W
1031 mmu_map_tt #1,#0xff000000,#0x01000000,#_PAGE_NOCACHE_S
1033 jbra L(mmu_init_done)
1035 L(notq40):
1036 #endif
1038 #ifdef CONFIG_HP300
1039 is_not_hp300(L(nothp300))
1041 /* On the HP300, we map the ROM, INTIO and DIO regions (phys. 0x00xxxxxx)
1042 * by mapping 32MB (on 020/030) or 16 MB (on 040) from 0xf0xxxxxx -> 0x00xxxxxx).
1043 * The ROM mapping is needed because the LEDs are mapped there too.
1044 */
1046 is_040(1f)
1048 /*
1049 * 030: Map the 32Meg range physical 0x0 up to logical 0xf000.0000
1050 */
1051 mmu_map #0xf0000000,#0,#0x02000000,#_PAGE_NOCACHE030
1053 jbra L(mmu_init_done)
1055 1:
1056 /*
1057 * 040: Map the 16Meg range physical 0x0 up to logical 0xf000.0000
1058 */
1059 mmu_map #0xf0000000,#0,#0x01000000,#_PAGE_NOCACHE_S
1061 jbra L(mmu_init_done)
1063 L(nothp300):
1064 #endif /* CONFIG_HP300 */
1066 #ifdef CONFIG_MVME147
1068 is_not_mvme147(L(not147))
1070 /*
1071 * On MVME147 we have already created kernel page tables for
1072 * 4MB of RAM at address 0, so now need to do a transparent
1073 * mapping of the top of memory space. Make it 0.5GByte for now,
1074 * so we can access on-board i/o areas.
1075 */
1077 mmu_map_tt #1,#0xe0000000,#0x20000000,#_PAGE_NOCACHE030
1079 jbra L(mmu_init_done)
1081 L(not147):
1082 #endif /* CONFIG_MVME147 */
1084 #ifdef CONFIG_MVME16x
1086 is_not_mvme16x(L(not16x))
1088 /*
1089 * On MVME16x we have already created kernel page tables for
1090 * 4MB of RAM at address 0, so now need to do a transparent
1091 * mapping of the top of memory space. Make it 0.5GByte for now.
1092 * Supervisor only access, so transparent mapping doesn't
1093 * clash with User code virtual address space.
1094 * this covers IO devices, PROM and SRAM. The PROM and SRAM
1095 * mapping is needed to allow 167Bug to run.
1096 * IO is in the range 0xfff00000 to 0xfffeffff.
1097 * PROM is 0xff800000->0xffbfffff and SRAM is
1098 * 0xffe00000->0xffe1ffff.
1099 */
1101 mmu_map_tt #1,#0xe0000000,#0x20000000,#_PAGE_NOCACHE_S
1103 jbra L(mmu_init_done)
1105 L(not16x):
1106 #endif /* CONFIG_MVME162 | CONFIG_MVME167 */
1108 #ifdef CONFIG_BVME6000
1110 is_not_bvme6000(L(not6000))
1112 /*
1113 * On BVME6000 we have already created kernel page tables for
1114 * 4MB of RAM at address 0, so now need to do a transparent
1115 * mapping of the top of memory space. Make it 0.5GByte for now,
1116 * so we can access on-board i/o areas.
1117 * Supervisor only access, so transparent mapping doesn't
1118 * clash with User code virtual address space.
1119 */
1121 mmu_map_tt #1,#0xe0000000,#0x20000000,#_PAGE_NOCACHE_S
1123 jbra L(mmu_init_done)
1125 L(not6000):
1126 #endif /* CONFIG_BVME6000 */
1128 /*
1129 * mmu_init_mac
1130 *
1131 * The Macintosh mappings are less clear.
1132 *
1133 * Even as of this writing, it is unclear how the
1134 * Macintosh mappings will be done. However, as
1135 * the first author of this code I'm proposing the
1136 * following model:
1137 *
1138 * Map the kernel (that's already done),
1139 * Map the I/O (on most machines that's the
1140 * 0x5000.0000 ... 0x5300.0000 range,
1141 * Map the video frame buffer using as few pages
1142 * as absolutely (this requirement mostly stems from
1143 * the fact that when the frame buffer is at
1144 * 0x0000.0000 then we know there is valid RAM just
1145 * above the screen that we don't want to waste!).
1146 *
1147 * By the way, if the frame buffer is at 0x0000.0000
1148 * then the Macintosh is known as an RBV based Mac.
1149 *
1150 * By the way 2, the code currently maps in a bunch of
1151 * regions. But I'd like to cut that out. (And move most
1152 * of the mappings up into the kernel proper ... or only
1153 * map what's necessary.)
1154 */
1156 #ifdef CONFIG_MAC
1158 L(mmu_init_mac):
1160 is_not_mac(L(mmu_init_not_mac))
1162 putc 'F'
1164 is_not_040_or_060(1f)
1166 moveq #_PAGE_NOCACHE_S,%d3
1167 jbra 2f
1168 1:
1169 moveq #_PAGE_NOCACHE030,%d3
1170 2:
1171 /*
1172 * Mac Note: screen address of logical 0xF000.0000 -> <screen physical>
1173 * we simply map the 4MB that contains the videomem
1174 */
1176 movel #VIDEOMEMMASK,%d0
1177 andl %pc@(L(mac_videobase)),%d0
1179 mmu_map #VIDEOMEMBASE,%d0,#VIDEOMEMSIZE,%d3
1180 /* ROM from 4000 0000 to 4200 0000 (only for mac_reset()) */
1181 mmu_map_eq #0x40000000,#0x02000000,%d3
1182 /* IO devices (incl. serial port) from 5000 0000 to 5300 0000 */
1183 mmu_map_eq #0x50000000,#0x03000000,%d3
1184 /* Nubus slot space (video at 0xF0000000, rom at 0xF0F80000) */
1185 mmu_map_tt #1,#0xf8000000,#0x08000000,%d3
1187 jbra L(mmu_init_done)
1189 L(mmu_init_not_mac):
1190 #endif
1192 #ifdef CONFIG_SUN3X
1193 is_not_sun3x(L(notsun3x))
1195 /* oh, the pain.. We're gonna want the prom code after
1196 * starting the MMU, so we copy the mappings, translating
1197 * from 8k -> 4k pages as we go.
1198 */
1200 /* copy maps from 0xfee00000 to 0xff000000 */
1201 movel #0xfee00000, %d0
1202 moveq #ROOT_INDEX_SHIFT, %d1
1203 lsrl %d1,%d0
1204 mmu_get_root_table_entry %d0
1206 movel #0xfee00000, %d0
1207 moveq #PTR_INDEX_SHIFT, %d1
1208 lsrl %d1,%d0
1209 andl #PTR_TABLE_SIZE-1, %d0
1210 mmu_get_ptr_table_entry %a0,%d0
1212 movel #0xfee00000, %d0
1213 moveq #PAGE_INDEX_SHIFT, %d1
1214 lsrl %d1,%d0
1215 andl #PAGE_TABLE_SIZE-1, %d0
1216 mmu_get_page_table_entry %a0,%d0
1218 /* this is where the prom page table lives */
1219 movel 0xfefe00d4, %a1
1220 movel %a1@, %a1
1222 movel #((0x200000 >> 13)-1), %d1
1224 1:
1225 movel %a1@+, %d3
1226 movel %d3,%a0@+
1227 addl #0x1000,%d3
1228 movel %d3,%a0@+
1230 dbra %d1,1b
1232 /* setup tt1 for I/O */
1233 mmu_map_tt #1,#0x40000000,#0x40000000,#_PAGE_NOCACHE_S
1234 jbra L(mmu_init_done)
1236 L(notsun3x):
1237 #endif
1239 #ifdef CONFIG_APOLLO
1240 is_not_apollo(L(notapollo))
1242 putc 'P'
1243 mmu_map #0x80000000,#0,#0x02000000,#_PAGE_NOCACHE030
1245 L(notapollo):
1246 jbra L(mmu_init_done)
1247 #endif
1249 L(mmu_init_done):
1251 putc 'G'
1252 leds 0x8
1254 /*
1255 * mmu_fixup
1256 *
1257 * On the 040 class machines, all pages that are used for the
1258 * mmu have to be fixed up. According to Motorola, pages holding mmu
1259 * tables should be non-cacheable on a '040 and write-through on a
1260 * '060. But analysis of the reasons for this, and practical
1261 * experience, showed that write-through also works on a '040.
1262 *
1263 * Allocated memory so far goes from kernel_end to memory_start that
1264 * is used for all kind of tables, for that the cache attributes
1265 * are now fixed.
1266 */
1267 L(mmu_fixup):
1269 is_not_040_or_060(L(mmu_fixup_done))
1271 #ifdef MMU_NOCACHE_KERNEL
1272 jbra L(mmu_fixup_done)
1273 #endif
1275 /* first fix the page at the start of the kernel, that
1276 * contains also kernel_pg_dir.
1277 */
1278 movel %pc@(L(phys_kernel_start)),%d0
1279 subl #PAGE_OFFSET,%d0
1280 lea %pc@(_stext),%a0
1281 subl %d0,%a0
1282 mmu_fixup_page_mmu_cache %a0
1284 movel %pc@(L(kernel_end)),%a0
1285 subl %d0,%a0
1286 movel %pc@(L(memory_start)),%a1
1287 subl %d0,%a1
1288 bra 2f
1289 1:
1290 mmu_fixup_page_mmu_cache %a0
1291 addw #PAGESIZE,%a0
1292 2:
1293 cmpl %a0,%a1
1294 jgt 1b
1296 L(mmu_fixup_done):
1298 #ifdef MMU_PRINT
1299 mmu_print
1300 #endif
1302 /*
1303 * mmu_engage
1304 *
1305 * This chunk of code performs the gruesome task of engaging the MMU.
1306 * The reason its gruesome is because when the MMU becomes engaged it
1307 * maps logical addresses to physical addresses. The Program Counter
1308 * register is then passed through the MMU before the next instruction
1309 * is fetched (the instruction following the engage MMU instruction).
1310 * This may mean one of two things:
1311 * 1. The Program Counter falls within the logical address space of
1312 * the kernel of which there are two sub-possibilities:
1313 * A. The PC maps to the correct instruction (logical PC == physical
1314 * code location), or
1315 * B. The PC does not map through and the processor will read some
1316 * data (or instruction) which is not the logically next instr.
1317 * As you can imagine, A is good and B is bad.
1318 * Alternatively,
1319 * 2. The Program Counter does not map through the MMU. The processor
1320 * will take a Bus Error.
1321 * Clearly, 2 is bad.
1322 * It doesn't take a wiz kid to figure you want 1.A.
1323 * This code creates that possibility.
1324 * There are two possible 1.A. states (we now ignore the other above states):
1325 * A. The kernel is located at physical memory addressed the same as
1326 * the logical memory for the kernel, i.e., 0x01000.
1327 * B. The kernel is located some where else. e.g., 0x0400.0000
1328 *
1329 * Under some conditions the Macintosh can look like A or B.
1330 * [A friend and I once noted that Apple hardware engineers should be
1331 * wacked twice each day: once when they show up at work (as in, Whack!,
1332 * "This is for the screwy hardware we know you're going to design today."),
1333 * and also at the end of the day (as in, Whack! "I don't know what
1334 * you designed today, but I'm sure it wasn't good."). -- rst]
1335 *
1336 * This code works on the following premise:
1337 * If the kernel start (%d5) is within the first 16 Meg of RAM,
1338 * then create a mapping for the kernel at logical 0x8000.0000 to
1339 * the physical location of the pc. And, create a transparent
1340 * translation register for the first 16 Meg. Then, after the MMU
1341 * is engaged, the PC can be moved up into the 0x8000.0000 range
1342 * and then the transparent translation can be turned off and then
1343 * the PC can jump to the correct logical location and it will be
1344 * home (finally). This is essentially the code that the Amiga used
1345 * to use. Now, it's generalized for all processors. Which means
1346 * that a fresh (but temporary) mapping has to be created. The mapping
1347 * is made in page 0 (an as of yet unused location -- except for the
1348 * stack!). This temporary mapping will only require 1 pointer table
1349 * and a single page table (it can map 256K).
1350 *
1351 * OK, alternatively, imagine that the Program Counter is not within
1352 * the first 16 Meg. Then, just use Transparent Translation registers
1353 * to do the right thing.
1354 *
1355 * Last, if _start is already at 0x01000, then there's nothing special
1356 * to do (in other words, in a degenerate case of the first case above,
1357 * do nothing).
1358 *
1359 * Let's do it.
1360 *
1361 *
1362 */
1364 putc 'H'
1366 mmu_engage
1368 /*
1369 * After this point no new memory is allocated and
1370 * the start of available memory is stored in availmem.
1371 * (The bootmem allocator requires now the physicall address.)
1372 */
1374 movel L(memory_start),availmem
1376 #ifdef CONFIG_AMIGA
1377 is_not_amiga(1f)
1378 /* fixup the Amiga custom register location before printing */
1379 clrl L(custom)
1380 1:
1381 #endif
1383 #ifdef CONFIG_ATARI
1384 is_not_atari(1f)
1385 /* fixup the Atari iobase register location before printing */
1386 movel #0xff000000,L(iobase)
1387 1:
1388 #endif
1390 #ifdef CONFIG_MAC
1391 is_not_mac(1f)
1392 movel #~VIDEOMEMMASK,%d0
1393 andl L(mac_videobase),%d0
1394 addl #VIDEOMEMBASE,%d0
1395 movel %d0,L(mac_videobase)
1396 #ifdef CONSOLE_DEBUG
1397 movel %pc@(L(phys_kernel_start)),%d0
1398 subl #PAGE_OFFSET,%d0
1399 subl %d0,L(console_font)
1400 subl %d0,L(console_font_data)
1401 #endif
1402 orl #0x50000000,L(mac_sccbase)
1403 1:
1404 #endif
1406 #ifdef CONFIG_HP300
1407 is_not_hp300(2f)
1408 /*
1409 * Fix up the iobase register to point to the new location of the LEDs.
1410 */
1411 movel #0xf0000000,L(iobase)
1413 /*
1414 * Energise the FPU and caches.
1415 */
1416 is_040(1f)
1417 movel #0x60,0xf05f400c
1418 jbra 2f
1420 /*
1421 * 040: slightly different, apparently.
1422 */
1423 1: movew #0,0xf05f400e
1424 movew #0x64,0xf05f400e
1425 2:
1426 #endif
1428 #ifdef CONFIG_SUN3X
1429 is_not_sun3x(1f)
1431 /* enable copro */
1432 oriw #0x4000,0x61000000
1433 1:
1434 #endif
1436 #ifdef CONFIG_APOLLO
1437 is_not_apollo(1f)
1439 /*
1440 * Fix up the iobase before printing
1441 */
1442 movel #0x80000000,L(iobase)
1443 1:
1444 #endif
1446 putc 'I'
1447 leds 0x10
1449 /*
1450 * Enable caches
1451 */
1453 is_not_040_or_060(L(cache_not_680460))
1455 L(cache680460):
1456 .chip 68040
1457 nop
1458 cpusha %bc
1459 nop
1461 is_060(L(cache68060))
1463 movel #CC6_ENABLE_D+CC6_ENABLE_I,%d0
1464 /* MMU stuff works in copyback mode now, so enable the cache */
1465 movec %d0,%cacr
1466 jra L(cache_done)
1468 L(cache68060):
1469 movel #CC6_ENABLE_D+CC6_ENABLE_I+CC6_ENABLE_SB+CC6_PUSH_DPI+CC6_ENABLE_B+CC6_CLRA_B,%d0
1470 /* MMU stuff works in copyback mode now, so enable the cache */
1471 movec %d0,%cacr
1472 /* enable superscalar dispatch in PCR */
1473 moveq #1,%d0
1474 .chip 68060
1475 movec %d0,%pcr
1477 jbra L(cache_done)
1478 L(cache_not_680460):
1479 L(cache68030):
1480 .chip 68030
1481 movel #CC3_ENABLE_DB+CC3_CLR_D+CC3_ENABLE_D+CC3_ENABLE_IB+CC3_CLR_I+CC3_ENABLE_I,%d0
1482 movec %d0,%cacr
1484 jra L(cache_done)
1485 .chip 68k
1486 L(cache_done):
1488 putc 'J'
1490 /*
1491 * Setup initial stack pointer
1492 */
1493 lea init_task,%curptr
1494 lea init_thread_union+THREAD_SIZE,%sp
1496 putc 'K'
1498 subl %a6,%a6 /* clear a6 for gdb */
1500 /*
1501 * The new 64bit printf support requires an early exception initialization.
1502 */
1503 jbsr base_trap_init
1505 /* jump to the kernel start */
1507 putc '\n'
1508 leds 0x55
1510 jbsr start_kernel
1512 /*
1513 * Find a tag record in the bootinfo structure
1514 * The bootinfo structure is located right after the kernel
1515 * Returns: d0: size (-1 if not found)
1516 * a0: data pointer (end-of-records if not found)
1517 */
1518 func_start get_bi_record,%d1
1520 movel ARG1,%d0
1521 lea %pc@(_end),%a0
1522 1: tstw %a0@(BIR_TAG)
1523 jeq 3f
1524 cmpw %a0@(BIR_TAG),%d0
1525 jeq 2f
1526 addw %a0@(BIR_SIZE),%a0
1527 jra 1b
1528 2: moveq #0,%d0
1529 movew %a0@(BIR_SIZE),%d0
1530 lea %a0@(BIR_DATA),%a0
1531 jra 4f
1532 3: moveq #-1,%d0
1533 lea %a0@(BIR_SIZE),%a0
1534 4:
1535 func_return get_bi_record
1538 /*
1539 * MMU Initialization Begins Here
1540 *
1541 * The structure of the MMU tables on the 68k machines
1542 * is thus:
1543 * Root Table
1544 * Logical addresses are translated through
1545 * a hierarchical translation mechanism where the high-order
1546 * seven bits of the logical address (LA) are used as an
1547 * index into the "root table." Each entry in the root
1548 * table has a bit which specifies if it's a valid pointer to a
1549 * pointer table. Each entry defines a 32KMeg range of memory.
1550 * If an entry is invalid then that logical range of 32M is
1551 * invalid and references to that range of memory (when the MMU
1552 * is enabled) will fault. If the entry is valid, then it does
1553 * one of two things. On 040/060 class machines, it points to
1554 * a pointer table which then describes more finely the memory
1555 * within that 32M range. On 020/030 class machines, a technique
1556 * called "early terminating descriptors" are used. This technique
1557 * allows an entire 32Meg to be described by a single entry in the
1558 * root table. Thus, this entry in the root table, contains the
1559 * physical address of the memory or I/O at the logical address
1560 * which the entry represents and it also contains the necessary
1561 * cache bits for this region.
1562 *
1563 * Pointer Tables
1564 * Per the Root Table, there will be one or more
1565 * pointer tables. Each pointer table defines a 32M range.
1566 * Not all of the 32M range need be defined. Again, the next
1567 * seven bits of the logical address are used an index into
1568 * the pointer table to point to page tables (if the pointer
1569 * is valid). There will undoubtedly be more than one
1570 * pointer table for the kernel because each pointer table
1571 * defines a range of only 32M. Valid pointer table entries
1572 * point to page tables, or are early terminating entries
1573 * themselves.
1574 *
1575 * Page Tables
1576 * Per the Pointer Tables, each page table entry points
1577 * to the physical page in memory that supports the logical
1578 * address that translates to the particular index.
1579 *
1580 * In short, the Logical Address gets translated as follows:
1581 * bits 31..26 - index into the Root Table
1582 * bits 25..18 - index into the Pointer Table
1583 * bits 17..12 - index into the Page Table
1584 * bits 11..0 - offset into a particular 4K page
1585 *
1586 * The algorithms which follows do one thing: they abstract
1587 * the MMU hardware. For example, there are three kinds of
1588 * cache settings that are relevant. Either, memory is
1589 * being mapped in which case it is either Kernel Code (or
1590 * the RamDisk) or it is MMU data. On the 030, the MMU data
1591 * option also describes the kernel. Or, I/O is being mapped
1592 * in which case it has its own kind of cache bits. There
1593 * are constants which abstract these notions from the code that
1594 * actually makes the call to map some range of memory.
1595 *
1596 *
1597 *
1598 */
1600 #ifdef MMU_PRINT
1601 /*
1602 * mmu_print
1603 *
1604 * This algorithm will print out the current MMU mappings.
1605 *
1606 * Input:
1607 * %a5 points to the root table. Everything else is calculated
1608 * from this.
1609 */
1611 #define mmu_next_valid 0
1612 #define mmu_start_logical 4
1613 #define mmu_next_logical 8
1614 #define mmu_start_physical 12
1615 #define mmu_next_physical 16
1617 #define MMU_PRINT_INVALID -1
1618 #define MMU_PRINT_VALID 1
1619 #define MMU_PRINT_UNINITED 0
1621 #define putZc(z,n) jbne 1f; putc z; jbra 2f; 1: putc n; 2:
1623 func_start mmu_print,%a0-%a6/%d0-%d7
1625 movel %pc@(L(kernel_pgdir_ptr)),%a5
1626 lea %pc@(L(mmu_print_data)),%a0
1627 movel #MMU_PRINT_UNINITED,%a0@(mmu_next_valid)
1629 is_not_040_or_060(mmu_030_print)
1631 mmu_040_print:
1632 puts "\nMMU040\n"
1633 puts "rp:"
1634 putn %a5
1635 putc '\n'
1636 #if 0
1637 /*
1638 * The following #if/#endif block is a tight algorithm for dumping the 040
1639 * MMU Map in gory detail. It really isn't that practical unless the
1640 * MMU Map algorithm appears to go awry and you need to debug it at the
1641 * entry per entry level.
1642 */
1643 movel #ROOT_TABLE_SIZE,%d5
1644 #if 0
1645 movel %a5@+,%d7 | Burn an entry to skip the kernel mappings,
1646 subql #1,%d5 | they (might) work
1647 #endif
1648 1: tstl %d5
1649 jbeq mmu_print_done
1650 subq #1,%d5
1651 movel %a5@+,%d7
1652 btst #1,%d7
1653 jbeq 1b
1655 2: putn %d7
1656 andil #0xFFFFFE00,%d7
1657 movel %d7,%a4
1658 movel #PTR_TABLE_SIZE,%d4
1659 putc ' '
1660 3: tstl %d4
1661 jbeq 11f
1662 subq #1,%d4
1663 movel %a4@+,%d7
1664 btst #1,%d7
1665 jbeq 3b
1667 4: putn %d7
1668 andil #0xFFFFFF00,%d7
1669 movel %d7,%a3
1670 movel #PAGE_TABLE_SIZE,%d3
1671 5: movel #8,%d2
1672 6: tstl %d3
1673 jbeq 31f
1674 subq #1,%d3
1675 movel %a3@+,%d6
1676 btst #0,%d6
1677 jbeq 6b
1678 7: tstl %d2
1679 jbeq 8f
1680 subq #1,%d2
1681 putc ' '
1682 jbra 91f
1683 8: putc '\n'
1684 movel #8+1+8+1+1,%d2
1685 9: putc ' '
1686 dbra %d2,9b
1687 movel #7,%d2
1688 91: putn %d6
1689 jbra 6b
1691 31: putc '\n'
1692 movel #8+1,%d2
1693 32: putc ' '
1694 dbra %d2,32b
1695 jbra 3b
1697 11: putc '\n'
1698 jbra 1b
1699 #endif /* MMU 040 Dumping code that's gory and detailed */
1701 lea %pc@(kernel_pg_dir),%a5
1702 movel %a5,%a0 /* a0 has the address of the root table ptr */
1703 movel #0x00000000,%a4 /* logical address */
1704 moveql #0,%d0
1705 40:
1706 /* Increment the logical address and preserve in d5 */
1707 movel %a4,%d5
1708 addil #PAGESIZE<<13,%d5
1709 movel %a0@+,%d6
1710 btst #1,%d6
1711 jbne 41f
1712 jbsr mmu_print_tuple_invalidate
1713 jbra 48f
1714 41:
1715 movel #0,%d1
1716 andil #0xfffffe00,%d6
1717 movel %d6,%a1
1718 42:
1719 movel %a4,%d5
1720 addil #PAGESIZE<<6,%d5
1721 movel %a1@+,%d6
1722 btst #1,%d6
1723 jbne 43f
1724 jbsr mmu_print_tuple_invalidate
1725 jbra 47f
1726 43:
1727 movel #0,%d2
1728 andil #0xffffff00,%d6
1729 movel %d6,%a2
1730 44:
1731 movel %a4,%d5
1732 addil #PAGESIZE,%d5
1733 movel %a2@+,%d6
1734 btst #0,%d6
1735 jbne 45f
1736 jbsr mmu_print_tuple_invalidate
1737 jbra 46f
1738 45:
1739 moveml %d0-%d1,%sp@-
1740 movel %a4,%d0
1741 movel %d6,%d1
1742 andil #0xfffff4e0,%d1
1743 lea %pc@(mmu_040_print_flags),%a6
1744 jbsr mmu_print_tuple
1745 moveml %sp@+,%d0-%d1
1746 46:
1747 movel %d5,%a4
1748 addq #1,%d2
1749 cmpib #64,%d2
1750 jbne 44b
1751 47:
1752 movel %d5,%a4
1753 addq #1,%d1
1754 cmpib #128,%d1
1755 jbne 42b
1756 48:
1757 movel %d5,%a4 /* move to the next logical address */
1758 addq #1,%d0
1759 cmpib #128,%d0
1760 jbne 40b
1762 .chip 68040
1763 movec %dtt1,%d0
1764 movel %d0,%d1
1765 andiw #0x8000,%d1 /* is it valid ? */
1766 jbeq 1f /* No, bail out */
1768 movel %d0,%d1
1769 andil #0xff000000,%d1 /* Get the address */
1770 putn %d1
1771 puts "=="
1772 putn %d1
1774 movel %d0,%d6
1775 jbsr mmu_040_print_flags_tt
1776 1:
1777 movec %dtt0,%d0
1778 movel %d0,%d1
1779 andiw #0x8000,%d1 /* is it valid ? */
1780 jbeq 1f /* No, bail out */
1782 movel %d0,%d1
1783 andil #0xff000000,%d1 /* Get the address */
1784 putn %d1
1785 puts "=="
1786 putn %d1
1788 movel %d0,%d6
1789 jbsr mmu_040_print_flags_tt
1790 1:
1791 .chip 68k
1793 jbra mmu_print_done
1795 mmu_040_print_flags:
1796 btstl #10,%d6
1797 putZc(' ','G') /* global bit */
1798 btstl #7,%d6
1799 putZc(' ','S') /* supervisor bit */
1800 mmu_040_print_flags_tt:
1801 btstl #6,%d6
1802 jbne 3f
1803 putc 'C'
1804 btstl #5,%d6
1805 putZc('w','c') /* write through or copy-back */
1806 jbra 4f
1807 3:
1808 putc 'N'
1809 btstl #5,%d6
1810 putZc('s',' ') /* serialized non-cacheable, or non-cacheable */
1811 4:
1812 rts
1814 mmu_030_print_flags:
1815 btstl #6,%d6
1816 putZc('C','I') /* write through or copy-back */
1817 rts
1819 mmu_030_print:
1820 puts "\nMMU030\n"
1821 puts "\nrp:"
1822 putn %a5
1823 putc '\n'
1824 movel %a5,%d0
1825 andil #0xfffffff0,%d0
1826 movel %d0,%a0
1827 movel #0x00000000,%a4 /* logical address */
1828 movel #0,%d0
1829 30:
1830 movel %a4,%d5
1831 addil #PAGESIZE<<13,%d5
1832 movel %a0@+,%d6
1833 btst #1,%d6 /* is it a table ptr? */
1834 jbne 31f /* yes */
1835 btst #0,%d6 /* is it early terminating? */
1836 jbeq 1f /* no */
1837 jbsr mmu_030_print_helper
1838 jbra 38f
1839 1:
1840 jbsr mmu_print_tuple_invalidate
1841 jbra 38f
1842 31:
1843 movel #0,%d1
1844 andil #0xfffffff0,%d6
1845 movel %d6,%a1
1846 32:
1847 movel %a4,%d5
1848 addil #PAGESIZE<<6,%d5
1849 movel %a1@+,%d6
1850 btst #1,%d6 /* is it a table ptr? */
1851 jbne 33f /* yes */
1852 btst #0,%d6 /* is it a page descriptor? */
1853 jbeq 1f /* no */
1854 jbsr mmu_030_print_helper
1855 jbra 37f
1856 1:
1857 jbsr mmu_print_tuple_invalidate
1858 jbra 37f
1859 33:
1860 movel #0,%d2
1861 andil #0xfffffff0,%d6
1862 movel %d6,%a2
1863 34:
1864 movel %a4,%d5
1865 addil #PAGESIZE,%d5
1866 movel %a2@+,%d6
1867 btst #0,%d6
1868 jbne 35f
1869 jbsr mmu_print_tuple_invalidate
1870 jbra 36f
1871 35:
1872 jbsr mmu_030_print_helper
1873 36:
1874 movel %d5,%a4
1875 addq #1,%d2
1876 cmpib #64,%d2
1877 jbne 34b
1878 37:
1879 movel %d5,%a4
1880 addq #1,%d1
1881 cmpib #128,%d1
1882 jbne 32b
1883 38:
1884 movel %d5,%a4 /* move to the next logical address */
1885 addq #1,%d0
1886 cmpib #128,%d0
1887 jbne 30b
1889 mmu_print_done:
1890 puts "\n"
1892 func_return mmu_print
1895 mmu_030_print_helper:
1896 moveml %d0-%d1,%sp@-
1897 movel %a4,%d0
1898 movel %d6,%d1
1899 lea %pc@(mmu_030_print_flags),%a6
1900 jbsr mmu_print_tuple
1901 moveml %sp@+,%d0-%d1
1902 rts
1904 mmu_print_tuple_invalidate:
1905 moveml %a0/%d7,%sp@-
1907 lea %pc@(L(mmu_print_data)),%a0
1908 tstl %a0@(mmu_next_valid)
1909 jbmi mmu_print_tuple_invalidate_exit
1911 movel #MMU_PRINT_INVALID,%a0@(mmu_next_valid)
1913 putn %a4
1915 puts "##\n"
1917 mmu_print_tuple_invalidate_exit:
1918 moveml %sp@+,%a0/%d7
1919 rts
1922 mmu_print_tuple:
1923 moveml %d0-%d7/%a0,%sp@-
1925 lea %pc@(L(mmu_print_data)),%a0
1927 tstl %a0@(mmu_next_valid)
1928 jble mmu_print_tuple_print
1930 cmpl %a0@(mmu_next_physical),%d1
1931 jbeq mmu_print_tuple_increment
1933 mmu_print_tuple_print:
1934 putn %d0
1935 puts "->"
1936 putn %d1
1938 movel %d1,%d6
1939 jbsr %a6@
1941 mmu_print_tuple_record:
1942 movel #MMU_PRINT_VALID,%a0@(mmu_next_valid)
1944 movel %d1,%a0@(mmu_next_physical)
1946 mmu_print_tuple_increment:
1947 movel %d5,%d7
1948 subl %a4,%d7
1949 addl %d7,%a0@(mmu_next_physical)
1951 mmu_print_tuple_exit:
1952 moveml %sp@+,%d0-%d7/%a0
1953 rts
1955 mmu_print_machine_cpu_types:
1956 puts "machine: "
1958 is_not_amiga(1f)
1959 puts "amiga"
1960 jbra 9f
1961 1:
1962 is_not_atari(2f)
1963 puts "atari"
1964 jbra 9f
1965 2:
1966 is_not_mac(3f)
1967 puts "macintosh"
1968 jbra 9f
1969 3: puts "unknown"
1970 9: putc '\n'
1972 puts "cputype: 0"
1973 is_not_060(1f)
1974 putc '6'
1975 jbra 9f
1976 1:
1977 is_not_040_or_060(2f)
1978 putc '4'
1979 jbra 9f
1980 2: putc '3'
1981 9: putc '0'
1982 putc '\n'
1984 rts
1985 #endif /* MMU_PRINT */
1987 /*
1988 * mmu_map_tt
1989 *
1990 * This is a specific function which works on all 680x0 machines.
1991 * On 030, 040 & 060 it will attempt to use Transparent Translation
1992 * registers (tt1).
1993 * On 020 it will call the standard mmu_map which will use early
1994 * terminating descriptors.
1995 */
1996 func_start mmu_map_tt,%d0/%d1/%a0,4
1998 dputs "mmu_map_tt:"
1999 dputn ARG1
2000 dputn ARG2
2001 dputn ARG3
2002 dputn ARG4
2003 dputc '\n'
2005 is_020(L(do_map))
2007 /* Extract the highest bit set
2008 */
2009 bfffo ARG3{#0,#32},%d1
2010 cmpw #8,%d1
2011 jcc L(do_map)
2013 /* And get the mask
2014 */
2015 moveq #-1,%d0
2016 lsrl %d1,%d0
2017 lsrl #1,%d0
2019 /* Mask the address
2020 */
2021 movel %d0,%d1
2022 notl %d1
2023 andl ARG2,%d1
2025 /* Generate the upper 16bit of the tt register
2026 */
2027 lsrl #8,%d0
2028 orl %d0,%d1
2029 clrw %d1
2031 is_040_or_060(L(mmu_map_tt_040))
2033 /* set 030 specific bits (read/write access for supervisor mode
2034 * (highest function code set, lower two bits masked))
2035 */
2036 orw #TTR_ENABLE+TTR_RWM+TTR_FCB2+TTR_FCM1+TTR_FCM0,%d1
2037 movel ARG4,%d0
2038 btst #6,%d0
2039 jeq 1f
2040 orw #TTR_CI,%d1
2042 1: lea STACK,%a0
2043 dputn %d1
2044 movel %d1,%a0@
2045 .chip 68030
2046 tstl ARG1
2047 jne 1f
2048 pmove %a0@,%tt0
2049 jra 2f
2050 1: pmove %a0@,%tt1
2051 2: .chip 68k
2052 jra L(mmu_map_tt_done)
2054 /* set 040 specific bits
2055 */
2056 L(mmu_map_tt_040):
2057 orw #TTR_ENABLE+TTR_KERNELMODE,%d1
2058 orl ARG4,%d1
2059 dputn %d1
2061 .chip 68040
2062 tstl ARG1
2063 jne 1f
2064 movec %d1,%itt0
2065 movec %d1,%dtt0
2066 jra 2f
2067 1: movec %d1,%itt1
2068 movec %d1,%dtt1
2069 2: .chip 68k
2071 jra L(mmu_map_tt_done)
2073 L(do_map):
2074 mmu_map_eq ARG2,ARG3,ARG4
2076 L(mmu_map_tt_done):
2078 func_return mmu_map_tt
2080 /*
2081 * mmu_map
2082 *
2083 * This routine will map a range of memory using a pointer
2084 * table and allocating the pages on the fly from the kernel.
2085 * The pointer table does not have to be already linked into
2086 * the root table, this routine will do that if necessary.
2087 *
2088 * NOTE
2089 * This routine will assert failure and use the serial_putc
2090 * routines in the case of a run-time error. For example,
2091 * if the address is already mapped.
2092 *
2093 * NOTE-2
2094 * This routine will use early terminating descriptors
2095 * where possible for the 68020+68851 and 68030 type
2096 * processors.
2097 */
2098 func_start mmu_map,%d0-%d4/%a0-%a4
2100 dputs "\nmmu_map:"
2101 dputn ARG1
2102 dputn ARG2
2103 dputn ARG3
2104 dputn ARG4
2105 dputc '\n'
2107 /* Get logical address and round it down to 256KB
2108 */
2109 movel ARG1,%d0
2110 andl #-(PAGESIZE*PAGE_TABLE_SIZE),%d0
2111 movel %d0,%a3
2113 /* Get the end address
2114 */
2115 movel ARG1,%a4
2116 addl ARG3,%a4
2117 subql #1,%a4
2119 /* Get physical address and round it down to 256KB
2120 */
2121 movel ARG2,%d0
2122 andl #-(PAGESIZE*PAGE_TABLE_SIZE),%d0
2123 movel %d0,%a2
2125 /* Add page attributes to the physical address
2126 */
2127 movel ARG4,%d0
2128 orw #_PAGE_PRESENT+_PAGE_ACCESSED+_PAGE_DIRTY,%d0
2129 addw %d0,%a2
2131 dputn %a2
2132 dputn %a3
2133 dputn %a4
2135 is_not_040_or_060(L(mmu_map_030))
2137 addw #_PAGE_GLOBAL040,%a2
2138 /*
2139 * MMU 040 & 060 Support
2140 *
2141 * The MMU usage for the 040 and 060 is different enough from
2142 * the 030 and 68851 that there is separate code. This comment
2143 * block describes the data structures and algorithms built by
2144 * this code.
2145 *
2146 * The 040 does not support early terminating descriptors, as
2147 * the 030 does. Therefore, a third level of table is needed
2148 * for the 040, and that would be the page table. In Linux,
2149 * page tables are allocated directly from the memory above the
2150 * kernel.
2151 *
2152 */
2154 L(mmu_map_040):
2155 /* Calculate the offset into the root table
2156 */
2157 movel %a3,%d0
2158 moveq #ROOT_INDEX_SHIFT,%d1
2159 lsrl %d1,%d0
2160 mmu_get_root_table_entry %d0
2162 /* Calculate the offset into the pointer table
2163 */
2164 movel %a3,%d0
2165 moveq #PTR_INDEX_SHIFT,%d1
2166 lsrl %d1,%d0
2167 andl #PTR_TABLE_SIZE-1,%d0
2168 mmu_get_ptr_table_entry %a0,%d0
2170 /* Calculate the offset into the page table
2171 */
2172 movel %a3,%d0
2173 moveq #PAGE_INDEX_SHIFT,%d1
2174 lsrl %d1,%d0
2175 andl #PAGE_TABLE_SIZE-1,%d0
2176 mmu_get_page_table_entry %a0,%d0
2178 /* The page table entry must not no be busy
2179 */
2180 tstl %a0@
2181 jne L(mmu_map_error)
2183 /* Do the mapping and advance the pointers
2184 */
2185 movel %a2,%a0@
2186 2:
2187 addw #PAGESIZE,%a2
2188 addw #PAGESIZE,%a3
2190 /* Ready with mapping?
2191 */
2192 lea %a3@(-1),%a0
2193 cmpl %a0,%a4
2194 jhi L(mmu_map_040)
2195 jra L(mmu_map_done)
2197 L(mmu_map_030):
2198 /* Calculate the offset into the root table
2199 */
2200 movel %a3,%d0
2201 moveq #ROOT_INDEX_SHIFT,%d1
2202 lsrl %d1,%d0
2203 mmu_get_root_table_entry %d0
2205 /* Check if logical address 32MB aligned,
2206 * so we can try to map it once
2207 */
2208 movel %a3,%d0
2209 andl #(PTR_TABLE_SIZE*PAGE_TABLE_SIZE*PAGESIZE-1)&(-ROOT_TABLE_SIZE),%d0
2210 jne 1f
2212 /* Is there enough to map for 32MB at once
2213 */
2214 lea %a3@(PTR_TABLE_SIZE*PAGE_TABLE_SIZE*PAGESIZE-1),%a1
2215 cmpl %a1,%a4
2216 jcs 1f
2218 addql #1,%a1
2220 /* The root table entry must not no be busy
2221 */
2222 tstl %a0@
2223 jne L(mmu_map_error)
2225 /* Do the mapping and advance the pointers
2226 */
2227 dputs "early term1"
2228 dputn %a2
2229 dputn %a3
2230 dputn %a1
2231 dputc '\n'
2232 movel %a2,%a0@
2234 movel %a1,%a3
2235 lea %a2@(PTR_TABLE_SIZE*PAGE_TABLE_SIZE*PAGESIZE),%a2
2236 jra L(mmu_mapnext_030)
2237 1:
2238 /* Calculate the offset into the pointer table
2239 */
2240 movel %a3,%d0
2241 moveq #PTR_INDEX_SHIFT,%d1
2242 lsrl %d1,%d0
2243 andl #PTR_TABLE_SIZE-1,%d0
2244 mmu_get_ptr_table_entry %a0,%d0
2246 /* The pointer table entry must not no be busy
2247 */
2248 tstl %a0@
2249 jne L(mmu_map_error)
2251 /* Do the mapping and advance the pointers
2252 */
2253 dputs "early term2"
2254 dputn %a2
2255 dputn %a3
2256 dputc '\n'
2257 movel %a2,%a0@
2259 addl #PAGE_TABLE_SIZE*PAGESIZE,%a2
2260 addl #PAGE_TABLE_SIZE*PAGESIZE,%a3
2262 L(mmu_mapnext_030):
2263 /* Ready with mapping?
2264 */
2265 lea %a3@(-1),%a0
2266 cmpl %a0,%a4
2267 jhi L(mmu_map_030)
2268 jra L(mmu_map_done)
2270 L(mmu_map_error):
2272 dputs "mmu_map error:"
2273 dputn %a2
2274 dputn %a3
2275 dputc '\n'
2277 L(mmu_map_done):
2279 func_return mmu_map
2281 /*
2282 * mmu_fixup
2283 *
2284 * On the 040 class machines, all pages that are used for the
2285 * mmu have to be fixed up.
2286 */
2288 func_start mmu_fixup_page_mmu_cache,%d0/%a0
2290 dputs "mmu_fixup_page_mmu_cache"
2291 dputn ARG1
2293 /* Calculate the offset into the root table
2294 */
2295 movel ARG1,%d0
2296 moveq #ROOT_INDEX_SHIFT,%d1
2297 lsrl %d1,%d0
2298 mmu_get_root_table_entry %d0
2300 /* Calculate the offset into the pointer table
2301 */
2302 movel ARG1,%d0
2303 moveq #PTR_INDEX_SHIFT,%d1
2304 lsrl %d1,%d0
2305 andl #PTR_TABLE_SIZE-1,%d0
2306 mmu_get_ptr_table_entry %a0,%d0
2308 /* Calculate the offset into the page table
2309 */
2310 movel ARG1,%d0
2311 moveq #PAGE_INDEX_SHIFT,%d1
2312 lsrl %d1,%d0
2313 andl #PAGE_TABLE_SIZE-1,%d0
2314 mmu_get_page_table_entry %a0,%d0
2316 movel %a0@,%d0
2317 andil #_CACHEMASK040,%d0
2318 orl %pc@(m68k_pgtable_cachemode),%d0
2319 movel %d0,%a0@
2321 dputc '\n'
2323 func_return mmu_fixup_page_mmu_cache
2325 /*
2326 * mmu_temp_map
2327 *
2328 * create a temporary mapping to enable the mmu,
2329 * this we don't need any transparation translation tricks.
2330 */
2332 func_start mmu_temp_map,%d0/%d1/%a0/%a1
2334 dputs "mmu_temp_map"
2335 dputn ARG1
2336 dputn ARG2
2337 dputc '\n'
2339 lea %pc@(L(temp_mmap_mem)),%a1
2341 /* Calculate the offset in the root table
2342 */
2343 movel ARG2,%d0
2344 moveq #ROOT_INDEX_SHIFT,%d1
2345 lsrl %d1,%d0
2346 mmu_get_root_table_entry %d0
2348 /* Check if the table is temporary allocated, so we have to reuse it
2349 */
2350 movel %a0@,%d0
2351 cmpl %pc@(L(memory_start)),%d0
2352 jcc 1f
2354 /* Temporary allocate a ptr table and insert it into the root table
2355 */
2356 movel %a1@,%d0
2357 addl #PTR_TABLE_SIZE*4,%a1@
2358 orw #_PAGE_TABLE+_PAGE_ACCESSED,%d0
2359 movel %d0,%a0@
2360 dputs " (new)"
2361 1:
2362 dputn %d0
2363 /* Mask the root table entry for the ptr table
2364 */
2365 andw #-ROOT_TABLE_SIZE,%d0
2366 movel %d0,%a0
2368 /* Calculate the offset into the pointer table
2369 */
2370 movel ARG2,%d0
2371 moveq #PTR_INDEX_SHIFT,%d1
2372 lsrl %d1,%d0
2373 andl #PTR_TABLE_SIZE-1,%d0
2374 lea %a0@(%d0*4),%a0
2375 dputn %a0
2377 /* Check if a temporary page table is already allocated
2378 */
2379 movel %a0@,%d0
2380 jne 1f
2382 /* Temporary allocate a page table and insert it into the ptr table
2383 */
2384 movel %a1@,%d0
2385 /* The 512 should be PAGE_TABLE_SIZE*4, but that violates the
2386 alignment restriction for pointer tables on the '0[46]0. */
2387 addl #512,%a1@
2388 orw #_PAGE_TABLE+_PAGE_ACCESSED,%d0
2389 movel %d0,%a0@
2390 dputs " (new)"
2391 1:
2392 dputn %d0
2393 /* Mask the ptr table entry for the page table
2394 */
2395 andw #-PTR_TABLE_SIZE,%d0
2396 movel %d0,%a0
2398 /* Calculate the offset into the page table
2399 */
2400 movel ARG2,%d0
2401 moveq #PAGE_INDEX_SHIFT,%d1
2402 lsrl %d1,%d0
2403 andl #PAGE_TABLE_SIZE-1,%d0
2404 lea %a0@(%d0*4),%a0
2405 dputn %a0
2407 /* Insert the address into the page table
2408 */
2409 movel ARG1,%d0
2410 andw #-PAGESIZE,%d0
2411 orw #_PAGE_PRESENT+_PAGE_ACCESSED+_PAGE_DIRTY,%d0
2412 movel %d0,%a0@
2413 dputn %d0
2415 dputc '\n'
2417 func_return mmu_temp_map
2419 func_start mmu_engage,%d0-%d2/%a0-%a3
2421 moveq #ROOT_TABLE_SIZE-1,%d0
2422 /* Temporarily use a different root table. */
2423 lea %pc@(L(kernel_pgdir_ptr)),%a0
2424 movel %a0@,%a2
2425 movel %pc@(L(memory_start)),%a1
2426 movel %a1,%a0@
2427 movel %a2,%a0
2428 1:
2429 movel %a0@+,%a1@+
2430 dbra %d0,1b
2432 lea %pc@(L(temp_mmap_mem)),%a0
2433 movel %a1,%a0@
2435 movew #PAGESIZE-1,%d0
2436 1:
2437 clrl %a1@+
2438 dbra %d0,1b
2440 lea %pc@(1b),%a0
2441 movel #1b,%a1
2442 /* Skip temp mappings if phys == virt */
2443 cmpl %a0,%a1
2444 jeq 1f
2446 mmu_temp_map %a0,%a0
2447 mmu_temp_map %a0,%a1
2449 addw #PAGESIZE,%a0
2450 addw #PAGESIZE,%a1
2451 mmu_temp_map %a0,%a0
2452 mmu_temp_map %a0,%a1
2453 1:
2454 movel %pc@(L(memory_start)),%a3
2455 movel %pc@(L(phys_kernel_start)),%d2
2457 is_not_040_or_060(L(mmu_engage_030))
2459 L(mmu_engage_040):
2460 .chip 68040
2461 nop
2462 cinva %bc
2463 nop
2464 pflusha
2465 nop
2466 movec %a3,%srp
2467 movel #TC_ENABLE+TC_PAGE4K,%d0
2468 movec %d0,%tc /* enable the MMU */
2469 jmp 1f:l
2470 1: nop
2471 movec %a2,%srp
2472 nop
2473 cinva %bc
2474 nop
2475 pflusha
2476 .chip 68k
2477 jra L(mmu_engage_cleanup)
2479 L(mmu_engage_030_temp):
2480 .space 12
2481 L(mmu_engage_030):
2482 .chip 68030
2483 lea %pc@(L(mmu_engage_030_temp)),%a0
2484 movel #0x80000002,%a0@
2485 movel %a3,%a0@(4)
2486 movel #0x0808,%d0
2487 movec %d0,%cacr
2488 pmove %a0@,%srp
2489 pflusha
2490 /*
2491 * enable,super root enable,4096 byte pages,7 bit root index,
2492 * 7 bit pointer index, 6 bit page table index.
2493 */
2494 movel #0x82c07760,%a0@(8)
2495 pmove %a0@(8),%tc /* enable the MMU */
2496 jmp 1f:l
2497 1: movel %a2,%a0@(4)
2498 movel #0x0808,%d0
2499 movec %d0,%cacr
2500 pmove %a0@,%srp
2501 pflusha
2502 .chip 68k
2504 L(mmu_engage_cleanup):
2505 subl #PAGE_OFFSET,%d2
2506 subl %d2,%a2
2507 movel %a2,L(kernel_pgdir_ptr)
2508 subl %d2,%fp
2509 subl %d2,%sp
2510 subl %d2,ARG0
2512 func_return mmu_engage
2514 func_start mmu_get_root_table_entry,%d0/%a1
2516 #if 0
2517 dputs "mmu_get_root_table_entry:"
2518 dputn ARG1
2519 dputs " ="
2520 #endif
2522 movel %pc@(L(kernel_pgdir_ptr)),%a0
2523 tstl %a0
2524 jne 2f
2526 dputs "\nmmu_init:"
2528 /* Find the start of free memory, get_bi_record does this for us,
2529 * as the bootinfo structure is located directly behind the kernel
2530 * and and we simply search for the last entry.
2531 */
2532 get_bi_record BI_LAST
2533 addw #PAGESIZE-1,%a0
2534 movel %a0,%d0
2535 andw #-PAGESIZE,%d0
2537 dputn %d0
2539 lea %pc@(L(memory_start)),%a0
2540 movel %d0,%a0@
2541 lea %pc@(L(kernel_end)),%a0
2542 movel %d0,%a0@
2544 /* we have to return the first page at _stext since the init code
2545 * in mm/init.c simply expects kernel_pg_dir there, the rest of
2546 * page is used for further ptr tables in get_ptr_table.
2547 */
2548 lea %pc@(_stext),%a0
2549 lea %pc@(L(mmu_cached_pointer_tables)),%a1
2550 movel %a0,%a1@
2551 addl #ROOT_TABLE_SIZE*4,%a1@
2553 lea %pc@(L(mmu_num_pointer_tables)),%a1
2554 addql #1,%a1@
2556 /* clear the page
2557 */
2558 movel %a0,%a1
2559 movew #PAGESIZE/4-1,%d0
2560 1:
2561 clrl %a1@+
2562 dbra %d0,1b
2564 lea %pc@(L(kernel_pgdir_ptr)),%a1
2565 movel %a0,%a1@
2567 dputn %a0
2568 dputc '\n'
2569 2:
2570 movel ARG1,%d0
2571 lea %a0@(%d0*4),%a0
2573 #if 0
2574 dputn %a0
2575 dputc '\n'
2576 #endif
2578 func_return mmu_get_root_table_entry
2582 func_start mmu_get_ptr_table_entry,%d0/%a1
2584 #if 0
2585 dputs "mmu_get_ptr_table_entry:"
2586 dputn ARG1
2587 dputn ARG2
2588 dputs " ="
2589 #endif
2591 movel ARG1,%a0
2592 movel %a0@,%d0
2593 jne 2f
2595 /* Keep track of the number of pointer tables we use
2596 */
2597 dputs "\nmmu_get_new_ptr_table:"
2598 lea %pc@(L(mmu_num_pointer_tables)),%a0
2599 movel %a0@,%d0
2600 addql #1,%a0@
2602 /* See if there is a free pointer table in our cache of pointer tables
2603 */
2604 lea %pc@(L(mmu_cached_pointer_tables)),%a1
2605 andw #7,%d0
2606 jne 1f
2608 /* Get a new pointer table page from above the kernel memory
2609 */
2610 get_new_page
2611 movel %a0,%a1@
2612 1:
2613 /* There is an unused pointer table in our cache... use it
2614 */
2615 movel %a1@,%d0
2616 addl #PTR_TABLE_SIZE*4,%a1@
2618 dputn %d0
2619 dputc '\n'
2621 /* Insert the new pointer table into the root table
2622 */
2623 movel ARG1,%a0
2624 orw #_PAGE_TABLE+_PAGE_ACCESSED,%d0
2625 movel %d0,%a0@
2626 2:
2627 /* Extract the pointer table entry
2628 */
2629 andw #-PTR_TABLE_SIZE,%d0
2630 movel %d0,%a0
2631 movel ARG2,%d0
2632 lea %a0@(%d0*4),%a0
2634 #if 0
2635 dputn %a0
2636 dputc '\n'
2637 #endif
2639 func_return mmu_get_ptr_table_entry
2642 func_start mmu_get_page_table_entry,%d0/%a1
2644 #if 0
2645 dputs "mmu_get_page_table_entry:"
2646 dputn ARG1
2647 dputn ARG2
2648 dputs " ="
2649 #endif
2651 movel ARG1,%a0
2652 movel %a0@,%d0
2653 jne 2f
2655 /* If the page table entry doesn't exist, we allocate a complete new
2656 * page and use it as one continues big page table which can cover
2657 * 4MB of memory, nearly almost all mappings have that alignment.
2658 */
2659 get_new_page
2660 addw #_PAGE_TABLE+_PAGE_ACCESSED,%a0
2662 /* align pointer table entry for a page of page tables
2663 */
2664 movel ARG1,%d0
2665 andw #-(PAGESIZE/PAGE_TABLE_SIZE),%d0
2666 movel %d0,%a1
2668 /* Insert the page tables into the pointer entries
2669 */
2670 moveq #PAGESIZE/PAGE_TABLE_SIZE/4-1,%d0
2671 1:
2672 movel %a0,%a1@+
2673 lea %a0@(PAGE_TABLE_SIZE*4),%a0
2674 dbra %d0,1b
2676 /* Now we can get the initialized pointer table entry
2677 */
2678 movel ARG1,%a0
2679 movel %a0@,%d0
2680 2:
2681 /* Extract the page table entry
2682 */
2683 andw #-PAGE_TABLE_SIZE,%d0
2684 movel %d0,%a0
2685 movel ARG2,%d0
2686 lea %a0@(%d0*4),%a0
2688 #if 0
2689 dputn %a0
2690 dputc '\n'
2691 #endif
2693 func_return mmu_get_page_table_entry
2695 /*
2696 * get_new_page
2697 *
2698 * Return a new page from the memory start and clear it.
2699 */
2700 func_start get_new_page,%d0/%a1
2702 dputs "\nget_new_page:"
2704 /* allocate the page and adjust memory_start
2705 */
2706 lea %pc@(L(memory_start)),%a0
2707 movel %a0@,%a1
2708 addl #PAGESIZE,%a0@
2710 /* clear the new page
2711 */
2712 movel %a1,%a0
2713 movew #PAGESIZE/4-1,%d0
2714 1:
2715 clrl %a1@+
2716 dbra %d0,1b
2718 dputn %a0
2719 dputc '\n'
2721 func_return get_new_page
2725 /*
2726 * Debug output support
2727 * Atarians have a choice between the parallel port, the serial port
2728 * from the MFP or a serial port of the SCC
2729 */
2731 #ifdef CONFIG_MAC
2732 /* You may define either or both of these. */
2733 #define MAC_USE_SCC_A /* Modem port */
2734 #define MAC_USE_SCC_B /* Printer port */
2736 #if defined(MAC_USE_SCC_A) || defined(MAC_USE_SCC_B)
2737 /* Initialisation table for SCC with 3.6864 MHz PCLK */
2738 L(scc_initable_mac):
2739 .byte 4,0x44 /* x16, 1 stopbit, no parity */
2740 .byte 3,0xc0 /* receiver: 8 bpc */
2741 .byte 5,0xe2 /* transmitter: 8 bpc, assert dtr/rts */
2742 .byte 10,0 /* NRZ */
2743 .byte 11,0x50 /* use baud rate generator */
2744 .byte 12,1,13,0 /* 38400 baud */
2745 .byte 14,1 /* Baud rate generator enable */
2746 .byte 3,0xc1 /* enable receiver */
2747 .byte 5,0xea /* enable transmitter */
2748 .byte -1
2749 .even
2750 #endif
2751 #endif /* CONFIG_MAC */
2753 #ifdef CONFIG_ATARI
2754 /* #define USE_PRINTER */
2755 /* #define USE_SCC_B */
2756 /* #define USE_SCC_A */
2757 #define USE_MFP
2759 #if defined(USE_SCC_A) || defined(USE_SCC_B)
2760 /* Initialisation table for SCC with 7.9872 MHz PCLK */
2761 /* PCLK == 8.0539 gives baud == 9680.1 */
2762 L(scc_initable_atari):
2763 .byte 4,0x44 /* x16, 1 stopbit, no parity */
2764 .byte 3,0xc0 /* receiver: 8 bpc */
2765 .byte 5,0xe2 /* transmitter: 8 bpc, assert dtr/rts */
2766 .byte 10,0 /* NRZ */
2767 .byte 11,0x50 /* use baud rate generator */
2768 .byte 12,24,13,0 /* 9600 baud */
2769 .byte 14,2,14,3 /* use master clock for BRG, enable */
2770 .byte 3,0xc1 /* enable receiver */
2771 .byte 5,0xea /* enable transmitter */
2772 .byte -1
2773 .even
2774 #endif
2776 #ifdef USE_PRINTER
2778 LPSG_SELECT = 0xff8800
2779 LPSG_READ = 0xff8800
2780 LPSG_WRITE = 0xff8802
2781 LPSG_IO_A = 14
2782 LPSG_IO_B = 15
2783 LPSG_CONTROL = 7
2784 LSTMFP_GPIP = 0xfffa01
2785 LSTMFP_DDR = 0xfffa05
2786 LSTMFP_IERB = 0xfffa09
2788 #elif defined(USE_SCC_B)
2790 LSCC_CTRL = 0xff8c85
2791 LSCC_DATA = 0xff8c87
2793 #elif defined(USE_SCC_A)
2795 LSCC_CTRL = 0xff8c81
2796 LSCC_DATA = 0xff8c83
2798 #elif defined(USE_MFP)
2800 LMFP_UCR = 0xfffa29
2801 LMFP_TDCDR = 0xfffa1d
2802 LMFP_TDDR = 0xfffa25
2803 LMFP_TSR = 0xfffa2d
2804 LMFP_UDR = 0xfffa2f
2806 #endif
2807 #endif /* CONFIG_ATARI */
2809 /*
2810 * Serial port output support.
2811 */
2813 /*
2814 * Initialize serial port hardware
2815 */
2816 func_start serial_init,%d0/%d1/%a0/%a1
2817 /*
2818 * Some of the register usage that follows
2819 * CONFIG_AMIGA
2820 * a0 = pointer to boot info record
2821 * d0 = boot info offset
2822 * CONFIG_ATARI
2823 * a0 = address of SCC
2824 * a1 = Liobase address/address of scc_initable_atari
2825 * d0 = init data for serial port
2826 * CONFIG_MAC
2827 * a0 = address of SCC
2828 * a1 = address of scc_initable_mac
2829 * d0 = init data for serial port
2830 */
2832 #ifdef CONFIG_AMIGA
2833 #define SERIAL_DTR 7
2834 #define SERIAL_CNTRL CIABBASE+C_PRA
2836 is_not_amiga(1f)
2837 lea %pc@(L(custom)),%a0
2838 movel #-ZTWOBASE,%a0@
2839 bclr #SERIAL_DTR,SERIAL_CNTRL-ZTWOBASE
2840 get_bi_record BI_AMIGA_SERPER
2841 movew %a0@,CUSTOMBASE+C_SERPER-ZTWOBASE
2842 | movew #61,CUSTOMBASE+C_SERPER-ZTWOBASE
2843 1:
2844 #endif
2846 #ifdef CONFIG_ATARI
2847 is_not_atari(4f)
2848 movel %pc@(L(iobase)),%a1
2849 #if defined(USE_PRINTER)
2850 bclr #0,%a1@(LSTMFP_IERB)
2851 bclr #0,%a1@(LSTMFP_DDR)
2852 moveb #LPSG_CONTROL,%a1@(LPSG_SELECT)
2853 moveb #0xff,%a1@(LPSG_WRITE)
2854 moveb #LPSG_IO_B,%a1@(LPSG_SELECT)
2855 clrb %a1@(LPSG_WRITE)
2856 moveb #LPSG_IO_A,%a1@(LPSG_SELECT)
2857 moveb %a1@(LPSG_READ),%d0
2858 bset #5,%d0
2859 moveb %d0,%a1@(LPSG_WRITE)
2860 #elif defined(USE_SCC_A) || defined(USE_SCC_B)
2861 lea %a1@(LSCC_CTRL),%a0
2862 /* Reset SCC register pointer */
2863 moveb %a0@,%d0
2864 /* Reset SCC device: write register pointer then register value */
2865 moveb #9,%a0@
2866 moveb #0xc0,%a0@
2867 /* Wait for 5 PCLK cycles, which is about 63 CPU cycles */
2868 /* 5 / 7.9872 MHz = approx. 0.63 us = 63 / 100 MHz */
2869 movel #32,%d0
2870 2:
2871 subq #1,%d0
2872 jne 2b
2873 /* Initialize channel */
2874 lea %pc@(L(scc_initable_atari)),%a1
2875 2: moveb %a1@+,%d0
2876 jmi 3f
2877 moveb %d0,%a0@
2878 moveb %a1@+,%a0@
2879 jra 2b
2880 3: clrb %a0@
2881 #elif defined(USE_MFP)
2882 bclr #1,%a1@(LMFP_TSR)
2883 moveb #0x88,%a1@(LMFP_UCR)
2884 andb #0x70,%a1@(LMFP_TDCDR)
2885 moveb #2,%a1@(LMFP_TDDR)
2886 orb #1,%a1@(LMFP_TDCDR)
2887 bset #1,%a1@(LMFP_TSR)
2888 #endif
2889 jra L(serial_init_done)
2890 4:
2891 #endif
2893 #ifdef CONFIG_MAC
2894 is_not_mac(L(serial_init_not_mac))
2895 #if defined(MAC_USE_SCC_A) || defined(MAC_USE_SCC_B)
2896 #define mac_scc_cha_b_ctrl_offset 0x0
2897 #define mac_scc_cha_a_ctrl_offset 0x2
2898 #define mac_scc_cha_b_data_offset 0x4
2899 #define mac_scc_cha_a_data_offset 0x6
2900 movel %pc@(L(mac_sccbase)),%a0
2901 /* Reset SCC register pointer */
2902 moveb %a0@(mac_scc_cha_a_ctrl_offset),%d0
2903 /* Reset SCC device: write register pointer then register value */
2904 moveb #9,%a0@(mac_scc_cha_a_ctrl_offset)
2905 moveb #0xc0,%a0@(mac_scc_cha_a_ctrl_offset)
2906 /* Wait for 5 PCLK cycles, which is about 68 CPU cycles */
2907 /* 5 / 3.6864 MHz = approx. 1.36 us = 68 / 50 MHz */
2908 movel #35,%d0
2909 5:
2910 subq #1,%d0
2911 jne 5b
2912 #endif
2913 #ifdef MAC_USE_SCC_A
2914 /* Initialize channel A */
2915 lea %pc@(L(scc_initable_mac)),%a1
2916 5: moveb %a1@+,%d0
2917 jmi 6f
2918 moveb %d0,%a0@(mac_scc_cha_a_ctrl_offset)
2919 moveb %a1@+,%a0@(mac_scc_cha_a_ctrl_offset)
2920 jra 5b
2921 6:
2922 #endif /* MAC_USE_SCC_A */
2923 #ifdef MAC_USE_SCC_B
2924 /* Initialize channel B */
2925 lea %pc@(L(scc_initable_mac)),%a1
2926 7: moveb %a1@+,%d0
2927 jmi 8f
2928 moveb %d0,%a0@(mac_scc_cha_b_ctrl_offset)
2929 moveb %a1@+,%a0@(mac_scc_cha_b_ctrl_offset)
2930 jra 7b
2931 8:
2932 #endif /* MAC_USE_SCC_B */
2933 jra L(serial_init_done)
2934 L(serial_init_not_mac):
2935 #endif /* CONFIG_MAC */
2937 #ifdef CONFIG_Q40
2938 is_not_q40(2f)
2939 /* debug output goes into SRAM, so we don't do it unless requested
2940 - check for '%LX$' signature in SRAM */
2941 lea %pc@(q40_mem_cptr),%a1
2942 move.l #0xff020010,%a1@ /* must be inited - also used by debug=mem */
2943 move.l #0xff020000,%a1
2944 cmp.b #'%',%a1@
2945 bne 2f /*nodbg*/
2946 addq.w #4,%a1
2947 cmp.b #'L',%a1@
2948 bne 2f /*nodbg*/
2949 addq.w #4,%a1
2950 cmp.b #'X',%a1@
2951 bne 2f /*nodbg*/
2952 addq.w #4,%a1
2953 cmp.b #'$',%a1@
2954 bne 2f /*nodbg*/
2955 /* signature OK */
2956 lea %pc@(L(q40_do_debug)),%a1
2957 tas %a1@
2958 /*nodbg: q40_do_debug is 0 by default*/
2959 2:
2960 #endif
2962 #ifdef CONFIG_MVME16x
2963 is_not_mvme16x(L(serial_init_not_mvme16x))
2964 moveb #0x10,M167_PCSCCMICR
2965 moveb #0x10,M167_PCSCCTICR
2966 moveb #0x10,M167_PCSCCRICR
2967 jra L(serial_init_done)
2968 L(serial_init_not_mvme16x):
2969 #endif
2971 #ifdef CONFIG_APOLLO
2972 /* We count on the PROM initializing SIO1 */
2973 #endif
2975 #ifdef CONFIG_HP300
2976 /* We count on the boot loader initialising the UART */
2977 #endif
2979 L(serial_init_done):
2980 func_return serial_init
2982 /*
2983 * Output character on serial port.
2984 */
2985 func_start serial_putc,%d0/%d1/%a0/%a1
2987 movel ARG1,%d0
2988 cmpib #'\n',%d0
2989 jbne 1f
2991 /* A little safe recursion is good for the soul */
2992 serial_putc #'\r'
2993 1:
2995 #ifdef CONFIG_AMIGA
2996 is_not_amiga(2f)
2997 andw #0x00ff,%d0
2998 oriw #0x0100,%d0
2999 movel %pc@(L(custom)),%a0
3000 movew %d0,%a0@(CUSTOMBASE+C_SERDAT)
3001 1: movew %a0@(CUSTOMBASE+C_SERDATR),%d0
3002 andw #0x2000,%d0
3003 jeq 1b
3004 jra L(serial_putc_done)
3005 2:
3006 #endif
3008 #ifdef CONFIG_MAC
3009 is_not_mac(5f)
3010 #if defined(MAC_USE_SCC_A) || defined(MAC_USE_SCC_B)
3011 movel %pc@(L(mac_sccbase)),%a1
3012 #endif
3013 #ifdef MAC_USE_SCC_A
3014 3: btst #2,%a1@(mac_scc_cha_a_ctrl_offset)
3015 jeq 3b
3016 moveb %d0,%a1@(mac_scc_cha_a_data_offset)
3017 #endif /* MAC_USE_SCC_A */
3018 #ifdef MAC_USE_SCC_B
3019 4: btst #2,%a1@(mac_scc_cha_b_ctrl_offset)
3020 jeq 4b
3021 moveb %d0,%a1@(mac_scc_cha_b_data_offset)
3022 #endif /* MAC_USE_SCC_B */
3023 jra L(serial_putc_done)
3024 5:
3025 #endif /* CONFIG_MAC */
3027 #ifdef CONFIG_ATARI
3028 is_not_atari(4f)
3029 movel %pc@(L(iobase)),%a1
3030 #if defined(USE_PRINTER)
3031 3: btst #0,%a1@(LSTMFP_GPIP)
3032 jne 3b
3033 moveb #LPSG_IO_B,%a1@(LPSG_SELECT)
3034 moveb %d0,%a1@(LPSG_WRITE)
3035 moveb #LPSG_IO_A,%a1@(LPSG_SELECT)
3036 moveb %a1@(LPSG_READ),%d0
3037 bclr #5,%d0
3038 moveb %d0,%a1@(LPSG_WRITE)
3039 nop
3040 nop
3041 bset #5,%d0
3042 moveb %d0,%a1@(LPSG_WRITE)
3043 #elif defined(USE_SCC_A) || defined(USE_SCC_B)
3044 3: btst #2,%a1@(LSCC_CTRL)
3045 jeq 3b
3046 moveb %d0,%a1@(LSCC_DATA)
3047 #elif defined(USE_MFP)
3048 3: btst #7,%a1@(LMFP_TSR)
3049 jeq 3b
3050 moveb %d0,%a1@(LMFP_UDR)
3051 #endif
3052 jra L(serial_putc_done)
3053 4:
3054 #endif /* CONFIG_ATARI */
3056 #ifdef CONFIG_MVME147
3057 is_not_mvme147(2f)
3058 1: btst #2,M147_SCC_CTRL_A
3059 jeq 1b
3060 moveb %d0,M147_SCC_DATA_A
3061 jbra L(serial_putc_done)
3062 2:
3063 #endif
3065 #ifdef CONFIG_MVME16x
3066 is_not_mvme16x(2f)
3067 /*
3068 * If the loader gave us a board type then we can use that to
3069 * select an appropriate output routine; otherwise we just use
3070 * the Bug code. If we have to use the Bug that means the Bug
3071 * workspace has to be valid, which means the Bug has to use
3072 * the SRAM, which is non-standard.
3073 */
3074 moveml %d0-%d7/%a2-%a6,%sp@-
3075 movel vme_brdtype,%d1
3076 jeq 1f | No tag - use the Bug
3077 cmpi #VME_TYPE_MVME162,%d1
3078 jeq 6f
3079 cmpi #VME_TYPE_MVME172,%d1
3080 jne 5f
3081 /* 162/172; it's an SCC */
3082 6: btst #2,M162_SCC_CTRL_A
3083 nop
3084 nop
3085 nop
3086 jeq 6b
3087 moveb #8,M162_SCC_CTRL_A
3088 nop
3089 nop
3090 nop
3091 moveb %d0,M162_SCC_CTRL_A
3092 jra 3f
3093 5:
3094 /* 166/167/177; it's a CD2401 */
3095 moveb #0,M167_CYCAR
3096 moveb M167_CYIER,%d2
3097 moveb #0x02,M167_CYIER
3098 7:
3099 btst #5,M167_PCSCCTICR
3100 jeq 7b
3101 moveb M167_PCTPIACKR,%d1
3102 moveb M167_CYLICR,%d1
3103 jeq 8f
3104 moveb #0x08,M167_CYTEOIR
3105 jra 7b
3106 8:
3107 moveb %d0,M167_CYTDR
3108 moveb #0,M167_CYTEOIR
3109 moveb %d2,M167_CYIER
3110 jra 3f
3111 1:
3112 moveb %d0,%sp@-
3113 trap #15
3114 .word 0x0020 /* TRAP 0x020 */
3115 3:
3116 moveml %sp@+,%d0-%d7/%a2-%a6
3117 jbra L(serial_putc_done)
3118 2:
3119 #endif /* CONFIG_MVME16x */
3121 #ifdef CONFIG_BVME6000
3122 is_not_bvme6000(2f)
3123 /*
3124 * The BVME6000 machine has a serial port ...
3125 */
3126 1: btst #2,BVME_SCC_CTRL_A
3127 jeq 1b
3128 moveb %d0,BVME_SCC_DATA_A
3129 jbra L(serial_putc_done)
3130 2:
3131 #endif
3133 #ifdef CONFIG_SUN3X
3134 is_not_sun3x(2f)
3135 movel %d0,-(%sp)
3136 movel 0xFEFE0018,%a1
3137 jbsr (%a1)
3138 addq #4,%sp
3139 jbra L(serial_putc_done)
3140 2:
3141 #endif
3143 #ifdef CONFIG_Q40
3144 is_not_q40(2f)
3145 tst.l %pc@(L(q40_do_debug)) /* only debug if requested */
3146 beq 2f
3147 lea %pc@(q40_mem_cptr),%a1
3148 move.l %a1@,%a0
3149 move.b %d0,%a0@
3150 addq.l #4,%a0
3151 move.l %a0,%a1@
3152 jbra L(serial_putc_done)
3153 2:
3154 #endif
3156 #ifdef CONFIG_APOLLO
3157 is_not_apollo(2f)
3158 movl %pc@(L(iobase)),%a1
3159 moveb %d0,%a1@(LTHRB0)
3160 1: moveb %a1@(LSRB0),%d0
3161 andb #0x4,%d0
3162 beq 1b
3163 jbra L(serial_putc_done)
3164 2:
3165 #endif
3167 #ifdef CONFIG_HP300
3168 is_not_hp300(3f)
3169 movl %pc@(L(iobase)),%a1
3170 addl %pc@(L(uartbase)),%a1
3171 movel %pc@(L(uart_scode)),%d1 /* Check the scode */
3172 jmi 3f /* Unset? Exit */
3173 cmpi #256,%d1 /* APCI scode? */
3174 jeq 2f
3175 1: moveb %a1@(DCALSR),%d1 /* Output to DCA */
3176 andb #0x20,%d1
3177 beq 1b
3178 moveb %d0,%a1@(DCADATA)
3179 jbra L(serial_putc_done)
3180 2: moveb %a1@(APCILSR),%d1 /* Output to APCI */
3181 andb #0x20,%d1
3182 beq 2b
3183 moveb %d0,%a1@(APCIDATA)
3184 jbra L(serial_putc_done)
3185 3:
3186 #endif
3188 L(serial_putc_done):
3189 func_return serial_putc
3191 /*
3192 * Output a string.
3193 */
3194 func_start puts,%d0/%a0
3196 movel ARG1,%a0
3197 jra 2f
3198 1:
3199 #ifdef CONSOLE_DEBUG
3200 console_putc %d0
3201 #endif
3202 #ifdef SERIAL_DEBUG
3203 serial_putc %d0
3204 #endif
3205 2: moveb %a0@+,%d0
3206 jne 1b
3208 func_return puts
3210 /*
3211 * Output number in hex notation.
3212 */
3214 func_start putn,%d0-%d2
3216 putc ' '
3218 movel ARG1,%d0
3219 moveq #7,%d1
3220 1: roll #4,%d0
3221 move %d0,%d2
3222 andb #0x0f,%d2
3223 addb #'0',%d2
3224 cmpb #'9',%d2
3225 jls 2f
3226 addb #'A'-('9'+1),%d2
3227 2:
3228 #ifdef CONSOLE_DEBUG
3229 console_putc %d2
3230 #endif
3231 #ifdef SERIAL_DEBUG
3232 serial_putc %d2
3233 #endif
3234 dbra %d1,1b
3236 func_return putn
3238 #ifdef CONFIG_EARLY_PRINTK
3239 /*
3240 * This routine takes its parameters on the stack. It then
3241 * turns around and calls the internal routines. This routine
3242 * is used by the boot console.
3243 *
3244 * The calling parameters are:
3245 * void debug_cons_nputs(const char *str, unsigned length)
3246 *
3247 * This routine does NOT understand variable arguments only
3248 * simple strings!
3249 */
3250 ENTRY(debug_cons_nputs)
3251 moveml %d0/%d1/%a0,%sp@-
3252 movew %sr,%sp@-
3253 ori #0x0700,%sr
3254 movel %sp@(18),%a0 /* fetch parameter */
3255 movel %sp@(22),%d1 /* fetch parameter */
3256 jra 2f
3257 1:
3258 #ifdef CONSOLE_DEBUG
3259 console_putc %d0
3260 #endif
3261 #ifdef SERIAL_DEBUG
3262 serial_putc %d0
3263 #endif
3264 subq #1,%d1
3265 2: jeq 3f
3266 moveb %a0@+,%d0
3267 jne 1b
3268 3:
3269 movew %sp@+,%sr
3270 moveml %sp@+,%d0/%d1/%a0
3271 rts
3272 #endif /* CONFIG_EARLY_PRINTK */
3274 #if defined(CONFIG_HP300) || defined(CONFIG_APOLLO)
3275 func_start set_leds,%d0/%a0
3276 movel ARG1,%d0
3277 #ifdef CONFIG_HP300
3278 is_not_hp300(1f)
3279 movel %pc@(L(iobase)),%a0
3280 moveb %d0,%a0@(0x1ffff)
3281 jra 2f
3282 #endif
3283 1:
3284 #ifdef CONFIG_APOLLO
3285 movel %pc@(L(iobase)),%a0
3286 lsll #8,%d0
3287 eorw #0xff00,%d0
3288 moveb %d0,%a0@(LCPUCTRL)
3289 #endif
3290 2:
3291 func_return set_leds
3292 #endif
3294 #ifdef CONSOLE_DEBUG
3295 /*
3296 * For continuity, see the data alignment
3297 * to which this structure is tied.
3298 */
3299 #define Lconsole_struct_cur_column 0
3300 #define Lconsole_struct_cur_row 4
3301 #define Lconsole_struct_num_columns 8
3302 #define Lconsole_struct_num_rows 12
3303 #define Lconsole_struct_left_edge 16
3305 func_start console_init,%a0-%a4/%d0-%d7
3306 /*
3307 * Some of the register usage that follows
3308 * a0 = pointer to boot_info
3309 * a1 = pointer to screen
3310 * a2 = pointer to console_globals
3311 * d3 = pixel width of screen
3312 * d4 = pixel height of screen
3313 * (d3,d4) ~= (x,y) of a point just below
3314 * and to the right of the screen
3315 * NOT on the screen!
3316 * d5 = number of bytes per scan line
3317 * d6 = number of bytes on the entire screen
3318 */
3320 lea %pc@(L(console_globals)),%a2
3321 movel %pc@(L(mac_videobase)),%a1
3322 movel %pc@(L(mac_rowbytes)),%d5
3323 movel %pc@(L(mac_dimensions)),%d3 /* -> low byte */
3324 movel %d3,%d4
3325 swap %d4 /* -> high byte */
3326 andl #0xffff,%d3 /* d3 = screen width in pixels */
3327 andl #0xffff,%d4 /* d4 = screen height in pixels */
3329 movel %d5,%d6
3330 | subl #20,%d6
3331 mulul %d4,%d6 /* scan line bytes x num scan lines */
3332 divul #8,%d6 /* we'll clear 8 bytes at a time */
3333 moveq #-1,%d0 /* Mac_black */
3334 subq #1,%d6
3336 L(console_clear_loop):
3337 movel %d0,%a1@+
3338 movel %d0,%a1@+
3339 dbra %d6,L(console_clear_loop)
3341 /* Calculate font size */
3343 #if defined(FONT_8x8) && defined(CONFIG_FONT_8x8)
3344 lea %pc@(font_vga_8x8),%a0
3345 #elif defined(FONT_8x16) && defined(CONFIG_FONT_8x16)
3346 lea %pc@(font_vga_8x16),%a0
3347 #elif defined(FONT_6x11) && defined(CONFIG_FONT_6x11)
3348 lea %pc@(font_vga_6x11),%a0
3349 #elif defined(CONFIG_FONT_8x8) /* default */
3350 lea %pc@(font_vga_8x8),%a0
3351 #else /* no compiled-in font */
3352 lea 0,%a0
3353 #endif
3355 /*
3356 * At this point we make a shift in register usage
3357 * a1 = address of console_font pointer
3358 */
3359 lea %pc@(L(console_font)),%a1
3360 movel %a0,%a1@ /* store pointer to struct fbcon_font_desc in console_font */
3361 tstl %a0
3362 jeq 1f
3363 lea %pc@(L(console_font_data)),%a4
3364 movel %a0@(FONT_DESC_DATA),%d0
3365 subl #L(console_font),%a1
3366 addl %a1,%d0
3367 movel %d0,%a4@
3369 /*
3370 * Calculate global maxs
3371 * Note - we can use either an
3372 * 8 x 16 or 8 x 8 character font
3373 * 6 x 11 also supported
3374 */
3375 /* ASSERT: a0 = contents of Lconsole_font */
3376 movel %d3,%d0 /* screen width in pixels */
3377 divul %a0@(FONT_DESC_WIDTH),%d0 /* d0 = max num chars per row */
3379 movel %d4,%d1 /* screen height in pixels */
3380 divul %a0@(FONT_DESC_HEIGHT),%d1 /* d1 = max num rows */
3382 movel %d0,%a2@(Lconsole_struct_num_columns)
3383 movel %d1,%a2@(Lconsole_struct_num_rows)
3385 /*
3386 * Clear the current row and column
3387 */
3388 clrl %a2@(Lconsole_struct_cur_column)
3389 clrl %a2@(Lconsole_struct_cur_row)
3390 clrl %a2@(Lconsole_struct_left_edge)
3392 /*
3393 * Initialization is complete
3394 */
3395 1:
3396 func_return console_init
3398 #ifdef CONFIG_LOGO
3399 func_start console_put_penguin,%a0-%a1/%d0-%d7
3400 /*
3401 * Get 'that_penguin' onto the screen in the upper right corner
3402 * penguin is 64 x 74 pixels, align against right edge of screen
3403 */
3404 lea %pc@(L(mac_dimensions)),%a0
3405 movel %a0@,%d0
3406 andil #0xffff,%d0
3407 subil #64,%d0 /* snug up against the right edge */
3408 clrl %d1 /* start at the top */
3409 movel #73,%d7
3410 lea %pc@(L(that_penguin)),%a1
3411 L(console_penguin_row):
3412 movel #31,%d6
3413 L(console_penguin_pixel_pair):
3414 moveb %a1@,%d2
3415 lsrb #4,%d2
3416 console_plot_pixel %d0,%d1,%d2
3417 addq #1,%d0
3418 moveb %a1@+,%d2
3419 console_plot_pixel %d0,%d1,%d2
3420 addq #1,%d0
3421 dbra %d6,L(console_penguin_pixel_pair)
3423 subil #64,%d0
3424 addq #1,%d1
3425 dbra %d7,L(console_penguin_row)
3427 func_return console_put_penguin
3429 /* include penguin bitmap */
3430 L(that_penguin):
3431 #include "../mac/mac_penguin.S"
3432 #endif
3434 /*
3435 * Calculate source and destination addresses
3436 * output a1 = dest
3437 * a2 = source
3438 */
3440 func_start console_scroll,%a0-%a4/%d0-%d7
3441 lea %pc@(L(mac_videobase)),%a0
3442 movel %a0@,%a1
3443 movel %a1,%a2
3444 lea %pc@(L(mac_rowbytes)),%a0
3445 movel %a0@,%d5
3446 movel %pc@(L(console_font)),%a0
3447 tstl %a0
3448 jeq 1f
3449 mulul %a0@(FONT_DESC_HEIGHT),%d5 /* account for # scan lines per character */
3450 addal %d5,%a2
3452 /*
3453 * Get dimensions
3454 */
3455 lea %pc@(L(mac_dimensions)),%a0
3456 movel %a0@,%d3
3457 movel %d3,%d4
3458 swap %d4
3459 andl #0xffff,%d3 /* d3 = screen width in pixels */
3460 andl #0xffff,%d4 /* d4 = screen height in pixels */
3462 /*
3463 * Calculate number of bytes to move
3464 */
3465 lea %pc@(L(mac_rowbytes)),%a0
3466 movel %a0@,%d6
3467 movel %pc@(L(console_font)),%a0
3468 subl %a0@(FONT_DESC_HEIGHT),%d4 /* we're not scrolling the top row! */
3469 mulul %d4,%d6 /* scan line bytes x num scan lines */
3470 divul #32,%d6 /* we'll move 8 longs at a time */
3471 subq #1,%d6
3473 L(console_scroll_loop):
3474 movel %a2@+,%a1@+
3475 movel %a2@+,%a1@+
3476 movel %a2@+,%a1@+
3477 movel %a2@+,%a1@+
3478 movel %a2@+,%a1@+
3479 movel %a2@+,%a1@+
3480 movel %a2@+,%a1@+
3481 movel %a2@+,%a1@+
3482 dbra %d6,L(console_scroll_loop)
3484 lea %pc@(L(mac_rowbytes)),%a0
3485 movel %a0@,%d6
3486 movel %pc@(L(console_font)),%a0
3487 mulul %a0@(FONT_DESC_HEIGHT),%d6 /* scan line bytes x font height */
3488 divul #32,%d6 /* we'll move 8 words at a time */
3489 subq #1,%d6
3491 moveq #-1,%d0
3492 L(console_scroll_clear_loop):
3493 movel %d0,%a1@+
3494 movel %d0,%a1@+
3495 movel %d0,%a1@+
3496 movel %d0,%a1@+
3497 movel %d0,%a1@+
3498 movel %d0,%a1@+
3499 movel %d0,%a1@+
3500 movel %d0,%a1@+
3501 dbra %d6,L(console_scroll_clear_loop)
3503 1:
3504 func_return console_scroll
3507 func_start console_putc,%a0/%a1/%d0-%d7
3509 is_not_mac(L(console_exit))
3510 tstl %pc@(L(console_font))
3511 jeq L(console_exit)
3513 /* Output character in d7 on console.
3514 */
3515 movel ARG1,%d7
3516 cmpib #'\n',%d7
3517 jbne 1f
3519 /* A little safe recursion is good for the soul */
3520 console_putc #'\r'
3521 1:
3522 lea %pc@(L(console_globals)),%a0
3524 cmpib #10,%d7
3525 jne L(console_not_lf)
3526 movel %a0@(Lconsole_struct_cur_row),%d0
3527 addil #1,%d0
3528 movel %d0,%a0@(Lconsole_struct_cur_row)
3529 movel %a0@(Lconsole_struct_num_rows),%d1
3530 cmpl %d1,%d0
3531 jcs 1f
3532 subil #1,%d0
3533 movel %d0,%a0@(Lconsole_struct_cur_row)
3534 console_scroll
3535 1:
3536 jra L(console_exit)
3538 L(console_not_lf):
3539 cmpib #13,%d7
3540 jne L(console_not_cr)
3541 clrl %a0@(Lconsole_struct_cur_column)
3542 jra L(console_exit)
3544 L(console_not_cr):
3545 cmpib #1,%d7
3546 jne L(console_not_home)
3547 clrl %a0@(Lconsole_struct_cur_row)
3548 clrl %a0@(Lconsole_struct_cur_column)
3549 jra L(console_exit)
3551 /*
3552 * At this point we know that the %d7 character is going to be
3553 * rendered on the screen. Register usage is -
3554 * a0 = pointer to console globals
3555 * a1 = font data
3556 * d0 = cursor column
3557 * d1 = cursor row to draw the character
3558 * d7 = character number
3559 */
3560 L(console_not_home):
3561 movel %a0@(Lconsole_struct_cur_column),%d0
3562 addql #1,%a0@(Lconsole_struct_cur_column)
3563 movel %a0@(Lconsole_struct_num_columns),%d1
3564 cmpl %d1,%d0
3565 jcs 1f
3566 console_putc #'\n' /* recursion is OK! */
3567 1:
3568 movel %a0@(Lconsole_struct_cur_row),%d1
3570 /*
3571 * At this point we make a shift in register usage
3572 * a0 = address of pointer to font data (fbcon_font_desc)
3573 */
3574 movel %pc@(L(console_font)),%a0
3575 movel %pc@(L(console_font_data)),%a1 /* Load fbcon_font_desc.data into a1 */
3576 andl #0x000000ff,%d7
3577 /* ASSERT: a0 = contents of Lconsole_font */
3578 mulul %a0@(FONT_DESC_HEIGHT),%d7 /* d7 = index into font data */
3579 addl %d7,%a1 /* a1 = points to char image */
3581 /*
3582 * At this point we make a shift in register usage
3583 * d0 = pixel coordinate, x
3584 * d1 = pixel coordinate, y
3585 * d2 = (bit 0) 1/0 for white/black (!) pixel on screen
3586 * d3 = font scan line data (8 pixels)
3587 * d6 = count down for the font's pixel width (8)
3588 * d7 = count down for the font's pixel count in height
3589 */
3590 /* ASSERT: a0 = contents of Lconsole_font */
3591 mulul %a0@(FONT_DESC_WIDTH),%d0
3592 mulul %a0@(FONT_DESC_HEIGHT),%d1
3593 movel %a0@(FONT_DESC_HEIGHT),%d7 /* Load fbcon_font_desc.height into d7 */
3594 subq #1,%d7
3595 L(console_read_char_scanline):
3596 moveb %a1@+,%d3
3598 /* ASSERT: a0 = contents of Lconsole_font */
3599 movel %a0@(FONT_DESC_WIDTH),%d6 /* Load fbcon_font_desc.width into d6 */
3600 subql #1,%d6
3602 L(console_do_font_scanline):
3603 lslb #1,%d3
3604 scsb %d2 /* convert 1 bit into a byte */
3605 console_plot_pixel %d0,%d1,%d2
3606 addq #1,%d0
3607 dbra %d6,L(console_do_font_scanline)
3609 /* ASSERT: a0 = contents of Lconsole_font */
3610 subl %a0@(FONT_DESC_WIDTH),%d0
3611 addq #1,%d1
3612 dbra %d7,L(console_read_char_scanline)
3614 L(console_exit):
3615 func_return console_putc
3617 /*
3618 * Input:
3619 * d0 = x coordinate
3620 * d1 = y coordinate
3621 * d2 = (bit 0) 1/0 for white/black (!)
3622 * All registers are preserved
3623 */
3624 func_start console_plot_pixel,%a0-%a1/%d0-%d4
3626 movel %pc@(L(mac_videobase)),%a1
3627 movel %pc@(L(mac_videodepth)),%d3
3628 movel ARG1,%d0
3629 movel ARG2,%d1
3630 mulul %pc@(L(mac_rowbytes)),%d1
3631 movel ARG3,%d2
3633 /*
3634 * Register usage:
3635 * d0 = x coord becomes byte offset into frame buffer
3636 * d1 = y coord
3637 * d2 = black or white (0/1)
3638 * d3 = video depth
3639 * d4 = temp of x (d0) for many bit depths
3640 */
3641 L(test_1bit):
3642 cmpb #1,%d3
3643 jbne L(test_2bit)
3644 movel %d0,%d4 /* we need the low order 3 bits! */
3645 divul #8,%d0
3646 addal %d0,%a1
3647 addal %d1,%a1
3648 andb #7,%d4
3649 eorb #7,%d4 /* reverse the x-coordinate w/ screen-bit # */
3650 andb #1,%d2
3651 jbne L(white_1)
3652 bsetb %d4,%a1@
3653 jbra L(console_plot_pixel_exit)
3654 L(white_1):
3655 bclrb %d4,%a1@
3656 jbra L(console_plot_pixel_exit)
3658 L(test_2bit):
3659 cmpb #2,%d3
3660 jbne L(test_4bit)
3661 movel %d0,%d4 /* we need the low order 2 bits! */
3662 divul #4,%d0
3663 addal %d0,%a1
3664 addal %d1,%a1
3665 andb #3,%d4
3666 eorb #3,%d4 /* reverse the x-coordinate w/ screen-bit # */
3667 lsll #1,%d4 /* ! */
3668 andb #1,%d2
3669 jbne L(white_2)
3670 bsetb %d4,%a1@
3671 addq #1,%d4
3672 bsetb %d4,%a1@
3673 jbra L(console_plot_pixel_exit)
3674 L(white_2):
3675 bclrb %d4,%a1@
3676 addq #1,%d4
3677 bclrb %d4,%a1@
3678 jbra L(console_plot_pixel_exit)
3680 L(test_4bit):
3681 cmpb #4,%d3
3682 jbne L(test_8bit)
3683 movel %d0,%d4 /* we need the low order bit! */
3684 divul #2,%d0
3685 addal %d0,%a1
3686 addal %d1,%a1
3687 andb #1,%d4
3688 eorb #1,%d4
3689 lsll #2,%d4 /* ! */
3690 andb #1,%d2
3691 jbne L(white_4)
3692 bsetb %d4,%a1@
3693 addq #1,%d4
3694 bsetb %d4,%a1@
3695 addq #1,%d4
3696 bsetb %d4,%a1@
3697 addq #1,%d4
3698 bsetb %d4,%a1@
3699 jbra L(console_plot_pixel_exit)
3700 L(white_4):
3701 bclrb %d4,%a1@
3702 addq #1,%d4
3703 bclrb %d4,%a1@
3704 addq #1,%d4
3705 bclrb %d4,%a1@
3706 addq #1,%d4
3707 bclrb %d4,%a1@
3708 jbra L(console_plot_pixel_exit)
3710 L(test_8bit):
3711 cmpb #8,%d3
3712 jbne L(test_16bit)
3713 addal %d0,%a1
3714 addal %d1,%a1
3715 andb #1,%d2
3716 jbne L(white_8)
3717 moveb #0xff,%a1@
3718 jbra L(console_plot_pixel_exit)
3719 L(white_8):
3720 clrb %a1@
3721 jbra L(console_plot_pixel_exit)
3723 L(test_16bit):
3724 cmpb #16,%d3
3725 jbne L(console_plot_pixel_exit)
3726 addal %d0,%a1
3727 addal %d0,%a1
3728 addal %d1,%a1
3729 andb #1,%d2
3730 jbne L(white_16)
3731 clrw %a1@
3732 jbra L(console_plot_pixel_exit)
3733 L(white_16):
3734 movew #0x0fff,%a1@
3735 jbra L(console_plot_pixel_exit)
3737 L(console_plot_pixel_exit):
3738 func_return console_plot_pixel
3739 #endif /* CONSOLE_DEBUG */
3742 __INITDATA
3743 .align 4
3745 m68k_init_mapped_size:
3746 .long 0
3748 #if defined(CONFIG_ATARI) || defined(CONFIG_AMIGA) || \
3749 defined(CONFIG_HP300) || defined(CONFIG_APOLLO)
3750 L(custom):
3751 L(iobase):
3752 .long 0
3753 #endif
3755 #ifdef CONSOLE_DEBUG
3756 L(console_globals):
3757 .long 0 /* cursor column */
3758 .long 0 /* cursor row */
3759 .long 0 /* max num columns */
3760 .long 0 /* max num rows */
3761 .long 0 /* left edge */
3762 L(console_font):
3763 .long 0 /* pointer to console font (struct font_desc) */
3764 L(console_font_data):
3765 .long 0 /* pointer to console font data */
3766 #endif /* CONSOLE_DEBUG */
3768 #if defined(MMU_PRINT)
3769 L(mmu_print_data):
3770 .long 0 /* valid flag */
3771 .long 0 /* start logical */
3772 .long 0 /* next logical */
3773 .long 0 /* start physical */
3774 .long 0 /* next physical */
3775 #endif /* MMU_PRINT */
3777 L(cputype):
3778 .long 0
3779 L(mmu_cached_pointer_tables):
3780 .long 0
3781 L(mmu_num_pointer_tables):
3782 .long 0
3783 L(phys_kernel_start):
3784 .long 0
3785 L(kernel_end):
3786 .long 0
3787 L(memory_start):
3788 .long 0
3789 L(kernel_pgdir_ptr):
3790 .long 0
3791 L(temp_mmap_mem):
3792 .long 0
3794 #if defined (CONFIG_MVME147)
3795 M147_SCC_CTRL_A = 0xfffe3002
3796 M147_SCC_DATA_A = 0xfffe3003
3797 #endif
3799 #if defined (CONFIG_MVME16x)
3800 M162_SCC_CTRL_A = 0xfff45005
3801 M167_CYCAR = 0xfff450ee
3802 M167_CYIER = 0xfff45011
3803 M167_CYLICR = 0xfff45026
3804 M167_CYTEOIR = 0xfff45085
3805 M167_CYTDR = 0xfff450f8
3806 M167_PCSCCMICR = 0xfff4201d
3807 M167_PCSCCTICR = 0xfff4201e
3808 M167_PCSCCRICR = 0xfff4201f
3809 M167_PCTPIACKR = 0xfff42025
3810 #endif
3812 #if defined (CONFIG_BVME6000)
3813 BVME_SCC_CTRL_A = 0xffb0000b
3814 BVME_SCC_DATA_A = 0xffb0000f
3815 #endif
3817 #if defined(CONFIG_MAC)
3818 L(mac_videobase):
3819 .long 0
3820 L(mac_videodepth):
3821 .long 0
3822 L(mac_dimensions):
3823 .long 0
3824 L(mac_rowbytes):
3825 .long 0
3826 L(mac_sccbase):
3827 .long 0
3828 #endif /* CONFIG_MAC */
3830 #if defined (CONFIG_APOLLO)
3831 LSRB0 = 0x10412
3832 LTHRB0 = 0x10416
3833 LCPUCTRL = 0x10100
3834 #endif
3836 #if defined(CONFIG_HP300)
3837 DCADATA = 0x11
3838 DCALSR = 0x1b
3839 APCIDATA = 0x00
3840 APCILSR = 0x14
3841 L(uartbase):
3842 .long 0
3843 L(uart_scode):
3844 .long -1
3845 #endif
3847 __FINIT
3848 .data
3849 .align 4
3851 availmem:
3852 .long 0
3853 m68k_pgtable_cachemode:
3854 .long 0
3855 m68k_supervisor_cachemode:
3856 .long 0
3857 #if defined(CONFIG_MVME16x)
3858 mvme_bdid:
3859 .long 0,0,0,0,0,0,0,0
3860 #endif
3861 #if defined(CONFIG_Q40)
3862 q40_mem_cptr:
3863 .long 0
3864 L(q40_do_debug):
3865 .long 0
3866 #endif