arch/powerpc/kernel/rtas_pci.c

   1 /*
   2  * Copyright (C) 2001 Dave Engebretsen, IBM Corporation
   3  * Copyright (C) 2003 Anton Blanchard <anton@au.ibm.com>, IBM
   4  *
   5  * RTAS specific routines for PCI.
   6  *
   7  * Based on code from pci.c, chrp_pci.c and pSeries_pci.c
   8  *
   9  * This program is free software; you can redistribute it and/or modify
  10  * it under the terms of the GNU General Public License as published by
  11  * the Free Software Foundation; either version 2 of the License, or
  12  * (at your option) any later version.
  13  *
  14  * This program is distributed in the hope that it will be useful,
  15  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  16  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  17  * GNU General Public License for more details.
  18  *
  19  * You should have received a copy of the GNU General Public License
  20  * along with this program; if not, write to the Free Software
  21  * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307 USA
  22  */
  23
  24 #include <linux/kernel.h>
  25 #include <linux/threads.h>
  26 #include <linux/pci.h>
  27 #include <linux/string.h>
  28 #include <linux/init.h>
  29 #include <linux/bootmem.h>
  30
  31 #include <asm/io.h>
  32 #include <asm/pgtable.h>
  33 #include <asm/irq.h>
  34 #include <asm/prom.h>
  35 #include <asm/machdep.h>
  36 #include <asm/pci-bridge.h>
  37 #include <asm/iommu.h>
  38 #include <asm/rtas.h>
  39 #include <asm/mpic.h>
  40 #include <asm/ppc-pci.h>
  41 #include <asm/eeh.h>
  42
  43 /* RTAS tokens */
  44 static int read_pci_config;
  45 static int write_pci_config;
  46 static int ibm_read_pci_config;
  47 static int ibm_write_pci_config;
  48
  49 static inline int config_access_valid(struct pci_dn *dn, int where)
  50 {
  51         if (where < 256)
  52                 return 1;
  53         if (where < 4096 && dn->pci_ext_config_space)
  54                 return 1;
  55
  56         return 0;
  57 }
  58
  59 int rtas_read_config(struct pci_dn *pdn, int where, int size, u32 *val)
  60 {
  61         int returnval = -1;
  62         unsigned long buid, addr;
  63         int ret;
  64
  65         if (!pdn)
  66                 return PCIBIOS_DEVICE_NOT_FOUND;
  67         if (!config_access_valid(pdn, where))
  68                 return PCIBIOS_BAD_REGISTER_NUMBER;
  69
  70         addr = rtas_config_addr(pdn->busno, pdn->devfn, where);
  71         buid = pdn->phb->buid;
  72         if (buid) {
  73                 ret = rtas_call(ibm_read_pci_config, 4, 2, &returnval,
  74                                 addr, BUID_HI(buid), BUID_LO(buid), size);
  75         } else {
  76                 ret = rtas_call(read_pci_config, 2, 2, &returnval, addr, size);
  77         }
  78         *val = returnval;
  79
  80         if (ret)
  81                 return PCIBIOS_DEVICE_NOT_FOUND;
  82
  83         return PCIBIOS_SUCCESSFUL;
  84 }
  85
  86 static int rtas_pci_read_config(struct pci_bus *bus,
  87                                 unsigned int devfn,
  88                                 int where, int size, u32 *val)
  89 {
  90         struct device_node *busdn, *dn;
  91         struct pci_dn *pdn;
  92         bool found = false;
  93 #ifdef CONFIG_EEH
  94         struct eeh_dev *edev;
  95 #endif
  96         int ret;
  97
  98         /* Search only direct children of the bus */
  99         *val = 0xFFFFFFFF;
 100         busdn = pci_bus_to_OF_node(bus);
 101         for (dn = busdn->child; dn; dn = dn->sibling) {
 102                 pdn = PCI_DN(dn);
 103                 if (pdn && pdn->devfn == devfn
 104                     && of_device_is_available(dn)) {
 105                         found = true;
 106                         break;
 107                 }
 108         }
 109
 110         if (!found)
 111                 return PCIBIOS_DEVICE_NOT_FOUND;
 112 #ifdef CONFIG_EEH
 113         edev = of_node_to_eeh_dev(dn);
 114         if (edev && edev->pe && edev->pe->state & EEH_PE_RESET)
 115                 return PCIBIOS_DEVICE_NOT_FOUND;
 116 #endif
 117
 118         ret = rtas_read_config(pdn, where, size, val);
 119         if (*val == EEH_IO_ERROR_VALUE(size) &&
 120             eeh_dev_check_failure(of_node_to_eeh_dev(dn)))
 121                 return PCIBIOS_DEVICE_NOT_FOUND;
 122
 123         return ret;
 124 }
 125
 126 int rtas_write_config(struct pci_dn *pdn, int where, int size, u32 val)
 127 {
 128         unsigned long buid, addr;
 129         int ret;
 130
 131         if (!pdn)
 132                 return PCIBIOS_DEVICE_NOT_FOUND;
 133         if (!config_access_valid(pdn, where))
 134                 return PCIBIOS_BAD_REGISTER_NUMBER;
 135
 136         addr = rtas_config_addr(pdn->busno, pdn->devfn, where);
 137         buid = pdn->phb->buid;
 138         if (buid) {
 139                 ret = rtas_call(ibm_write_pci_config, 5, 1, NULL, addr,
 140                         BUID_HI(buid), BUID_LO(buid), size, (ulong) val);
 141         } else {
 142                 ret = rtas_call(write_pci_config, 3, 1, NULL, addr, size, (ulong)val);
 143         }
 144
 145         if (ret)
 146                 return PCIBIOS_DEVICE_NOT_FOUND;
 147
 148         return PCIBIOS_SUCCESSFUL;
 149 }
 150
 151 static int rtas_pci_write_config(struct pci_bus *bus,
 152                                  unsigned int devfn,
 153                                  int where, int size, u32 val)
 154 {
 155         struct device_node *busdn, *dn;
 156         struct pci_dn *pdn;
 157         bool found = false;
 158 #ifdef CONFIG_EEH
 159         struct eeh_dev *edev;
 160 #endif
 161         int ret;
 162
 163         /* Search only direct children of the bus */
 164         busdn = pci_bus_to_OF_node(bus);
 165         for (dn = busdn->child; dn; dn = dn->sibling) {
 166                 pdn = PCI_DN(dn);
 167                 if (pdn && pdn->devfn == devfn
 168                     && of_device_is_available(dn)) {
 169                         found = true;
 170                         break;
 171                 }
 172         }
 173
 174         if (!found)
 175                 return PCIBIOS_DEVICE_NOT_FOUND;
 176 #ifdef CONFIG_EEH
 177         edev = of_node_to_eeh_dev(dn);
 178         if (edev && edev->pe && (edev->pe->state & EEH_PE_RESET))
 179                 return PCIBIOS_DEVICE_NOT_FOUND;
 180 #endif
 181         ret = rtas_write_config(pdn, where, size, val);
 182
 183         return ret;
 184 }
 185
 186 static struct pci_ops rtas_pci_ops = {
 187         .read = rtas_pci_read_config,
 188         .write = rtas_pci_write_config,
 189 };
 190
 191 static int is_python(struct device_node *dev)
 192 {
 193         const char *model = of_get_property(dev, "model", NULL);
 194
 195         if (model && strstr(model, "Python"))
 196                 return 1;
 197
 198         return 0;
 199 }
 200
 201 static void python_countermeasures(struct device_node *dev)
 202 {
 203         struct resource registers;
 204         void __iomem *chip_regs;
 205         volatile u32 val;
 206
 207         if (of_address_to_resource(dev, 0, &registers)) {
 208                 printk(KERN_ERR "Can't get address for Python workarounds !\n");
 209                 return;
 210         }
 211
 212         /* Python's register file is 1 MB in size. */
 213         chip_regs = ioremap(registers.start & ~(0xfffffUL), 0x100000);
 214
 215         /*
 216          * Firmware doesn't always clear this bit which is critical
 217          * for good performance - Anton
 218          */
 219
 220 #define PRG_CL_RESET_VALID 0x00010000
 221
 222         val = in_be32(chip_regs + 0xf6030);
 223         if (val & PRG_CL_RESET_VALID) {
 224                 printk(KERN_INFO "Python workaround: ");
 225                 val &= ~PRG_CL_RESET_VALID;
 226                 out_be32(chip_regs + 0xf6030, val);
 227                 /*
 228                  * We must read it back for changes to
 229                  * take effect
 230                  */
 231                 val = in_be32(chip_regs + 0xf6030);
 232                 printk("reg0: %x\n", val);
 233         }
 234
 235         iounmap(chip_regs);
 236 }
 237
 238 void __init init_pci_config_tokens(void)
 239 {
 240         read_pci_config = rtas_token("read-pci-config");
 241         write_pci_config = rtas_token("write-pci-config");
 242         ibm_read_pci_config = rtas_token("ibm,read-pci-config");
 243         ibm_write_pci_config = rtas_token("ibm,write-pci-config");
 244 }
 245
 246 unsigned long get_phb_buid(struct device_node *phb)
 247 {
 248         struct resource r;
 249
 250         if (ibm_read_pci_config == -1)
 251                 return 0;
 252         if (of_address_to_resource(phb, 0, &r))
 253                 return 0;
 254         return r.start;
 255 }
 256
 257 static int phb_set_bus_ranges(struct device_node *dev,
 258                               struct pci_controller *phb)
 259 {
 260         const __be32 *bus_range;
 261         unsigned int len;
 262
 263         bus_range = of_get_property(dev, "bus-range", &len);
 264         if (bus_range == NULL || len < 2 * sizeof(int)) {
 265                 return 1;
 266         }
 267
 268         phb->first_busno = be32_to_cpu(bus_range[0]);
 269         phb->last_busno  = be32_to_cpu(bus_range[1]);
 270
 271         return 0;
 272 }
 273
 274 int rtas_setup_phb(struct pci_controller *phb)
 275 {
 276         struct device_node *dev = phb->dn;
 277
 278         if (is_python(dev))
 279                 python_countermeasures(dev);
 280
 281         if (phb_set_bus_ranges(dev, phb))
 282                 return 1;
 283
 284         phb->ops = &rtas_pci_ops;
 285         phb->buid = get_phb_buid(dev);
 286
 287         return 0;
 288 }
 289
 290 void __init find_and_init_phbs(void)
 291 {
 292         struct device_node *node;
 293         struct pci_controller *phb;
 294         struct device_node *root = of_find_node_by_path("/");
 295
 296         for_each_child_of_node(root, node) {
 297                 if (node->type == NULL || (strcmp(node->type, "pci") != 0 &&
 298                                            strcmp(node->type, "pciex") != 0))
 299                         continue;
 300
 301                 phb = pcibios_alloc_controller(node);
 302                 if (!phb)
 303                         continue;
 304                 rtas_setup_phb(phb);
 305                 pci_process_bridge_OF_ranges(phb, node, 0);
 306                 isa_bridge_find_early(phb);
 307         }
 308
 309         of_node_put(root);
 310         pci_devs_phb_init();
 311
 312         /*
 313          * PCI_PROBE_ONLY and PCI_REASSIGN_ALL_BUS can be set via properties
 314          * in chosen.
 315          */
 316         if (of_chosen) {
 317                 const int *prop;
 318
 319                 prop = of_get_property(of_chosen,
 320                                 "linux,pci-probe-only", NULL);
 321                 if (prop) {
 322                         if (*prop)
 323                                 pci_add_flags(PCI_PROBE_ONLY);
 324                         else
 325                                 pci_clear_flags(PCI_PROBE_ONLY);
 326                 }
 327
 328 #ifdef CONFIG_PPC32 /* Will be made generic soon */
 329                 prop = of_get_property(of_chosen,
 330                                 "linux,pci-assign-all-buses", NULL);
 331                 if (prop && *prop)
 332                         pci_add_flags(PCI_REASSIGN_ALL_BUS);
 333 #endif /* CONFIG_PPC32 */
 334         }
 335 }