arch/sh/boards/mach-se/770x/irq.c

   1 /*
   2  * linux/arch/sh/boards/se/770x/irq.c
   3  *
   4  * Copyright (C) 2000  Kazumoto Kojima
   5  * Copyright (C) 2006  Nobuhiro Iwamatsu
   6  *
   7  * Hitachi SolutionEngine Support.
   8  *
   9  */
  10
  11 #include <linux/init.h>
  12 #include <linux/interrupt.h>
  13 #include <linux/irq.h>
  14 #include <asm/irq.h>
  15 #include <asm/io.h>
  16 #include <mach-se/mach/se.h>
  17
  18 static struct ipr_data ipr_irq_table[] = {
  19         /*
  20         * Super I/O (Just mimic PC):
  21         *  1: keyboard
  22         *  3: serial 0
  23         *  4: serial 1
  24         *  5: printer
  25         *  6: floppy
  26         *  8: rtc
  27         * 12: mouse
  28         * 14: ide0
  29         */
  30 #if defined(CONFIG_CPU_SUBTYPE_SH7705)
  31         /* This is default value */
  32         { 13, 0, 8,  0x0f-13, },
  33         { 5 , 0, 4,  0x0f- 5, },
  34         { 10, 1, 0,  0x0f-10, },
  35         { 7 , 2, 4,  0x0f- 7, },
  36         { 3 , 2, 0,  0x0f- 3, },
  37         { 1 , 3, 12, 0x0f- 1, },
  38         { 12, 3, 4,  0x0f-12, }, /* LAN */
  39         { 2 , 4, 8,  0x0f- 2, }, /* PCIRQ2 */
  40         { 6 , 4, 4,  0x0f- 6, }, /* PCIRQ1 */
  41         { 14, 4, 0,  0x0f-14, }, /* PCIRQ0 */
  42         { 0 , 5, 12, 0x0f   , },
  43         { 4 , 5, 4,  0x0f- 4, },
  44         { 8 , 6, 12, 0x0f- 8, },
  45         { 9 , 6, 8,  0x0f- 9, },
  46         { 11, 6, 4,  0x0f-11, },
  47 #else
  48         { 14, 0,  8, 0x0f-14, },
  49         { 12, 0,  4, 0x0f-12, },
  50         {  8, 1,  4, 0x0f- 8, },
  51         {  6, 2, 12, 0x0f- 6, },
  52         {  5, 2,  8, 0x0f- 5, },
  53         {  4, 2,  4, 0x0f- 4, },
  54         {  3, 2,  0, 0x0f- 3, },
  55         {  1, 3, 12, 0x0f- 1, },
  56 #if defined(CONFIG_STNIC)
  57         /* ST NIC */
  58         { 10, 3,  4, 0x0f-10, },        /* LAN */
  59 #endif
  60         /* MRSHPC IRQs setting */
  61         {  0, 4, 12, 0x0f- 0, },        /* PCIRQ3 */
  62         { 11, 4,  8, 0x0f-11, },        /* PCIRQ2 */
  63         {  9, 4,  4, 0x0f- 9, },        /* PCIRQ1 */
  64         {  7, 4,  0, 0x0f- 7, },        /* PCIRQ0 */
  65         /* #2, #13 are allocated for SLOT IRQ #1 and #2 (for now) */
  66         /* NOTE: #2 and #13 are not used on PC */
  67         { 13, 6,  4, 0x0f-13, },        /* SLOTIRQ2 */
  68         {  2, 6,  0, 0x0f- 2, },        /* SLOTIRQ1 */
  69 #endif
  70 };
  71
  72 static unsigned long ipr_offsets[] = {
  73         BCR_ILCRA,
  74         BCR_ILCRB,
  75         BCR_ILCRC,
  76         BCR_ILCRD,
  77         BCR_ILCRE,
  78         BCR_ILCRF,
  79         BCR_ILCRG,
  80 };
  81
  82 static struct ipr_desc ipr_irq_desc = {
  83         .ipr_offsets    = ipr_offsets,
  84         .nr_offsets     = ARRAY_SIZE(ipr_offsets),
  85
  86         .ipr_data       = ipr_irq_table,
  87         .nr_irqs        = ARRAY_SIZE(ipr_irq_table),
  88         .chip = {
  89                 .name   = "IPR-se770x",
  90         },
  91 };
  92
  93 /*
  94  * Initialize IRQ setting
  95  */
  96 void __init init_se_IRQ(void)
  97 {
  98         /* Disable all interrupts */
  99         __raw_writew(0, BCR_ILCRA);
 100         __raw_writew(0, BCR_ILCRB);
 101         __raw_writew(0, BCR_ILCRC);
 102         __raw_writew(0, BCR_ILCRD);
 103         __raw_writew(0, BCR_ILCRE);
 104         __raw_writew(0, BCR_ILCRF);
 105         __raw_writew(0, BCR_ILCRG);
 106
 107         register_ipr_controller(&ipr_irq_desc);
 108 }