2 * Copyright (C) 2011 Sascha Hauer, Pengutronix <s.hauer@pengutronix.de>
4 * This program is free software; you can redistribute it and/or modify
5 * it under the terms of the GNU General Public License version 2 as
6 * published by the Free Software Foundation.
8 * Standard functionality for the common clock API.
10 #include <linux/module.h>
11 #include <linux/clk-provider.h>
12 #include <linux/slab.h>
13 #include <linux/err.h>
15 #include <linux/platform_device.h>
18 * DOC: basic fixed multiplier and divider clock that cannot gate
20 * Traits of this clock:
21 * prepare - clk_prepare only ensures that parents are prepared
22 * enable - clk_enable only ensures that parents are enabled
23 * rate - rate is fixed. clk->rate = parent->rate / div * mult
24 * parent - fixed parent. No clk_set_parent support
27 static unsigned long clk_factor_recalc_rate(struct clk_hw
*hw
,
28 unsigned long parent_rate
)
30 struct clk_fixed_factor
*fix
= to_clk_fixed_factor(hw
);
31 unsigned long long int rate
;
33 rate
= (unsigned long long int)parent_rate
* fix
->mult
;
34 do_div(rate
, fix
->div
);
35 return (unsigned long)rate
;
38 static long clk_factor_round_rate(struct clk_hw
*hw
, unsigned long rate
,
41 struct clk_fixed_factor
*fix
= to_clk_fixed_factor(hw
);
43 if (clk_hw_get_flags(hw
) & CLK_SET_RATE_PARENT
) {
44 unsigned long best_parent
;
46 best_parent
= (rate
/ fix
->mult
) * fix
->div
;
47 *prate
= clk_hw_round_rate(clk_hw_get_parent(hw
), best_parent
);
50 return (*prate
/ fix
->div
) * fix
->mult
;
53 static int clk_factor_set_rate(struct clk_hw
*hw
, unsigned long rate
,
54 unsigned long parent_rate
)
57 * We must report success but we can do so unconditionally because
58 * clk_factor_round_rate returns values that ensure this call is a
65 const struct clk_ops clk_fixed_factor_ops
= {
66 .round_rate
= clk_factor_round_rate
,
67 .set_rate
= clk_factor_set_rate
,
68 .recalc_rate
= clk_factor_recalc_rate
,
70 EXPORT_SYMBOL_GPL(clk_fixed_factor_ops
);
72 struct clk_hw
*clk_hw_register_fixed_factor(struct device
*dev
,
73 const char *name
, const char *parent_name
, unsigned long flags
,
74 unsigned int mult
, unsigned int div
)
76 struct clk_fixed_factor
*fix
;
77 struct clk_init_data init
;
81 fix
= kmalloc(sizeof(*fix
), GFP_KERNEL
);
83 return ERR_PTR(-ENOMEM
);
85 /* struct clk_fixed_factor assignments */
91 init
.ops
= &clk_fixed_factor_ops
;
92 init
.flags
= flags
| CLK_IS_BASIC
;
93 init
.parent_names
= &parent_name
;
97 ret
= clk_hw_register(dev
, hw
);
105 EXPORT_SYMBOL_GPL(clk_hw_register_fixed_factor
);
107 struct clk
*clk_register_fixed_factor(struct device
*dev
, const char *name
,
108 const char *parent_name
, unsigned long flags
,
109 unsigned int mult
, unsigned int div
)
113 hw
= clk_hw_register_fixed_factor(dev
, name
, parent_name
, flags
, mult
,
119 EXPORT_SYMBOL_GPL(clk_register_fixed_factor
);
121 void clk_unregister_fixed_factor(struct clk
*clk
)
125 hw
= __clk_get_hw(clk
);
130 kfree(to_clk_fixed_factor(hw
));
132 EXPORT_SYMBOL_GPL(clk_unregister_fixed_factor
);
134 void clk_hw_unregister_fixed_factor(struct clk_hw
*hw
)
136 struct clk_fixed_factor
*fix
;
138 fix
= to_clk_fixed_factor(hw
);
140 clk_hw_unregister(hw
);
143 EXPORT_SYMBOL_GPL(clk_hw_unregister_fixed_factor
);
146 static const struct of_device_id set_rate_parent_matches
[] = {
147 { .compatible
= "allwinner,sun4i-a10-pll3-2x-clk" },
151 static struct clk
*_of_fixed_factor_clk_setup(struct device_node
*node
)
154 const char *clk_name
= node
->name
;
155 const char *parent_name
;
156 unsigned long flags
= 0;
160 if (of_property_read_u32(node
, "clock-div", &div
)) {
161 pr_err("%s Fixed factor clock <%s> must have a clock-div property\n",
162 __func__
, node
->name
);
163 return ERR_PTR(-EIO
);
166 if (of_property_read_u32(node
, "clock-mult", &mult
)) {
167 pr_err("%s Fixed factor clock <%s> must have a clock-mult property\n",
168 __func__
, node
->name
);
169 return ERR_PTR(-EIO
);
172 of_property_read_string(node
, "clock-output-names", &clk_name
);
173 parent_name
= of_clk_get_parent_name(node
, 0);
175 if (of_match_node(set_rate_parent_matches
, node
))
176 flags
|= CLK_SET_RATE_PARENT
;
178 clk
= clk_register_fixed_factor(NULL
, clk_name
, parent_name
, flags
,
182 * If parent clock is not registered, registration would fail.
183 * Clear OF_POPULATED flag so that clock registration can be
184 * attempted again from probe function.
186 of_node_clear_flag(node
, OF_POPULATED
);
190 ret
= of_clk_add_provider(node
, of_clk_src_simple_get
, clk
);
200 * of_fixed_factor_clk_setup() - Setup function for simple fixed factor clock
202 void __init
of_fixed_factor_clk_setup(struct device_node
*node
)
204 _of_fixed_factor_clk_setup(node
);
206 CLK_OF_DECLARE(fixed_factor_clk
, "fixed-factor-clock",
207 of_fixed_factor_clk_setup
);
209 static int of_fixed_factor_clk_remove(struct platform_device
*pdev
)
211 struct clk
*clk
= platform_get_drvdata(pdev
);
213 of_clk_del_provider(pdev
->dev
.of_node
);
214 clk_unregister_fixed_factor(clk
);
219 static int of_fixed_factor_clk_probe(struct platform_device
*pdev
)
224 * This function is not executed when of_fixed_factor_clk_setup
227 clk
= _of_fixed_factor_clk_setup(pdev
->dev
.of_node
);
231 platform_set_drvdata(pdev
, clk
);
236 static const struct of_device_id of_fixed_factor_clk_ids
[] = {
237 { .compatible
= "fixed-factor-clock" },
240 MODULE_DEVICE_TABLE(of
, of_fixed_factor_clk_ids
);
242 static struct platform_driver of_fixed_factor_clk_driver
= {
244 .name
= "of_fixed_factor_clk",
245 .of_match_table
= of_fixed_factor_clk_ids
,
247 .probe
= of_fixed_factor_clk_probe
,
248 .remove
= of_fixed_factor_clk_remove
,
250 builtin_platform_driver(of_fixed_factor_clk_driver
);