2 * Copyright (C) 2004, 2007-2010, 2011-2012 Synopsys, Inc. (www.synopsys.com)
4 * This program is free software; you can redistribute it and/or modify
5 * it under the terms of the GNU General Public License version 2 as
6 * published by the Free Software Foundation.
9 #include <linux/dma-noncoherent.h>
10 #include <asm/cache.h>
11 #include <asm/cacheflush.h>
14 * ARCH specific callbacks for generic noncoherent DMA ops (dma/noncoherent.c)
15 * - hardware IOC not available (or "dma-coherent" not set for device in DT)
16 * - But still handle both coherent and non-coherent requests from caller
18 * For DMA coherent hardware (IOC) generic code suffices
20 void *arch_dma_alloc(struct device
*dev
, size_t size
, dma_addr_t
*dma_handle
,
21 gfp_t gfp
, unsigned long attrs
)
23 unsigned long order
= get_order(size
);
27 bool need_coh
= !(attrs
& DMA_ATTR_NON_CONSISTENT
);
30 * __GFP_HIGHMEM flag is cleared by upper layer functions
31 * (in include/linux/dma-mapping.h) so we should never get a
34 BUG_ON(gfp
& __GFP_HIGHMEM
);
36 page
= alloc_pages(gfp
| __GFP_ZERO
, order
);
40 /* This is linear addr (0x8000_0000 based) */
41 paddr
= page_to_phys(page
);
46 * A coherent buffer needs MMU mapping to enforce non-cachability.
47 * kvaddr is kernel Virtual address (0x7000_0000 based).
50 kvaddr
= ioremap_nocache(paddr
, size
);
52 __free_pages(page
, order
);
56 kvaddr
= (void *)(u32
)paddr
;
60 * Evict any existing L1 and/or L2 lines for the backing page
61 * in case it was used earlier as a normal "cached" page.
62 * Yeah this bit us - STAR 9000898266
64 * Although core does call flush_cache_vmap(), it gets kvaddr hence
65 * can't be used to efficiently flush L1 and/or L2 which need paddr
66 * Currently flush_cache_vmap nukes the L1 cache completely which
67 * will be optimized as a separate commit
70 dma_cache_wback_inv(paddr
, size
);
75 void arch_dma_free(struct device
*dev
, size_t size
, void *vaddr
,
76 dma_addr_t dma_handle
, unsigned long attrs
)
78 phys_addr_t paddr
= dma_handle
;
79 struct page
*page
= virt_to_page(paddr
);
81 if (!(attrs
& DMA_ATTR_NON_CONSISTENT
))
82 iounmap((void __force __iomem
*)vaddr
);
84 __free_pages(page
, get_order(size
));
87 long arch_dma_coherent_to_pfn(struct device
*dev
, void *cpu_addr
,
90 return __phys_to_pfn(dma_addr
);
94 * Cache operations depending on function and direction argument, inspired by
95 * https://lkml.org/lkml/2018/5/18/979
96 * "dma_sync_*_for_cpu and direction=TO_DEVICE (was Re: [PATCH 02/20]
97 * dma-mapping: provide a generic dma-noncoherent implementation)"
99 * | map == for_device | unmap == for_cpu
100 * |----------------------------------------------------------------
101 * TO_DEV | writeback writeback | none none
102 * FROM_DEV | invalidate invalidate | invalidate* invalidate*
103 * BIDIR | writeback+inv writeback+inv | invalidate invalidate
105 * [*] needed for CPU speculative prefetches
107 * NOTE: we don't check the validity of direction argument as it is done in
108 * upper layer functions (in include/linux/dma-mapping.h)
111 void arch_sync_dma_for_device(struct device
*dev
, phys_addr_t paddr
,
112 size_t size
, enum dma_data_direction dir
)
116 dma_cache_wback(paddr
, size
);
119 case DMA_FROM_DEVICE
:
120 dma_cache_inv(paddr
, size
);
123 case DMA_BIDIRECTIONAL
:
124 dma_cache_wback_inv(paddr
, size
);
132 void arch_sync_dma_for_cpu(struct device
*dev
, phys_addr_t paddr
,
133 size_t size
, enum dma_data_direction dir
)
139 /* FROM_DEVICE invalidate needed if speculative CPU prefetch only */
140 case DMA_FROM_DEVICE
:
141 case DMA_BIDIRECTIONAL
:
142 dma_cache_inv(paddr
, size
);
151 * Plug in direct dma map ops.
153 void arch_setup_dma_ops(struct device
*dev
, u64 dma_base
, u64 size
,
154 const struct iommu_ops
*iommu
, bool coherent
)
157 * IOC hardware snoops all DMA traffic keeping the caches consistent
158 * with memory - eliding need for any explicit cache maintenance of
161 if (is_isa_arcv2() && ioc_enable
&& coherent
)
162 dev
->dma_coherent
= true;
164 dev_info(dev
, "use %sncoherent DMA ops\n",
165 dev
->dma_coherent
? "" : "non");