arch/arm64/kernel/setup.c

   1 /*
   2  * Based on arch/arm/kernel/setup.c
   3  *
   4  * Copyright (C) 1995-2001 Russell King
   5  * Copyright (C) 2012 ARM Ltd.
   6  *
   7  * This program is free software; you can redistribute it and/or modify
   8  * it under the terms of the GNU General Public License version 2 as
   9  * published by the Free Software Foundation.
  10  *
  11  * This program is distributed in the hope that it will be useful,
  12  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  13  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  14  * GNU General Public License for more details.
  15  *
  16  * You should have received a copy of the GNU General Public License
  17  * along with this program.  If not, see <http://www.gnu.org/licenses/>.
  18  */
  19
  20 #include <linux/acpi.h>
  21 #include <linux/export.h>
  22 #include <linux/kernel.h>
  23 #include <linux/stddef.h>
  24 #include <linux/ioport.h>
  25 #include <linux/delay.h>
  26 #include <linux/initrd.h>
  27 #include <linux/console.h>
  28 #include <linux/cache.h>
  29 #include <linux/screen_info.h>
  30 #include <linux/init.h>
  31 #include <linux/kexec.h>
  32 #include <linux/root_dev.h>
  33 #include <linux/cpu.h>
  34 #include <linux/interrupt.h>
  35 #include <linux/smp.h>
  36 #include <linux/fs.h>
  37 #include <linux/proc_fs.h>
  38 #include <linux/memblock.h>
  39 #include <linux/of_fdt.h>
  40 #include <linux/efi.h>
  41 #include <linux/psci.h>
  42 #include <linux/sched/task.h>
  43 #include <linux/mm.h>
  44
  45 #include <asm/acpi.h>
  46 #include <asm/fixmap.h>
  47 #include <asm/cpu.h>
  48 #include <asm/cputype.h>
  49 #include <asm/daifflags.h>
  50 #include <asm/elf.h>
  51 #include <asm/cpufeature.h>
  52 #include <asm/cpu_ops.h>
  53 #include <asm/kasan.h>
  54 #include <asm/numa.h>
  55 #include <asm/sections.h>
  56 #include <asm/setup.h>
  57 #include <asm/smp_plat.h>
  58 #include <asm/cacheflush.h>
  59 #include <asm/tlbflush.h>
  60 #include <asm/traps.h>
  61 #include <asm/efi.h>
  62 #include <asm/xen/hypervisor.h>
  63 #include <asm/mmu_context.h>
  64
  65 static int num_standard_resources;
  66 static struct resource *standard_resources;
  67
  68 phys_addr_t __fdt_pointer __initdata;
  69
  70 /*
  71  * Standard memory resources
  72  */
  73 static struct resource mem_res[] = {
  74         {
  75                 .name = "Kernel code",
  76                 .start = 0,
  77                 .end = 0,
  78                 .flags = IORESOURCE_SYSTEM_RAM
  79         },
  80         {
  81                 .name = "Kernel data",
  82                 .start = 0,
  83                 .end = 0,
  84                 .flags = IORESOURCE_SYSTEM_RAM
  85         }
  86 };
  87
  88 #define kernel_code mem_res[0]
  89 #define kernel_data mem_res[1]
  90
  91 /*
  92  * The recorded values of x0 .. x3 upon kernel entry.
  93  */
  94 u64 __cacheline_aligned boot_args[4];
  95
  96 void __init smp_setup_processor_id(void)
  97 {
  98         u64 mpidr = read_cpuid_mpidr() & MPIDR_HWID_BITMASK;
  99         cpu_logical_map(0) = mpidr;
 100
 101         /*
 102          * clear __my_cpu_offset on boot CPU to avoid hang caused by
 103          * using percpu variable early, for example, lockdep will
 104          * access percpu variable inside lock_release
 105          */
 106         set_my_cpu_offset(0);
 107         pr_info("Booting Linux on physical CPU 0x%010lx [0x%08x]\n",
 108                 (unsigned long)mpidr, read_cpuid_id());
 109 }
 110
 111 bool arch_match_cpu_phys_id(int cpu, u64 phys_id)
 112 {
 113         return phys_id == cpu_logical_map(cpu);
 114 }
 115
 116 struct mpidr_hash mpidr_hash;
 117 /**
 118  * smp_build_mpidr_hash - Pre-compute shifts required at each affinity
 119  *                        level in order to build a linear index from an
 120  *                        MPIDR value. Resulting algorithm is a collision
 121  *                        free hash carried out through shifting and ORing
 122  */
 123 static void __init smp_build_mpidr_hash(void)
 124 {
 125         u32 i, affinity, fs[4], bits[4], ls;
 126         u64 mask = 0;
 127         /*
 128          * Pre-scan the list of MPIDRS and filter out bits that do
 129          * not contribute to affinity levels, ie they never toggle.
 130          */
 131         for_each_possible_cpu(i)
 132                 mask |= (cpu_logical_map(i) ^ cpu_logical_map(0));
 133         pr_debug("mask of set bits %#llx\n", mask);
 134         /*
 135          * Find and stash the last and first bit set at all affinity levels to
 136          * check how many bits are required to represent them.
 137          */
 138         for (i = 0; i < 4; i++) {
 139                 affinity = MPIDR_AFFINITY_LEVEL(mask, i);
 140                 /*
 141                  * Find the MSB bit and LSB bits position
 142                  * to determine how many bits are required
 143                  * to express the affinity level.
 144                  */
 145                 ls = fls(affinity);
 146                 fs[i] = affinity ? ffs(affinity) - 1 : 0;
 147                 bits[i] = ls - fs[i];
 148         }
 149         /*
 150          * An index can be created from the MPIDR_EL1 by isolating the
 151          * significant bits at each affinity level and by shifting
 152          * them in order to compress the 32 bits values space to a
 153          * compressed set of values. This is equivalent to hashing
 154          * the MPIDR_EL1 through shifting and ORing. It is a collision free
 155          * hash though not minimal since some levels might contain a number
 156          * of CPUs that is not an exact power of 2 and their bit
 157          * representation might contain holes, eg MPIDR_EL1[7:0] = {0x2, 0x80}.
 158          */
 159         mpidr_hash.shift_aff[0] = MPIDR_LEVEL_SHIFT(0) + fs[0];
 160         mpidr_hash.shift_aff[1] = MPIDR_LEVEL_SHIFT(1) + fs[1] - bits[0];
 161         mpidr_hash.shift_aff[2] = MPIDR_LEVEL_SHIFT(2) + fs[2] -
 162                                                 (bits[1] + bits[0]);
 163         mpidr_hash.shift_aff[3] = MPIDR_LEVEL_SHIFT(3) +
 164                                   fs[3] - (bits[2] + bits[1] + bits[0]);
 165         mpidr_hash.mask = mask;
 166         mpidr_hash.bits = bits[3] + bits[2] + bits[1] + bits[0];
 167         pr_debug("MPIDR hash: aff0[%u] aff1[%u] aff2[%u] aff3[%u] mask[%#llx] bits[%u]\n",
 168                 mpidr_hash.shift_aff[0],
 169                 mpidr_hash.shift_aff[1],
 170                 mpidr_hash.shift_aff[2],
 171                 mpidr_hash.shift_aff[3],
 172                 mpidr_hash.mask,
 173                 mpidr_hash.bits);
 174         /*
 175          * 4x is an arbitrary value used to warn on a hash table much bigger
 176          * than expected on most systems.
 177          */
 178         if (mpidr_hash_size() > 4 * num_possible_cpus())
 179                 pr_warn("Large number of MPIDR hash buckets detected\n");
 180 }
 181
 182 static void __init setup_machine_fdt(phys_addr_t dt_phys)
 183 {
 184         void *dt_virt = fixmap_remap_fdt(dt_phys);
 185         const char *name;
 186
 187         if (!dt_virt || !early_init_dt_scan(dt_virt)) {
 188                 pr_crit("\n"
 189                         "Error: invalid device tree blob at physical address %pa (virtual address 0x%p)\n"
 190                         "The dtb must be 8-byte aligned and must not exceed 2 MB in size\n"
 191                         "\nPlease check your bootloader.",
 192                         &dt_phys, dt_virt);
 193
 194                 while (true)
 195                         cpu_relax();
 196         }
 197
 198         name = of_flat_dt_get_machine_name();
 199         if (!name)
 200                 return;
 201
 202         pr_info("Machine model: %s\n", name);
 203         dump_stack_set_arch_desc("%s (DT)", name);
 204 }
 205
 206 static void __init request_standard_resources(void)
 207 {
 208         struct memblock_region *region;
 209         struct resource *res;
 210         unsigned long i = 0;
 211         size_t res_size;
 212
 213         kernel_code.start   = __pa_symbol(_text);
 214         kernel_code.end     = __pa_symbol(__init_begin - 1);
 215         kernel_data.start   = __pa_symbol(_sdata);
 216         kernel_data.end     = __pa_symbol(_end - 1);
 217
 218         num_standard_resources = memblock.memory.cnt;
 219         res_size = num_standard_resources * sizeof(*standard_resources);
 220         standard_resources = memblock_alloc(res_size, SMP_CACHE_BYTES);
 221         if (!standard_resources)
 222                 panic("%s: Failed to allocate %zu bytes\n", __func__, res_size);
 223
 224         for_each_memblock(memory, region) {
 225                 res = &standard_resources[i++];
 226                 if (memblock_is_nomap(region)) {
 227                         res->name  = "reserved";
 228                         res->flags = IORESOURCE_MEM;
 229                 } else {
 230                         res->name  = "System RAM";
 231                         res->flags = IORESOURCE_SYSTEM_RAM | IORESOURCE_BUSY;
 232                 }
 233                 res->start = __pfn_to_phys(memblock_region_memory_base_pfn(region));
 234                 res->end = __pfn_to_phys(memblock_region_memory_end_pfn(region)) - 1;
 235
 236                 request_resource(&iomem_resource, res);
 237
 238                 if (kernel_code.start >= res->start &&
 239                     kernel_code.end <= res->end)
 240                         request_resource(res, &kernel_code);
 241                 if (kernel_data.start >= res->start &&
 242                     kernel_data.end <= res->end)
 243                         request_resource(res, &kernel_data);
 244 #ifdef CONFIG_KEXEC_CORE
 245                 /* Userspace will find "Crash kernel" region in /proc/iomem. */
 246                 if (crashk_res.end && crashk_res.start >= res->start &&
 247                     crashk_res.end <= res->end)
 248                         request_resource(res, &crashk_res);
 249 #endif
 250         }
 251 }
 252
 253 static int __init reserve_memblock_reserved_regions(void)
 254 {
 255         u64 i, j;
 256
 257         for (i = 0; i < num_standard_resources; ++i) {
 258                 struct resource *mem = &standard_resources[i];
 259                 phys_addr_t r_start, r_end, mem_size = resource_size(mem);
 260
 261                 if (!memblock_is_region_reserved(mem->start, mem_size))
 262                         continue;
 263
 264                 for_each_reserved_mem_region(j, &r_start, &r_end) {
 265                         resource_size_t start, end;
 266
 267                         start = max(PFN_PHYS(PFN_DOWN(r_start)), mem->start);
 268                         end = min(PFN_PHYS(PFN_UP(r_end)) - 1, mem->end);
 269
 270                         if (start > mem->end || end < mem->start)
 271                                 continue;
 272
 273                         reserve_region_with_split(mem, start, end, "reserved");
 274                 }
 275         }
 276
 277         return 0;
 278 }
 279 arch_initcall(reserve_memblock_reserved_regions);
 280
 281 u64 __cpu_logical_map[NR_CPUS] = { [0 ... NR_CPUS-1] = INVALID_HWID };
 282
 283 void __init setup_arch(char **cmdline_p)
 284 {
 285         init_mm.start_code = (unsigned long) _text;
 286         init_mm.end_code   = (unsigned long) _etext;
 287         init_mm.end_data   = (unsigned long) _edata;
 288         init_mm.brk        = (unsigned long) _end;
 289
 290         *cmdline_p = boot_command_line;
 291
 292         early_fixmap_init();
 293         early_ioremap_init();
 294
 295         setup_machine_fdt(__fdt_pointer);
 296
 297         parse_early_param();
 298
 299         /*
 300          * Unmask asynchronous aborts and fiq after bringing up possible
 301          * earlycon. (Report possible System Errors once we can report this
 302          * occurred).
 303          */
 304         local_daif_restore(DAIF_PROCCTX_NOIRQ);
 305
 306         /*
 307          * TTBR0 is only used for the identity mapping at this stage. Make it
 308          * point to zero page to avoid speculatively fetching new entries.
 309          */
 310         cpu_uninstall_idmap();
 311
 312         xen_early_init();
 313         efi_init();
 314         arm64_memblock_init();
 315
 316         paging_init();
 317
 318         acpi_table_upgrade();
 319
 320         /* Parse the ACPI tables for possible boot-time configuration */
 321         acpi_boot_table_init();
 322
 323         if (acpi_disabled)
 324                 unflatten_device_tree();
 325
 326         bootmem_init();
 327
 328         kasan_init();
 329
 330         request_standard_resources();
 331
 332         early_ioremap_reset();
 333
 334         if (acpi_disabled)
 335                 psci_dt_init();
 336         else
 337                 psci_acpi_init();
 338
 339         cpu_read_bootcpu_ops();
 340         smp_init_cpus();
 341         smp_build_mpidr_hash();
 342
 343         /* Init percpu seeds for random tags after cpus are set up. */
 344         kasan_init_tags();
 345
 346 #ifdef CONFIG_ARM64_SW_TTBR0_PAN
 347         /*
 348          * Make sure init_thread_info.ttbr0 always generates translation
 349          * faults in case uaccess_enable() is inadvertently called by the init
 350          * thread.
 351          */
 352         init_task.thread_info.ttbr0 = __pa_symbol(empty_zero_page);
 353 #endif
 354
 355 #ifdef CONFIG_VT
 356         conswitchp = &dummy_con;
 357 #endif
 358         if (boot_args[1] || boot_args[2] || boot_args[3]) {
 359                 pr_err("WARNING: x1-x3 nonzero in violation of boot protocol:\n"
 360                         "\tx1: %016llx\n\tx2: %016llx\n\tx3: %016llx\n"
 361                         "This indicates a broken bootloader or old kernel\n",
 362                         boot_args[1], boot_args[2], boot_args[3]);
 363         }
 364 }
 365
 366 static int __init topology_init(void)
 367 {
 368         int i;
 369
 370         for_each_online_node(i)
 371                 register_one_node(i);
 372
 373         for_each_possible_cpu(i) {
 374                 struct cpu *cpu = &per_cpu(cpu_data.cpu, i);
 375                 cpu->hotpluggable = 1;
 376                 register_cpu(cpu, i);
 377         }
 378
 379         return 0;
 380 }
 381 subsys_initcall(topology_init);
 382
 383 /*
 384  * Dump out kernel offset information on panic.
 385  */
 386 static int dump_kernel_offset(struct notifier_block *self, unsigned long v,
 387                               void *p)
 388 {
 389         const unsigned long offset = kaslr_offset();
 390
 391         if (IS_ENABLED(CONFIG_RANDOMIZE_BASE) && offset > 0) {
 392                 pr_emerg("Kernel Offset: 0x%lx from 0x%lx\n",
 393                          offset, KIMAGE_VADDR);
 394                 pr_emerg("PHYS_OFFSET: 0x%llx\n", PHYS_OFFSET);
 395         } else {
 396                 pr_emerg("Kernel Offset: disabled\n");
 397         }
 398         return 0;
 399 }
 400
 401 static struct notifier_block kernel_offset_notifier = {
 402         .notifier_call = dump_kernel_offset
 403 };
 404
 405 static int __init register_kernel_offset_dumper(void)
 406 {
 407         atomic_notifier_chain_register(&panic_notifier_list,
 408                                        &kernel_offset_notifier);
 409         return 0;
 410 }
 411 __initcall(register_kernel_offset_dumper);