6 config HAVE_CLK_PREPARE
9 config HAVE_MACH_CLKDEV
14 select HAVE_CLK_PREPARE
18 The common clock framework is a single definition of struct
19 clk, useful across many platforms, as well as an
20 implementation of the clock API in include/linux/clk.h.
21 Architectures utilizing the common struct clk should select
24 menu "Common Clock Framework"
27 config COMMON_CLK_WM831X
28 tristate "Clock driver for WM831x/2x PMICs"
31 Supports the clocking subsystem of the WM831x/2x series of
32 PMICs from Wolfson Microelectronics.
34 source "drivers/clk/versatile/Kconfig"
36 config COMMON_CLK_MAX_GEN
39 config COMMON_CLK_MAX77686
40 tristate "Clock driver for Maxim 77686 MFD"
41 depends on MFD_MAX77686
42 select COMMON_CLK_MAX_GEN
44 This driver supports Maxim 77686 crystal oscillator clock.
46 config COMMON_CLK_MAX77802
47 tristate "Clock driver for Maxim 77802 PMIC"
48 depends on MFD_MAX77686
49 select COMMON_CLK_MAX_GEN
51 This driver supports Maxim 77802 crystal oscillator clock.
53 config COMMON_CLK_RK808
54 tristate "Clock driver for RK808"
57 This driver supports RK808 crystal oscillator clock. These
58 multi-function devices have two fixed-rate oscillators,
59 clocked at 32KHz each. Clkout1 is always on, Clkout2 can off
62 config COMMON_CLK_SI5351
63 tristate "Clock driver for SiLabs 5351A/B/C"
68 This driver supports Silicon Labs 5351A/B/C programmable clock
71 config COMMON_CLK_SI570
72 tristate "Clock driver for SiLabs 570 and compatible devices"
78 This driver supports Silicon Labs 570/571/598/599 programmable
81 config COMMON_CLK_CDCE925
82 tristate "Clock driver for TI CDCE925 devices"
88 This driver supports the TI CDCE925 programmable clock synthesizer.
89 The chip contains two PLLs with spread-spectrum clocking support and
90 five output dividers. The driver only supports the following setup,
91 and uses a fixed setting for the output muxes.
92 Y1 is derived from the input clock
93 Y2 and Y3 derive from PLL1
94 Y4 and Y5 derive from PLL2
95 Given a target output frequency, the driver will set the PLL and
96 divider to best approximate the desired output.
98 config COMMON_CLK_S2MPS11
99 tristate "Clock driver for S2MPS1X/S5M8767 MFD"
100 depends on MFD_SEC_CORE
102 This driver supports S2MPS11/S2MPS14/S5M8767 crystal oscillator
103 clock. These multi-function devices have two (S2MPS14) or three
104 (S2MPS11, S5M8767) fixed-rate oscillators, clocked at 32KHz each.
107 tristate "External McPDM functional clock from twl6040"
108 depends on TWL6040_CORE
110 Enable the external functional clock support on OMAP4+ platforms for
111 McPDM. McPDM module is using the external bit clock on the McPDM bus
114 config COMMON_CLK_AXI_CLKGEN
115 tristate "AXI clkgen driver"
116 depends on ARCH_ZYNQ || MICROBLAZE
119 Support for the Analog Devices axi-clkgen pcore clock generator for Xilinx
120 FPGAs. It is commonly used in Analog Devices' reference designs.
123 bool "Clock driver for Freescale QorIQ platforms"
124 depends on (PPC_E500MC || ARM) && OF
126 This adds the clock driver support for Freescale QorIQ platforms
127 using common clock framework.
129 config COMMON_CLK_XGENE
130 bool "Clock driver for APM XGene SoC"
134 Sypport for the APM X-Gene SoC reference, PLL, and device clocks.
136 config COMMON_CLK_KEYSTONE
137 tristate "Clock drivers for Keystone based SOCs"
138 depends on ARCH_KEYSTONE && OF
140 Supports clock drivers for Keystone based SOCs. These SOCs have local
141 a power sleep control module that gate the clock to the IPs and PLLs.
143 config COMMON_CLK_PALMAS
144 tristate "Clock driver for TI Palmas devices"
145 depends on MFD_PALMAS
147 This driver supports TI Palmas devices 32KHz output KG and KG_AUDIO
148 using common clock framework.
150 config COMMON_CLK_PWM
151 tristate "Clock driver for PWMs used as clock outputs"
154 Adapter driver so that any PWM output can be (mis)used as clock signal
157 config COMMON_CLK_PXA
158 def_bool COMMON_CLK && ARCH_PXA
160 Sypport for the Marvell PXA SoC.
162 config COMMON_CLK_CDCE706
163 tristate "Clock driver for TI CDCE706 clock synthesizer"
168 This driver supports TI CDCE706 programmable 3-PLL clock synthesizer.
170 source "drivers/clk/bcm/Kconfig"
171 source "drivers/clk/hisilicon/Kconfig"
172 source "drivers/clk/qcom/Kconfig"
176 source "drivers/clk/mvebu/Kconfig"
178 source "drivers/clk/samsung/Kconfig"
179 source "drivers/clk/tegra/Kconfig"