2 * Copyright (c) 2013 NVIDIA CORPORATION. All rights reserved.
4 * This program is free software; you can redistribute it and/or modify it
5 * under the terms and conditions of the GNU General Public License,
6 * version 2, as published by the Free Software Foundation.
8 * This program is distributed in the hope it will be useful, but WITHOUT
9 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
10 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
13 * You should have received a copy of the GNU General Public License
14 * along with this program. If not, see <http://www.gnu.org/licenses/>.
17 #include <linux/clk.h>
18 #include <linux/clk-provider.h>
19 #include <linux/err.h>
20 #include <linux/slab.h>
22 #define to_clk_composite(_hw) container_of(_hw, struct clk_composite, hw)
24 static u8
clk_composite_get_parent(struct clk_hw
*hw
)
26 struct clk_composite
*composite
= to_clk_composite(hw
);
27 const struct clk_ops
*mux_ops
= composite
->mux_ops
;
28 struct clk_hw
*mux_hw
= composite
->mux_hw
;
30 __clk_hw_set_clk(mux_hw
, hw
);
32 return mux_ops
->get_parent(mux_hw
);
35 static int clk_composite_set_parent(struct clk_hw
*hw
, u8 index
)
37 struct clk_composite
*composite
= to_clk_composite(hw
);
38 const struct clk_ops
*mux_ops
= composite
->mux_ops
;
39 struct clk_hw
*mux_hw
= composite
->mux_hw
;
41 __clk_hw_set_clk(mux_hw
, hw
);
43 return mux_ops
->set_parent(mux_hw
, index
);
46 static unsigned long clk_composite_recalc_rate(struct clk_hw
*hw
,
47 unsigned long parent_rate
)
49 struct clk_composite
*composite
= to_clk_composite(hw
);
50 const struct clk_ops
*rate_ops
= composite
->rate_ops
;
51 struct clk_hw
*rate_hw
= composite
->rate_hw
;
53 __clk_hw_set_clk(rate_hw
, hw
);
55 return rate_ops
->recalc_rate(rate_hw
, parent_rate
);
58 static long clk_composite_determine_rate(struct clk_hw
*hw
, unsigned long rate
,
59 unsigned long min_rate
,
60 unsigned long max_rate
,
61 unsigned long *best_parent_rate
,
62 struct clk_hw
**best_parent_p
)
64 struct clk_composite
*composite
= to_clk_composite(hw
);
65 const struct clk_ops
*rate_ops
= composite
->rate_ops
;
66 const struct clk_ops
*mux_ops
= composite
->mux_ops
;
67 struct clk_hw
*rate_hw
= composite
->rate_hw
;
68 struct clk_hw
*mux_hw
= composite
->mux_hw
;
70 unsigned long parent_rate
;
71 long tmp_rate
, best_rate
= 0;
72 unsigned long rate_diff
;
73 unsigned long best_rate_diff
= ULONG_MAX
;
76 if (rate_hw
&& rate_ops
&& rate_ops
->determine_rate
) {
77 __clk_hw_set_clk(rate_hw
, hw
);
78 return rate_ops
->determine_rate(rate_hw
, rate
, min_rate
,
82 } else if (rate_hw
&& rate_ops
&& rate_ops
->round_rate
&&
83 mux_hw
&& mux_ops
&& mux_ops
->set_parent
) {
84 *best_parent_p
= NULL
;
86 if (__clk_get_flags(hw
->clk
) & CLK_SET_RATE_NO_REPARENT
) {
87 parent
= clk_get_parent(mux_hw
->clk
);
88 *best_parent_p
= __clk_get_hw(parent
);
89 *best_parent_rate
= __clk_get_rate(parent
);
91 return rate_ops
->round_rate(rate_hw
, rate
,
95 for (i
= 0; i
< __clk_get_num_parents(mux_hw
->clk
); i
++) {
96 parent
= clk_get_parent_by_index(mux_hw
->clk
, i
);
100 parent_rate
= __clk_get_rate(parent
);
102 tmp_rate
= rate_ops
->round_rate(rate_hw
, rate
,
107 rate_diff
= abs(rate
- tmp_rate
);
109 if (!rate_diff
|| !*best_parent_p
110 || best_rate_diff
> rate_diff
) {
111 *best_parent_p
= __clk_get_hw(parent
);
112 *best_parent_rate
= parent_rate
;
113 best_rate_diff
= rate_diff
;
114 best_rate
= tmp_rate
;
122 } else if (mux_hw
&& mux_ops
&& mux_ops
->determine_rate
) {
123 __clk_hw_set_clk(mux_hw
, hw
);
124 return mux_ops
->determine_rate(mux_hw
, rate
, min_rate
,
125 max_rate
, best_parent_rate
,
128 pr_err("clk: clk_composite_determine_rate function called, but no mux or rate callback set!\n");
133 static long clk_composite_round_rate(struct clk_hw
*hw
, unsigned long rate
,
134 unsigned long *prate
)
136 struct clk_composite
*composite
= to_clk_composite(hw
);
137 const struct clk_ops
*rate_ops
= composite
->rate_ops
;
138 struct clk_hw
*rate_hw
= composite
->rate_hw
;
140 __clk_hw_set_clk(rate_hw
, hw
);
142 return rate_ops
->round_rate(rate_hw
, rate
, prate
);
145 static int clk_composite_set_rate(struct clk_hw
*hw
, unsigned long rate
,
146 unsigned long parent_rate
)
148 struct clk_composite
*composite
= to_clk_composite(hw
);
149 const struct clk_ops
*rate_ops
= composite
->rate_ops
;
150 struct clk_hw
*rate_hw
= composite
->rate_hw
;
152 __clk_hw_set_clk(rate_hw
, hw
);
154 return rate_ops
->set_rate(rate_hw
, rate
, parent_rate
);
157 static int clk_composite_is_enabled(struct clk_hw
*hw
)
159 struct clk_composite
*composite
= to_clk_composite(hw
);
160 const struct clk_ops
*gate_ops
= composite
->gate_ops
;
161 struct clk_hw
*gate_hw
= composite
->gate_hw
;
163 __clk_hw_set_clk(gate_hw
, hw
);
165 return gate_ops
->is_enabled(gate_hw
);
168 static int clk_composite_enable(struct clk_hw
*hw
)
170 struct clk_composite
*composite
= to_clk_composite(hw
);
171 const struct clk_ops
*gate_ops
= composite
->gate_ops
;
172 struct clk_hw
*gate_hw
= composite
->gate_hw
;
174 __clk_hw_set_clk(gate_hw
, hw
);
176 return gate_ops
->enable(gate_hw
);
179 static void clk_composite_disable(struct clk_hw
*hw
)
181 struct clk_composite
*composite
= to_clk_composite(hw
);
182 const struct clk_ops
*gate_ops
= composite
->gate_ops
;
183 struct clk_hw
*gate_hw
= composite
->gate_hw
;
185 __clk_hw_set_clk(gate_hw
, hw
);
187 gate_ops
->disable(gate_hw
);
190 struct clk
*clk_register_composite(struct device
*dev
, const char *name
,
191 const char * const *parent_names
, int num_parents
,
192 struct clk_hw
*mux_hw
, const struct clk_ops
*mux_ops
,
193 struct clk_hw
*rate_hw
, const struct clk_ops
*rate_ops
,
194 struct clk_hw
*gate_hw
, const struct clk_ops
*gate_ops
,
198 struct clk_init_data init
;
199 struct clk_composite
*composite
;
200 struct clk_ops
*clk_composite_ops
;
202 composite
= kzalloc(sizeof(*composite
), GFP_KERNEL
);
204 return ERR_PTR(-ENOMEM
);
207 init
.flags
= flags
| CLK_IS_BASIC
;
208 init
.parent_names
= parent_names
;
209 init
.num_parents
= num_parents
;
211 clk_composite_ops
= &composite
->ops
;
213 if (mux_hw
&& mux_ops
) {
214 if (!mux_ops
->get_parent
) {
215 clk
= ERR_PTR(-EINVAL
);
219 composite
->mux_hw
= mux_hw
;
220 composite
->mux_ops
= mux_ops
;
221 clk_composite_ops
->get_parent
= clk_composite_get_parent
;
222 if (mux_ops
->set_parent
)
223 clk_composite_ops
->set_parent
= clk_composite_set_parent
;
224 if (mux_ops
->determine_rate
)
225 clk_composite_ops
->determine_rate
= clk_composite_determine_rate
;
228 if (rate_hw
&& rate_ops
) {
229 if (!rate_ops
->recalc_rate
) {
230 clk
= ERR_PTR(-EINVAL
);
233 clk_composite_ops
->recalc_rate
= clk_composite_recalc_rate
;
235 if (rate_ops
->determine_rate
)
236 clk_composite_ops
->determine_rate
=
237 clk_composite_determine_rate
;
238 else if (rate_ops
->round_rate
)
239 clk_composite_ops
->round_rate
=
240 clk_composite_round_rate
;
242 /* .set_rate requires either .round_rate or .determine_rate */
243 if (rate_ops
->set_rate
) {
244 if (rate_ops
->determine_rate
|| rate_ops
->round_rate
)
245 clk_composite_ops
->set_rate
=
246 clk_composite_set_rate
;
248 WARN(1, "%s: missing round_rate op is required\n",
252 composite
->rate_hw
= rate_hw
;
253 composite
->rate_ops
= rate_ops
;
256 if (gate_hw
&& gate_ops
) {
257 if (!gate_ops
->is_enabled
|| !gate_ops
->enable
||
258 !gate_ops
->disable
) {
259 clk
= ERR_PTR(-EINVAL
);
263 composite
->gate_hw
= gate_hw
;
264 composite
->gate_ops
= gate_ops
;
265 clk_composite_ops
->is_enabled
= clk_composite_is_enabled
;
266 clk_composite_ops
->enable
= clk_composite_enable
;
267 clk_composite_ops
->disable
= clk_composite_disable
;
270 init
.ops
= clk_composite_ops
;
271 composite
->hw
.init
= &init
;
273 clk
= clk_register(dev
, &composite
->hw
);
277 if (composite
->mux_hw
)
278 composite
->mux_hw
->clk
= clk
;
280 if (composite
->rate_hw
)
281 composite
->rate_hw
->clk
= clk
;
283 if (composite
->gate_hw
)
284 composite
->gate_hw
->clk
= clk
;