2 * vsp1_dl.h -- R-Car VSP1 Display List
4 * Copyright (C) 2015 Renesas Corporation
6 * Contact: Laurent Pinchart (laurent.pinchart@ideasonboard.com)
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License as published by
10 * the Free Software Foundation; either version 2 of the License, or
11 * (at your option) any later version.
14 #include <linux/device.h>
15 #include <linux/dma-mapping.h>
16 #include <linux/gfp.h>
17 #include <linux/slab.h>
18 #include <linux/workqueue.h>
23 #define VSP1_DL_NUM_ENTRIES 256
24 #define VSP1_DL_NUM_LISTS 3
26 #define VSP1_DLH_INT_ENABLE (1 << 1)
27 #define VSP1_DLH_AUTO_START (1 << 0)
29 struct vsp1_dl_header_list
{
32 } __attribute__((__packed__
));
34 struct vsp1_dl_header
{
36 struct vsp1_dl_header_list lists
[8];
39 } __attribute__((__packed__
));
41 struct vsp1_dl_entry
{
44 } __attribute__((__packed__
));
47 * struct vsp1_dl_body - Display list body
48 * @list: entry in the display list list of bodies
49 * @vsp1: the VSP1 device
50 * @entries: array of entries
51 * @dma: DMA address of the entries
52 * @size: size of the DMA memory in bytes
53 * @num_entries: number of stored entries
56 struct list_head list
;
57 struct vsp1_device
*vsp1
;
59 struct vsp1_dl_entry
*entries
;
63 unsigned int num_entries
;
67 * struct vsp1_dl_list - Display list
68 * @list: entry in the display list manager lists
69 * @dlm: the display list manager
70 * @header: display list header, NULL for headerless lists
71 * @dma: DMA address for the header
72 * @body0: first display list body
73 * @fragments: list of extra display list bodies
76 struct list_head list
;
77 struct vsp1_dl_manager
*dlm
;
79 struct vsp1_dl_header
*header
;
82 struct vsp1_dl_body body0
;
83 struct list_head fragments
;
88 VSP1_DL_MODE_HEADERLESS
,
92 * struct vsp1_dl_manager - Display List manager
93 * @index: index of the related WPF
94 * @mode: display list operation mode (header or headerless)
95 * @vsp1: the VSP1 device
96 * @lock: protects the free, active, queued, pending and gc_fragments lists
97 * @free: array of all free display lists
98 * @active: list currently being processed (loaded) by hardware
99 * @queued: list queued to the hardware (written to the DL registers)
100 * @pending: list waiting to be queued to the hardware
101 * @gc_work: fragments garbage collector work struct
102 * @gc_fragments: array of display list fragments waiting to be freed
104 struct vsp1_dl_manager
{
106 enum vsp1_dl_mode mode
;
107 struct vsp1_device
*vsp1
;
110 struct list_head free
;
111 struct vsp1_dl_list
*active
;
112 struct vsp1_dl_list
*queued
;
113 struct vsp1_dl_list
*pending
;
115 struct work_struct gc_work
;
116 struct list_head gc_fragments
;
119 /* -----------------------------------------------------------------------------
120 * Display List Body Management
124 * Initialize a display list body object and allocate DMA memory for the body
125 * data. The display list body object is expected to have been initialized to
128 static int vsp1_dl_body_init(struct vsp1_device
*vsp1
,
129 struct vsp1_dl_body
*dlb
, unsigned int num_entries
,
132 size_t size
= num_entries
* sizeof(*dlb
->entries
) + extra_size
;
137 dlb
->entries
= dma_alloc_wc(vsp1
->dev
, dlb
->size
, &dlb
->dma
,
146 * Cleanup a display list body and free allocated DMA memory allocated.
148 static void vsp1_dl_body_cleanup(struct vsp1_dl_body
*dlb
)
150 dma_free_wc(dlb
->vsp1
->dev
, dlb
->size
, dlb
->entries
, dlb
->dma
);
154 * vsp1_dl_fragment_alloc - Allocate a display list fragment
155 * @vsp1: The VSP1 device
156 * @num_entries: The maximum number of entries that the fragment can contain
158 * Allocate a display list fragment with enough memory to contain the requested
161 * Return a pointer to a fragment on success or NULL if memory can't be
164 struct vsp1_dl_body
*vsp1_dl_fragment_alloc(struct vsp1_device
*vsp1
,
165 unsigned int num_entries
)
167 struct vsp1_dl_body
*dlb
;
170 dlb
= kzalloc(sizeof(*dlb
), GFP_KERNEL
);
174 ret
= vsp1_dl_body_init(vsp1
, dlb
, num_entries
, 0);
184 * vsp1_dl_fragment_free - Free a display list fragment
187 * Free the given display list fragment and the associated DMA memory.
189 * Fragments must only be freed explicitly if they are not added to a display
190 * list, as the display list will take ownership of them and free them
191 * otherwise. Manual free typically happens at cleanup time for fragments that
192 * have been allocated but not used.
194 * Passing a NULL pointer to this function is safe, in that case no operation
197 void vsp1_dl_fragment_free(struct vsp1_dl_body
*dlb
)
202 vsp1_dl_body_cleanup(dlb
);
207 * vsp1_dl_fragment_write - Write a register to a display list fragment
209 * @reg: The register address
210 * @data: The register value
212 * Write the given register and value to the display list fragment. The maximum
213 * number of entries that can be written in a fragment is specified when the
214 * fragment is allocated by vsp1_dl_fragment_alloc().
216 void vsp1_dl_fragment_write(struct vsp1_dl_body
*dlb
, u32 reg
, u32 data
)
218 dlb
->entries
[dlb
->num_entries
].addr
= reg
;
219 dlb
->entries
[dlb
->num_entries
].data
= data
;
223 /* -----------------------------------------------------------------------------
224 * Display List Transaction Management
227 static struct vsp1_dl_list
*vsp1_dl_list_alloc(struct vsp1_dl_manager
*dlm
)
229 struct vsp1_dl_list
*dl
;
233 dl
= kzalloc(sizeof(*dl
), GFP_KERNEL
);
237 INIT_LIST_HEAD(&dl
->fragments
);
240 /* Initialize the display list body and allocate DMA memory for the body
241 * and the optional header. Both are allocated together to avoid memory
242 * fragmentation, with the header located right after the body in
245 header_size
= dlm
->mode
== VSP1_DL_MODE_HEADER
246 ? ALIGN(sizeof(struct vsp1_dl_header
), 8)
249 ret
= vsp1_dl_body_init(dlm
->vsp1
, &dl
->body0
, VSP1_DL_NUM_ENTRIES
,
256 if (dlm
->mode
== VSP1_DL_MODE_HEADER
) {
257 size_t header_offset
= VSP1_DL_NUM_ENTRIES
258 * sizeof(*dl
->body0
.entries
);
260 dl
->header
= ((void *)dl
->body0
.entries
) + header_offset
;
261 dl
->dma
= dl
->body0
.dma
+ header_offset
;
263 memset(dl
->header
, 0, sizeof(*dl
->header
));
264 dl
->header
->lists
[0].addr
= dl
->body0
.dma
;
265 dl
->header
->flags
= VSP1_DLH_INT_ENABLE
;
271 static void vsp1_dl_list_free(struct vsp1_dl_list
*dl
)
273 vsp1_dl_body_cleanup(&dl
->body0
);
274 list_splice_init(&dl
->fragments
, &dl
->dlm
->gc_fragments
);
279 * vsp1_dl_list_get - Get a free display list
280 * @dlm: The display list manager
282 * Get a display list from the pool of free lists and return it.
284 * This function must be called without the display list manager lock held.
286 struct vsp1_dl_list
*vsp1_dl_list_get(struct vsp1_dl_manager
*dlm
)
288 struct vsp1_dl_list
*dl
= NULL
;
291 spin_lock_irqsave(&dlm
->lock
, flags
);
293 if (!list_empty(&dlm
->free
)) {
294 dl
= list_first_entry(&dlm
->free
, struct vsp1_dl_list
, list
);
298 spin_unlock_irqrestore(&dlm
->lock
, flags
);
303 /* This function must be called with the display list manager lock held.*/
304 static void __vsp1_dl_list_put(struct vsp1_dl_list
*dl
)
309 /* We can't free fragments here as DMA memory can only be freed in
310 * interruptible context. Move all fragments to the display list
311 * manager's list of fragments to be freed, they will be
312 * garbage-collected by the work queue.
314 if (!list_empty(&dl
->fragments
)) {
315 list_splice_init(&dl
->fragments
, &dl
->dlm
->gc_fragments
);
316 schedule_work(&dl
->dlm
->gc_work
);
319 dl
->body0
.num_entries
= 0;
321 list_add_tail(&dl
->list
, &dl
->dlm
->free
);
325 * vsp1_dl_list_put - Release a display list
326 * @dl: The display list
328 * Release the display list and return it to the pool of free lists.
330 * Passing a NULL pointer to this function is safe, in that case no operation
333 void vsp1_dl_list_put(struct vsp1_dl_list
*dl
)
340 spin_lock_irqsave(&dl
->dlm
->lock
, flags
);
341 __vsp1_dl_list_put(dl
);
342 spin_unlock_irqrestore(&dl
->dlm
->lock
, flags
);
346 * vsp1_dl_list_write - Write a register to the display list
347 * @dl: The display list
348 * @reg: The register address
349 * @data: The register value
351 * Write the given register and value to the display list. Up to 256 registers
352 * can be written per display list.
354 void vsp1_dl_list_write(struct vsp1_dl_list
*dl
, u32 reg
, u32 data
)
356 vsp1_dl_fragment_write(&dl
->body0
, reg
, data
);
360 * vsp1_dl_list_add_fragment - Add a fragment to the display list
361 * @dl: The display list
364 * Add a display list body as a fragment to a display list. Registers contained
365 * in fragments are processed after registers contained in the main display
366 * list, in the order in which fragments are added.
368 * Adding a fragment to a display list passes ownership of the fragment to the
369 * list. The caller must not touch the fragment after this call, and must not
370 * free it explicitly with vsp1_dl_fragment_free().
372 * Fragments are only usable for display lists in header mode. Attempt to
373 * add a fragment to a header-less display list will return an error.
375 int vsp1_dl_list_add_fragment(struct vsp1_dl_list
*dl
,
376 struct vsp1_dl_body
*dlb
)
378 /* Multi-body lists are only available in header mode. */
379 if (dl
->dlm
->mode
!= VSP1_DL_MODE_HEADER
)
382 list_add_tail(&dlb
->list
, &dl
->fragments
);
386 void vsp1_dl_list_commit(struct vsp1_dl_list
*dl
)
388 struct vsp1_dl_manager
*dlm
= dl
->dlm
;
389 struct vsp1_device
*vsp1
= dlm
->vsp1
;
393 spin_lock_irqsave(&dlm
->lock
, flags
);
395 if (dl
->dlm
->mode
== VSP1_DL_MODE_HEADER
) {
396 struct vsp1_dl_header_list
*hdr
= dl
->header
->lists
;
397 struct vsp1_dl_body
*dlb
;
398 unsigned int num_lists
= 0;
400 /* Fill the header with the display list bodies addresses and
401 * sizes. The address of the first body has already been filled
402 * when the display list was allocated.
404 * In header mode the caller guarantees that the hardware is
405 * idle at this point.
407 hdr
->num_bytes
= dl
->body0
.num_entries
408 * sizeof(*dl
->header
->lists
);
410 list_for_each_entry(dlb
, &dl
->fragments
, list
) {
414 hdr
->addr
= dlb
->dma
;
415 hdr
->num_bytes
= dlb
->num_entries
416 * sizeof(*dl
->header
->lists
);
419 dl
->header
->num_lists
= num_lists
;
420 vsp1_write(vsp1
, VI6_DL_HDR_ADDR(dlm
->index
), dl
->dma
);
426 /* Once the UPD bit has been set the hardware can start processing the
427 * display list at any time and we can't touch the address and size
428 * registers. In that case mark the update as pending, it will be
429 * queued up to the hardware by the frame end interrupt handler.
431 update
= !!(vsp1_read(vsp1
, VI6_DL_BODY_SIZE
) & VI6_DL_BODY_SIZE_UPD
);
433 __vsp1_dl_list_put(dlm
->pending
);
438 /* Program the hardware with the display list body address and size.
439 * The UPD bit will be cleared by the device when the display list is
442 vsp1_write(vsp1
, VI6_DL_HDR_ADDR(0), dl
->body0
.dma
);
443 vsp1_write(vsp1
, VI6_DL_BODY_SIZE
, VI6_DL_BODY_SIZE_UPD
|
444 (dl
->body0
.num_entries
* sizeof(*dl
->header
->lists
)));
446 __vsp1_dl_list_put(dlm
->queued
);
450 spin_unlock_irqrestore(&dlm
->lock
, flags
);
453 /* -----------------------------------------------------------------------------
454 * Display List Manager
457 /* Interrupt Handling */
458 void vsp1_dlm_irq_display_start(struct vsp1_dl_manager
*dlm
)
460 spin_lock(&dlm
->lock
);
462 /* The display start interrupt signals the end of the display list
463 * processing by the device. The active display list, if any, won't be
464 * accessed anymore and can be reused.
466 __vsp1_dl_list_put(dlm
->active
);
469 spin_unlock(&dlm
->lock
);
472 void vsp1_dlm_irq_frame_end(struct vsp1_dl_manager
*dlm
)
474 struct vsp1_device
*vsp1
= dlm
->vsp1
;
476 spin_lock(&dlm
->lock
);
478 __vsp1_dl_list_put(dlm
->active
);
481 /* Header mode is used for mem-to-mem pipelines only. We don't need to
482 * perform any operation as there can't be any new display list queued
485 if (dlm
->mode
== VSP1_DL_MODE_HEADER
)
488 /* The UPD bit set indicates that the commit operation raced with the
489 * interrupt and occurred after the frame end event and UPD clear but
490 * before interrupt processing. The hardware hasn't taken the update
491 * into account yet, we'll thus skip one frame and retry.
493 if (vsp1_read(vsp1
, VI6_DL_BODY_SIZE
) & VI6_DL_BODY_SIZE_UPD
)
496 /* The device starts processing the queued display list right after the
497 * frame end interrupt. The display list thus becomes active.
500 dlm
->active
= dlm
->queued
;
504 /* Now that the UPD bit has been cleared we can queue the next display
505 * list to the hardware if one has been prepared.
508 struct vsp1_dl_list
*dl
= dlm
->pending
;
510 vsp1_write(vsp1
, VI6_DL_HDR_ADDR(0), dl
->body0
.dma
);
511 vsp1_write(vsp1
, VI6_DL_BODY_SIZE
, VI6_DL_BODY_SIZE_UPD
|
512 (dl
->body0
.num_entries
*
513 sizeof(*dl
->header
->lists
)));
520 spin_unlock(&dlm
->lock
);
524 void vsp1_dlm_setup(struct vsp1_device
*vsp1
)
526 u32 ctrl
= (256 << VI6_DL_CTRL_AR_WAIT_SHIFT
)
527 | VI6_DL_CTRL_DC2
| VI6_DL_CTRL_DC1
| VI6_DL_CTRL_DC0
530 /* The DRM pipeline operates with display lists in Continuous Frame
531 * Mode, all other pipelines use manual start.
534 ctrl
|= VI6_DL_CTRL_CFM0
| VI6_DL_CTRL_NH0
;
536 vsp1_write(vsp1
, VI6_DL_CTRL
, ctrl
);
537 vsp1_write(vsp1
, VI6_DL_SWAP
, VI6_DL_SWAP_LWS
);
540 void vsp1_dlm_reset(struct vsp1_dl_manager
*dlm
)
544 spin_lock_irqsave(&dlm
->lock
, flags
);
546 __vsp1_dl_list_put(dlm
->active
);
547 __vsp1_dl_list_put(dlm
->queued
);
548 __vsp1_dl_list_put(dlm
->pending
);
550 spin_unlock_irqrestore(&dlm
->lock
, flags
);
558 * Free all fragments awaiting to be garbage-collected.
560 * This function must be called without the display list manager lock held.
562 static void vsp1_dlm_fragments_free(struct vsp1_dl_manager
*dlm
)
566 spin_lock_irqsave(&dlm
->lock
, flags
);
568 while (!list_empty(&dlm
->gc_fragments
)) {
569 struct vsp1_dl_body
*dlb
;
571 dlb
= list_first_entry(&dlm
->gc_fragments
, struct vsp1_dl_body
,
573 list_del(&dlb
->list
);
575 spin_unlock_irqrestore(&dlm
->lock
, flags
);
576 vsp1_dl_fragment_free(dlb
);
577 spin_lock_irqsave(&dlm
->lock
, flags
);
580 spin_unlock_irqrestore(&dlm
->lock
, flags
);
583 static void vsp1_dlm_garbage_collect(struct work_struct
*work
)
585 struct vsp1_dl_manager
*dlm
=
586 container_of(work
, struct vsp1_dl_manager
, gc_work
);
588 vsp1_dlm_fragments_free(dlm
);
591 struct vsp1_dl_manager
*vsp1_dlm_create(struct vsp1_device
*vsp1
,
593 unsigned int prealloc
)
595 struct vsp1_dl_manager
*dlm
;
598 dlm
= devm_kzalloc(vsp1
->dev
, sizeof(*dlm
), GFP_KERNEL
);
603 dlm
->mode
= index
== 0 && !vsp1
->info
->uapi
604 ? VSP1_DL_MODE_HEADERLESS
: VSP1_DL_MODE_HEADER
;
607 spin_lock_init(&dlm
->lock
);
608 INIT_LIST_HEAD(&dlm
->free
);
609 INIT_LIST_HEAD(&dlm
->gc_fragments
);
610 INIT_WORK(&dlm
->gc_work
, vsp1_dlm_garbage_collect
);
612 for (i
= 0; i
< prealloc
; ++i
) {
613 struct vsp1_dl_list
*dl
;
615 dl
= vsp1_dl_list_alloc(dlm
);
619 list_add_tail(&dl
->list
, &dlm
->free
);
625 void vsp1_dlm_destroy(struct vsp1_dl_manager
*dlm
)
627 struct vsp1_dl_list
*dl
, *next
;
632 cancel_work_sync(&dlm
->gc_work
);
634 list_for_each_entry_safe(dl
, next
, &dlm
->free
, list
) {
636 vsp1_dl_list_free(dl
);
639 vsp1_dlm_fragments_free(dlm
);