| blob | 708cf9cf9a355e175d5b1cf4fbdc2b96732e7084 |
1 /*
2 * arch/s390/kernel/entry.S
3 * S390 low-level entry points.
4 *
5 * Copyright (C) IBM Corp. 1999,2006
6 * Author(s): Martin Schwidefsky (schwidefsky@de.ibm.com),
7 * Hartmut Penner (hp@de.ibm.com),
8 * Denis Joseph Barrow (djbarrow@de.ibm.com,barrow_dj@yahoo.com),
9 * Heiko Carstens <heiko.carstens@de.ibm.com>
10 */
12 #include <linux/sys.h>
13 #include <linux/linkage.h>
14 #include <linux/init.h>
15 #include <asm/cache.h>
16 #include <asm/lowcore.h>
17 #include <asm/errno.h>
18 #include <asm/ptrace.h>
19 #include <asm/thread_info.h>
20 #include <asm/asm-offsets.h>
21 #include <asm/unistd.h>
22 #include <asm/page.h>
24 /*
25 * Stack layout for the system_call stack entry.
26 * The first few entries are identical to the user_regs_struct.
27 */
28 SP_PTREGS = STACK_FRAME_OVERHEAD
29 SP_ARGS = STACK_FRAME_OVERHEAD + __PT_ARGS
30 SP_PSW = STACK_FRAME_OVERHEAD + __PT_PSW
31 SP_R0 = STACK_FRAME_OVERHEAD + __PT_GPRS
32 SP_R1 = STACK_FRAME_OVERHEAD + __PT_GPRS + 4
33 SP_R2 = STACK_FRAME_OVERHEAD + __PT_GPRS + 8
34 SP_R3 = STACK_FRAME_OVERHEAD + __PT_GPRS + 12
35 SP_R4 = STACK_FRAME_OVERHEAD + __PT_GPRS + 16
36 SP_R5 = STACK_FRAME_OVERHEAD + __PT_GPRS + 20
37 SP_R6 = STACK_FRAME_OVERHEAD + __PT_GPRS + 24
38 SP_R7 = STACK_FRAME_OVERHEAD + __PT_GPRS + 28
39 SP_R8 = STACK_FRAME_OVERHEAD + __PT_GPRS + 32
40 SP_R9 = STACK_FRAME_OVERHEAD + __PT_GPRS + 36
41 SP_R10 = STACK_FRAME_OVERHEAD + __PT_GPRS + 40
42 SP_R11 = STACK_FRAME_OVERHEAD + __PT_GPRS + 44
43 SP_R12 = STACK_FRAME_OVERHEAD + __PT_GPRS + 48
44 SP_R13 = STACK_FRAME_OVERHEAD + __PT_GPRS + 52
45 SP_R14 = STACK_FRAME_OVERHEAD + __PT_GPRS + 56
46 SP_R15 = STACK_FRAME_OVERHEAD + __PT_GPRS + 60
47 SP_ORIG_R2 = STACK_FRAME_OVERHEAD + __PT_ORIG_GPR2
48 SP_ILC = STACK_FRAME_OVERHEAD + __PT_ILC
49 SP_TRAP = STACK_FRAME_OVERHEAD + __PT_TRAP
50 SP_SIZE = STACK_FRAME_OVERHEAD + __PT_SIZE
52 _TIF_WORK_SVC = (_TIF_SIGPENDING | _TIF_NEED_RESCHED | \
53 _TIF_MCCK_PENDING | _TIF_RESTART_SVC | _TIF_SINGLE_STEP )
54 _TIF_WORK_INT = (_TIF_SIGPENDING | _TIF_NEED_RESCHED | \
55 _TIF_MCCK_PENDING)
57 STACK_SHIFT = PAGE_SHIFT + THREAD_ORDER
58 STACK_SIZE = 1 << STACK_SHIFT
60 #define BASED(name) name-system_call(%r13)
62 #ifdef CONFIG_TRACE_IRQFLAGS
63 .macro TRACE_IRQS_ON
64 l %r1,BASED(.Ltrace_irq_on)
65 basr %r14,%r1
66 .endm
68 .macro TRACE_IRQS_OFF
69 l %r1,BASED(.Ltrace_irq_off)
70 basr %r14,%r1
71 .endm
73 .macro TRACE_IRQS_CHECK
74 tm SP_PSW(%r15),0x03 # irqs enabled?
75 jz 0f
76 l %r1,BASED(.Ltrace_irq_on)
77 basr %r14,%r1
78 j 1f
79 0: l %r1,BASED(.Ltrace_irq_off)
80 basr %r14,%r1
81 1:
82 .endm
83 #else
84 #define TRACE_IRQS_ON
85 #define TRACE_IRQS_OFF
86 #define TRACE_IRQS_CHECK
87 #endif
89 #ifdef CONFIG_LOCKDEP
90 .macro LOCKDEP_SYS_EXIT
91 tm SP_PSW+1(%r15),0x01 # returning to user ?
92 jz 0f
93 l %r1,BASED(.Llockdep_sys_exit)
94 basr %r14,%r1
95 0:
96 .endm
97 #else
98 #define LOCKDEP_SYS_EXIT
99 #endif
101 /*
102 * Register usage in interrupt handlers:
103 * R9 - pointer to current task structure
104 * R13 - pointer to literal pool
105 * R14 - return register for function calls
106 * R15 - kernel stack pointer
107 */
109 .macro STORE_TIMER lc_offset
110 #ifdef CONFIG_VIRT_CPU_ACCOUNTING
111 stpt \lc_offset
112 #endif
113 .endm
115 #ifdef CONFIG_VIRT_CPU_ACCOUNTING
116 .macro UPDATE_VTIME lc_from,lc_to,lc_sum
117 lm %r10,%r11,\lc_from
118 sl %r10,\lc_to
119 sl %r11,\lc_to+4
120 bc 3,BASED(0f)
121 sl %r10,BASED(.Lc_1)
122 0: al %r10,\lc_sum
123 al %r11,\lc_sum+4
124 bc 12,BASED(1f)
125 al %r10,BASED(.Lc_1)
126 1: stm %r10,%r11,\lc_sum
127 .endm
128 #endif
130 .macro SAVE_ALL_BASE savearea
131 stm %r12,%r15,\savearea
132 l %r13,__LC_SVC_NEW_PSW+4 # load &system_call to %r13
133 .endm
135 .macro SAVE_ALL_SVC psworg,savearea
136 la %r12,\psworg
137 l %r15,__LC_KERNEL_STACK # problem state -> load ksp
138 .endm
140 .macro SAVE_ALL_SYNC psworg,savearea
141 la %r12,\psworg
142 tm \psworg+1,0x01 # test problem state bit
143 bz BASED(2f) # skip stack setup save
144 l %r15,__LC_KERNEL_STACK # problem state -> load ksp
145 #ifdef CONFIG_CHECK_STACK
146 b BASED(3f)
147 2: tml %r15,STACK_SIZE - CONFIG_STACK_GUARD
148 bz BASED(stack_overflow)
149 3:
150 #endif
151 2:
152 .endm
154 .macro SAVE_ALL_ASYNC psworg,savearea
155 la %r12,\psworg
156 tm \psworg+1,0x01 # test problem state bit
157 bnz BASED(1f) # from user -> load async stack
158 clc \psworg+4(4),BASED(.Lcritical_end)
159 bhe BASED(0f)
160 clc \psworg+4(4),BASED(.Lcritical_start)
161 bl BASED(0f)
162 l %r14,BASED(.Lcleanup_critical)
163 basr %r14,%r14
164 tm 1(%r12),0x01 # retest problem state after cleanup
165 bnz BASED(1f)
166 0: l %r14,__LC_ASYNC_STACK # are we already on the async stack ?
167 slr %r14,%r15
168 sra %r14,STACK_SHIFT
169 be BASED(2f)
170 1: l %r15,__LC_ASYNC_STACK
171 #ifdef CONFIG_CHECK_STACK
172 b BASED(3f)
173 2: tml %r15,STACK_SIZE - CONFIG_STACK_GUARD
174 bz BASED(stack_overflow)
175 3:
176 #endif
177 2:
178 .endm
180 .macro CREATE_STACK_FRAME psworg,savearea
181 s %r15,BASED(.Lc_spsize) # make room for registers & psw
182 mvc SP_PSW(8,%r15),0(%r12) # move user PSW to stack
183 la %r12,\psworg
184 st %r2,SP_ORIG_R2(%r15) # store original content of gpr 2
185 icm %r12,12,__LC_SVC_ILC
186 stm %r0,%r11,SP_R0(%r15) # store gprs %r0-%r11 to kernel stack
187 st %r12,SP_ILC(%r15)
188 mvc SP_R12(16,%r15),\savearea # move %r12-%r15 to stack
189 la %r12,0
190 st %r12,__SF_BACKCHAIN(%r15) # clear back chain
191 .endm
193 .macro RESTORE_ALL psworg,sync
194 mvc \psworg(8),SP_PSW(%r15) # move user PSW to lowcore
195 .if !\sync
196 ni \psworg+1,0xfd # clear wait state bit
197 .endif
198 lm %r0,%r15,SP_R0(%r15) # load gprs 0-15 of user
199 STORE_TIMER __LC_EXIT_TIMER
200 lpsw \psworg # back to caller
201 .endm
203 /*
204 * Scheduler resume function, called by switch_to
205 * gpr2 = (task_struct *) prev
206 * gpr3 = (task_struct *) next
207 * Returns:
208 * gpr2 = prev
209 */
210 .globl __switch_to
211 __switch_to:
212 basr %r1,0
213 __switch_to_base:
214 tm __THREAD_per(%r3),0xe8 # new process is using per ?
215 bz __switch_to_noper-__switch_to_base(%r1) # if not we're fine
216 stctl %c9,%c11,__SF_EMPTY(%r15) # We are using per stuff
217 clc __THREAD_per(12,%r3),__SF_EMPTY(%r15)
218 be __switch_to_noper-__switch_to_base(%r1) # we got away w/o bashing TLB's
219 lctl %c9,%c11,__THREAD_per(%r3) # Nope we didn't
220 __switch_to_noper:
221 l %r4,__THREAD_info(%r2) # get thread_info of prev
222 tm __TI_flags+3(%r4),_TIF_MCCK_PENDING # machine check pending?
223 bz __switch_to_no_mcck-__switch_to_base(%r1)
224 ni __TI_flags+3(%r4),255-_TIF_MCCK_PENDING # clear flag in prev
225 l %r4,__THREAD_info(%r3) # get thread_info of next
226 oi __TI_flags+3(%r4),_TIF_MCCK_PENDING # set it in next
227 __switch_to_no_mcck:
228 stm %r6,%r15,__SF_GPRS(%r15)# store __switch_to registers of prev task
229 st %r15,__THREAD_ksp(%r2) # store kernel stack to prev->tss.ksp
230 l %r15,__THREAD_ksp(%r3) # load kernel stack from next->tss.ksp
231 lm %r6,%r15,__SF_GPRS(%r15)# load __switch_to registers of next task
232 st %r3,__LC_CURRENT # __LC_CURRENT = current task struct
233 lctl %c4,%c4,__TASK_pid(%r3) # load pid to control reg. 4
234 l %r3,__THREAD_info(%r3) # load thread_info from task struct
235 st %r3,__LC_THREAD_INFO
236 ahi %r3,STACK_SIZE
237 st %r3,__LC_KERNEL_STACK # __LC_KERNEL_STACK = new kernel stack
238 br %r14
240 __critical_start:
241 /*
242 * SVC interrupt handler routine. System calls are synchronous events and
243 * are executed with interrupts enabled.
244 */
246 .globl system_call
247 system_call:
248 STORE_TIMER __LC_SYNC_ENTER_TIMER
249 sysc_saveall:
250 SAVE_ALL_BASE __LC_SAVE_AREA
251 SAVE_ALL_SVC __LC_SVC_OLD_PSW,__LC_SAVE_AREA
252 CREATE_STACK_FRAME __LC_SVC_OLD_PSW,__LC_SAVE_AREA
253 lh %r7,0x8a # get svc number from lowcore
254 #ifdef CONFIG_VIRT_CPU_ACCOUNTING
255 sysc_vtime:
256 UPDATE_VTIME __LC_EXIT_TIMER,__LC_SYNC_ENTER_TIMER,__LC_USER_TIMER
257 sysc_stime:
258 UPDATE_VTIME __LC_LAST_UPDATE_TIMER,__LC_EXIT_TIMER,__LC_SYSTEM_TIMER
259 sysc_update:
260 mvc __LC_LAST_UPDATE_TIMER(8),__LC_SYNC_ENTER_TIMER
261 #endif
262 sysc_do_svc:
263 l %r9,__LC_THREAD_INFO # load pointer to thread_info struct
264 sla %r7,2 # *4 and test for svc 0
265 bnz BASED(sysc_nr_ok) # svc number > 0
266 # svc 0: system call number in %r1
267 cl %r1,BASED(.Lnr_syscalls)
268 bnl BASED(sysc_nr_ok)
269 lr %r7,%r1 # copy svc number to %r7
270 sla %r7,2 # *4
271 sysc_nr_ok:
272 mvc SP_ARGS(4,%r15),SP_R7(%r15)
273 sysc_do_restart:
274 l %r8,BASED(.Lsysc_table)
275 tm __TI_flags+3(%r9),(_TIF_SYSCALL_TRACE|_TIF_SYSCALL_AUDIT)
276 l %r8,0(%r7,%r8) # get system call addr.
277 bnz BASED(sysc_tracesys)
278 basr %r14,%r8 # call sys_xxxx
279 st %r2,SP_R2(%r15) # store return value (change R2 on stack)
281 sysc_return:
282 tm __TI_flags+3(%r9),_TIF_WORK_SVC
283 bnz BASED(sysc_work) # there is work to do (signals etc.)
284 sysc_restore:
285 #ifdef CONFIG_TRACE_IRQFLAGS
286 la %r1,BASED(sysc_restore_trace_psw)
287 lpsw 0(%r1)
288 sysc_restore_trace:
289 TRACE_IRQS_CHECK
290 LOCKDEP_SYS_EXIT
291 #endif
292 sysc_leave:
293 RESTORE_ALL __LC_RETURN_PSW,1
294 sysc_done:
296 #ifdef CONFIG_TRACE_IRQFLAGS
297 .align 8
298 .globl sysc_restore_trace_psw
299 sysc_restore_trace_psw:
300 .long 0, sysc_restore_trace + 0x80000000
301 #endif
303 #
304 # recheck if there is more work to do
305 #
306 sysc_work_loop:
307 tm __TI_flags+3(%r9),_TIF_WORK_SVC
308 bz BASED(sysc_restore) # there is no work to do
309 #
310 # One of the work bits is on. Find out which one.
311 #
312 sysc_work:
313 tm SP_PSW+1(%r15),0x01 # returning to user ?
314 bno BASED(sysc_restore)
315 tm __TI_flags+3(%r9),_TIF_MCCK_PENDING
316 bo BASED(sysc_mcck_pending)
317 tm __TI_flags+3(%r9),_TIF_NEED_RESCHED
318 bo BASED(sysc_reschedule)
319 tm __TI_flags+3(%r9),_TIF_SIGPENDING
320 bnz BASED(sysc_sigpending)
321 tm __TI_flags+3(%r9),_TIF_RESTART_SVC
322 bo BASED(sysc_restart)
323 tm __TI_flags+3(%r9),_TIF_SINGLE_STEP
324 bo BASED(sysc_singlestep)
325 b BASED(sysc_restore)
326 sysc_work_done:
328 #
329 # _TIF_NEED_RESCHED is set, call schedule
330 #
331 sysc_reschedule:
332 l %r1,BASED(.Lschedule)
333 la %r14,BASED(sysc_work_loop)
334 br %r1 # call scheduler
336 #
337 # _TIF_MCCK_PENDING is set, call handler
338 #
339 sysc_mcck_pending:
340 l %r1,BASED(.Ls390_handle_mcck)
341 la %r14,BASED(sysc_work_loop)
342 br %r1 # TIF bit will be cleared by handler
344 #
345 # _TIF_SIGPENDING is set, call do_signal
346 #
347 sysc_sigpending:
348 ni __TI_flags+3(%r9),255-_TIF_SINGLE_STEP # clear TIF_SINGLE_STEP
349 la %r2,SP_PTREGS(%r15) # load pt_regs
350 l %r1,BASED(.Ldo_signal)
351 basr %r14,%r1 # call do_signal
352 tm __TI_flags+3(%r9),_TIF_RESTART_SVC
353 bo BASED(sysc_restart)
354 tm __TI_flags+3(%r9),_TIF_SINGLE_STEP
355 bo BASED(sysc_singlestep)
356 b BASED(sysc_work_loop)
358 #
359 # _TIF_RESTART_SVC is set, set up registers and restart svc
360 #
361 sysc_restart:
362 ni __TI_flags+3(%r9),255-_TIF_RESTART_SVC # clear TIF_RESTART_SVC
363 l %r7,SP_R2(%r15) # load new svc number
364 sla %r7,2
365 mvc SP_R2(4,%r15),SP_ORIG_R2(%r15) # restore first argument
366 lm %r2,%r6,SP_R2(%r15) # load svc arguments
367 b BASED(sysc_do_restart) # restart svc
369 #
370 # _TIF_SINGLE_STEP is set, call do_single_step
371 #
372 sysc_singlestep:
373 ni __TI_flags+3(%r9),255-_TIF_SINGLE_STEP # clear TIF_SINGLE_STEP
374 mvi SP_TRAP+1(%r15),0x28 # set trap indication to pgm check
375 la %r2,SP_PTREGS(%r15) # address of register-save area
376 l %r1,BASED(.Lhandle_per) # load adr. of per handler
377 la %r14,BASED(sysc_return) # load adr. of system return
378 br %r1 # branch to do_single_step
380 #
381 # call trace before and after sys_call
382 #
383 sysc_tracesys:
384 l %r1,BASED(.Ltrace)
385 la %r2,SP_PTREGS(%r15) # load pt_regs
386 la %r3,0
387 srl %r7,2
388 st %r7,SP_R2(%r15)
389 basr %r14,%r1
390 clc SP_R2(4,%r15),BASED(.Lnr_syscalls)
391 bnl BASED(sysc_tracenogo)
392 l %r8,BASED(.Lsysc_table)
393 l %r7,SP_R2(%r15) # strace might have changed the
394 sll %r7,2 # system call
395 l %r8,0(%r7,%r8)
396 sysc_tracego:
397 lm %r3,%r6,SP_R3(%r15)
398 l %r2,SP_ORIG_R2(%r15)
399 basr %r14,%r8 # call sys_xxx
400 st %r2,SP_R2(%r15) # store return value
401 sysc_tracenogo:
402 tm __TI_flags+3(%r9),(_TIF_SYSCALL_TRACE|_TIF_SYSCALL_AUDIT)
403 bz BASED(sysc_return)
404 l %r1,BASED(.Ltrace)
405 la %r2,SP_PTREGS(%r15) # load pt_regs
406 la %r3,1
407 la %r14,BASED(sysc_return)
408 br %r1
410 #
411 # a new process exits the kernel with ret_from_fork
412 #
413 .globl ret_from_fork
414 ret_from_fork:
415 l %r13,__LC_SVC_NEW_PSW+4
416 l %r9,__LC_THREAD_INFO # load pointer to thread_info struct
417 tm SP_PSW+1(%r15),0x01 # forking a kernel thread ?
418 bo BASED(0f)
419 st %r15,SP_R15(%r15) # store stack pointer for new kthread
420 0: l %r1,BASED(.Lschedtail)
421 basr %r14,%r1
422 TRACE_IRQS_ON
423 stosm __SF_EMPTY(%r15),0x03 # reenable interrupts
424 b BASED(sysc_return)
426 #
427 # kernel_execve function needs to deal with pt_regs that is not
428 # at the usual place
429 #
430 .globl kernel_execve
431 kernel_execve:
432 stm %r12,%r15,48(%r15)
433 lr %r14,%r15
434 l %r13,__LC_SVC_NEW_PSW+4
435 s %r15,BASED(.Lc_spsize)
436 st %r14,__SF_BACKCHAIN(%r15)
437 la %r12,SP_PTREGS(%r15)
438 xc 0(__PT_SIZE,%r12),0(%r12)
439 l %r1,BASED(.Ldo_execve)
440 lr %r5,%r12
441 basr %r14,%r1
442 ltr %r2,%r2
443 be BASED(0f)
444 a %r15,BASED(.Lc_spsize)
445 lm %r12,%r15,48(%r15)
446 br %r14
447 # execve succeeded.
448 0: stnsm __SF_EMPTY(%r15),0xfc # disable interrupts
449 l %r15,__LC_KERNEL_STACK # load ksp
450 s %r15,BASED(.Lc_spsize) # make room for registers & psw
451 l %r9,__LC_THREAD_INFO
452 mvc SP_PTREGS(__PT_SIZE,%r15),0(%r12) # copy pt_regs
453 xc __SF_BACKCHAIN(4,%r15),__SF_BACKCHAIN(%r15)
454 stosm __SF_EMPTY(%r15),0x03 # reenable interrupts
455 l %r1,BASED(.Lexecve_tail)
456 basr %r14,%r1
457 b BASED(sysc_return)
459 /*
460 * Program check handler routine
461 */
463 .globl pgm_check_handler
464 pgm_check_handler:
465 /*
466 * First we need to check for a special case:
467 * Single stepping an instruction that disables the PER event mask will
468 * cause a PER event AFTER the mask has been set. Example: SVC or LPSW.
469 * For a single stepped SVC the program check handler gets control after
470 * the SVC new PSW has been loaded. But we want to execute the SVC first and
471 * then handle the PER event. Therefore we update the SVC old PSW to point
472 * to the pgm_check_handler and branch to the SVC handler after we checked
473 * if we have to load the kernel stack register.
474 * For every other possible cause for PER event without the PER mask set
475 * we just ignore the PER event (FIXME: is there anything we have to do
476 * for LPSW?).
477 */
478 STORE_TIMER __LC_SYNC_ENTER_TIMER
479 SAVE_ALL_BASE __LC_SAVE_AREA
480 tm __LC_PGM_INT_CODE+1,0x80 # check whether we got a per exception
481 bnz BASED(pgm_per) # got per exception -> special case
482 SAVE_ALL_SYNC __LC_PGM_OLD_PSW,__LC_SAVE_AREA
483 CREATE_STACK_FRAME __LC_PGM_OLD_PSW,__LC_SAVE_AREA
484 #ifdef CONFIG_VIRT_CPU_ACCOUNTING
485 tm SP_PSW+1(%r15),0x01 # interrupting from user ?
486 bz BASED(pgm_no_vtime)
487 UPDATE_VTIME __LC_EXIT_TIMER,__LC_SYNC_ENTER_TIMER,__LC_USER_TIMER
488 UPDATE_VTIME __LC_LAST_UPDATE_TIMER,__LC_EXIT_TIMER,__LC_SYSTEM_TIMER
489 mvc __LC_LAST_UPDATE_TIMER(8),__LC_SYNC_ENTER_TIMER
490 pgm_no_vtime:
491 #endif
492 l %r9,__LC_THREAD_INFO # load pointer to thread_info struct
493 TRACE_IRQS_OFF
494 l %r3,__LC_PGM_ILC # load program interruption code
495 la %r8,0x7f
496 nr %r8,%r3
497 pgm_do_call:
498 l %r7,BASED(.Ljump_table)
499 sll %r8,2
500 l %r7,0(%r8,%r7) # load address of handler routine
501 la %r2,SP_PTREGS(%r15) # address of register-save area
502 la %r14,BASED(sysc_return)
503 br %r7 # branch to interrupt-handler
505 #
506 # handle per exception
507 #
508 pgm_per:
509 tm __LC_PGM_OLD_PSW,0x40 # test if per event recording is on
510 bnz BASED(pgm_per_std) # ok, normal per event from user space
511 # ok its one of the special cases, now we need to find out which one
512 clc __LC_PGM_OLD_PSW(8),__LC_SVC_NEW_PSW
513 be BASED(pgm_svcper)
514 # no interesting special case, ignore PER event
515 lm %r12,%r15,__LC_SAVE_AREA
516 lpsw 0x28
518 #
519 # Normal per exception
520 #
521 pgm_per_std:
522 SAVE_ALL_SYNC __LC_PGM_OLD_PSW,__LC_SAVE_AREA
523 CREATE_STACK_FRAME __LC_PGM_OLD_PSW,__LC_SAVE_AREA
524 #ifdef CONFIG_VIRT_CPU_ACCOUNTING
525 tm SP_PSW+1(%r15),0x01 # interrupting from user ?
526 bz BASED(pgm_no_vtime2)
527 UPDATE_VTIME __LC_EXIT_TIMER,__LC_SYNC_ENTER_TIMER,__LC_USER_TIMER
528 UPDATE_VTIME __LC_LAST_UPDATE_TIMER,__LC_EXIT_TIMER,__LC_SYSTEM_TIMER
529 mvc __LC_LAST_UPDATE_TIMER(8),__LC_SYNC_ENTER_TIMER
530 pgm_no_vtime2:
531 #endif
532 l %r9,__LC_THREAD_INFO # load pointer to thread_info struct
533 TRACE_IRQS_OFF
534 l %r1,__TI_task(%r9)
535 mvc __THREAD_per+__PER_atmid(2,%r1),__LC_PER_ATMID
536 mvc __THREAD_per+__PER_address(4,%r1),__LC_PER_ADDRESS
537 mvc __THREAD_per+__PER_access_id(1,%r1),__LC_PER_ACCESS_ID
538 oi __TI_flags+3(%r9),_TIF_SINGLE_STEP # set TIF_SINGLE_STEP
539 tm SP_PSW+1(%r15),0x01 # kernel per event ?
540 bz BASED(kernel_per)
541 l %r3,__LC_PGM_ILC # load program interruption code
542 la %r8,0x7f
543 nr %r8,%r3 # clear per-event-bit and ilc
544 be BASED(sysc_return) # only per or per+check ?
545 b BASED(pgm_do_call)
547 #
548 # it was a single stepped SVC that is causing all the trouble
549 #
550 pgm_svcper:
551 SAVE_ALL_SYNC __LC_SVC_OLD_PSW,__LC_SAVE_AREA
552 CREATE_STACK_FRAME __LC_SVC_OLD_PSW,__LC_SAVE_AREA
553 #ifdef CONFIG_VIRT_CPU_ACCOUNTING
554 UPDATE_VTIME __LC_EXIT_TIMER,__LC_SYNC_ENTER_TIMER,__LC_USER_TIMER
555 UPDATE_VTIME __LC_LAST_UPDATE_TIMER,__LC_EXIT_TIMER,__LC_SYSTEM_TIMER
556 mvc __LC_LAST_UPDATE_TIMER(8),__LC_SYNC_ENTER_TIMER
557 #endif
558 lh %r7,0x8a # get svc number from lowcore
559 l %r9,__LC_THREAD_INFO # load pointer to thread_info struct
560 TRACE_IRQS_OFF
561 l %r1,__TI_task(%r9)
562 mvc __THREAD_per+__PER_atmid(2,%r1),__LC_PER_ATMID
563 mvc __THREAD_per+__PER_address(4,%r1),__LC_PER_ADDRESS
564 mvc __THREAD_per+__PER_access_id(1,%r1),__LC_PER_ACCESS_ID
565 oi __TI_flags+3(%r9),_TIF_SINGLE_STEP # set TIF_SINGLE_STEP
566 TRACE_IRQS_ON
567 stosm __SF_EMPTY(%r15),0x03 # reenable interrupts
568 b BASED(sysc_do_svc)
570 #
571 # per was called from kernel, must be kprobes
572 #
573 kernel_per:
574 mvi SP_TRAP+1(%r15),0x28 # set trap indication to pgm check
575 la %r2,SP_PTREGS(%r15) # address of register-save area
576 l %r1,BASED(.Lhandle_per) # load adr. of per handler
577 la %r14,BASED(sysc_restore)# load adr. of system return
578 br %r1 # branch to do_single_step
580 /*
581 * IO interrupt handler routine
582 */
584 .globl io_int_handler
585 io_int_handler:
586 STORE_TIMER __LC_ASYNC_ENTER_TIMER
587 stck __LC_INT_CLOCK
588 SAVE_ALL_BASE __LC_SAVE_AREA+16
589 SAVE_ALL_ASYNC __LC_IO_OLD_PSW,__LC_SAVE_AREA+16
590 CREATE_STACK_FRAME __LC_IO_OLD_PSW,__LC_SAVE_AREA+16
591 #ifdef CONFIG_VIRT_CPU_ACCOUNTING
592 tm SP_PSW+1(%r15),0x01 # interrupting from user ?
593 bz BASED(io_no_vtime)
594 UPDATE_VTIME __LC_EXIT_TIMER,__LC_ASYNC_ENTER_TIMER,__LC_USER_TIMER
595 UPDATE_VTIME __LC_LAST_UPDATE_TIMER,__LC_EXIT_TIMER,__LC_SYSTEM_TIMER
596 mvc __LC_LAST_UPDATE_TIMER(8),__LC_ASYNC_ENTER_TIMER
597 io_no_vtime:
598 #endif
599 l %r9,__LC_THREAD_INFO # load pointer to thread_info struct
600 TRACE_IRQS_OFF
601 l %r1,BASED(.Ldo_IRQ) # load address of do_IRQ
602 la %r2,SP_PTREGS(%r15) # address of register-save area
603 basr %r14,%r1 # branch to standard irq handler
604 io_return:
605 tm __TI_flags+3(%r9),_TIF_WORK_INT
606 bnz BASED(io_work) # there is work to do (signals etc.)
607 io_restore:
608 #ifdef CONFIG_TRACE_IRQFLAGS
609 la %r1,BASED(io_restore_trace_psw)
610 lpsw 0(%r1)
611 io_restore_trace:
612 TRACE_IRQS_CHECK
613 LOCKDEP_SYS_EXIT
614 #endif
615 io_leave:
616 RESTORE_ALL __LC_RETURN_PSW,0
617 io_done:
619 #ifdef CONFIG_TRACE_IRQFLAGS
620 .align 8
621 .globl io_restore_trace_psw
622 io_restore_trace_psw:
623 .long 0, io_restore_trace + 0x80000000
624 #endif
626 #
627 # switch to kernel stack, then check the TIF bits
628 #
629 io_work:
630 tm SP_PSW+1(%r15),0x01 # returning to user ?
631 #ifndef CONFIG_PREEMPT
632 bno BASED(io_restore) # no-> skip resched & signal
633 #else
634 bnz BASED(io_work_user) # no -> check for preemptive scheduling
635 # check for preemptive scheduling
636 icm %r0,15,__TI_precount(%r9)
637 bnz BASED(io_restore) # preemption disabled
638 l %r1,SP_R15(%r15)
639 s %r1,BASED(.Lc_spsize)
640 mvc SP_PTREGS(__PT_SIZE,%r1),SP_PTREGS(%r15)
641 xc __SF_BACKCHAIN(4,%r1),__SF_BACKCHAIN(%r1) # clear back chain
642 lr %r15,%r1
643 io_resume_loop:
644 tm __TI_flags+3(%r9),_TIF_NEED_RESCHED
645 bno BASED(io_restore)
646 l %r1,BASED(.Lpreempt_schedule_irq)
647 la %r14,BASED(io_resume_loop)
648 br %r1 # call schedule
649 #endif
651 io_work_user:
652 l %r1,__LC_KERNEL_STACK
653 s %r1,BASED(.Lc_spsize)
654 mvc SP_PTREGS(__PT_SIZE,%r1),SP_PTREGS(%r15)
655 xc __SF_BACKCHAIN(4,%r1),__SF_BACKCHAIN(%r1) # clear back chain
656 lr %r15,%r1
657 #
658 # One of the work bits is on. Find out which one.
659 # Checked are: _TIF_SIGPENDING, _TIF_NEED_RESCHED
660 # and _TIF_MCCK_PENDING
661 #
662 io_work_loop:
663 tm __TI_flags+3(%r9),_TIF_MCCK_PENDING
664 bo BASED(io_mcck_pending)
665 tm __TI_flags+3(%r9),_TIF_NEED_RESCHED
666 bo BASED(io_reschedule)
667 tm __TI_flags+3(%r9),_TIF_SIGPENDING
668 bnz BASED(io_sigpending)
669 b BASED(io_restore)
670 io_work_done:
672 #
673 # _TIF_MCCK_PENDING is set, call handler
674 #
675 io_mcck_pending:
676 l %r1,BASED(.Ls390_handle_mcck)
677 basr %r14,%r1 # TIF bit will be cleared by handler
678 b BASED(io_work_loop)
680 #
681 # _TIF_NEED_RESCHED is set, call schedule
682 #
683 io_reschedule:
684 TRACE_IRQS_ON
685 l %r1,BASED(.Lschedule)
686 stosm __SF_EMPTY(%r15),0x03 # reenable interrupts
687 basr %r14,%r1 # call scheduler
688 stnsm __SF_EMPTY(%r15),0xfc # disable I/O and ext. interrupts
689 TRACE_IRQS_OFF
690 tm __TI_flags+3(%r9),_TIF_WORK_INT
691 bz BASED(io_restore) # there is no work to do
692 b BASED(io_work_loop)
694 #
695 # _TIF_SIGPENDING is set, call do_signal
696 #
697 io_sigpending:
698 TRACE_IRQS_ON
699 stosm __SF_EMPTY(%r15),0x03 # reenable interrupts
700 la %r2,SP_PTREGS(%r15) # load pt_regs
701 l %r1,BASED(.Ldo_signal)
702 basr %r14,%r1 # call do_signal
703 stnsm __SF_EMPTY(%r15),0xfc # disable I/O and ext. interrupts
704 TRACE_IRQS_OFF
705 b BASED(io_work_loop)
707 /*
708 * External interrupt handler routine
709 */
711 .globl ext_int_handler
712 ext_int_handler:
713 STORE_TIMER __LC_ASYNC_ENTER_TIMER
714 stck __LC_INT_CLOCK
715 SAVE_ALL_BASE __LC_SAVE_AREA+16
716 SAVE_ALL_ASYNC __LC_EXT_OLD_PSW,__LC_SAVE_AREA+16
717 CREATE_STACK_FRAME __LC_EXT_OLD_PSW,__LC_SAVE_AREA+16
718 #ifdef CONFIG_VIRT_CPU_ACCOUNTING
719 tm SP_PSW+1(%r15),0x01 # interrupting from user ?
720 bz BASED(ext_no_vtime)
721 UPDATE_VTIME __LC_EXIT_TIMER,__LC_ASYNC_ENTER_TIMER,__LC_USER_TIMER
722 UPDATE_VTIME __LC_LAST_UPDATE_TIMER,__LC_EXIT_TIMER,__LC_SYSTEM_TIMER
723 mvc __LC_LAST_UPDATE_TIMER(8),__LC_ASYNC_ENTER_TIMER
724 ext_no_vtime:
725 #endif
726 l %r9,__LC_THREAD_INFO # load pointer to thread_info struct
727 TRACE_IRQS_OFF
728 la %r2,SP_PTREGS(%r15) # address of register-save area
729 lh %r3,__LC_EXT_INT_CODE # get interruption code
730 l %r1,BASED(.Ldo_extint)
731 basr %r14,%r1
732 b BASED(io_return)
734 __critical_end:
736 /*
737 * Machine check handler routines
738 */
740 .globl mcck_int_handler
741 mcck_int_handler:
742 spt __LC_CPU_TIMER_SAVE_AREA # revalidate cpu timer
743 lm %r0,%r15,__LC_GPREGS_SAVE_AREA # revalidate gprs
744 SAVE_ALL_BASE __LC_SAVE_AREA+32
745 la %r12,__LC_MCK_OLD_PSW
746 tm __LC_MCCK_CODE,0x80 # system damage?
747 bo BASED(mcck_int_main) # yes -> rest of mcck code invalid
748 #ifdef CONFIG_VIRT_CPU_ACCOUNTING
749 mvc __LC_SAVE_AREA+52(8),__LC_ASYNC_ENTER_TIMER
750 mvc __LC_ASYNC_ENTER_TIMER(8),__LC_CPU_TIMER_SAVE_AREA
751 tm __LC_MCCK_CODE+5,0x02 # stored cpu timer value valid?
752 bo BASED(1f)
753 la %r14,__LC_SYNC_ENTER_TIMER
754 clc 0(8,%r14),__LC_ASYNC_ENTER_TIMER
755 bl BASED(0f)
756 la %r14,__LC_ASYNC_ENTER_TIMER
757 0: clc 0(8,%r14),__LC_EXIT_TIMER
758 bl BASED(0f)
759 la %r14,__LC_EXIT_TIMER
760 0: clc 0(8,%r14),__LC_LAST_UPDATE_TIMER
761 bl BASED(0f)
762 la %r14,__LC_LAST_UPDATE_TIMER
763 0: spt 0(%r14)
764 mvc __LC_ASYNC_ENTER_TIMER(8),0(%r14)
765 1:
766 #endif
767 tm __LC_MCCK_CODE+2,0x09 # mwp + ia of old psw valid?
768 bno BASED(mcck_int_main) # no -> skip cleanup critical
769 tm __LC_MCK_OLD_PSW+1,0x01 # test problem state bit
770 bnz BASED(mcck_int_main) # from user -> load async stack
771 clc __LC_MCK_OLD_PSW+4(4),BASED(.Lcritical_end)
772 bhe BASED(mcck_int_main)
773 clc __LC_MCK_OLD_PSW+4(4),BASED(.Lcritical_start)
774 bl BASED(mcck_int_main)
775 l %r14,BASED(.Lcleanup_critical)
776 basr %r14,%r14
777 mcck_int_main:
778 l %r14,__LC_PANIC_STACK # are we already on the panic stack?
779 slr %r14,%r15
780 sra %r14,PAGE_SHIFT
781 be BASED(0f)
782 l %r15,__LC_PANIC_STACK # load panic stack
783 0: CREATE_STACK_FRAME __LC_MCK_OLD_PSW,__LC_SAVE_AREA+32
784 #ifdef CONFIG_VIRT_CPU_ACCOUNTING
785 tm __LC_MCCK_CODE+2,0x08 # mwp of old psw valid?
786 bno BASED(mcck_no_vtime) # no -> skip cleanup critical
787 tm SP_PSW+1(%r15),0x01 # interrupting from user ?
788 bz BASED(mcck_no_vtime)
789 UPDATE_VTIME __LC_EXIT_TIMER,__LC_ASYNC_ENTER_TIMER,__LC_USER_TIMER
790 UPDATE_VTIME __LC_LAST_UPDATE_TIMER,__LC_EXIT_TIMER,__LC_SYSTEM_TIMER
791 mvc __LC_LAST_UPDATE_TIMER(8),__LC_ASYNC_ENTER_TIMER
792 mcck_no_vtime:
793 #endif
794 l %r9,__LC_THREAD_INFO # load pointer to thread_info struct
795 la %r2,SP_PTREGS(%r15) # load pt_regs
796 l %r1,BASED(.Ls390_mcck)
797 basr %r14,%r1 # call machine check handler
798 tm SP_PSW+1(%r15),0x01 # returning to user ?
799 bno BASED(mcck_return)
800 l %r1,__LC_KERNEL_STACK # switch to kernel stack
801 s %r1,BASED(.Lc_spsize)
802 mvc SP_PTREGS(__PT_SIZE,%r1),SP_PTREGS(%r15)
803 xc __SF_BACKCHAIN(4,%r1),__SF_BACKCHAIN(%r1) # clear back chain
804 lr %r15,%r1
805 stosm __SF_EMPTY(%r15),0x04 # turn dat on
806 tm __TI_flags+3(%r9),_TIF_MCCK_PENDING
807 bno BASED(mcck_return)
808 TRACE_IRQS_OFF
809 l %r1,BASED(.Ls390_handle_mcck)
810 basr %r14,%r1 # call machine check handler
811 TRACE_IRQS_ON
812 mcck_return:
813 mvc __LC_RETURN_MCCK_PSW(8),SP_PSW(%r15) # move return PSW
814 ni __LC_RETURN_MCCK_PSW+1,0xfd # clear wait state bit
815 #ifdef CONFIG_VIRT_CPU_ACCOUNTING
816 mvc __LC_ASYNC_ENTER_TIMER(8),__LC_SAVE_AREA+52
817 tm __LC_RETURN_MCCK_PSW+1,0x01 # returning to user ?
818 bno BASED(0f)
819 lm %r0,%r15,SP_R0(%r15) # load gprs 0-15
820 stpt __LC_EXIT_TIMER
821 lpsw __LC_RETURN_MCCK_PSW # back to caller
822 0:
823 #endif
824 lm %r0,%r15,SP_R0(%r15) # load gprs 0-15
825 lpsw __LC_RETURN_MCCK_PSW # back to caller
827 RESTORE_ALL __LC_RETURN_MCCK_PSW,0
829 /*
830 * Restart interruption handler, kick starter for additional CPUs
831 */
832 #ifdef CONFIG_SMP
833 __CPUINIT
834 .globl restart_int_handler
835 restart_int_handler:
836 l %r15,__LC_SAVE_AREA+60 # load ksp
837 lctl %c0,%c15,__LC_CREGS_SAVE_AREA # get new ctl regs
838 lam %a0,%a15,__LC_AREGS_SAVE_AREA
839 lm %r6,%r15,__SF_GPRS(%r15) # load registers from clone
840 stosm __SF_EMPTY(%r15),0x04 # now we can turn dat on
841 basr %r14,0
842 l %r14,restart_addr-.(%r14)
843 br %r14 # branch to start_secondary
844 restart_addr:
845 .long start_secondary
846 .previous
847 #else
848 /*
849 * If we do not run with SMP enabled, let the new CPU crash ...
850 */
851 .globl restart_int_handler
852 restart_int_handler:
853 basr %r1,0
854 restart_base:
855 lpsw restart_crash-restart_base(%r1)
856 .align 8
857 restart_crash:
858 .long 0x000a0000,0x00000000
859 restart_go:
860 #endif
862 #ifdef CONFIG_CHECK_STACK
863 /*
864 * The synchronous or the asynchronous stack overflowed. We are dead.
865 * No need to properly save the registers, we are going to panic anyway.
866 * Setup a pt_regs so that show_trace can provide a good call trace.
867 */
868 stack_overflow:
869 l %r15,__LC_PANIC_STACK # change to panic stack
870 sl %r15,BASED(.Lc_spsize)
871 mvc SP_PSW(8,%r15),0(%r12) # move user PSW to stack
872 stm %r0,%r11,SP_R0(%r15) # store gprs %r0-%r11 to kernel stack
873 la %r1,__LC_SAVE_AREA
874 ch %r12,BASED(.L0x020) # old psw addr == __LC_SVC_OLD_PSW ?
875 be BASED(0f)
876 ch %r12,BASED(.L0x028) # old psw addr == __LC_PGM_OLD_PSW ?
877 be BASED(0f)
878 la %r1,__LC_SAVE_AREA+16
879 0: mvc SP_R12(16,%r15),0(%r1) # move %r12-%r15 to stack
880 xc __SF_BACKCHAIN(4,%r15),__SF_BACKCHAIN(%r15) # clear back chain
881 l %r1,BASED(1f) # branch to kernel_stack_overflow
882 la %r2,SP_PTREGS(%r15) # load pt_regs
883 br %r1
884 1: .long kernel_stack_overflow
885 #endif
887 cleanup_table_system_call:
888 .long system_call + 0x80000000, sysc_do_svc + 0x80000000
889 cleanup_table_sysc_return:
890 .long sysc_return + 0x80000000, sysc_leave + 0x80000000
891 cleanup_table_sysc_leave:
892 .long sysc_leave + 0x80000000, sysc_done + 0x80000000
893 cleanup_table_sysc_work_loop:
894 .long sysc_work_loop + 0x80000000, sysc_work_done + 0x80000000
895 cleanup_table_io_return:
896 .long io_return + 0x80000000, io_leave + 0x80000000
897 cleanup_table_io_leave:
898 .long io_leave + 0x80000000, io_done + 0x80000000
899 cleanup_table_io_work_loop:
900 .long io_work_loop + 0x80000000, io_work_done + 0x80000000
902 cleanup_critical:
903 clc 4(4,%r12),BASED(cleanup_table_system_call)
904 bl BASED(0f)
905 clc 4(4,%r12),BASED(cleanup_table_system_call+4)
906 bl BASED(cleanup_system_call)
907 0:
908 clc 4(4,%r12),BASED(cleanup_table_sysc_return)
909 bl BASED(0f)
910 clc 4(4,%r12),BASED(cleanup_table_sysc_return+4)
911 bl BASED(cleanup_sysc_return)
912 0:
913 clc 4(4,%r12),BASED(cleanup_table_sysc_leave)
914 bl BASED(0f)
915 clc 4(4,%r12),BASED(cleanup_table_sysc_leave+4)
916 bl BASED(cleanup_sysc_leave)
917 0:
918 clc 4(4,%r12),BASED(cleanup_table_sysc_work_loop)
919 bl BASED(0f)
920 clc 4(4,%r12),BASED(cleanup_table_sysc_work_loop+4)
921 bl BASED(cleanup_sysc_return)
922 0:
923 clc 4(4,%r12),BASED(cleanup_table_io_return)
924 bl BASED(0f)
925 clc 4(4,%r12),BASED(cleanup_table_io_return+4)
926 bl BASED(cleanup_io_return)
927 0:
928 clc 4(4,%r12),BASED(cleanup_table_io_leave)
929 bl BASED(0f)
930 clc 4(4,%r12),BASED(cleanup_table_io_leave+4)
931 bl BASED(cleanup_io_leave)
932 0:
933 clc 4(4,%r12),BASED(cleanup_table_io_work_loop)
934 bl BASED(0f)
935 clc 4(4,%r12),BASED(cleanup_table_io_work_loop+4)
936 bl BASED(cleanup_io_return)
937 0:
938 br %r14
940 cleanup_system_call:
941 mvc __LC_RETURN_PSW(8),0(%r12)
942 c %r12,BASED(.Lmck_old_psw)
943 be BASED(0f)
944 la %r12,__LC_SAVE_AREA+16
945 b BASED(1f)
946 0: la %r12,__LC_SAVE_AREA+32
947 1:
948 #ifdef CONFIG_VIRT_CPU_ACCOUNTING
949 clc __LC_RETURN_PSW+4(4),BASED(cleanup_system_call_insn+4)
950 bh BASED(0f)
951 mvc __LC_SYNC_ENTER_TIMER(8),__LC_ASYNC_ENTER_TIMER
952 0: clc __LC_RETURN_PSW+4(4),BASED(cleanup_system_call_insn+8)
953 bhe BASED(cleanup_vtime)
954 #endif
955 clc __LC_RETURN_PSW+4(4),BASED(cleanup_system_call_insn)
956 bh BASED(0f)
957 mvc __LC_SAVE_AREA(16),0(%r12)
958 0: st %r13,4(%r12)
959 st %r12,__LC_SAVE_AREA+48 # argh
960 SAVE_ALL_SYNC __LC_SVC_OLD_PSW,__LC_SAVE_AREA
961 CREATE_STACK_FRAME __LC_SVC_OLD_PSW,__LC_SAVE_AREA
962 l %r12,__LC_SAVE_AREA+48 # argh
963 st %r15,12(%r12)
964 lh %r7,0x8a
965 #ifdef CONFIG_VIRT_CPU_ACCOUNTING
966 cleanup_vtime:
967 clc __LC_RETURN_PSW+4(4),BASED(cleanup_system_call_insn+12)
968 bhe BASED(cleanup_stime)
969 UPDATE_VTIME __LC_EXIT_TIMER,__LC_SYNC_ENTER_TIMER,__LC_USER_TIMER
970 cleanup_stime:
971 clc __LC_RETURN_PSW+4(4),BASED(cleanup_system_call_insn+16)
972 bh BASED(cleanup_update)
973 UPDATE_VTIME __LC_LAST_UPDATE_TIMER,__LC_EXIT_TIMER,__LC_SYSTEM_TIMER
974 cleanup_update:
975 mvc __LC_LAST_UPDATE_TIMER(8),__LC_SYNC_ENTER_TIMER
976 #endif
977 mvc __LC_RETURN_PSW+4(4),BASED(cleanup_table_system_call+4)
978 la %r12,__LC_RETURN_PSW
979 br %r14
980 cleanup_system_call_insn:
981 .long sysc_saveall + 0x80000000
982 #ifdef CONFIG_VIRT_CPU_ACCOUNTING
983 .long system_call + 0x80000000
984 .long sysc_vtime + 0x80000000
985 .long sysc_stime + 0x80000000
986 .long sysc_update + 0x80000000
987 #endif
989 cleanup_sysc_return:
990 mvc __LC_RETURN_PSW(4),0(%r12)
991 mvc __LC_RETURN_PSW+4(4),BASED(cleanup_table_sysc_return)
992 la %r12,__LC_RETURN_PSW
993 br %r14
995 cleanup_sysc_leave:
996 clc 4(4,%r12),BASED(cleanup_sysc_leave_insn)
997 be BASED(2f)
998 #ifdef CONFIG_VIRT_CPU_ACCOUNTING
999 mvc __LC_EXIT_TIMER(8),__LC_ASYNC_ENTER_TIMER
1000 clc 4(4,%r12),BASED(cleanup_sysc_leave_insn+4)
1001 be BASED(2f)
1002 #endif
1003 mvc __LC_RETURN_PSW(8),SP_PSW(%r15)
1004 c %r12,BASED(.Lmck_old_psw)
1005 bne BASED(0f)
1006 mvc __LC_SAVE_AREA+32(16),SP_R12(%r15)
1007 b BASED(1f)
1008 0: mvc __LC_SAVE_AREA+16(16),SP_R12(%r15)
1009 1: lm %r0,%r11,SP_R0(%r15)
1010 l %r15,SP_R15(%r15)
1011 2: la %r12,__LC_RETURN_PSW
1012 br %r14
1013 cleanup_sysc_leave_insn:
1014 .long sysc_done - 4 + 0x80000000
1015 #ifdef CONFIG_VIRT_CPU_ACCOUNTING
1016 .long sysc_done - 8 + 0x80000000
1017 #endif
1019 cleanup_io_return:
1020 mvc __LC_RETURN_PSW(4),0(%r12)
1021 mvc __LC_RETURN_PSW+4(4),BASED(cleanup_table_io_work_loop)
1022 la %r12,__LC_RETURN_PSW
1023 br %r14
1025 cleanup_io_leave:
1026 clc 4(4,%r12),BASED(cleanup_io_leave_insn)
1027 be BASED(2f)
1028 #ifdef CONFIG_VIRT_CPU_ACCOUNTING
1029 mvc __LC_EXIT_TIMER(8),__LC_ASYNC_ENTER_TIMER
1030 clc 4(4,%r12),BASED(cleanup_io_leave_insn+4)
1031 be BASED(2f)
1032 #endif
1033 mvc __LC_RETURN_PSW(8),SP_PSW(%r15)
1034 c %r12,BASED(.Lmck_old_psw)
1035 bne BASED(0f)
1036 mvc __LC_SAVE_AREA+32(16),SP_R12(%r15)
1037 b BASED(1f)
1038 0: mvc __LC_SAVE_AREA+16(16),SP_R12(%r15)
1039 1: lm %r0,%r11,SP_R0(%r15)
1040 l %r15,SP_R15(%r15)
1041 2: la %r12,__LC_RETURN_PSW
1042 br %r14
1043 cleanup_io_leave_insn:
1044 .long io_done - 4 + 0x80000000
1045 #ifdef CONFIG_VIRT_CPU_ACCOUNTING
1046 .long io_done - 8 + 0x80000000
1047 #endif
1049 /*
1050 * Integer constants
1051 */
1052 .align 4
1053 .Lc_spsize: .long SP_SIZE
1054 .Lc_overhead: .long STACK_FRAME_OVERHEAD
1055 .Lnr_syscalls: .long NR_syscalls
1056 .L0x018: .short 0x018
1057 .L0x020: .short 0x020
1058 .L0x028: .short 0x028
1059 .L0x030: .short 0x030
1060 .L0x038: .short 0x038
1061 .Lc_1: .long 1
1063 /*
1064 * Symbol constants
1065 */
1066 .Ls390_mcck: .long s390_do_machine_check
1067 .Ls390_handle_mcck:
1068 .long s390_handle_mcck
1069 .Lmck_old_psw: .long __LC_MCK_OLD_PSW
1070 .Ldo_IRQ: .long do_IRQ
1071 .Ldo_extint: .long do_extint
1072 .Ldo_signal: .long do_signal
1073 .Lhandle_per: .long do_single_step
1074 .Ldo_execve: .long do_execve
1075 .Lexecve_tail: .long execve_tail
1076 .Ljump_table: .long pgm_check_table
1077 .Lschedule: .long schedule
1078 #ifdef CONFIG_PREEMPT
1079 .Lpreempt_schedule_irq:
1080 .long preempt_schedule_irq
1081 #endif
1082 .Ltrace: .long syscall_trace
1083 .Lschedtail: .long schedule_tail
1084 .Lsysc_table: .long sys_call_table
1085 #ifdef CONFIG_TRACE_IRQFLAGS
1086 .Ltrace_irq_on: .long trace_hardirqs_on
1087 .Ltrace_irq_off:
1088 .long trace_hardirqs_off
1089 .Llockdep_sys_exit:
1090 .long lockdep_sys_exit
1091 #endif
1092 .Lcritical_start:
1093 .long __critical_start + 0x80000000
1094 .Lcritical_end:
1095 .long __critical_end + 0x80000000
1096 .Lcleanup_critical:
1097 .long cleanup_critical
1099 .section .rodata, "a"
1100 #define SYSCALL(esa,esame,emu) .long esa
1101 sys_call_table:
1102 #include "syscalls.S"
1103 #undef SYSCALL