drivers/gpu/drm/i915/i915_gem_fence_reg.h

   1 /*
   2  * Copyright © 2016 Intel Corporation
   3  *
   4  * Permission is hereby granted, free of charge, to any person obtaining a
   5  * copy of this software and associated documentation files (the "Software"),
   6  * to deal in the Software without restriction, including without limitation
   7  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
   8  * and/or sell copies of the Software, and to permit persons to whom the
   9  * Software is furnished to do so, subject to the following conditions:
  10  *
  11  * The above copyright notice and this permission notice (including the next
  12  * paragraph) shall be included in all copies or substantial portions of the
  13  * Software.
  14  *
  15  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  16  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  17  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  18  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  19  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  20  * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
  21  * IN THE SOFTWARE.
  22  *
  23  */
  24
  25 #ifndef __I915_FENCE_REG_H__
  26 #define __I915_FENCE_REG_H__
  27
  28 #include <linux/list.h>
  29
  30 struct drm_i915_private;
  31 struct i915_vma;
  32
  33 #define I965_FENCE_PAGE 4096UL
  34
  35 struct drm_i915_fence_reg {
  36         struct list_head link;
  37         struct drm_i915_private *i915;
  38         struct i915_vma *vma;
  39         int pin_count;
  40         int id;
  41         /**
  42          * Whether the tiling parameters for the currently
  43          * associated fence register have changed. Note that
  44          * for the purposes of tracking tiling changes we also
  45          * treat the unfenced register, the register slot that
  46          * the object occupies whilst it executes a fenced
  47          * command (such as BLT on gen2/3), as a "fence".
  48          */
  49         bool dirty;
  50 };
  51
  52 #endif
  53