drm/exynos: Stop using drm_framebuffer_unregister_private
[linux/fpc-iii.git] / drivers / gpu / drm / sti / sti_dvo.c
blob411dc6ec976ecce8d45d79307a4f12c146a2fdfa
1 /*
2 * Copyright (C) STMicroelectronics SA 2014
3 * Author: Vincent Abriou <vincent.abriou@st.com> for STMicroelectronics.
4 * License terms: GNU General Public License (GPL), version 2
5 */
7 #include <linux/clk.h>
8 #include <linux/component.h>
9 #include <linux/debugfs.h>
10 #include <linux/module.h>
11 #include <linux/of_gpio.h>
12 #include <linux/platform_device.h>
14 #include <drm/drmP.h>
15 #include <drm/drm_atomic_helper.h>
16 #include <drm/drm_crtc_helper.h>
17 #include <drm/drm_panel.h>
19 #include "sti_awg_utils.h"
20 #include "sti_drv.h"
21 #include "sti_mixer.h"
23 /* DVO registers */
24 #define DVO_AWG_DIGSYNC_CTRL 0x0000
25 #define DVO_DOF_CFG 0x0004
26 #define DVO_LUT_PROG_LOW 0x0008
27 #define DVO_LUT_PROG_MID 0x000C
28 #define DVO_LUT_PROG_HIGH 0x0010
29 #define DVO_DIGSYNC_INSTR_I 0x0100
31 #define DVO_AWG_CTRL_EN BIT(0)
32 #define DVO_AWG_FRAME_BASED_SYNC BIT(2)
34 #define DVO_DOF_EN_LOWBYTE BIT(0)
35 #define DVO_DOF_EN_MIDBYTE BIT(1)
36 #define DVO_DOF_EN_HIGHBYTE BIT(2)
37 #define DVO_DOF_EN BIT(6)
38 #define DVO_DOF_MOD_COUNT_SHIFT 8
40 #define DVO_LUT_ZERO 0
41 #define DVO_LUT_Y_G 1
42 #define DVO_LUT_Y_G_DEL 2
43 #define DVO_LUT_CB_B 3
44 #define DVO_LUT_CB_B_DEL 4
45 #define DVO_LUT_CR_R 5
46 #define DVO_LUT_CR_R_DEL 6
47 #define DVO_LUT_HOLD 7
49 struct dvo_config {
50 u32 flags;
51 u32 lowbyte;
52 u32 midbyte;
53 u32 highbyte;
54 int (*awg_fwgen_fct)(
55 struct awg_code_generation_params *fw_gen_params,
56 struct awg_timing *timing);
59 static struct dvo_config rgb_24bit_de_cfg = {
60 .flags = (0L << DVO_DOF_MOD_COUNT_SHIFT),
61 .lowbyte = DVO_LUT_CR_R,
62 .midbyte = DVO_LUT_Y_G,
63 .highbyte = DVO_LUT_CB_B,
64 .awg_fwgen_fct = sti_awg_generate_code_data_enable_mode,
67 /**
68 * STI digital video output structure
70 * @dev: driver device
71 * @drm_dev: pointer to drm device
72 * @mode: current display mode selected
73 * @regs: dvo registers
74 * @clk_pix: pixel clock for dvo
75 * @clk: clock for dvo
76 * @clk_main_parent: dvo parent clock if main path used
77 * @clk_aux_parent: dvo parent clock if aux path used
78 * @panel_node: panel node reference from device tree
79 * @panel: reference to the panel connected to the dvo
80 * @enabled: true if dvo is enabled else false
81 * @encoder: drm_encoder it is bound
83 struct sti_dvo {
84 struct device dev;
85 struct drm_device *drm_dev;
86 struct drm_display_mode mode;
87 void __iomem *regs;
88 struct clk *clk_pix;
89 struct clk *clk;
90 struct clk *clk_main_parent;
91 struct clk *clk_aux_parent;
92 struct device_node *panel_node;
93 struct drm_panel *panel;
94 struct dvo_config *config;
95 bool enabled;
96 struct drm_encoder *encoder;
97 struct drm_bridge *bridge;
100 struct sti_dvo_connector {
101 struct drm_connector drm_connector;
102 struct drm_encoder *encoder;
103 struct sti_dvo *dvo;
106 #define to_sti_dvo_connector(x) \
107 container_of(x, struct sti_dvo_connector, drm_connector)
109 #define BLANKING_LEVEL 16
110 static int dvo_awg_generate_code(struct sti_dvo *dvo, u8 *ram_size, u32 *ram_code)
112 struct drm_display_mode *mode = &dvo->mode;
113 struct dvo_config *config = dvo->config;
114 struct awg_code_generation_params fw_gen_params;
115 struct awg_timing timing;
117 fw_gen_params.ram_code = ram_code;
118 fw_gen_params.instruction_offset = 0;
120 timing.total_lines = mode->vtotal;
121 timing.active_lines = mode->vdisplay;
122 timing.blanking_lines = mode->vsync_start - mode->vdisplay;
123 timing.trailing_lines = mode->vtotal - mode->vsync_start;
124 timing.total_pixels = mode->htotal;
125 timing.active_pixels = mode->hdisplay;
126 timing.blanking_pixels = mode->hsync_start - mode->hdisplay;
127 timing.trailing_pixels = mode->htotal - mode->hsync_start;
128 timing.blanking_level = BLANKING_LEVEL;
130 if (config->awg_fwgen_fct(&fw_gen_params, &timing)) {
131 DRM_ERROR("AWG firmware not properly generated\n");
132 return -EINVAL;
135 *ram_size = fw_gen_params.instruction_offset;
137 return 0;
140 /* Configure AWG, writing instructions
142 * @dvo: pointer to DVO structure
143 * @awg_ram_code: pointer to AWG instructions table
144 * @nb: nb of AWG instructions
146 static void dvo_awg_configure(struct sti_dvo *dvo, u32 *awg_ram_code, int nb)
148 int i;
150 DRM_DEBUG_DRIVER("\n");
152 for (i = 0; i < nb; i++)
153 writel(awg_ram_code[i],
154 dvo->regs + DVO_DIGSYNC_INSTR_I + i * 4);
155 for (i = nb; i < AWG_MAX_INST; i++)
156 writel(0, dvo->regs + DVO_DIGSYNC_INSTR_I + i * 4);
158 writel(DVO_AWG_CTRL_EN, dvo->regs + DVO_AWG_DIGSYNC_CTRL);
161 #define DBGFS_DUMP(reg) seq_printf(s, "\n %-25s 0x%08X", #reg, \
162 readl(dvo->regs + reg))
164 static void dvo_dbg_awg_microcode(struct seq_file *s, void __iomem *reg)
166 unsigned int i;
168 seq_puts(s, "\n\n");
169 seq_puts(s, " DVO AWG microcode:");
170 for (i = 0; i < AWG_MAX_INST; i++) {
171 if (i % 8 == 0)
172 seq_printf(s, "\n %04X:", i);
173 seq_printf(s, " %04X", readl(reg + i * 4));
177 static int dvo_dbg_show(struct seq_file *s, void *data)
179 struct drm_info_node *node = s->private;
180 struct sti_dvo *dvo = (struct sti_dvo *)node->info_ent->data;
182 seq_printf(s, "DVO: (vaddr = 0x%p)", dvo->regs);
183 DBGFS_DUMP(DVO_AWG_DIGSYNC_CTRL);
184 DBGFS_DUMP(DVO_DOF_CFG);
185 DBGFS_DUMP(DVO_LUT_PROG_LOW);
186 DBGFS_DUMP(DVO_LUT_PROG_MID);
187 DBGFS_DUMP(DVO_LUT_PROG_HIGH);
188 dvo_dbg_awg_microcode(s, dvo->regs + DVO_DIGSYNC_INSTR_I);
189 seq_puts(s, "\n");
191 return 0;
194 static struct drm_info_list dvo_debugfs_files[] = {
195 { "dvo", dvo_dbg_show, 0, NULL },
198 static void dvo_debugfs_exit(struct sti_dvo *dvo, struct drm_minor *minor)
200 drm_debugfs_remove_files(dvo_debugfs_files,
201 ARRAY_SIZE(dvo_debugfs_files),
202 minor);
205 static int dvo_debugfs_init(struct sti_dvo *dvo, struct drm_minor *minor)
207 unsigned int i;
209 for (i = 0; i < ARRAY_SIZE(dvo_debugfs_files); i++)
210 dvo_debugfs_files[i].data = dvo;
212 return drm_debugfs_create_files(dvo_debugfs_files,
213 ARRAY_SIZE(dvo_debugfs_files),
214 minor->debugfs_root, minor);
217 static void sti_dvo_disable(struct drm_bridge *bridge)
219 struct sti_dvo *dvo = bridge->driver_private;
221 if (!dvo->enabled)
222 return;
224 DRM_DEBUG_DRIVER("\n");
226 if (dvo->config->awg_fwgen_fct)
227 writel(0x00000000, dvo->regs + DVO_AWG_DIGSYNC_CTRL);
229 writel(0x00000000, dvo->regs + DVO_DOF_CFG);
231 if (dvo->panel)
232 dvo->panel->funcs->disable(dvo->panel);
234 /* Disable/unprepare dvo clock */
235 clk_disable_unprepare(dvo->clk_pix);
236 clk_disable_unprepare(dvo->clk);
238 dvo->enabled = false;
241 static void sti_dvo_pre_enable(struct drm_bridge *bridge)
243 struct sti_dvo *dvo = bridge->driver_private;
244 struct dvo_config *config = dvo->config;
245 u32 val;
247 DRM_DEBUG_DRIVER("\n");
249 if (dvo->enabled)
250 return;
252 /* Make sure DVO is disabled */
253 writel(0x00000000, dvo->regs + DVO_DOF_CFG);
254 writel(0x00000000, dvo->regs + DVO_AWG_DIGSYNC_CTRL);
256 if (config->awg_fwgen_fct) {
257 u8 nb_instr;
258 u32 awg_ram_code[AWG_MAX_INST];
259 /* Configure AWG */
260 if (!dvo_awg_generate_code(dvo, &nb_instr, awg_ram_code))
261 dvo_awg_configure(dvo, awg_ram_code, nb_instr);
262 else
263 return;
266 /* Prepare/enable clocks */
267 if (clk_prepare_enable(dvo->clk_pix))
268 DRM_ERROR("Failed to prepare/enable dvo_pix clk\n");
269 if (clk_prepare_enable(dvo->clk))
270 DRM_ERROR("Failed to prepare/enable dvo clk\n");
272 if (dvo->panel)
273 dvo->panel->funcs->enable(dvo->panel);
275 /* Set LUT */
276 writel(config->lowbyte, dvo->regs + DVO_LUT_PROG_LOW);
277 writel(config->midbyte, dvo->regs + DVO_LUT_PROG_MID);
278 writel(config->highbyte, dvo->regs + DVO_LUT_PROG_HIGH);
280 /* Digital output formatter config */
281 val = (config->flags | DVO_DOF_EN);
282 writel(val, dvo->regs + DVO_DOF_CFG);
284 dvo->enabled = true;
287 static void sti_dvo_set_mode(struct drm_bridge *bridge,
288 struct drm_display_mode *mode,
289 struct drm_display_mode *adjusted_mode)
291 struct sti_dvo *dvo = bridge->driver_private;
292 struct sti_mixer *mixer = to_sti_mixer(dvo->encoder->crtc);
293 int rate = mode->clock * 1000;
294 struct clk *clkp;
295 int ret;
297 DRM_DEBUG_DRIVER("\n");
299 memcpy(&dvo->mode, mode, sizeof(struct drm_display_mode));
301 /* According to the path used (main or aux), the dvo clocks should
302 * have a different parent clock. */
303 if (mixer->id == STI_MIXER_MAIN)
304 clkp = dvo->clk_main_parent;
305 else
306 clkp = dvo->clk_aux_parent;
308 if (clkp) {
309 clk_set_parent(dvo->clk_pix, clkp);
310 clk_set_parent(dvo->clk, clkp);
313 /* DVO clocks = compositor clock */
314 ret = clk_set_rate(dvo->clk_pix, rate);
315 if (ret < 0) {
316 DRM_ERROR("Cannot set rate (%dHz) for dvo_pix clk\n", rate);
317 return;
320 ret = clk_set_rate(dvo->clk, rate);
321 if (ret < 0) {
322 DRM_ERROR("Cannot set rate (%dHz) for dvo clk\n", rate);
323 return;
326 /* For now, we only support 24bit data enable (DE) synchro format */
327 dvo->config = &rgb_24bit_de_cfg;
330 static void sti_dvo_bridge_nope(struct drm_bridge *bridge)
332 /* do nothing */
335 static const struct drm_bridge_funcs sti_dvo_bridge_funcs = {
336 .pre_enable = sti_dvo_pre_enable,
337 .enable = sti_dvo_bridge_nope,
338 .disable = sti_dvo_disable,
339 .post_disable = sti_dvo_bridge_nope,
340 .mode_set = sti_dvo_set_mode,
343 static int sti_dvo_connector_get_modes(struct drm_connector *connector)
345 struct sti_dvo_connector *dvo_connector
346 = to_sti_dvo_connector(connector);
347 struct sti_dvo *dvo = dvo_connector->dvo;
349 if (dvo->panel)
350 return dvo->panel->funcs->get_modes(dvo->panel);
352 return 0;
355 #define CLK_TOLERANCE_HZ 50
357 static int sti_dvo_connector_mode_valid(struct drm_connector *connector,
358 struct drm_display_mode *mode)
360 int target = mode->clock * 1000;
361 int target_min = target - CLK_TOLERANCE_HZ;
362 int target_max = target + CLK_TOLERANCE_HZ;
363 int result;
364 struct sti_dvo_connector *dvo_connector
365 = to_sti_dvo_connector(connector);
366 struct sti_dvo *dvo = dvo_connector->dvo;
368 result = clk_round_rate(dvo->clk_pix, target);
370 DRM_DEBUG_DRIVER("target rate = %d => available rate = %d\n",
371 target, result);
373 if ((result < target_min) || (result > target_max)) {
374 DRM_DEBUG_DRIVER("dvo pixclk=%d not supported\n", target);
375 return MODE_BAD;
378 return MODE_OK;
381 static const
382 struct drm_connector_helper_funcs sti_dvo_connector_helper_funcs = {
383 .get_modes = sti_dvo_connector_get_modes,
384 .mode_valid = sti_dvo_connector_mode_valid,
387 static enum drm_connector_status
388 sti_dvo_connector_detect(struct drm_connector *connector, bool force)
390 struct sti_dvo_connector *dvo_connector
391 = to_sti_dvo_connector(connector);
392 struct sti_dvo *dvo = dvo_connector->dvo;
394 DRM_DEBUG_DRIVER("\n");
396 if (!dvo->panel) {
397 dvo->panel = of_drm_find_panel(dvo->panel_node);
398 if (dvo->panel)
399 drm_panel_attach(dvo->panel, connector);
402 if (dvo->panel)
403 return connector_status_connected;
405 return connector_status_disconnected;
408 static int sti_dvo_late_register(struct drm_connector *connector)
410 struct sti_dvo_connector *dvo_connector
411 = to_sti_dvo_connector(connector);
412 struct sti_dvo *dvo = dvo_connector->dvo;
414 if (dvo_debugfs_init(dvo, dvo->drm_dev->primary)) {
415 DRM_ERROR("DVO debugfs setup failed\n");
416 return -EINVAL;
419 return 0;
422 static const struct drm_connector_funcs sti_dvo_connector_funcs = {
423 .dpms = drm_atomic_helper_connector_dpms,
424 .fill_modes = drm_helper_probe_single_connector_modes,
425 .detect = sti_dvo_connector_detect,
426 .destroy = drm_connector_cleanup,
427 .reset = drm_atomic_helper_connector_reset,
428 .atomic_duplicate_state = drm_atomic_helper_connector_duplicate_state,
429 .atomic_destroy_state = drm_atomic_helper_connector_destroy_state,
430 .late_register = sti_dvo_late_register,
433 static struct drm_encoder *sti_dvo_find_encoder(struct drm_device *dev)
435 struct drm_encoder *encoder;
437 list_for_each_entry(encoder, &dev->mode_config.encoder_list, head) {
438 if (encoder->encoder_type == DRM_MODE_ENCODER_LVDS)
439 return encoder;
442 return NULL;
445 static int sti_dvo_bind(struct device *dev, struct device *master, void *data)
447 struct sti_dvo *dvo = dev_get_drvdata(dev);
448 struct drm_device *drm_dev = data;
449 struct drm_encoder *encoder;
450 struct sti_dvo_connector *connector;
451 struct drm_connector *drm_connector;
452 struct drm_bridge *bridge;
453 int err;
455 /* Set the drm device handle */
456 dvo->drm_dev = drm_dev;
458 encoder = sti_dvo_find_encoder(drm_dev);
459 if (!encoder)
460 return -ENOMEM;
462 connector = devm_kzalloc(dev, sizeof(*connector), GFP_KERNEL);
463 if (!connector)
464 return -ENOMEM;
466 connector->dvo = dvo;
468 bridge = devm_kzalloc(dev, sizeof(*bridge), GFP_KERNEL);
469 if (!bridge)
470 return -ENOMEM;
472 bridge->driver_private = dvo;
473 bridge->funcs = &sti_dvo_bridge_funcs;
474 bridge->of_node = dvo->dev.of_node;
475 err = drm_bridge_add(bridge);
476 if (err) {
477 DRM_ERROR("Failed to add bridge\n");
478 return err;
481 err = drm_bridge_attach(encoder, bridge, NULL);
482 if (err) {
483 DRM_ERROR("Failed to attach bridge\n");
484 return err;
487 dvo->bridge = bridge;
488 connector->encoder = encoder;
489 dvo->encoder = encoder;
491 drm_connector = (struct drm_connector *)connector;
493 drm_connector->polled = DRM_CONNECTOR_POLL_HPD;
495 drm_connector_init(drm_dev, drm_connector,
496 &sti_dvo_connector_funcs, DRM_MODE_CONNECTOR_LVDS);
497 drm_connector_helper_add(drm_connector,
498 &sti_dvo_connector_helper_funcs);
500 err = drm_mode_connector_attach_encoder(drm_connector, encoder);
501 if (err) {
502 DRM_ERROR("Failed to attach a connector to a encoder\n");
503 goto err_sysfs;
506 return 0;
508 err_sysfs:
509 drm_bridge_remove(bridge);
510 return -EINVAL;
513 static void sti_dvo_unbind(struct device *dev,
514 struct device *master, void *data)
516 struct sti_dvo *dvo = dev_get_drvdata(dev);
517 struct drm_device *drm_dev = data;
519 dvo_debugfs_exit(dvo, drm_dev->primary);
521 drm_bridge_remove(dvo->bridge);
524 static const struct component_ops sti_dvo_ops = {
525 .bind = sti_dvo_bind,
526 .unbind = sti_dvo_unbind,
529 static int sti_dvo_probe(struct platform_device *pdev)
531 struct device *dev = &pdev->dev;
532 struct sti_dvo *dvo;
533 struct resource *res;
534 struct device_node *np = dev->of_node;
536 DRM_INFO("%s\n", __func__);
538 dvo = devm_kzalloc(dev, sizeof(*dvo), GFP_KERNEL);
539 if (!dvo) {
540 DRM_ERROR("Failed to allocate memory for DVO\n");
541 return -ENOMEM;
544 dvo->dev = pdev->dev;
546 res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "dvo-reg");
547 if (!res) {
548 DRM_ERROR("Invalid dvo resource\n");
549 return -ENOMEM;
551 dvo->regs = devm_ioremap_nocache(dev, res->start,
552 resource_size(res));
553 if (!dvo->regs)
554 return -ENOMEM;
556 dvo->clk_pix = devm_clk_get(dev, "dvo_pix");
557 if (IS_ERR(dvo->clk_pix)) {
558 DRM_ERROR("Cannot get dvo_pix clock\n");
559 return PTR_ERR(dvo->clk_pix);
562 dvo->clk = devm_clk_get(dev, "dvo");
563 if (IS_ERR(dvo->clk)) {
564 DRM_ERROR("Cannot get dvo clock\n");
565 return PTR_ERR(dvo->clk);
568 dvo->clk_main_parent = devm_clk_get(dev, "main_parent");
569 if (IS_ERR(dvo->clk_main_parent)) {
570 DRM_DEBUG_DRIVER("Cannot get main_parent clock\n");
571 dvo->clk_main_parent = NULL;
574 dvo->clk_aux_parent = devm_clk_get(dev, "aux_parent");
575 if (IS_ERR(dvo->clk_aux_parent)) {
576 DRM_DEBUG_DRIVER("Cannot get aux_parent clock\n");
577 dvo->clk_aux_parent = NULL;
580 dvo->panel_node = of_parse_phandle(np, "sti,panel", 0);
581 if (!dvo->panel_node)
582 DRM_ERROR("No panel associated to the dvo output\n");
583 of_node_put(dvo->panel_node);
585 platform_set_drvdata(pdev, dvo);
587 return component_add(&pdev->dev, &sti_dvo_ops);
590 static int sti_dvo_remove(struct platform_device *pdev)
592 component_del(&pdev->dev, &sti_dvo_ops);
593 return 0;
596 static struct of_device_id dvo_of_match[] = {
597 { .compatible = "st,stih407-dvo", },
598 { /* end node */ }
600 MODULE_DEVICE_TABLE(of, dvo_of_match);
602 struct platform_driver sti_dvo_driver = {
603 .driver = {
604 .name = "sti-dvo",
605 .owner = THIS_MODULE,
606 .of_match_table = dvo_of_match,
608 .probe = sti_dvo_probe,
609 .remove = sti_dvo_remove,
612 MODULE_AUTHOR("Benjamin Gaignard <benjamin.gaignard@st.com>");
613 MODULE_DESCRIPTION("STMicroelectronics SoC DRM driver");
614 MODULE_LICENSE("GPL");